1 /* Copyright 2008 - 2016 Freescale Semiconductor Inc.
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 * * Redistributions of source code must retain the above copyright
7 * notice, this list of conditions and the following disclaimer.
8 * * Redistributions in binary form must reproduce the above copyright
9 * notice, this list of conditions and the following disclaimer in the
10 * documentation and/or other materials provided with the distribution.
11 * * Neither the name of Freescale Semiconductor nor the
12 * names of its contributors may be used to endorse or promote products
13 * derived from this software without specific prior written permission.
15 * ALTERNATIVELY, this software may be distributed under the terms of the
16 * GNU General Public License ("GPL") as published by the Free Software
17 * Foundation, either version 2 of that License or (at your option) any
20 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
21 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
22 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
23 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
24 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
25 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
26 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
27 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
29 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
34 #include <linux/init.h>
35 #include <linux/module.h>
36 #include <linux/of_platform.h>
37 #include <linux/of_mdio.h>
38 #include <linux/of_net.h>
40 #include <linux/if_arp.h>
41 #include <linux/if_vlan.h>
42 #include <linux/icmp.h>
44 #include <linux/ipv6.h>
45 #include <linux/udp.h>
46 #include <linux/tcp.h>
47 #include <linux/net.h>
48 #include <linux/skbuff.h>
49 #include <linux/etherdevice.h>
50 #include <linux/if_ether.h>
51 #include <linux/highmem.h>
52 #include <linux/percpu.h>
53 #include <linux/dma-mapping.h>
54 #include <linux/sort.h>
55 #include <linux/phy_fixed.h>
56 #include <soc/fsl/bman.h>
57 #include <soc/fsl/qman.h>
59 #include "fman_port.h"
63 /* CREATE_TRACE_POINTS only needs to be defined once. Other dpaa files
64 * using trace events only need to #include <trace/events/sched.h>
66 #define CREATE_TRACE_POINTS
67 #include "dpaa_eth_trace.h"
69 static int debug = -1;
70 module_param(debug, int, 0444);
71 MODULE_PARM_DESC(debug, "Module/Driver verbosity level (0=none,...,16=all)");
73 static u16 tx_timeout = 1000;
74 module_param(tx_timeout, ushort, 0444);
75 MODULE_PARM_DESC(tx_timeout, "The Tx timeout in ms");
77 #define FM_FD_STAT_RX_ERRORS \
78 (FM_FD_ERR_DMA | FM_FD_ERR_PHYSICAL | \
79 FM_FD_ERR_SIZE | FM_FD_ERR_CLS_DISCARD | \
80 FM_FD_ERR_EXTRACTION | FM_FD_ERR_NO_SCHEME | \
81 FM_FD_ERR_PRS_TIMEOUT | FM_FD_ERR_PRS_ILL_INSTRUCT | \
82 FM_FD_ERR_PRS_HDR_ERR)
84 #define FM_FD_STAT_TX_ERRORS \
85 (FM_FD_ERR_UNSUPPORTED_FORMAT | \
86 FM_FD_ERR_LENGTH | FM_FD_ERR_DMA)
88 #define DPAA_MSG_DEFAULT (NETIF_MSG_DRV | NETIF_MSG_PROBE | \
89 NETIF_MSG_LINK | NETIF_MSG_IFUP | \
90 NETIF_MSG_IFDOWN | NETIF_MSG_HW)
92 #define DPAA_INGRESS_CS_THRESHOLD 0x10000000
93 /* Ingress congestion threshold on FMan ports
94 * The size in bytes of the ingress tail-drop threshold on FMan ports.
95 * Traffic piling up above this value will be rejected by QMan and discarded
99 /* Size in bytes of the FQ taildrop threshold */
100 #define DPAA_FQ_TD 0x200000
102 #define DPAA_CS_THRESHOLD_1G 0x06000000
103 /* Egress congestion threshold on 1G ports, range 0x1000 .. 0x10000000
104 * The size in bytes of the egress Congestion State notification threshold on
105 * 1G ports. The 1G dTSECs can quite easily be flooded by cores doing Tx in a
106 * tight loop (e.g. by sending UDP datagrams at "while(1) speed"),
107 * and the larger the frame size, the more acute the problem.
108 * So we have to find a balance between these factors:
109 * - avoiding the device staying congested for a prolonged time (risking
110 * the netdev watchdog to fire - see also the tx_timeout module param);
111 * - affecting performance of protocols such as TCP, which otherwise
112 * behave well under the congestion notification mechanism;
113 * - preventing the Tx cores from tightly-looping (as if the congestion
114 * threshold was too low to be effective);
115 * - running out of memory if the CS threshold is set too high.
118 #define DPAA_CS_THRESHOLD_10G 0x10000000
119 /* The size in bytes of the egress Congestion State notification threshold on
120 * 10G ports, range 0x1000 .. 0x10000000
123 /* Largest value that the FQD's OAL field can hold */
124 #define FSL_QMAN_MAX_OAL 127
126 /* Default alignment for start of data in an Rx FD */
127 #ifdef CONFIG_DPAA_ERRATUM_A050385
128 /* aligning data start to 64 avoids DMA transaction splits, unless the buffer
129 * is crossing a 4k page boundary
131 #define DPAA_FD_DATA_ALIGNMENT (fman_has_errata_a050385() ? 64 : 16)
132 /* aligning to 256 avoids DMA transaction splits caused by 4k page boundary
133 * crossings; also, all SG fragments except the last must have a size multiple
134 * of 256 to avoid DMA transaction splits
136 #define DPAA_A050385_ALIGN 256
137 #define DPAA_FD_RX_DATA_ALIGNMENT (fman_has_errata_a050385() ? \
138 DPAA_A050385_ALIGN : 16)
140 #define DPAA_FD_DATA_ALIGNMENT 16
141 #define DPAA_FD_RX_DATA_ALIGNMENT DPAA_FD_DATA_ALIGNMENT
144 /* The DPAA requires 256 bytes reserved and mapped for the SGT */
145 #define DPAA_SGT_SIZE 256
147 /* Values for the L3R field of the FM Parse Results
149 /* L3 Type field: First IP Present IPv4 */
150 #define FM_L3_PARSE_RESULT_IPV4 0x8000
151 /* L3 Type field: First IP Present IPv6 */
152 #define FM_L3_PARSE_RESULT_IPV6 0x4000
153 /* Values for the L4R field of the FM Parse Results */
154 /* L4 Type field: UDP */
155 #define FM_L4_PARSE_RESULT_UDP 0x40
156 /* L4 Type field: TCP */
157 #define FM_L4_PARSE_RESULT_TCP 0x20
159 /* FD status field indicating whether the FM Parser has attempted to validate
160 * the L4 csum of the frame.
161 * Note that having this bit set doesn't necessarily imply that the checksum
162 * is valid. One would have to check the parse results to find that out.
164 #define FM_FD_STAT_L4CV 0x00000004
166 #define DPAA_SGT_MAX_ENTRIES 16 /* maximum number of entries in SG Table */
167 #define DPAA_BUFF_RELEASE_MAX 8 /* maximum number of buffers released at once */
169 #define FSL_DPAA_BPID_INV 0xff
170 #define FSL_DPAA_ETH_MAX_BUF_COUNT 128
171 #define FSL_DPAA_ETH_REFILL_THRESHOLD 80
173 #define DPAA_TX_PRIV_DATA_SIZE 16
174 #define DPAA_PARSE_RESULTS_SIZE sizeof(struct fman_prs_result)
175 #define DPAA_TIME_STAMP_SIZE 8
176 #define DPAA_HASH_RESULTS_SIZE 8
177 #define DPAA_HWA_SIZE (DPAA_PARSE_RESULTS_SIZE + DPAA_TIME_STAMP_SIZE \
178 + DPAA_HASH_RESULTS_SIZE)
179 #define DPAA_RX_PRIV_DATA_DEFAULT_SIZE (DPAA_TX_PRIV_DATA_SIZE + \
180 dpaa_rx_extra_headroom)
181 #ifdef CONFIG_DPAA_ERRATUM_A050385
182 #define DPAA_RX_PRIV_DATA_A050385_SIZE (DPAA_A050385_ALIGN - DPAA_HWA_SIZE)
183 #define DPAA_RX_PRIV_DATA_SIZE (fman_has_errata_a050385() ? \
184 DPAA_RX_PRIV_DATA_A050385_SIZE : \
185 DPAA_RX_PRIV_DATA_DEFAULT_SIZE)
187 #define DPAA_RX_PRIV_DATA_SIZE DPAA_RX_PRIV_DATA_DEFAULT_SIZE
190 #define DPAA_ETH_PCD_RXQ_NUM 128
192 #define DPAA_ENQUEUE_RETRIES 100000
194 enum port_type {RX, TX};
197 struct dpaa_fq *tx_defq;
198 struct dpaa_fq *tx_errq;
199 struct dpaa_fq *rx_defq;
200 struct dpaa_fq *rx_errq;
201 struct dpaa_fq *rx_pcdq;
204 /* All the dpa bps in use at any moment */
205 static struct dpaa_bp *dpaa_bp_array[BM_MAX_NUM_OF_POOLS];
207 #define DPAA_BP_RAW_SIZE 4096
209 #ifdef CONFIG_DPAA_ERRATUM_A050385
210 #define dpaa_bp_size(raw_size) (SKB_WITH_OVERHEAD(raw_size) & \
211 ~(DPAA_A050385_ALIGN - 1))
213 #define dpaa_bp_size(raw_size) SKB_WITH_OVERHEAD(raw_size)
216 static int dpaa_max_frm;
218 static int dpaa_rx_extra_headroom;
220 #define dpaa_get_max_mtu() \
221 (dpaa_max_frm - (VLAN_ETH_HLEN + ETH_FCS_LEN))
223 static int dpaa_netdev_init(struct net_device *net_dev,
224 const struct net_device_ops *dpaa_ops,
227 struct dpaa_priv *priv = netdev_priv(net_dev);
228 struct device *dev = net_dev->dev.parent;
229 struct dpaa_percpu_priv *percpu_priv;
233 /* Although we access another CPU's private data here
234 * we do it at initialization so it is safe
236 for_each_possible_cpu(i) {
237 percpu_priv = per_cpu_ptr(priv->percpu_priv, i);
238 percpu_priv->net_dev = net_dev;
241 net_dev->netdev_ops = dpaa_ops;
242 mac_addr = priv->mac_dev->addr;
244 net_dev->mem_start = priv->mac_dev->res->start;
245 net_dev->mem_end = priv->mac_dev->res->end;
247 net_dev->min_mtu = ETH_MIN_MTU;
248 net_dev->max_mtu = dpaa_get_max_mtu();
250 net_dev->hw_features |= (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
251 NETIF_F_LLTX | NETIF_F_RXHASH);
253 net_dev->hw_features |= NETIF_F_SG | NETIF_F_HIGHDMA;
254 /* The kernels enables GSO automatically, if we declare NETIF_F_SG.
255 * For conformity, we'll still declare GSO explicitly.
257 net_dev->features |= NETIF_F_GSO;
258 net_dev->features |= NETIF_F_RXCSUM;
260 net_dev->priv_flags |= IFF_LIVE_ADDR_CHANGE;
261 /* we do not want shared skbs on TX */
262 net_dev->priv_flags &= ~IFF_TX_SKB_SHARING;
264 net_dev->features |= net_dev->hw_features;
265 net_dev->vlan_features = net_dev->features;
267 if (is_valid_ether_addr(mac_addr)) {
268 memcpy(net_dev->perm_addr, mac_addr, net_dev->addr_len);
269 memcpy(net_dev->dev_addr, mac_addr, net_dev->addr_len);
271 eth_hw_addr_random(net_dev);
272 err = priv->mac_dev->change_addr(priv->mac_dev->fman_mac,
273 (enet_addr_t *)net_dev->dev_addr);
275 dev_err(dev, "Failed to set random MAC address\n");
278 dev_info(dev, "Using random MAC address: %pM\n",
282 net_dev->ethtool_ops = &dpaa_ethtool_ops;
284 net_dev->needed_headroom = priv->tx_headroom;
285 net_dev->watchdog_timeo = msecs_to_jiffies(tx_timeout);
287 /* start without the RUNNING flag, phylib controls it later */
288 netif_carrier_off(net_dev);
290 err = register_netdev(net_dev);
292 dev_err(dev, "register_netdev() = %d\n", err);
299 static int dpaa_stop(struct net_device *net_dev)
301 struct mac_device *mac_dev;
302 struct dpaa_priv *priv;
305 priv = netdev_priv(net_dev);
306 mac_dev = priv->mac_dev;
308 netif_tx_stop_all_queues(net_dev);
309 /* Allow the Fman (Tx) port to process in-flight frames before we
310 * try switching it off.
314 err = mac_dev->stop(mac_dev);
316 netif_err(priv, ifdown, net_dev, "mac_dev->stop() = %d\n",
319 for (i = 0; i < ARRAY_SIZE(mac_dev->port); i++) {
320 error = fman_port_disable(mac_dev->port[i]);
326 phy_disconnect(net_dev->phydev);
327 net_dev->phydev = NULL;
334 static void dpaa_tx_timeout(struct net_device *net_dev, unsigned int txqueue)
336 struct dpaa_percpu_priv *percpu_priv;
337 const struct dpaa_priv *priv;
339 priv = netdev_priv(net_dev);
340 percpu_priv = this_cpu_ptr(priv->percpu_priv);
342 netif_crit(priv, timer, net_dev, "Transmit timeout latency: %u ms\n",
343 jiffies_to_msecs(jiffies - dev_trans_start(net_dev)));
345 percpu_priv->stats.tx_errors++;
348 /* Calculates the statistics for the given device by adding the statistics
349 * collected by each CPU.
351 static void dpaa_get_stats64(struct net_device *net_dev,
352 struct rtnl_link_stats64 *s)
354 int numstats = sizeof(struct rtnl_link_stats64) / sizeof(u64);
355 struct dpaa_priv *priv = netdev_priv(net_dev);
356 struct dpaa_percpu_priv *percpu_priv;
357 u64 *netstats = (u64 *)s;
361 for_each_possible_cpu(i) {
362 percpu_priv = per_cpu_ptr(priv->percpu_priv, i);
364 cpustats = (u64 *)&percpu_priv->stats;
366 /* add stats from all CPUs */
367 for (j = 0; j < numstats; j++)
368 netstats[j] += cpustats[j];
372 static int dpaa_setup_tc(struct net_device *net_dev, enum tc_setup_type type,
375 struct dpaa_priv *priv = netdev_priv(net_dev);
376 struct tc_mqprio_qopt *mqprio = type_data;
380 if (type != TC_SETUP_QDISC_MQPRIO)
383 mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS;
384 num_tc = mqprio->num_tc;
386 if (num_tc == priv->num_tc)
390 netdev_reset_tc(net_dev);
394 if (num_tc > DPAA_TC_NUM) {
395 netdev_err(net_dev, "Too many traffic classes: max %d supported.\n",
400 netdev_set_num_tc(net_dev, num_tc);
402 for (i = 0; i < num_tc; i++)
403 netdev_set_tc_queue(net_dev, i, DPAA_TC_TXQ_NUM,
404 i * DPAA_TC_TXQ_NUM);
407 priv->num_tc = num_tc ? : 1;
408 netif_set_real_num_tx_queues(net_dev, priv->num_tc * DPAA_TC_TXQ_NUM);
412 static struct mac_device *dpaa_mac_dev_get(struct platform_device *pdev)
414 struct dpaa_eth_data *eth_data;
415 struct device *dpaa_dev;
416 struct mac_device *mac_dev;
418 dpaa_dev = &pdev->dev;
419 eth_data = dpaa_dev->platform_data;
421 dev_err(dpaa_dev, "eth_data missing\n");
422 return ERR_PTR(-ENODEV);
424 mac_dev = eth_data->mac_dev;
426 dev_err(dpaa_dev, "mac_dev missing\n");
427 return ERR_PTR(-EINVAL);
433 static int dpaa_set_mac_address(struct net_device *net_dev, void *addr)
435 const struct dpaa_priv *priv;
436 struct mac_device *mac_dev;
437 struct sockaddr old_addr;
440 priv = netdev_priv(net_dev);
442 memcpy(old_addr.sa_data, net_dev->dev_addr, ETH_ALEN);
444 err = eth_mac_addr(net_dev, addr);
446 netif_err(priv, drv, net_dev, "eth_mac_addr() = %d\n", err);
450 mac_dev = priv->mac_dev;
452 err = mac_dev->change_addr(mac_dev->fman_mac,
453 (enet_addr_t *)net_dev->dev_addr);
455 netif_err(priv, drv, net_dev, "mac_dev->change_addr() = %d\n",
457 /* reverting to previous address */
458 eth_mac_addr(net_dev, &old_addr);
466 static void dpaa_set_rx_mode(struct net_device *net_dev)
468 const struct dpaa_priv *priv;
471 priv = netdev_priv(net_dev);
473 if (!!(net_dev->flags & IFF_PROMISC) != priv->mac_dev->promisc) {
474 priv->mac_dev->promisc = !priv->mac_dev->promisc;
475 err = priv->mac_dev->set_promisc(priv->mac_dev->fman_mac,
476 priv->mac_dev->promisc);
478 netif_err(priv, drv, net_dev,
479 "mac_dev->set_promisc() = %d\n",
483 if (!!(net_dev->flags & IFF_ALLMULTI) != priv->mac_dev->allmulti) {
484 priv->mac_dev->allmulti = !priv->mac_dev->allmulti;
485 err = priv->mac_dev->set_allmulti(priv->mac_dev->fman_mac,
486 priv->mac_dev->allmulti);
488 netif_err(priv, drv, net_dev,
489 "mac_dev->set_allmulti() = %d\n",
493 err = priv->mac_dev->set_multi(net_dev, priv->mac_dev);
495 netif_err(priv, drv, net_dev, "mac_dev->set_multi() = %d\n",
499 static struct dpaa_bp *dpaa_bpid2pool(int bpid)
501 if (WARN_ON(bpid < 0 || bpid >= BM_MAX_NUM_OF_POOLS))
504 return dpaa_bp_array[bpid];
507 /* checks if this bpool is already allocated */
508 static bool dpaa_bpid2pool_use(int bpid)
510 if (dpaa_bpid2pool(bpid)) {
511 refcount_inc(&dpaa_bp_array[bpid]->refs);
518 /* called only once per bpid by dpaa_bp_alloc_pool() */
519 static void dpaa_bpid2pool_map(int bpid, struct dpaa_bp *dpaa_bp)
521 dpaa_bp_array[bpid] = dpaa_bp;
522 refcount_set(&dpaa_bp->refs, 1);
525 static int dpaa_bp_alloc_pool(struct dpaa_bp *dpaa_bp)
529 if (dpaa_bp->size == 0 || dpaa_bp->config_count == 0) {
530 pr_err("%s: Buffer pool is not properly initialized! Missing size or initial number of buffers\n",
535 /* If the pool is already specified, we only create one per bpid */
536 if (dpaa_bp->bpid != FSL_DPAA_BPID_INV &&
537 dpaa_bpid2pool_use(dpaa_bp->bpid))
540 if (dpaa_bp->bpid == FSL_DPAA_BPID_INV) {
541 dpaa_bp->pool = bman_new_pool();
542 if (!dpaa_bp->pool) {
543 pr_err("%s: bman_new_pool() failed\n",
548 dpaa_bp->bpid = (u8)bman_get_bpid(dpaa_bp->pool);
551 if (dpaa_bp->seed_cb) {
552 err = dpaa_bp->seed_cb(dpaa_bp);
554 goto pool_seed_failed;
557 dpaa_bpid2pool_map(dpaa_bp->bpid, dpaa_bp);
562 pr_err("%s: pool seeding failed\n", __func__);
563 bman_free_pool(dpaa_bp->pool);
568 /* remove and free all the buffers from the given buffer pool */
569 static void dpaa_bp_drain(struct dpaa_bp *bp)
575 struct bm_buffer bmb[8];
578 ret = bman_acquire(bp->pool, bmb, num);
581 /* we have less than 8 buffers left;
582 * drain them one by one
588 /* Pool is fully drained */
594 for (i = 0; i < num; i++)
595 bp->free_buf_cb(bp, &bmb[i]);
599 static void dpaa_bp_free(struct dpaa_bp *dpaa_bp)
601 struct dpaa_bp *bp = dpaa_bpid2pool(dpaa_bp->bpid);
603 /* the mapping between bpid and dpaa_bp is done very late in the
604 * allocation procedure; if something failed before the mapping, the bp
605 * was not configured, therefore we don't need the below instructions
610 if (!refcount_dec_and_test(&bp->refs))
616 dpaa_bp_array[bp->bpid] = NULL;
617 bman_free_pool(bp->pool);
620 static void dpaa_bps_free(struct dpaa_priv *priv)
622 dpaa_bp_free(priv->dpaa_bp);
625 /* Use multiple WQs for FQ assignment:
626 * - Tx Confirmation queues go to WQ1.
627 * - Rx Error and Tx Error queues go to WQ5 (giving them a better chance
628 * to be scheduled, in case there are many more FQs in WQ6).
629 * - Rx Default goes to WQ6.
630 * - Tx queues go to different WQs depending on their priority. Equal
631 * chunks of NR_CPUS queues go to WQ6 (lowest priority), WQ2, WQ1 and
632 * WQ0 (highest priority).
633 * This ensures that Tx-confirmed buffers are timely released. In particular,
634 * it avoids congestion on the Tx Confirm FQs, which can pile up PFDRs if they
635 * are greatly outnumbered by other FQs in the system, while
636 * dequeue scheduling is round-robin.
638 static inline void dpaa_assign_wq(struct dpaa_fq *fq, int idx)
640 switch (fq->fq_type) {
641 case FQ_TYPE_TX_CONFIRM:
642 case FQ_TYPE_TX_CONF_MQ:
645 case FQ_TYPE_RX_ERROR:
646 case FQ_TYPE_TX_ERROR:
649 case FQ_TYPE_RX_DEFAULT:
654 switch (idx / DPAA_TC_TXQ_NUM) {
656 /* Low priority (best effort) */
660 /* Medium priority */
668 /* Very high priority */
672 WARN(1, "Too many TX FQs: more than %d!\n",
677 WARN(1, "Invalid FQ type %d for FQID %d!\n",
678 fq->fq_type, fq->fqid);
682 static struct dpaa_fq *dpaa_fq_alloc(struct device *dev,
683 u32 start, u32 count,
684 struct list_head *list,
685 enum dpaa_fq_type fq_type)
687 struct dpaa_fq *dpaa_fq;
690 dpaa_fq = devm_kcalloc(dev, count, sizeof(*dpaa_fq),
695 for (i = 0; i < count; i++) {
696 dpaa_fq[i].fq_type = fq_type;
697 dpaa_fq[i].fqid = start ? start + i : 0;
698 list_add_tail(&dpaa_fq[i].list, list);
701 for (i = 0; i < count; i++)
702 dpaa_assign_wq(dpaa_fq + i, i);
707 static int dpaa_alloc_all_fqs(struct device *dev, struct list_head *list,
708 struct fm_port_fqs *port_fqs)
710 struct dpaa_fq *dpaa_fq;
711 u32 fq_base, fq_base_aligned, i;
713 dpaa_fq = dpaa_fq_alloc(dev, 0, 1, list, FQ_TYPE_RX_ERROR);
715 goto fq_alloc_failed;
717 port_fqs->rx_errq = &dpaa_fq[0];
719 dpaa_fq = dpaa_fq_alloc(dev, 0, 1, list, FQ_TYPE_RX_DEFAULT);
721 goto fq_alloc_failed;
723 port_fqs->rx_defq = &dpaa_fq[0];
725 /* the PCD FQIDs range needs to be aligned for correct operation */
726 if (qman_alloc_fqid_range(&fq_base, 2 * DPAA_ETH_PCD_RXQ_NUM))
727 goto fq_alloc_failed;
729 fq_base_aligned = ALIGN(fq_base, DPAA_ETH_PCD_RXQ_NUM);
731 for (i = fq_base; i < fq_base_aligned; i++)
732 qman_release_fqid(i);
734 for (i = fq_base_aligned + DPAA_ETH_PCD_RXQ_NUM;
735 i < (fq_base + 2 * DPAA_ETH_PCD_RXQ_NUM); i++)
736 qman_release_fqid(i);
738 dpaa_fq = dpaa_fq_alloc(dev, fq_base_aligned, DPAA_ETH_PCD_RXQ_NUM,
739 list, FQ_TYPE_RX_PCD);
741 goto fq_alloc_failed;
743 port_fqs->rx_pcdq = &dpaa_fq[0];
745 if (!dpaa_fq_alloc(dev, 0, DPAA_ETH_TXQ_NUM, list, FQ_TYPE_TX_CONF_MQ))
746 goto fq_alloc_failed;
748 dpaa_fq = dpaa_fq_alloc(dev, 0, 1, list, FQ_TYPE_TX_ERROR);
750 goto fq_alloc_failed;
752 port_fqs->tx_errq = &dpaa_fq[0];
754 dpaa_fq = dpaa_fq_alloc(dev, 0, 1, list, FQ_TYPE_TX_CONFIRM);
756 goto fq_alloc_failed;
758 port_fqs->tx_defq = &dpaa_fq[0];
760 if (!dpaa_fq_alloc(dev, 0, DPAA_ETH_TXQ_NUM, list, FQ_TYPE_TX))
761 goto fq_alloc_failed;
766 dev_err(dev, "dpaa_fq_alloc() failed\n");
770 static u32 rx_pool_channel;
771 static DEFINE_SPINLOCK(rx_pool_channel_init);
773 static int dpaa_get_channel(void)
775 spin_lock(&rx_pool_channel_init);
776 if (!rx_pool_channel) {
780 ret = qman_alloc_pool(&pool);
783 rx_pool_channel = pool;
785 spin_unlock(&rx_pool_channel_init);
786 if (!rx_pool_channel)
788 return rx_pool_channel;
791 static void dpaa_release_channel(void)
793 qman_release_pool(rx_pool_channel);
796 static void dpaa_eth_add_channel(u16 channel, struct device *dev)
798 u32 pool = QM_SDQCR_CHANNELS_POOL_CONV(channel);
799 const cpumask_t *cpus = qman_affine_cpus();
800 struct qman_portal *portal;
803 for_each_cpu_and(cpu, cpus, cpu_online_mask) {
804 portal = qman_get_affine_portal(cpu);
805 qman_p_static_dequeue_add(portal, pool);
806 qman_start_using_portal(portal, dev);
810 /* Congestion group state change notification callback.
811 * Stops the device's egress queues while they are congested and
812 * wakes them upon exiting congested state.
813 * Also updates some CGR-related stats.
815 static void dpaa_eth_cgscn(struct qman_portal *qm, struct qman_cgr *cgr,
818 struct dpaa_priv *priv = (struct dpaa_priv *)container_of(cgr,
819 struct dpaa_priv, cgr_data.cgr);
822 priv->cgr_data.congestion_start_jiffies = jiffies;
823 netif_tx_stop_all_queues(priv->net_dev);
824 priv->cgr_data.cgr_congested_count++;
826 priv->cgr_data.congested_jiffies +=
827 (jiffies - priv->cgr_data.congestion_start_jiffies);
828 netif_tx_wake_all_queues(priv->net_dev);
832 static int dpaa_eth_cgr_init(struct dpaa_priv *priv)
834 struct qm_mcc_initcgr initcgr;
838 err = qman_alloc_cgrid(&priv->cgr_data.cgr.cgrid);
840 if (netif_msg_drv(priv))
841 pr_err("%s: Error %d allocating CGR ID\n",
845 priv->cgr_data.cgr.cb = dpaa_eth_cgscn;
847 /* Enable Congestion State Change Notifications and CS taildrop */
848 memset(&initcgr, 0, sizeof(initcgr));
849 initcgr.we_mask = cpu_to_be16(QM_CGR_WE_CSCN_EN | QM_CGR_WE_CS_THRES);
850 initcgr.cgr.cscn_en = QM_CGR_EN;
852 /* Set different thresholds based on the MAC speed.
853 * This may turn suboptimal if the MAC is reconfigured at a speed
854 * lower than its max, e.g. if a dTSEC later negotiates a 100Mbps link.
855 * In such cases, we ought to reconfigure the threshold, too.
857 if (priv->mac_dev->if_support & SUPPORTED_10000baseT_Full)
858 cs_th = DPAA_CS_THRESHOLD_10G;
860 cs_th = DPAA_CS_THRESHOLD_1G;
861 qm_cgr_cs_thres_set64(&initcgr.cgr.cs_thres, cs_th, 1);
863 initcgr.we_mask |= cpu_to_be16(QM_CGR_WE_CSTD_EN);
864 initcgr.cgr.cstd_en = QM_CGR_EN;
866 err = qman_create_cgr(&priv->cgr_data.cgr, QMAN_CGR_FLAG_USE_INIT,
869 if (netif_msg_drv(priv))
870 pr_err("%s: Error %d creating CGR with ID %d\n",
871 __func__, err, priv->cgr_data.cgr.cgrid);
872 qman_release_cgrid(priv->cgr_data.cgr.cgrid);
875 if (netif_msg_drv(priv))
876 pr_debug("Created CGR %d for netdev with hwaddr %pM on QMan channel %d\n",
877 priv->cgr_data.cgr.cgrid, priv->mac_dev->addr,
878 priv->cgr_data.cgr.chan);
884 static inline void dpaa_setup_ingress(const struct dpaa_priv *priv,
886 const struct qman_fq *template)
888 fq->fq_base = *template;
889 fq->net_dev = priv->net_dev;
891 fq->flags = QMAN_FQ_FLAG_NO_ENQUEUE;
892 fq->channel = priv->channel;
895 static inline void dpaa_setup_egress(const struct dpaa_priv *priv,
897 struct fman_port *port,
898 const struct qman_fq *template)
900 fq->fq_base = *template;
901 fq->net_dev = priv->net_dev;
904 fq->flags = QMAN_FQ_FLAG_TO_DCPORTAL;
905 fq->channel = (u16)fman_port_get_qman_channel_id(port);
907 fq->flags = QMAN_FQ_FLAG_NO_MODIFY;
911 static void dpaa_fq_setup(struct dpaa_priv *priv,
912 const struct dpaa_fq_cbs *fq_cbs,
913 struct fman_port *tx_port)
915 int egress_cnt = 0, conf_cnt = 0, num_portals = 0, portal_cnt = 0, cpu;
916 const cpumask_t *affine_cpus = qman_affine_cpus();
917 u16 channels[NR_CPUS];
920 for_each_cpu_and(cpu, affine_cpus, cpu_online_mask)
921 channels[num_portals++] = qman_affine_channel(cpu);
923 if (num_portals == 0)
924 dev_err(priv->net_dev->dev.parent,
925 "No Qman software (affine) channels found\n");
927 /* Initialize each FQ in the list */
928 list_for_each_entry(fq, &priv->dpaa_fq_list, list) {
929 switch (fq->fq_type) {
930 case FQ_TYPE_RX_DEFAULT:
931 dpaa_setup_ingress(priv, fq, &fq_cbs->rx_defq);
933 case FQ_TYPE_RX_ERROR:
934 dpaa_setup_ingress(priv, fq, &fq_cbs->rx_errq);
939 dpaa_setup_ingress(priv, fq, &fq_cbs->rx_defq);
940 fq->channel = channels[portal_cnt++ % num_portals];
943 dpaa_setup_egress(priv, fq, tx_port,
944 &fq_cbs->egress_ern);
945 /* If we have more Tx queues than the number of cores,
946 * just ignore the extra ones.
948 if (egress_cnt < DPAA_ETH_TXQ_NUM)
949 priv->egress_fqs[egress_cnt++] = &fq->fq_base;
951 case FQ_TYPE_TX_CONF_MQ:
952 priv->conf_fqs[conf_cnt++] = &fq->fq_base;
954 case FQ_TYPE_TX_CONFIRM:
955 dpaa_setup_ingress(priv, fq, &fq_cbs->tx_defq);
957 case FQ_TYPE_TX_ERROR:
958 dpaa_setup_ingress(priv, fq, &fq_cbs->tx_errq);
961 dev_warn(priv->net_dev->dev.parent,
962 "Unknown FQ type detected!\n");
967 /* Make sure all CPUs receive a corresponding Tx queue. */
968 while (egress_cnt < DPAA_ETH_TXQ_NUM) {
969 list_for_each_entry(fq, &priv->dpaa_fq_list, list) {
970 if (fq->fq_type != FQ_TYPE_TX)
972 priv->egress_fqs[egress_cnt++] = &fq->fq_base;
973 if (egress_cnt == DPAA_ETH_TXQ_NUM)
979 static inline int dpaa_tx_fq_to_id(const struct dpaa_priv *priv,
980 struct qman_fq *tx_fq)
984 for (i = 0; i < DPAA_ETH_TXQ_NUM; i++)
985 if (priv->egress_fqs[i] == tx_fq)
991 static int dpaa_fq_init(struct dpaa_fq *dpaa_fq, bool td_enable)
993 const struct dpaa_priv *priv;
994 struct qman_fq *confq = NULL;
995 struct qm_mcc_initfq initfq;
1001 priv = netdev_priv(dpaa_fq->net_dev);
1002 dev = dpaa_fq->net_dev->dev.parent;
1004 if (dpaa_fq->fqid == 0)
1005 dpaa_fq->flags |= QMAN_FQ_FLAG_DYNAMIC_FQID;
1007 dpaa_fq->init = !(dpaa_fq->flags & QMAN_FQ_FLAG_NO_MODIFY);
1009 err = qman_create_fq(dpaa_fq->fqid, dpaa_fq->flags, &dpaa_fq->fq_base);
1011 dev_err(dev, "qman_create_fq() failed\n");
1014 fq = &dpaa_fq->fq_base;
1016 if (dpaa_fq->init) {
1017 memset(&initfq, 0, sizeof(initfq));
1019 initfq.we_mask = cpu_to_be16(QM_INITFQ_WE_FQCTRL);
1020 /* Note: we may get to keep an empty FQ in cache */
1021 initfq.fqd.fq_ctrl = cpu_to_be16(QM_FQCTRL_PREFERINCACHE);
1023 /* Try to reduce the number of portal interrupts for
1024 * Tx Confirmation FQs.
1026 if (dpaa_fq->fq_type == FQ_TYPE_TX_CONFIRM)
1027 initfq.fqd.fq_ctrl |= cpu_to_be16(QM_FQCTRL_AVOIDBLOCK);
1030 initfq.we_mask |= cpu_to_be16(QM_INITFQ_WE_DESTWQ);
1032 qm_fqd_set_destwq(&initfq.fqd, dpaa_fq->channel, dpaa_fq->wq);
1034 /* Put all egress queues in a congestion group of their own.
1035 * Sensu stricto, the Tx confirmation queues are Rx FQs,
1036 * rather than Tx - but they nonetheless account for the
1037 * memory footprint on behalf of egress traffic. We therefore
1038 * place them in the netdev's CGR, along with the Tx FQs.
1040 if (dpaa_fq->fq_type == FQ_TYPE_TX ||
1041 dpaa_fq->fq_type == FQ_TYPE_TX_CONFIRM ||
1042 dpaa_fq->fq_type == FQ_TYPE_TX_CONF_MQ) {
1043 initfq.we_mask |= cpu_to_be16(QM_INITFQ_WE_CGID);
1044 initfq.fqd.fq_ctrl |= cpu_to_be16(QM_FQCTRL_CGE);
1045 initfq.fqd.cgid = (u8)priv->cgr_data.cgr.cgrid;
1046 /* Set a fixed overhead accounting, in an attempt to
1047 * reduce the impact of fixed-size skb shells and the
1048 * driver's needed headroom on system memory. This is
1049 * especially the case when the egress traffic is
1050 * composed of small datagrams.
1051 * Unfortunately, QMan's OAL value is capped to an
1052 * insufficient value, but even that is better than
1053 * no overhead accounting at all.
1055 initfq.we_mask |= cpu_to_be16(QM_INITFQ_WE_OAC);
1056 qm_fqd_set_oac(&initfq.fqd, QM_OAC_CG);
1057 qm_fqd_set_oal(&initfq.fqd,
1058 min(sizeof(struct sk_buff) +
1060 (size_t)FSL_QMAN_MAX_OAL));
1064 initfq.we_mask |= cpu_to_be16(QM_INITFQ_WE_TDTHRESH);
1065 qm_fqd_set_taildrop(&initfq.fqd, DPAA_FQ_TD, 1);
1066 initfq.fqd.fq_ctrl = cpu_to_be16(QM_FQCTRL_TDE);
1069 if (dpaa_fq->fq_type == FQ_TYPE_TX) {
1070 queue_id = dpaa_tx_fq_to_id(priv, &dpaa_fq->fq_base);
1072 confq = priv->conf_fqs[queue_id];
1075 cpu_to_be16(QM_INITFQ_WE_CONTEXTA);
1076 /* ContextA: OVOM=1(use contextA2 bits instead of ICAD)
1077 * A2V=1 (contextA A2 field is valid)
1078 * A0V=1 (contextA A0 field is valid)
1079 * B0V=1 (contextB field is valid)
1080 * ContextA A2: EBD=1 (deallocate buffers inside FMan)
1081 * ContextB B0(ASPID): 0 (absolute Virtual Storage ID)
1083 qm_fqd_context_a_set64(&initfq.fqd,
1084 0x1e00000080000000ULL);
1088 /* Put all the ingress queues in our "ingress CGR". */
1089 if (priv->use_ingress_cgr &&
1090 (dpaa_fq->fq_type == FQ_TYPE_RX_DEFAULT ||
1091 dpaa_fq->fq_type == FQ_TYPE_RX_ERROR ||
1092 dpaa_fq->fq_type == FQ_TYPE_RX_PCD)) {
1093 initfq.we_mask |= cpu_to_be16(QM_INITFQ_WE_CGID);
1094 initfq.fqd.fq_ctrl |= cpu_to_be16(QM_FQCTRL_CGE);
1095 initfq.fqd.cgid = (u8)priv->ingress_cgr.cgrid;
1096 /* Set a fixed overhead accounting, just like for the
1099 initfq.we_mask |= cpu_to_be16(QM_INITFQ_WE_OAC);
1100 qm_fqd_set_oac(&initfq.fqd, QM_OAC_CG);
1101 qm_fqd_set_oal(&initfq.fqd,
1102 min(sizeof(struct sk_buff) +
1104 (size_t)FSL_QMAN_MAX_OAL));
1107 /* Initialization common to all ingress queues */
1108 if (dpaa_fq->flags & QMAN_FQ_FLAG_NO_ENQUEUE) {
1109 initfq.we_mask |= cpu_to_be16(QM_INITFQ_WE_CONTEXTA);
1110 initfq.fqd.fq_ctrl |= cpu_to_be16(QM_FQCTRL_HOLDACTIVE |
1111 QM_FQCTRL_CTXASTASHING);
1112 initfq.fqd.context_a.stashing.exclusive =
1113 QM_STASHING_EXCL_DATA | QM_STASHING_EXCL_CTX |
1114 QM_STASHING_EXCL_ANNOTATION;
1115 qm_fqd_set_stashing(&initfq.fqd, 1, 2,
1116 DIV_ROUND_UP(sizeof(struct qman_fq),
1120 err = qman_init_fq(fq, QMAN_INITFQ_FLAG_SCHED, &initfq);
1122 dev_err(dev, "qman_init_fq(%u) = %d\n",
1123 qman_fq_fqid(fq), err);
1124 qman_destroy_fq(fq);
1129 dpaa_fq->fqid = qman_fq_fqid(fq);
1134 static int dpaa_fq_free_entry(struct device *dev, struct qman_fq *fq)
1136 const struct dpaa_priv *priv;
1137 struct dpaa_fq *dpaa_fq;
1142 dpaa_fq = container_of(fq, struct dpaa_fq, fq_base);
1143 priv = netdev_priv(dpaa_fq->net_dev);
1145 if (dpaa_fq->init) {
1146 err = qman_retire_fq(fq, NULL);
1147 if (err < 0 && netif_msg_drv(priv))
1148 dev_err(dev, "qman_retire_fq(%u) = %d\n",
1149 qman_fq_fqid(fq), err);
1151 error = qman_oos_fq(fq);
1152 if (error < 0 && netif_msg_drv(priv)) {
1153 dev_err(dev, "qman_oos_fq(%u) = %d\n",
1154 qman_fq_fqid(fq), error);
1160 qman_destroy_fq(fq);
1161 list_del(&dpaa_fq->list);
1166 static int dpaa_fq_free(struct device *dev, struct list_head *list)
1168 struct dpaa_fq *dpaa_fq, *tmp;
1172 list_for_each_entry_safe(dpaa_fq, tmp, list, list) {
1173 error = dpaa_fq_free_entry(dev, (struct qman_fq *)dpaa_fq);
1174 if (error < 0 && err >= 0)
1181 static int dpaa_eth_init_tx_port(struct fman_port *port, struct dpaa_fq *errq,
1182 struct dpaa_fq *defq,
1183 struct dpaa_buffer_layout *buf_layout)
1185 struct fman_buffer_prefix_content buf_prefix_content;
1186 struct fman_port_params params;
1189 memset(¶ms, 0, sizeof(params));
1190 memset(&buf_prefix_content, 0, sizeof(buf_prefix_content));
1192 buf_prefix_content.priv_data_size = buf_layout->priv_data_size;
1193 buf_prefix_content.pass_prs_result = true;
1194 buf_prefix_content.pass_hash_result = true;
1195 buf_prefix_content.pass_time_stamp = true;
1196 buf_prefix_content.data_align = DPAA_FD_DATA_ALIGNMENT;
1198 params.specific_params.non_rx_params.err_fqid = errq->fqid;
1199 params.specific_params.non_rx_params.dflt_fqid = defq->fqid;
1201 err = fman_port_config(port, ¶ms);
1203 pr_err("%s: fman_port_config failed\n", __func__);
1207 err = fman_port_cfg_buf_prefix_content(port, &buf_prefix_content);
1209 pr_err("%s: fman_port_cfg_buf_prefix_content failed\n",
1214 err = fman_port_init(port);
1216 pr_err("%s: fm_port_init failed\n", __func__);
1221 static int dpaa_eth_init_rx_port(struct fman_port *port, struct dpaa_bp *bp,
1222 struct dpaa_fq *errq,
1223 struct dpaa_fq *defq, struct dpaa_fq *pcdq,
1224 struct dpaa_buffer_layout *buf_layout)
1226 struct fman_buffer_prefix_content buf_prefix_content;
1227 struct fman_port_rx_params *rx_p;
1228 struct fman_port_params params;
1231 memset(¶ms, 0, sizeof(params));
1232 memset(&buf_prefix_content, 0, sizeof(buf_prefix_content));
1234 buf_prefix_content.priv_data_size = buf_layout->priv_data_size;
1235 buf_prefix_content.pass_prs_result = true;
1236 buf_prefix_content.pass_hash_result = true;
1237 buf_prefix_content.pass_time_stamp = true;
1238 buf_prefix_content.data_align = DPAA_FD_RX_DATA_ALIGNMENT;
1240 rx_p = ¶ms.specific_params.rx_params;
1241 rx_p->err_fqid = errq->fqid;
1242 rx_p->dflt_fqid = defq->fqid;
1244 rx_p->pcd_base_fqid = pcdq->fqid;
1245 rx_p->pcd_fqs_count = DPAA_ETH_PCD_RXQ_NUM;
1248 rx_p->ext_buf_pools.num_of_pools_used = 1;
1249 rx_p->ext_buf_pools.ext_buf_pool[0].id = bp->bpid;
1250 rx_p->ext_buf_pools.ext_buf_pool[0].size = (u16)bp->size;
1252 err = fman_port_config(port, ¶ms);
1254 pr_err("%s: fman_port_config failed\n", __func__);
1258 err = fman_port_cfg_buf_prefix_content(port, &buf_prefix_content);
1260 pr_err("%s: fman_port_cfg_buf_prefix_content failed\n",
1265 err = fman_port_init(port);
1267 pr_err("%s: fm_port_init failed\n", __func__);
1272 static int dpaa_eth_init_ports(struct mac_device *mac_dev,
1274 struct fm_port_fqs *port_fqs,
1275 struct dpaa_buffer_layout *buf_layout,
1278 struct fman_port *rxport = mac_dev->port[RX];
1279 struct fman_port *txport = mac_dev->port[TX];
1282 err = dpaa_eth_init_tx_port(txport, port_fqs->tx_errq,
1283 port_fqs->tx_defq, &buf_layout[TX]);
1287 err = dpaa_eth_init_rx_port(rxport, bp, port_fqs->rx_errq,
1288 port_fqs->rx_defq, port_fqs->rx_pcdq,
1294 static int dpaa_bman_release(const struct dpaa_bp *dpaa_bp,
1295 struct bm_buffer *bmb, int cnt)
1299 err = bman_release(dpaa_bp->pool, bmb, cnt);
1300 /* Should never occur, address anyway to avoid leaking the buffers */
1301 if (WARN_ON(err) && dpaa_bp->free_buf_cb)
1303 dpaa_bp->free_buf_cb(dpaa_bp, &bmb[cnt]);
1308 static void dpaa_release_sgt_members(struct qm_sg_entry *sgt)
1310 struct bm_buffer bmb[DPAA_BUFF_RELEASE_MAX];
1311 struct dpaa_bp *dpaa_bp;
1314 memset(bmb, 0, sizeof(bmb));
1317 dpaa_bp = dpaa_bpid2pool(sgt[i].bpid);
1323 WARN_ON(qm_sg_entry_is_ext(&sgt[i]));
1325 bm_buffer_set64(&bmb[j], qm_sg_entry_get64(&sgt[i]));
1328 } while (j < ARRAY_SIZE(bmb) &&
1329 !qm_sg_entry_is_final(&sgt[i - 1]) &&
1330 sgt[i - 1].bpid == sgt[i].bpid);
1332 dpaa_bman_release(dpaa_bp, bmb, j);
1333 } while (!qm_sg_entry_is_final(&sgt[i - 1]));
1336 static void dpaa_fd_release(const struct net_device *net_dev,
1337 const struct qm_fd *fd)
1339 struct qm_sg_entry *sgt;
1340 struct dpaa_bp *dpaa_bp;
1341 struct bm_buffer bmb;
1346 bm_buffer_set64(&bmb, qm_fd_addr(fd));
1348 dpaa_bp = dpaa_bpid2pool(fd->bpid);
1352 if (qm_fd_get_format(fd) == qm_fd_sg) {
1353 vaddr = phys_to_virt(qm_fd_addr(fd));
1354 sgt = vaddr + qm_fd_get_offset(fd);
1356 dma_unmap_page(dpaa_bp->priv->rx_dma_dev, qm_fd_addr(fd),
1357 DPAA_BP_RAW_SIZE, DMA_FROM_DEVICE);
1359 dpaa_release_sgt_members(sgt);
1361 addr = dma_map_page(dpaa_bp->priv->rx_dma_dev,
1362 virt_to_page(vaddr), 0, DPAA_BP_RAW_SIZE,
1364 if (dma_mapping_error(dpaa_bp->priv->rx_dma_dev, addr)) {
1365 netdev_err(net_dev, "DMA mapping failed\n");
1368 bm_buffer_set64(&bmb, addr);
1371 dpaa_bman_release(dpaa_bp, &bmb, 1);
1374 static void count_ern(struct dpaa_percpu_priv *percpu_priv,
1375 const union qm_mr_entry *msg)
1377 switch (msg->ern.rc & QM_MR_RC_MASK) {
1378 case QM_MR_RC_CGR_TAILDROP:
1379 percpu_priv->ern_cnt.cg_tdrop++;
1382 percpu_priv->ern_cnt.wred++;
1384 case QM_MR_RC_ERROR:
1385 percpu_priv->ern_cnt.err_cond++;
1387 case QM_MR_RC_ORPWINDOW_EARLY:
1388 percpu_priv->ern_cnt.early_window++;
1390 case QM_MR_RC_ORPWINDOW_LATE:
1391 percpu_priv->ern_cnt.late_window++;
1393 case QM_MR_RC_FQ_TAILDROP:
1394 percpu_priv->ern_cnt.fq_tdrop++;
1396 case QM_MR_RC_ORPWINDOW_RETIRED:
1397 percpu_priv->ern_cnt.fq_retired++;
1399 case QM_MR_RC_ORP_ZERO:
1400 percpu_priv->ern_cnt.orp_zero++;
1405 /* Turn on HW checksum computation for this outgoing frame.
1406 * If the current protocol is not something we support in this regard
1407 * (or if the stack has already computed the SW checksum), we do nothing.
1409 * Returns 0 if all goes well (or HW csum doesn't apply), and a negative value
1412 * Note that this function may modify the fd->cmd field and the skb data buffer
1413 * (the Parse Results area).
1415 static int dpaa_enable_tx_csum(struct dpaa_priv *priv,
1416 struct sk_buff *skb,
1418 void *parse_results)
1420 struct fman_prs_result *parse_result;
1421 u16 ethertype = ntohs(skb->protocol);
1422 struct ipv6hdr *ipv6h = NULL;
1427 if (skb->ip_summed != CHECKSUM_PARTIAL)
1430 /* Note: L3 csum seems to be already computed in sw, but we can't choose
1431 * L4 alone from the FM configuration anyway.
1434 /* Fill in some fields of the Parse Results array, so the FMan
1435 * can find them as if they came from the FMan Parser.
1437 parse_result = (struct fman_prs_result *)parse_results;
1439 /* If we're dealing with VLAN, get the real Ethernet type */
1440 if (ethertype == ETH_P_8021Q) {
1441 /* We can't always assume the MAC header is set correctly
1442 * by the stack, so reset to beginning of skb->data
1444 skb_reset_mac_header(skb);
1445 ethertype = ntohs(vlan_eth_hdr(skb)->h_vlan_encapsulated_proto);
1448 /* Fill in the relevant L3 parse result fields
1449 * and read the L4 protocol type
1451 switch (ethertype) {
1453 parse_result->l3r = cpu_to_be16(FM_L3_PARSE_RESULT_IPV4);
1456 l4_proto = iph->protocol;
1459 parse_result->l3r = cpu_to_be16(FM_L3_PARSE_RESULT_IPV6);
1460 ipv6h = ipv6_hdr(skb);
1462 l4_proto = ipv6h->nexthdr;
1465 /* We shouldn't even be here */
1466 if (net_ratelimit())
1467 netif_alert(priv, tx_err, priv->net_dev,
1468 "Can't compute HW csum for L3 proto 0x%x\n",
1469 ntohs(skb->protocol));
1474 /* Fill in the relevant L4 parse result fields */
1477 parse_result->l4r = FM_L4_PARSE_RESULT_UDP;
1480 parse_result->l4r = FM_L4_PARSE_RESULT_TCP;
1483 if (net_ratelimit())
1484 netif_alert(priv, tx_err, priv->net_dev,
1485 "Can't compute HW csum for L4 proto 0x%x\n",
1491 /* At index 0 is IPOffset_1 as defined in the Parse Results */
1492 parse_result->ip_off[0] = (u8)skb_network_offset(skb);
1493 parse_result->l4_off = (u8)skb_transport_offset(skb);
1495 /* Enable L3 (and L4, if TCP or UDP) HW checksum. */
1496 fd->cmd |= cpu_to_be32(FM_FD_CMD_RPD | FM_FD_CMD_DTC);
1498 /* On P1023 and similar platforms fd->cmd interpretation could
1499 * be disabled by setting CONTEXT_A bit ICMD; currently this bit
1500 * is not set so we do not need to check; in the future, if/when
1501 * using context_a we need to check this bit
1508 static int dpaa_bp_add_8_bufs(const struct dpaa_bp *dpaa_bp)
1510 struct net_device *net_dev = dpaa_bp->priv->net_dev;
1511 struct bm_buffer bmb[8];
1516 for (i = 0; i < 8; i++) {
1517 p = dev_alloc_pages(0);
1519 netdev_err(net_dev, "dev_alloc_pages() failed\n");
1520 goto release_previous_buffs;
1523 addr = dma_map_page(dpaa_bp->priv->rx_dma_dev, p, 0,
1524 DPAA_BP_RAW_SIZE, DMA_FROM_DEVICE);
1525 if (unlikely(dma_mapping_error(dpaa_bp->priv->rx_dma_dev,
1527 netdev_err(net_dev, "DMA map failed\n");
1528 goto release_previous_buffs;
1532 bm_buffer_set64(&bmb[i], addr);
1536 return dpaa_bman_release(dpaa_bp, bmb, i);
1538 release_previous_buffs:
1539 WARN_ONCE(1, "dpaa_eth: failed to add buffers on Rx\n");
1541 bm_buffer_set64(&bmb[i], 0);
1542 /* Avoid releasing a completely null buffer; bman_release() requires
1543 * at least one buffer.
1551 static int dpaa_bp_seed(struct dpaa_bp *dpaa_bp)
1555 /* Give each CPU an allotment of "config_count" buffers */
1556 for_each_possible_cpu(i) {
1557 int *count_ptr = per_cpu_ptr(dpaa_bp->percpu_count, i);
1560 /* Although we access another CPU's counters here
1561 * we do it at boot time so it is safe
1563 for (j = 0; j < dpaa_bp->config_count; j += 8)
1564 *count_ptr += dpaa_bp_add_8_bufs(dpaa_bp);
1569 /* Add buffers/(pages) for Rx processing whenever bpool count falls below
1572 static int dpaa_eth_refill_bpool(struct dpaa_bp *dpaa_bp, int *countptr)
1574 int count = *countptr;
1577 if (unlikely(count < FSL_DPAA_ETH_REFILL_THRESHOLD)) {
1579 new_bufs = dpaa_bp_add_8_bufs(dpaa_bp);
1580 if (unlikely(!new_bufs)) {
1581 /* Avoid looping forever if we've temporarily
1582 * run out of memory. We'll try again at the
1588 } while (count < FSL_DPAA_ETH_MAX_BUF_COUNT);
1591 if (unlikely(count < FSL_DPAA_ETH_MAX_BUF_COUNT))
1598 static int dpaa_eth_refill_bpools(struct dpaa_priv *priv)
1600 struct dpaa_bp *dpaa_bp;
1604 dpaa_bp = priv->dpaa_bp;
1607 countptr = this_cpu_ptr(dpaa_bp->percpu_count);
1608 res = dpaa_eth_refill_bpool(dpaa_bp, countptr);
1615 /* Cleanup function for outgoing frame descriptors that were built on Tx path,
1616 * either contiguous frames or scatter/gather ones.
1617 * Skb freeing is not handled here.
1619 * This function may be called on error paths in the Tx function, so guard
1620 * against cases when not all fd relevant fields were filled in. To avoid
1621 * reading the invalid transmission timestamp for the error paths set ts to
1624 * Return the skb backpointer, since for S/G frames the buffer containing it
1627 static struct sk_buff *dpaa_cleanup_tx_fd(const struct dpaa_priv *priv,
1628 const struct qm_fd *fd, bool ts)
1630 const enum dma_data_direction dma_dir = DMA_TO_DEVICE;
1631 struct device *dev = priv->net_dev->dev.parent;
1632 struct skb_shared_hwtstamps shhwtstamps;
1633 dma_addr_t addr = qm_fd_addr(fd);
1634 void *vaddr = phys_to_virt(addr);
1635 const struct qm_sg_entry *sgt;
1636 struct sk_buff *skb;
1640 if (unlikely(qm_fd_get_format(fd) == qm_fd_sg)) {
1641 dma_unmap_page(priv->tx_dma_dev, addr,
1642 qm_fd_get_offset(fd) + DPAA_SGT_SIZE,
1645 /* The sgt buffer has been allocated with netdev_alloc_frag(),
1648 sgt = vaddr + qm_fd_get_offset(fd);
1650 /* sgt[0] is from lowmem, was dma_map_single()-ed */
1651 dma_unmap_single(priv->tx_dma_dev, qm_sg_addr(&sgt[0]),
1652 qm_sg_entry_get_len(&sgt[0]), dma_dir);
1654 /* remaining pages were mapped with skb_frag_dma_map() */
1655 for (i = 1; (i < DPAA_SGT_MAX_ENTRIES) &&
1656 !qm_sg_entry_is_final(&sgt[i - 1]); i++) {
1657 WARN_ON(qm_sg_entry_is_ext(&sgt[i]));
1659 dma_unmap_page(priv->tx_dma_dev, qm_sg_addr(&sgt[i]),
1660 qm_sg_entry_get_len(&sgt[i]), dma_dir);
1663 dma_unmap_single(priv->tx_dma_dev, addr,
1664 priv->tx_headroom + qm_fd_get_length(fd),
1668 skb = *(struct sk_buff **)vaddr;
1670 /* DMA unmapping is required before accessing the HW provided info */
1671 if (ts && priv->tx_tstamp &&
1672 skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) {
1673 memset(&shhwtstamps, 0, sizeof(shhwtstamps));
1675 if (!fman_port_get_tstamp(priv->mac_dev->port[TX], vaddr,
1677 shhwtstamps.hwtstamp = ns_to_ktime(ns);
1678 skb_tstamp_tx(skb, &shhwtstamps);
1680 dev_warn(dev, "fman_port_get_tstamp failed!\n");
1684 if (qm_fd_get_format(fd) == qm_fd_sg)
1685 /* Free the page that we allocated on Tx for the SGT */
1686 free_pages((unsigned long)vaddr, 0);
1691 static u8 rx_csum_offload(const struct dpaa_priv *priv, const struct qm_fd *fd)
1693 /* The parser has run and performed L4 checksum validation.
1694 * We know there were no parser errors (and implicitly no
1695 * L4 csum error), otherwise we wouldn't be here.
1697 if ((priv->net_dev->features & NETIF_F_RXCSUM) &&
1698 (be32_to_cpu(fd->status) & FM_FD_STAT_L4CV))
1699 return CHECKSUM_UNNECESSARY;
1701 /* We're here because either the parser didn't run or the L4 checksum
1702 * was not verified. This may include the case of a UDP frame with
1703 * checksum zero or an L4 proto other than TCP/UDP
1705 return CHECKSUM_NONE;
1708 #define PTR_IS_ALIGNED(x, a) (IS_ALIGNED((unsigned long)(x), (a)))
1710 /* Build a linear skb around the received buffer.
1711 * We are guaranteed there is enough room at the end of the data buffer to
1712 * accommodate the shared info area of the skb.
1714 static struct sk_buff *contig_fd_to_skb(const struct dpaa_priv *priv,
1715 const struct qm_fd *fd)
1717 ssize_t fd_off = qm_fd_get_offset(fd);
1718 dma_addr_t addr = qm_fd_addr(fd);
1719 struct dpaa_bp *dpaa_bp;
1720 struct sk_buff *skb;
1723 vaddr = phys_to_virt(addr);
1724 WARN_ON(!IS_ALIGNED((unsigned long)vaddr, SMP_CACHE_BYTES));
1726 dpaa_bp = dpaa_bpid2pool(fd->bpid);
1730 skb = build_skb(vaddr, dpaa_bp->size +
1731 SKB_DATA_ALIGN(sizeof(struct skb_shared_info)));
1732 if (WARN_ONCE(!skb, "Build skb failure on Rx\n"))
1734 WARN_ON(fd_off != priv->rx_headroom);
1735 skb_reserve(skb, fd_off);
1736 skb_put(skb, qm_fd_get_length(fd));
1738 skb->ip_summed = rx_csum_offload(priv, fd);
1743 free_pages((unsigned long)vaddr, 0);
1747 /* Build an skb with the data of the first S/G entry in the linear portion and
1748 * the rest of the frame as skb fragments.
1750 * The page fragment holding the S/G Table is recycled here.
1752 static struct sk_buff *sg_fd_to_skb(const struct dpaa_priv *priv,
1753 const struct qm_fd *fd)
1755 ssize_t fd_off = qm_fd_get_offset(fd);
1756 dma_addr_t addr = qm_fd_addr(fd);
1757 const struct qm_sg_entry *sgt;
1758 struct page *page, *head_page;
1759 struct dpaa_bp *dpaa_bp;
1760 void *vaddr, *sg_vaddr;
1761 int frag_off, frag_len;
1762 struct sk_buff *skb;
1769 vaddr = phys_to_virt(addr);
1770 WARN_ON(!IS_ALIGNED((unsigned long)vaddr, SMP_CACHE_BYTES));
1772 /* Iterate through the SGT entries and add data buffers to the skb */
1773 sgt = vaddr + fd_off;
1775 for (i = 0; i < DPAA_SGT_MAX_ENTRIES; i++) {
1776 /* Extension bit is not supported */
1777 WARN_ON(qm_sg_entry_is_ext(&sgt[i]));
1779 sg_addr = qm_sg_addr(&sgt[i]);
1780 sg_vaddr = phys_to_virt(sg_addr);
1781 WARN_ON(!PTR_IS_ALIGNED(sg_vaddr, SMP_CACHE_BYTES));
1783 dma_unmap_page(priv->rx_dma_dev, sg_addr,
1784 DPAA_BP_RAW_SIZE, DMA_FROM_DEVICE);
1786 /* We may use multiple Rx pools */
1787 dpaa_bp = dpaa_bpid2pool(sgt[i].bpid);
1792 sz = dpaa_bp->size +
1793 SKB_DATA_ALIGN(sizeof(struct skb_shared_info));
1794 skb = build_skb(sg_vaddr, sz);
1798 skb->ip_summed = rx_csum_offload(priv, fd);
1800 /* Make sure forwarded skbs will have enough space
1801 * on Tx, if extra headers are added.
1803 WARN_ON(fd_off != priv->rx_headroom);
1804 skb_reserve(skb, fd_off);
1805 skb_put(skb, qm_sg_entry_get_len(&sgt[i]));
1807 /* Not the first S/G entry; all data from buffer will
1808 * be added in an skb fragment; fragment index is offset
1809 * by one since first S/G entry was incorporated in the
1810 * linear part of the skb.
1812 * Caution: 'page' may be a tail page.
1814 page = virt_to_page(sg_vaddr);
1815 head_page = virt_to_head_page(sg_vaddr);
1817 /* Compute offset in (possibly tail) page */
1818 page_offset = ((unsigned long)sg_vaddr &
1820 (page_address(page) - page_address(head_page));
1821 /* page_offset only refers to the beginning of sgt[i];
1822 * but the buffer itself may have an internal offset.
1824 frag_off = qm_sg_entry_get_off(&sgt[i]) + page_offset;
1825 frag_len = qm_sg_entry_get_len(&sgt[i]);
1826 /* skb_add_rx_frag() does no checking on the page; if
1827 * we pass it a tail page, we'll end up with
1828 * bad page accounting and eventually with segafults.
1830 skb_add_rx_frag(skb, i - 1, head_page, frag_off,
1831 frag_len, dpaa_bp->size);
1834 /* Update the pool count for the current {cpu x bpool} */
1835 count_ptr = this_cpu_ptr(dpaa_bp->percpu_count);
1838 if (qm_sg_entry_is_final(&sgt[i]))
1841 WARN_ONCE(i == DPAA_SGT_MAX_ENTRIES, "No final bit on SGT\n");
1843 /* free the SG table buffer */
1844 free_pages((unsigned long)vaddr, 0);
1849 /* free all the SG entries */
1850 for (j = 0; j < DPAA_SGT_MAX_ENTRIES ; j++) {
1851 sg_addr = qm_sg_addr(&sgt[j]);
1852 sg_vaddr = phys_to_virt(sg_addr);
1853 /* all pages 0..i were unmaped */
1855 dma_unmap_page(priv->rx_dma_dev, qm_sg_addr(&sgt[j]),
1856 DPAA_BP_RAW_SIZE, DMA_FROM_DEVICE);
1857 free_pages((unsigned long)sg_vaddr, 0);
1858 /* counters 0..i-1 were decremented */
1860 dpaa_bp = dpaa_bpid2pool(sgt[j].bpid);
1862 count_ptr = this_cpu_ptr(dpaa_bp->percpu_count);
1867 if (qm_sg_entry_is_final(&sgt[j]))
1870 /* free the SGT fragment */
1871 free_pages((unsigned long)vaddr, 0);
1876 static int skb_to_contig_fd(struct dpaa_priv *priv,
1877 struct sk_buff *skb, struct qm_fd *fd,
1880 struct net_device *net_dev = priv->net_dev;
1881 enum dma_data_direction dma_dir;
1882 unsigned char *buff_start;
1883 struct sk_buff **skbh;
1887 /* We are guaranteed to have at least tx_headroom bytes
1888 * available, so just use that for offset.
1890 fd->bpid = FSL_DPAA_BPID_INV;
1891 buff_start = skb->data - priv->tx_headroom;
1892 dma_dir = DMA_TO_DEVICE;
1894 skbh = (struct sk_buff **)buff_start;
1897 /* Enable L3/L4 hardware checksum computation.
1899 * We must do this before dma_map_single(DMA_TO_DEVICE), because we may
1900 * need to write into the skb.
1902 err = dpaa_enable_tx_csum(priv, skb, fd,
1903 buff_start + DPAA_TX_PRIV_DATA_SIZE);
1904 if (unlikely(err < 0)) {
1905 if (net_ratelimit())
1906 netif_err(priv, tx_err, net_dev, "HW csum error: %d\n",
1911 /* Fill in the rest of the FD fields */
1912 qm_fd_set_contig(fd, priv->tx_headroom, skb->len);
1913 fd->cmd |= cpu_to_be32(FM_FD_CMD_FCO);
1915 /* Map the entire buffer size that may be seen by FMan, but no more */
1916 addr = dma_map_single(priv->tx_dma_dev, buff_start,
1917 priv->tx_headroom + skb->len, dma_dir);
1918 if (unlikely(dma_mapping_error(priv->tx_dma_dev, addr))) {
1919 if (net_ratelimit())
1920 netif_err(priv, tx_err, net_dev, "dma_map_single() failed\n");
1923 qm_fd_addr_set64(fd, addr);
1928 static int skb_to_sg_fd(struct dpaa_priv *priv,
1929 struct sk_buff *skb, struct qm_fd *fd)
1931 const enum dma_data_direction dma_dir = DMA_TO_DEVICE;
1932 const int nr_frags = skb_shinfo(skb)->nr_frags;
1933 struct net_device *net_dev = priv->net_dev;
1934 struct qm_sg_entry *sgt;
1935 struct sk_buff **skbh;
1943 /* get a page to store the SGTable */
1944 p = dev_alloc_pages(0);
1946 netdev_err(net_dev, "dev_alloc_pages() failed\n");
1949 buff_start = page_address(p);
1951 /* Enable L3/L4 hardware checksum computation.
1953 * We must do this before dma_map_single(DMA_TO_DEVICE), because we may
1954 * need to write into the skb.
1956 err = dpaa_enable_tx_csum(priv, skb, fd,
1957 buff_start + DPAA_TX_PRIV_DATA_SIZE);
1958 if (unlikely(err < 0)) {
1959 if (net_ratelimit())
1960 netif_err(priv, tx_err, net_dev, "HW csum error: %d\n",
1965 /* SGT[0] is used by the linear part */
1966 sgt = (struct qm_sg_entry *)(buff_start + priv->tx_headroom);
1967 frag_len = skb_headlen(skb);
1968 qm_sg_entry_set_len(&sgt[0], frag_len);
1969 sgt[0].bpid = FSL_DPAA_BPID_INV;
1971 addr = dma_map_single(priv->tx_dma_dev, skb->data,
1972 skb_headlen(skb), dma_dir);
1973 if (unlikely(dma_mapping_error(priv->tx_dma_dev, addr))) {
1974 netdev_err(priv->net_dev, "DMA mapping failed\n");
1976 goto sg0_map_failed;
1978 qm_sg_entry_set64(&sgt[0], addr);
1980 /* populate the rest of SGT entries */
1981 for (i = 0; i < nr_frags; i++) {
1982 frag = &skb_shinfo(skb)->frags[i];
1983 frag_len = skb_frag_size(frag);
1984 WARN_ON(!skb_frag_page(frag));
1985 addr = skb_frag_dma_map(priv->tx_dma_dev, frag, 0,
1987 if (unlikely(dma_mapping_error(priv->tx_dma_dev, addr))) {
1988 netdev_err(priv->net_dev, "DMA mapping failed\n");
1993 qm_sg_entry_set_len(&sgt[i + 1], frag_len);
1994 sgt[i + 1].bpid = FSL_DPAA_BPID_INV;
1995 sgt[i + 1].offset = 0;
1997 /* keep the offset in the address */
1998 qm_sg_entry_set64(&sgt[i + 1], addr);
2001 /* Set the final bit in the last used entry of the SGT */
2002 qm_sg_entry_set_f(&sgt[nr_frags], frag_len);
2004 /* set fd offset to priv->tx_headroom */
2005 qm_fd_set_sg(fd, priv->tx_headroom, skb->len);
2007 /* DMA map the SGT page */
2008 skbh = (struct sk_buff **)buff_start;
2011 addr = dma_map_page(priv->tx_dma_dev, p, 0,
2012 priv->tx_headroom + DPAA_SGT_SIZE, dma_dir);
2013 if (unlikely(dma_mapping_error(priv->tx_dma_dev, addr))) {
2014 netdev_err(priv->net_dev, "DMA mapping failed\n");
2016 goto sgt_map_failed;
2019 fd->bpid = FSL_DPAA_BPID_INV;
2020 fd->cmd |= cpu_to_be32(FM_FD_CMD_FCO);
2021 qm_fd_addr_set64(fd, addr);
2027 for (j = 0; j < i; j++)
2028 dma_unmap_page(priv->tx_dma_dev, qm_sg_addr(&sgt[j]),
2029 qm_sg_entry_get_len(&sgt[j]), dma_dir);
2032 free_pages((unsigned long)buff_start, 0);
2037 static inline int dpaa_xmit(struct dpaa_priv *priv,
2038 struct rtnl_link_stats64 *percpu_stats,
2042 struct qman_fq *egress_fq;
2045 egress_fq = priv->egress_fqs[queue];
2046 if (fd->bpid == FSL_DPAA_BPID_INV)
2047 fd->cmd |= cpu_to_be32(qman_fq_fqid(priv->conf_fqs[queue]));
2049 /* Trace this Tx fd */
2050 trace_dpaa_tx_fd(priv->net_dev, egress_fq, fd);
2052 for (i = 0; i < DPAA_ENQUEUE_RETRIES; i++) {
2053 err = qman_enqueue(egress_fq, fd);
2058 if (unlikely(err < 0)) {
2059 percpu_stats->tx_fifo_errors++;
2063 percpu_stats->tx_packets++;
2064 percpu_stats->tx_bytes += qm_fd_get_length(fd);
2069 #ifdef CONFIG_DPAA_ERRATUM_A050385
2070 static int dpaa_a050385_wa(struct net_device *net_dev, struct sk_buff **s)
2072 struct dpaa_priv *priv = netdev_priv(net_dev);
2073 struct sk_buff *new_skb, *skb = *s;
2074 unsigned char *start, i;
2076 /* check linear buffer alignment */
2077 if (!PTR_IS_ALIGNED(skb->data, DPAA_A050385_ALIGN))
2080 /* linear buffers just need to have an aligned start */
2081 if (!skb_is_nonlinear(skb))
2084 /* linear data size for nonlinear skbs needs to be aligned */
2085 if (!IS_ALIGNED(skb_headlen(skb), DPAA_A050385_ALIGN))
2088 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
2089 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
2091 /* all fragments need to have aligned start addresses */
2092 if (!IS_ALIGNED(skb_frag_off(frag), DPAA_A050385_ALIGN))
2095 /* all but last fragment need to have aligned sizes */
2096 if (!IS_ALIGNED(skb_frag_size(frag), DPAA_A050385_ALIGN) &&
2097 (i < skb_shinfo(skb)->nr_frags - 1))
2104 /* copy all the skb content into a new linear buffer */
2105 new_skb = netdev_alloc_skb(net_dev, skb->len + DPAA_A050385_ALIGN - 1 +
2110 /* NET_SKB_PAD bytes already reserved, adding up to tx_headroom */
2111 skb_reserve(new_skb, priv->tx_headroom - NET_SKB_PAD);
2113 /* Workaround for DPAA_A050385 requires data start to be aligned */
2114 start = PTR_ALIGN(new_skb->data, DPAA_A050385_ALIGN);
2115 if (start - new_skb->data)
2116 skb_reserve(new_skb, start - new_skb->data);
2118 skb_put(new_skb, skb->len);
2119 skb_copy_bits(skb, 0, new_skb->data, skb->len);
2120 skb_copy_header(new_skb, skb);
2121 new_skb->dev = skb->dev;
2123 /* We move the headroom when we align it so we have to reset the
2124 * network and transport header offsets relative to the new data
2125 * pointer. The checksum offload relies on these offsets.
2127 skb_set_network_header(new_skb, skb_network_offset(skb));
2128 skb_set_transport_header(new_skb, skb_transport_offset(skb));
2130 /* TODO: does timestamping need the result in the old skb? */
2139 dpaa_start_xmit(struct sk_buff *skb, struct net_device *net_dev)
2141 const int queue_mapping = skb_get_queue_mapping(skb);
2142 bool nonlinear = skb_is_nonlinear(skb);
2143 struct rtnl_link_stats64 *percpu_stats;
2144 struct dpaa_percpu_priv *percpu_priv;
2145 struct netdev_queue *txq;
2146 struct dpaa_priv *priv;
2151 priv = netdev_priv(net_dev);
2152 percpu_priv = this_cpu_ptr(priv->percpu_priv);
2153 percpu_stats = &percpu_priv->stats;
2155 qm_fd_clear_fd(&fd);
2158 /* We're going to store the skb backpointer at the beginning
2159 * of the data buffer, so we need a privately owned skb
2161 * We've made sure skb is not shared in dev->priv_flags,
2162 * we need to verify the skb head is not cloned
2164 if (skb_cow_head(skb, priv->tx_headroom))
2167 WARN_ON(skb_is_nonlinear(skb));
2170 /* MAX_SKB_FRAGS is equal or larger than our dpaa_SGT_MAX_ENTRIES;
2171 * make sure we don't feed FMan with more fragments than it supports.
2173 if (unlikely(nonlinear &&
2174 (skb_shinfo(skb)->nr_frags >= DPAA_SGT_MAX_ENTRIES))) {
2175 /* If the egress skb contains more fragments than we support
2176 * we have no choice but to linearize it ourselves.
2178 if (__skb_linearize(skb))
2181 nonlinear = skb_is_nonlinear(skb);
2184 #ifdef CONFIG_DPAA_ERRATUM_A050385
2185 if (unlikely(fman_has_errata_a050385())) {
2186 if (dpaa_a050385_wa(net_dev, &skb))
2188 nonlinear = skb_is_nonlinear(skb);
2193 /* Just create a S/G fd based on the skb */
2194 err = skb_to_sg_fd(priv, skb, &fd);
2195 percpu_priv->tx_frag_skbuffs++;
2197 /* Create a contig FD from this skb */
2198 err = skb_to_contig_fd(priv, skb, &fd, &offset);
2200 if (unlikely(err < 0))
2201 goto skb_to_fd_failed;
2203 txq = netdev_get_tx_queue(net_dev, queue_mapping);
2205 /* LLTX requires to do our own update of trans_start */
2206 txq->trans_start = jiffies;
2208 if (priv->tx_tstamp && skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) {
2209 fd.cmd |= cpu_to_be32(FM_FD_CMD_UPD);
2210 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
2213 if (likely(dpaa_xmit(priv, percpu_stats, queue_mapping, &fd) == 0))
2214 return NETDEV_TX_OK;
2216 dpaa_cleanup_tx_fd(priv, &fd, false);
2219 percpu_stats->tx_errors++;
2221 return NETDEV_TX_OK;
2224 static void dpaa_rx_error(struct net_device *net_dev,
2225 const struct dpaa_priv *priv,
2226 struct dpaa_percpu_priv *percpu_priv,
2227 const struct qm_fd *fd,
2230 if (net_ratelimit())
2231 netif_err(priv, hw, net_dev, "Err FD status = 0x%08x\n",
2232 be32_to_cpu(fd->status) & FM_FD_STAT_RX_ERRORS);
2234 percpu_priv->stats.rx_errors++;
2236 if (be32_to_cpu(fd->status) & FM_FD_ERR_DMA)
2237 percpu_priv->rx_errors.dme++;
2238 if (be32_to_cpu(fd->status) & FM_FD_ERR_PHYSICAL)
2239 percpu_priv->rx_errors.fpe++;
2240 if (be32_to_cpu(fd->status) & FM_FD_ERR_SIZE)
2241 percpu_priv->rx_errors.fse++;
2242 if (be32_to_cpu(fd->status) & FM_FD_ERR_PRS_HDR_ERR)
2243 percpu_priv->rx_errors.phe++;
2245 dpaa_fd_release(net_dev, fd);
2248 static void dpaa_tx_error(struct net_device *net_dev,
2249 const struct dpaa_priv *priv,
2250 struct dpaa_percpu_priv *percpu_priv,
2251 const struct qm_fd *fd,
2254 struct sk_buff *skb;
2256 if (net_ratelimit())
2257 netif_warn(priv, hw, net_dev, "FD status = 0x%08x\n",
2258 be32_to_cpu(fd->status) & FM_FD_STAT_TX_ERRORS);
2260 percpu_priv->stats.tx_errors++;
2262 skb = dpaa_cleanup_tx_fd(priv, fd, false);
2266 static int dpaa_eth_poll(struct napi_struct *napi, int budget)
2268 struct dpaa_napi_portal *np =
2269 container_of(napi, struct dpaa_napi_portal, napi);
2271 int cleaned = qman_p_poll_dqrr(np->p, budget);
2273 if (cleaned < budget) {
2274 napi_complete_done(napi, cleaned);
2275 qman_p_irqsource_add(np->p, QM_PIRQ_DQRI);
2276 } else if (np->down) {
2277 qman_p_irqsource_add(np->p, QM_PIRQ_DQRI);
2283 static void dpaa_tx_conf(struct net_device *net_dev,
2284 const struct dpaa_priv *priv,
2285 struct dpaa_percpu_priv *percpu_priv,
2286 const struct qm_fd *fd,
2289 struct sk_buff *skb;
2291 if (unlikely(be32_to_cpu(fd->status) & FM_FD_STAT_TX_ERRORS)) {
2292 if (net_ratelimit())
2293 netif_warn(priv, hw, net_dev, "FD status = 0x%08x\n",
2294 be32_to_cpu(fd->status) &
2295 FM_FD_STAT_TX_ERRORS);
2297 percpu_priv->stats.tx_errors++;
2300 percpu_priv->tx_confirm++;
2302 skb = dpaa_cleanup_tx_fd(priv, fd, true);
2307 static inline int dpaa_eth_napi_schedule(struct dpaa_percpu_priv *percpu_priv,
2308 struct qman_portal *portal)
2310 if (unlikely(in_irq() || !in_serving_softirq())) {
2311 /* Disable QMan IRQ and invoke NAPI */
2312 qman_p_irqsource_remove(portal, QM_PIRQ_DQRI);
2314 percpu_priv->np.p = portal;
2315 napi_schedule(&percpu_priv->np.napi);
2316 percpu_priv->in_interrupt++;
2322 static enum qman_cb_dqrr_result rx_error_dqrr(struct qman_portal *portal,
2324 const struct qm_dqrr_entry *dq)
2326 struct dpaa_fq *dpaa_fq = container_of(fq, struct dpaa_fq, fq_base);
2327 struct dpaa_percpu_priv *percpu_priv;
2328 struct net_device *net_dev;
2329 struct dpaa_bp *dpaa_bp;
2330 struct dpaa_priv *priv;
2332 net_dev = dpaa_fq->net_dev;
2333 priv = netdev_priv(net_dev);
2334 dpaa_bp = dpaa_bpid2pool(dq->fd.bpid);
2336 return qman_cb_dqrr_consume;
2338 percpu_priv = this_cpu_ptr(priv->percpu_priv);
2340 if (dpaa_eth_napi_schedule(percpu_priv, portal))
2341 return qman_cb_dqrr_stop;
2343 dpaa_eth_refill_bpools(priv);
2344 dpaa_rx_error(net_dev, priv, percpu_priv, &dq->fd, fq->fqid);
2346 return qman_cb_dqrr_consume;
2349 static enum qman_cb_dqrr_result rx_default_dqrr(struct qman_portal *portal,
2351 const struct qm_dqrr_entry *dq)
2353 struct skb_shared_hwtstamps *shhwtstamps;
2354 struct rtnl_link_stats64 *percpu_stats;
2355 struct dpaa_percpu_priv *percpu_priv;
2356 const struct qm_fd *fd = &dq->fd;
2357 dma_addr_t addr = qm_fd_addr(fd);
2358 enum qm_fd_format fd_format;
2359 struct net_device *net_dev;
2360 u32 fd_status, hash_offset;
2361 struct dpaa_bp *dpaa_bp;
2362 struct dpaa_priv *priv;
2363 unsigned int skb_len;
2364 struct sk_buff *skb;
2369 fd_status = be32_to_cpu(fd->status);
2370 fd_format = qm_fd_get_format(fd);
2371 net_dev = ((struct dpaa_fq *)fq)->net_dev;
2372 priv = netdev_priv(net_dev);
2373 dpaa_bp = dpaa_bpid2pool(dq->fd.bpid);
2375 return qman_cb_dqrr_consume;
2377 /* Trace the Rx fd */
2378 trace_dpaa_rx_fd(net_dev, fq, &dq->fd);
2380 percpu_priv = this_cpu_ptr(priv->percpu_priv);
2381 percpu_stats = &percpu_priv->stats;
2383 if (unlikely(dpaa_eth_napi_schedule(percpu_priv, portal)))
2384 return qman_cb_dqrr_stop;
2386 /* Make sure we didn't run out of buffers */
2387 if (unlikely(dpaa_eth_refill_bpools(priv))) {
2388 /* Unable to refill the buffer pool due to insufficient
2389 * system memory. Just release the frame back into the pool,
2390 * otherwise we'll soon end up with an empty buffer pool.
2392 dpaa_fd_release(net_dev, &dq->fd);
2393 return qman_cb_dqrr_consume;
2396 if (unlikely(fd_status & FM_FD_STAT_RX_ERRORS) != 0) {
2397 if (net_ratelimit())
2398 netif_warn(priv, hw, net_dev, "FD status = 0x%08x\n",
2399 fd_status & FM_FD_STAT_RX_ERRORS);
2401 percpu_stats->rx_errors++;
2402 dpaa_fd_release(net_dev, fd);
2403 return qman_cb_dqrr_consume;
2406 dma_unmap_page(dpaa_bp->priv->rx_dma_dev, addr, DPAA_BP_RAW_SIZE,
2409 /* prefetch the first 64 bytes of the frame or the SGT start */
2410 vaddr = phys_to_virt(addr);
2411 prefetch(vaddr + qm_fd_get_offset(fd));
2413 /* The only FD types that we may receive are contig and S/G */
2414 WARN_ON((fd_format != qm_fd_contig) && (fd_format != qm_fd_sg));
2416 /* Account for either the contig buffer or the SGT buffer (depending on
2417 * which case we were in) having been removed from the pool.
2419 count_ptr = this_cpu_ptr(dpaa_bp->percpu_count);
2422 if (likely(fd_format == qm_fd_contig))
2423 skb = contig_fd_to_skb(priv, fd);
2425 skb = sg_fd_to_skb(priv, fd);
2427 return qman_cb_dqrr_consume;
2429 if (priv->rx_tstamp) {
2430 shhwtstamps = skb_hwtstamps(skb);
2431 memset(shhwtstamps, 0, sizeof(*shhwtstamps));
2433 if (!fman_port_get_tstamp(priv->mac_dev->port[RX], vaddr, &ns))
2434 shhwtstamps->hwtstamp = ns_to_ktime(ns);
2436 dev_warn(net_dev->dev.parent, "fman_port_get_tstamp failed!\n");
2439 skb->protocol = eth_type_trans(skb, net_dev);
2441 if (net_dev->features & NETIF_F_RXHASH && priv->keygen_in_use &&
2442 !fman_port_get_hash_result_offset(priv->mac_dev->port[RX],
2444 enum pkt_hash_types type;
2446 /* if L4 exists, it was used in the hash generation */
2447 type = be32_to_cpu(fd->status) & FM_FD_STAT_L4CV ?
2448 PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3;
2449 skb_set_hash(skb, be32_to_cpu(*(u32 *)(vaddr + hash_offset)),
2455 if (unlikely(netif_receive_skb(skb) == NET_RX_DROP)) {
2456 percpu_stats->rx_dropped++;
2457 return qman_cb_dqrr_consume;
2460 percpu_stats->rx_packets++;
2461 percpu_stats->rx_bytes += skb_len;
2463 return qman_cb_dqrr_consume;
2466 static enum qman_cb_dqrr_result conf_error_dqrr(struct qman_portal *portal,
2468 const struct qm_dqrr_entry *dq)
2470 struct dpaa_percpu_priv *percpu_priv;
2471 struct net_device *net_dev;
2472 struct dpaa_priv *priv;
2474 net_dev = ((struct dpaa_fq *)fq)->net_dev;
2475 priv = netdev_priv(net_dev);
2477 percpu_priv = this_cpu_ptr(priv->percpu_priv);
2479 if (dpaa_eth_napi_schedule(percpu_priv, portal))
2480 return qman_cb_dqrr_stop;
2482 dpaa_tx_error(net_dev, priv, percpu_priv, &dq->fd, fq->fqid);
2484 return qman_cb_dqrr_consume;
2487 static enum qman_cb_dqrr_result conf_dflt_dqrr(struct qman_portal *portal,
2489 const struct qm_dqrr_entry *dq)
2491 struct dpaa_percpu_priv *percpu_priv;
2492 struct net_device *net_dev;
2493 struct dpaa_priv *priv;
2495 net_dev = ((struct dpaa_fq *)fq)->net_dev;
2496 priv = netdev_priv(net_dev);
2499 trace_dpaa_tx_conf_fd(net_dev, fq, &dq->fd);
2501 percpu_priv = this_cpu_ptr(priv->percpu_priv);
2503 if (dpaa_eth_napi_schedule(percpu_priv, portal))
2504 return qman_cb_dqrr_stop;
2506 dpaa_tx_conf(net_dev, priv, percpu_priv, &dq->fd, fq->fqid);
2508 return qman_cb_dqrr_consume;
2511 static void egress_ern(struct qman_portal *portal,
2513 const union qm_mr_entry *msg)
2515 const struct qm_fd *fd = &msg->ern.fd;
2516 struct dpaa_percpu_priv *percpu_priv;
2517 const struct dpaa_priv *priv;
2518 struct net_device *net_dev;
2519 struct sk_buff *skb;
2521 net_dev = ((struct dpaa_fq *)fq)->net_dev;
2522 priv = netdev_priv(net_dev);
2523 percpu_priv = this_cpu_ptr(priv->percpu_priv);
2525 percpu_priv->stats.tx_dropped++;
2526 percpu_priv->stats.tx_fifo_errors++;
2527 count_ern(percpu_priv, msg);
2529 skb = dpaa_cleanup_tx_fd(priv, fd, false);
2530 dev_kfree_skb_any(skb);
2533 static const struct dpaa_fq_cbs dpaa_fq_cbs = {
2534 .rx_defq = { .cb = { .dqrr = rx_default_dqrr } },
2535 .tx_defq = { .cb = { .dqrr = conf_dflt_dqrr } },
2536 .rx_errq = { .cb = { .dqrr = rx_error_dqrr } },
2537 .tx_errq = { .cb = { .dqrr = conf_error_dqrr } },
2538 .egress_ern = { .cb = { .ern = egress_ern } }
2541 static void dpaa_eth_napi_enable(struct dpaa_priv *priv)
2543 struct dpaa_percpu_priv *percpu_priv;
2546 for_each_online_cpu(i) {
2547 percpu_priv = per_cpu_ptr(priv->percpu_priv, i);
2549 percpu_priv->np.down = 0;
2550 napi_enable(&percpu_priv->np.napi);
2554 static void dpaa_eth_napi_disable(struct dpaa_priv *priv)
2556 struct dpaa_percpu_priv *percpu_priv;
2559 for_each_online_cpu(i) {
2560 percpu_priv = per_cpu_ptr(priv->percpu_priv, i);
2562 percpu_priv->np.down = 1;
2563 napi_disable(&percpu_priv->np.napi);
2567 static void dpaa_adjust_link(struct net_device *net_dev)
2569 struct mac_device *mac_dev;
2570 struct dpaa_priv *priv;
2572 priv = netdev_priv(net_dev);
2573 mac_dev = priv->mac_dev;
2574 mac_dev->adjust_link(mac_dev);
2577 /* The Aquantia PHYs are capable of performing rate adaptation */
2578 #define PHY_VEND_AQUANTIA 0x03a1b400
2580 static int dpaa_phy_init(struct net_device *net_dev)
2582 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
2583 struct mac_device *mac_dev;
2584 struct phy_device *phy_dev;
2585 struct dpaa_priv *priv;
2587 priv = netdev_priv(net_dev);
2588 mac_dev = priv->mac_dev;
2590 phy_dev = of_phy_connect(net_dev, mac_dev->phy_node,
2591 &dpaa_adjust_link, 0,
2594 netif_err(priv, ifup, net_dev, "init_phy() failed\n");
2598 /* Unless the PHY is capable of rate adaptation */
2599 if (mac_dev->phy_if != PHY_INTERFACE_MODE_XGMII ||
2600 ((phy_dev->drv->phy_id & GENMASK(31, 10)) != PHY_VEND_AQUANTIA)) {
2601 /* remove any features not supported by the controller */
2602 ethtool_convert_legacy_u32_to_link_mode(mask,
2603 mac_dev->if_support);
2604 linkmode_and(phy_dev->supported, phy_dev->supported, mask);
2607 phy_support_asym_pause(phy_dev);
2609 mac_dev->phy_dev = phy_dev;
2610 net_dev->phydev = phy_dev;
2615 static int dpaa_open(struct net_device *net_dev)
2617 struct mac_device *mac_dev;
2618 struct dpaa_priv *priv;
2621 priv = netdev_priv(net_dev);
2622 mac_dev = priv->mac_dev;
2623 dpaa_eth_napi_enable(priv);
2625 err = dpaa_phy_init(net_dev);
2627 goto phy_init_failed;
2629 for (i = 0; i < ARRAY_SIZE(mac_dev->port); i++) {
2630 err = fman_port_enable(mac_dev->port[i]);
2632 goto mac_start_failed;
2635 err = priv->mac_dev->start(mac_dev);
2637 netif_err(priv, ifup, net_dev, "mac_dev->start() = %d\n", err);
2638 goto mac_start_failed;
2641 netif_tx_start_all_queues(net_dev);
2646 for (i = 0; i < ARRAY_SIZE(mac_dev->port); i++)
2647 fman_port_disable(mac_dev->port[i]);
2650 dpaa_eth_napi_disable(priv);
2655 static int dpaa_eth_stop(struct net_device *net_dev)
2657 struct dpaa_priv *priv;
2660 err = dpaa_stop(net_dev);
2662 priv = netdev_priv(net_dev);
2663 dpaa_eth_napi_disable(priv);
2668 static int dpaa_ts_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2670 struct dpaa_priv *priv = netdev_priv(dev);
2671 struct hwtstamp_config config;
2673 if (copy_from_user(&config, rq->ifr_data, sizeof(config)))
2676 switch (config.tx_type) {
2677 case HWTSTAMP_TX_OFF:
2678 /* Couldn't disable rx/tx timestamping separately.
2681 priv->tx_tstamp = false;
2683 case HWTSTAMP_TX_ON:
2684 priv->mac_dev->set_tstamp(priv->mac_dev->fman_mac, true);
2685 priv->tx_tstamp = true;
2691 if (config.rx_filter == HWTSTAMP_FILTER_NONE) {
2692 /* Couldn't disable rx/tx timestamping separately.
2695 priv->rx_tstamp = false;
2697 priv->mac_dev->set_tstamp(priv->mac_dev->fman_mac, true);
2698 priv->rx_tstamp = true;
2699 /* TS is set for all frame types, not only those requested */
2700 config.rx_filter = HWTSTAMP_FILTER_ALL;
2703 return copy_to_user(rq->ifr_data, &config, sizeof(config)) ?
2707 static int dpaa_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd)
2711 if (cmd == SIOCGMIIREG) {
2712 if (net_dev->phydev)
2713 return phy_mii_ioctl(net_dev->phydev, rq, cmd);
2716 if (cmd == SIOCSHWTSTAMP)
2717 return dpaa_ts_ioctl(net_dev, rq, cmd);
2722 static const struct net_device_ops dpaa_ops = {
2723 .ndo_open = dpaa_open,
2724 .ndo_start_xmit = dpaa_start_xmit,
2725 .ndo_stop = dpaa_eth_stop,
2726 .ndo_tx_timeout = dpaa_tx_timeout,
2727 .ndo_get_stats64 = dpaa_get_stats64,
2728 .ndo_change_carrier = fixed_phy_change_carrier,
2729 .ndo_set_mac_address = dpaa_set_mac_address,
2730 .ndo_validate_addr = eth_validate_addr,
2731 .ndo_set_rx_mode = dpaa_set_rx_mode,
2732 .ndo_do_ioctl = dpaa_ioctl,
2733 .ndo_setup_tc = dpaa_setup_tc,
2736 static int dpaa_napi_add(struct net_device *net_dev)
2738 struct dpaa_priv *priv = netdev_priv(net_dev);
2739 struct dpaa_percpu_priv *percpu_priv;
2742 for_each_possible_cpu(cpu) {
2743 percpu_priv = per_cpu_ptr(priv->percpu_priv, cpu);
2745 netif_napi_add(net_dev, &percpu_priv->np.napi,
2746 dpaa_eth_poll, NAPI_POLL_WEIGHT);
2752 static void dpaa_napi_del(struct net_device *net_dev)
2754 struct dpaa_priv *priv = netdev_priv(net_dev);
2755 struct dpaa_percpu_priv *percpu_priv;
2758 for_each_possible_cpu(cpu) {
2759 percpu_priv = per_cpu_ptr(priv->percpu_priv, cpu);
2761 netif_napi_del(&percpu_priv->np.napi);
2765 static inline void dpaa_bp_free_pf(const struct dpaa_bp *bp,
2766 struct bm_buffer *bmb)
2768 dma_addr_t addr = bm_buf_addr(bmb);
2770 dma_unmap_page(bp->priv->rx_dma_dev, addr, DPAA_BP_RAW_SIZE,
2773 skb_free_frag(phys_to_virt(addr));
2776 /* Alloc the dpaa_bp struct and configure default values */
2777 static struct dpaa_bp *dpaa_bp_alloc(struct device *dev)
2779 struct dpaa_bp *dpaa_bp;
2781 dpaa_bp = devm_kzalloc(dev, sizeof(*dpaa_bp), GFP_KERNEL);
2783 return ERR_PTR(-ENOMEM);
2785 dpaa_bp->bpid = FSL_DPAA_BPID_INV;
2786 dpaa_bp->percpu_count = devm_alloc_percpu(dev, *dpaa_bp->percpu_count);
2787 if (!dpaa_bp->percpu_count)
2788 return ERR_PTR(-ENOMEM);
2790 dpaa_bp->config_count = FSL_DPAA_ETH_MAX_BUF_COUNT;
2792 dpaa_bp->seed_cb = dpaa_bp_seed;
2793 dpaa_bp->free_buf_cb = dpaa_bp_free_pf;
2798 /* Place all ingress FQs (Rx Default, Rx Error) in a dedicated CGR.
2799 * We won't be sending congestion notifications to FMan; for now, we just use
2800 * this CGR to generate enqueue rejections to FMan in order to drop the frames
2801 * before they reach our ingress queues and eat up memory.
2803 static int dpaa_ingress_cgr_init(struct dpaa_priv *priv)
2805 struct qm_mcc_initcgr initcgr;
2809 err = qman_alloc_cgrid(&priv->ingress_cgr.cgrid);
2811 if (netif_msg_drv(priv))
2812 pr_err("Error %d allocating CGR ID\n", err);
2816 /* Enable CS TD, but disable Congestion State Change Notifications. */
2817 memset(&initcgr, 0, sizeof(initcgr));
2818 initcgr.we_mask = cpu_to_be16(QM_CGR_WE_CS_THRES);
2819 initcgr.cgr.cscn_en = QM_CGR_EN;
2820 cs_th = DPAA_INGRESS_CS_THRESHOLD;
2821 qm_cgr_cs_thres_set64(&initcgr.cgr.cs_thres, cs_th, 1);
2823 initcgr.we_mask |= cpu_to_be16(QM_CGR_WE_CSTD_EN);
2824 initcgr.cgr.cstd_en = QM_CGR_EN;
2826 /* This CGR will be associated with the SWP affined to the current CPU.
2827 * However, we'll place all our ingress FQs in it.
2829 err = qman_create_cgr(&priv->ingress_cgr, QMAN_CGR_FLAG_USE_INIT,
2832 if (netif_msg_drv(priv))
2833 pr_err("Error %d creating ingress CGR with ID %d\n",
2834 err, priv->ingress_cgr.cgrid);
2835 qman_release_cgrid(priv->ingress_cgr.cgrid);
2838 if (netif_msg_drv(priv))
2839 pr_debug("Created ingress CGR %d for netdev with hwaddr %pM\n",
2840 priv->ingress_cgr.cgrid, priv->mac_dev->addr);
2842 priv->use_ingress_cgr = true;
2848 static u16 dpaa_get_headroom(struct dpaa_buffer_layout *bl,
2849 enum port_type port)
2853 /* The frame headroom must accommodate:
2854 * - the driver private data area
2855 * - parse results, hash results, timestamp if selected
2856 * If either hash results or time stamp are selected, both will
2857 * be copied to/from the frame headroom, as TS is located between PR and
2858 * HR in the IC and IC copy size has a granularity of 16bytes
2859 * (see description of FMBM_RICP and FMBM_TICP registers in DPAARM)
2861 * Also make sure the headroom is a multiple of data_align bytes
2863 headroom = (u16)(bl[port].priv_data_size + DPAA_HWA_SIZE);
2866 return ALIGN(headroom, DPAA_FD_RX_DATA_ALIGNMENT);
2868 return ALIGN(headroom, DPAA_FD_DATA_ALIGNMENT);
2871 static int dpaa_eth_probe(struct platform_device *pdev)
2873 struct net_device *net_dev = NULL;
2874 struct dpaa_bp *dpaa_bp = NULL;
2875 struct dpaa_fq *dpaa_fq, *tmp;
2876 struct dpaa_priv *priv = NULL;
2877 struct fm_port_fqs port_fqs;
2878 struct mac_device *mac_dev;
2879 int err = 0, channel;
2884 err = bman_is_probed();
2886 return -EPROBE_DEFER;
2888 dev_err(dev, "failing probe due to bman probe error\n");
2891 err = qman_is_probed();
2893 return -EPROBE_DEFER;
2895 dev_err(dev, "failing probe due to qman probe error\n");
2898 err = bman_portals_probed();
2900 return -EPROBE_DEFER;
2903 "failing probe due to bman portals probe error\n");
2906 err = qman_portals_probed();
2908 return -EPROBE_DEFER;
2911 "failing probe due to qman portals probe error\n");
2915 /* Allocate this early, so we can store relevant information in
2918 net_dev = alloc_etherdev_mq(sizeof(*priv), DPAA_ETH_TXQ_NUM);
2920 dev_err(dev, "alloc_etherdev_mq() failed\n");
2924 /* Do this here, so we can be verbose early */
2925 SET_NETDEV_DEV(net_dev, dev->parent);
2926 dev_set_drvdata(dev, net_dev);
2928 priv = netdev_priv(net_dev);
2929 priv->net_dev = net_dev;
2931 priv->msg_enable = netif_msg_init(debug, DPAA_MSG_DEFAULT);
2933 mac_dev = dpaa_mac_dev_get(pdev);
2934 if (IS_ERR(mac_dev)) {
2935 netdev_err(net_dev, "dpaa_mac_dev_get() failed\n");
2936 err = PTR_ERR(mac_dev);
2940 /* Devices used for DMA mapping */
2941 priv->rx_dma_dev = fman_port_get_device(mac_dev->port[RX]);
2942 priv->tx_dma_dev = fman_port_get_device(mac_dev->port[TX]);
2943 err = dma_coerce_mask_and_coherent(priv->rx_dma_dev, DMA_BIT_MASK(40));
2945 err = dma_coerce_mask_and_coherent(priv->tx_dma_dev,
2948 netdev_err(net_dev, "dma_coerce_mask_and_coherent() failed\n");
2952 /* If fsl_fm_max_frm is set to a higher value than the all-common 1500,
2953 * we choose conservatively and let the user explicitly set a higher
2954 * MTU via ifconfig. Otherwise, the user may end up with different MTUs
2956 * If on the other hand fsl_fm_max_frm has been chosen below 1500,
2957 * start with the maximum allowed.
2959 net_dev->mtu = min(dpaa_get_max_mtu(), ETH_DATA_LEN);
2961 netdev_dbg(net_dev, "Setting initial MTU on net device: %d\n",
2964 priv->buf_layout[RX].priv_data_size = DPAA_RX_PRIV_DATA_SIZE; /* Rx */
2965 priv->buf_layout[TX].priv_data_size = DPAA_TX_PRIV_DATA_SIZE; /* Tx */
2968 dpaa_bp = dpaa_bp_alloc(dev);
2969 if (IS_ERR(dpaa_bp)) {
2970 err = PTR_ERR(dpaa_bp);
2973 /* the raw size of the buffers used for reception */
2974 dpaa_bp->raw_size = DPAA_BP_RAW_SIZE;
2975 /* avoid runtime computations by keeping the usable size here */
2976 dpaa_bp->size = dpaa_bp_size(dpaa_bp->raw_size);
2977 dpaa_bp->priv = priv;
2979 err = dpaa_bp_alloc_pool(dpaa_bp);
2982 priv->dpaa_bp = dpaa_bp;
2984 INIT_LIST_HEAD(&priv->dpaa_fq_list);
2986 memset(&port_fqs, 0, sizeof(port_fqs));
2988 err = dpaa_alloc_all_fqs(dev, &priv->dpaa_fq_list, &port_fqs);
2990 dev_err(dev, "dpaa_alloc_all_fqs() failed\n");
2994 priv->mac_dev = mac_dev;
2996 channel = dpaa_get_channel();
2998 dev_err(dev, "dpaa_get_channel() failed\n");
3003 priv->channel = (u16)channel;
3005 /* Walk the CPUs with affine portals
3006 * and add this pool channel to each's dequeue mask.
3008 dpaa_eth_add_channel(priv->channel, &pdev->dev);
3010 dpaa_fq_setup(priv, &dpaa_fq_cbs, priv->mac_dev->port[TX]);
3012 /* Create a congestion group for this netdev, with
3013 * dynamically-allocated CGR ID.
3014 * Must be executed after probing the MAC, but before
3015 * assigning the egress FQs to the CGRs.
3017 err = dpaa_eth_cgr_init(priv);
3019 dev_err(dev, "Error initializing CGR\n");
3023 err = dpaa_ingress_cgr_init(priv);
3025 dev_err(dev, "Error initializing ingress CGR\n");
3026 goto delete_egress_cgr;
3029 /* Add the FQs to the interface, and make them active */
3030 list_for_each_entry_safe(dpaa_fq, tmp, &priv->dpaa_fq_list, list) {
3031 err = dpaa_fq_init(dpaa_fq, false);
3036 priv->tx_headroom = dpaa_get_headroom(priv->buf_layout, TX);
3037 priv->rx_headroom = dpaa_get_headroom(priv->buf_layout, RX);
3039 /* All real interfaces need their ports initialized */
3040 err = dpaa_eth_init_ports(mac_dev, dpaa_bp, &port_fqs,
3041 &priv->buf_layout[0], dev);
3045 /* Rx traffic distribution based on keygen hashing defaults to on */
3046 priv->keygen_in_use = true;
3048 priv->percpu_priv = devm_alloc_percpu(dev, *priv->percpu_priv);
3049 if (!priv->percpu_priv) {
3050 dev_err(dev, "devm_alloc_percpu() failed\n");
3056 netif_set_real_num_tx_queues(net_dev, priv->num_tc * DPAA_TC_TXQ_NUM);
3058 /* Initialize NAPI */
3059 err = dpaa_napi_add(net_dev);
3061 goto delete_dpaa_napi;
3063 err = dpaa_netdev_init(net_dev, &dpaa_ops, tx_timeout);
3065 goto delete_dpaa_napi;
3067 dpaa_eth_sysfs_init(&net_dev->dev);
3069 netif_info(priv, probe, net_dev, "Probed interface %s\n",
3075 dpaa_napi_del(net_dev);
3077 dpaa_fq_free(dev, &priv->dpaa_fq_list);
3078 qman_delete_cgr_safe(&priv->ingress_cgr);
3079 qman_release_cgrid(priv->ingress_cgr.cgrid);
3081 qman_delete_cgr_safe(&priv->cgr_data.cgr);
3082 qman_release_cgrid(priv->cgr_data.cgr.cgrid);
3084 dpaa_bps_free(priv);
3086 dev_set_drvdata(dev, NULL);
3087 free_netdev(net_dev);
3092 static int dpaa_remove(struct platform_device *pdev)
3094 struct net_device *net_dev;
3095 struct dpaa_priv *priv;
3100 net_dev = dev_get_drvdata(dev);
3102 priv = netdev_priv(net_dev);
3104 dpaa_eth_sysfs_remove(dev);
3106 dev_set_drvdata(dev, NULL);
3107 unregister_netdev(net_dev);
3109 err = dpaa_fq_free(dev, &priv->dpaa_fq_list);
3111 qman_delete_cgr_safe(&priv->ingress_cgr);
3112 qman_release_cgrid(priv->ingress_cgr.cgrid);
3113 qman_delete_cgr_safe(&priv->cgr_data.cgr);
3114 qman_release_cgrid(priv->cgr_data.cgr.cgrid);
3116 dpaa_napi_del(net_dev);
3118 dpaa_bps_free(priv);
3120 free_netdev(net_dev);
3125 static const struct platform_device_id dpaa_devtype[] = {
3127 .name = "dpaa-ethernet",
3132 MODULE_DEVICE_TABLE(platform, dpaa_devtype);
3134 static struct platform_driver dpaa_driver = {
3136 .name = KBUILD_MODNAME,
3138 .id_table = dpaa_devtype,
3139 .probe = dpaa_eth_probe,
3140 .remove = dpaa_remove
3143 static int __init dpaa_load(void)
3147 pr_debug("FSL DPAA Ethernet driver\n");
3149 /* initialize dpaa_eth mirror values */
3150 dpaa_rx_extra_headroom = fman_get_rx_extra_headroom();
3151 dpaa_max_frm = fman_get_max_frm();
3153 err = platform_driver_register(&dpaa_driver);
3155 pr_err("Error, platform_driver_register() = %d\n", err);
3159 module_init(dpaa_load);
3161 static void __exit dpaa_unload(void)
3163 platform_driver_unregister(&dpaa_driver);
3165 /* Only one channel is used and needs to be released after all
3166 * interfaces are removed
3168 dpaa_release_channel();
3170 module_exit(dpaa_unload);
3172 MODULE_LICENSE("Dual BSD/GPL");
3173 MODULE_DESCRIPTION("FSL DPAA Ethernet driver");