1 /* D-Link DL2000-based Gigabit Ethernet Adapter Linux driver */
3 Copyright (c) 2001, 2002 by D-Link Corporation
4 Written by Edward Peng.<edward_peng@dlink.com.tw>
5 Created 03-May-2001, base on Linux' sundance.c.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
13 #define DRV_NAME "DL2000/TC902x-based linux driver"
14 #define DRV_VERSION "v1.19"
15 #define DRV_RELDATE "2007/08/12"
17 #include <linux/dma-mapping.h>
19 #define dw32(reg, val) iowrite32(val, ioaddr + (reg))
20 #define dw16(reg, val) iowrite16(val, ioaddr + (reg))
21 #define dw8(reg, val) iowrite8(val, ioaddr + (reg))
22 #define dr32(reg) ioread32(ioaddr + (reg))
23 #define dr16(reg) ioread16(ioaddr + (reg))
24 #define dr8(reg) ioread8(ioaddr + (reg))
26 static char version[] =
27 KERN_INFO DRV_NAME " " DRV_VERSION " " DRV_RELDATE "\n";
29 static int mtu[MAX_UNITS];
30 static int vlan[MAX_UNITS];
31 static int jumbo[MAX_UNITS];
32 static char *media[MAX_UNITS];
33 static int tx_flow=-1;
34 static int rx_flow=-1;
35 static int copy_thresh;
36 static int rx_coalesce=10; /* Rx frame count each interrupt */
37 static int rx_timeout=200; /* Rx DMA wait time in 640ns increments */
38 static int tx_coalesce=16; /* HW xmit count each TxDMAComplete */
41 MODULE_AUTHOR ("Edward Peng");
42 MODULE_DESCRIPTION ("D-Link DL2000-based Gigabit Ethernet Adapter");
43 MODULE_LICENSE("GPL");
44 module_param_array(mtu, int, NULL, 0);
45 module_param_array(media, charp, NULL, 0);
46 module_param_array(vlan, int, NULL, 0);
47 module_param_array(jumbo, int, NULL, 0);
48 module_param(tx_flow, int, 0);
49 module_param(rx_flow, int, 0);
50 module_param(copy_thresh, int, 0);
51 module_param(rx_coalesce, int, 0); /* Rx frame count each interrupt */
52 module_param(rx_timeout, int, 0); /* Rx DMA wait time in 64ns increments */
53 module_param(tx_coalesce, int, 0); /* HW xmit count each TxDMAComplete */
56 /* Enable the default interrupts */
57 #define DEFAULT_INTR (RxDMAComplete | HostError | IntRequested | TxDMAComplete| \
58 UpdateStats | LinkEvent)
60 static void dl2k_enable_int(struct netdev_private *np)
62 void __iomem *ioaddr = np->ioaddr;
64 dw16(IntEnable, DEFAULT_INTR);
67 static const int max_intrloop = 50;
68 static const int multicast_filter_limit = 0x40;
70 static int rio_open (struct net_device *dev);
71 static void rio_timer (unsigned long data);
72 static void rio_tx_timeout (struct net_device *dev);
73 static netdev_tx_t start_xmit (struct sk_buff *skb, struct net_device *dev);
74 static irqreturn_t rio_interrupt (int irq, void *dev_instance);
75 static void rio_free_tx (struct net_device *dev, int irq);
76 static void tx_error (struct net_device *dev, int tx_status);
77 static int receive_packet (struct net_device *dev);
78 static void rio_error (struct net_device *dev, int int_status);
79 static void set_multicast (struct net_device *dev);
80 static struct net_device_stats *get_stats (struct net_device *dev);
81 static int clear_stats (struct net_device *dev);
82 static int rio_ioctl (struct net_device *dev, struct ifreq *rq, int cmd);
83 static int rio_close (struct net_device *dev);
84 static int find_miiphy (struct net_device *dev);
85 static int parse_eeprom (struct net_device *dev);
86 static int read_eeprom (struct netdev_private *, int eep_addr);
87 static int mii_wait_link (struct net_device *dev, int wait);
88 static int mii_set_media (struct net_device *dev);
89 static int mii_get_media (struct net_device *dev);
90 static int mii_set_media_pcs (struct net_device *dev);
91 static int mii_get_media_pcs (struct net_device *dev);
92 static int mii_read (struct net_device *dev, int phy_addr, int reg_num);
93 static int mii_write (struct net_device *dev, int phy_addr, int reg_num,
96 static const struct ethtool_ops ethtool_ops;
98 static const struct net_device_ops netdev_ops = {
100 .ndo_start_xmit = start_xmit,
101 .ndo_stop = rio_close,
102 .ndo_get_stats = get_stats,
103 .ndo_validate_addr = eth_validate_addr,
104 .ndo_set_mac_address = eth_mac_addr,
105 .ndo_set_rx_mode = set_multicast,
106 .ndo_do_ioctl = rio_ioctl,
107 .ndo_tx_timeout = rio_tx_timeout,
111 rio_probe1 (struct pci_dev *pdev, const struct pci_device_id *ent)
113 struct net_device *dev;
114 struct netdev_private *np;
116 int chip_idx = ent->driver_data;
118 void __iomem *ioaddr;
119 static int version_printed;
123 if (!version_printed++)
124 printk ("%s", version);
126 err = pci_enable_device (pdev);
131 err = pci_request_regions (pdev, "dl2k");
133 goto err_out_disable;
135 pci_set_master (pdev);
139 dev = alloc_etherdev (sizeof (*np));
142 SET_NETDEV_DEV(dev, &pdev->dev);
144 np = netdev_priv(dev);
146 /* IO registers range. */
147 ioaddr = pci_iomap(pdev, 0, 0);
150 np->eeprom_addr = ioaddr;
153 /* MM registers range. */
154 ioaddr = pci_iomap(pdev, 1, 0);
156 goto err_out_iounmap;
159 np->chip_id = chip_idx;
161 spin_lock_init (&np->tx_lock);
162 spin_lock_init (&np->rx_lock);
164 /* Parse manual configuration */
167 if (card_idx < MAX_UNITS) {
168 if (media[card_idx] != NULL) {
170 if (strcmp (media[card_idx], "auto") == 0 ||
171 strcmp (media[card_idx], "autosense") == 0 ||
172 strcmp (media[card_idx], "0") == 0 ) {
174 } else if (strcmp (media[card_idx], "100mbps_fd") == 0 ||
175 strcmp (media[card_idx], "4") == 0) {
178 } else if (strcmp (media[card_idx], "100mbps_hd") == 0 ||
179 strcmp (media[card_idx], "3") == 0) {
182 } else if (strcmp (media[card_idx], "10mbps_fd") == 0 ||
183 strcmp (media[card_idx], "2") == 0) {
186 } else if (strcmp (media[card_idx], "10mbps_hd") == 0 ||
187 strcmp (media[card_idx], "1") == 0) {
190 } else if (strcmp (media[card_idx], "1000mbps_fd") == 0 ||
191 strcmp (media[card_idx], "6") == 0) {
194 } else if (strcmp (media[card_idx], "1000mbps_hd") == 0 ||
195 strcmp (media[card_idx], "5") == 0) {
202 if (jumbo[card_idx] != 0) {
204 dev->mtu = MAX_JUMBO;
207 if (mtu[card_idx] > 0 && mtu[card_idx] < PACKET_SIZE)
208 dev->mtu = mtu[card_idx];
210 np->vlan = (vlan[card_idx] > 0 && vlan[card_idx] < 4096) ?
212 if (rx_coalesce > 0 && rx_timeout > 0) {
213 np->rx_coalesce = rx_coalesce;
214 np->rx_timeout = rx_timeout;
217 np->tx_flow = (tx_flow == 0) ? 0 : 1;
218 np->rx_flow = (rx_flow == 0) ? 0 : 1;
222 else if (tx_coalesce > TX_RING_SIZE-1)
223 tx_coalesce = TX_RING_SIZE - 1;
225 dev->netdev_ops = &netdev_ops;
226 dev->watchdog_timeo = TX_TIMEOUT;
227 dev->ethtool_ops = ðtool_ops;
229 dev->features = NETIF_F_IP_CSUM;
231 /* MTU range: 68 - 1536 or 8000 */
232 dev->min_mtu = ETH_MIN_MTU;
233 dev->max_mtu = np->jumbo ? MAX_JUMBO : PACKET_SIZE;
235 pci_set_drvdata (pdev, dev);
237 ring_space = pci_alloc_consistent (pdev, TX_TOTAL_SIZE, &ring_dma);
239 goto err_out_iounmap;
240 np->tx_ring = ring_space;
241 np->tx_ring_dma = ring_dma;
243 ring_space = pci_alloc_consistent (pdev, RX_TOTAL_SIZE, &ring_dma);
245 goto err_out_unmap_tx;
246 np->rx_ring = ring_space;
247 np->rx_ring_dma = ring_dma;
249 /* Parse eeprom data */
252 /* Find PHY address */
253 err = find_miiphy (dev);
255 goto err_out_unmap_rx;
258 np->phy_media = (dr16(ASICCtrl) & PhyMedia) ? 1 : 0;
260 /* Set media and reset PHY */
262 /* default Auto-Negotiation for fiber deivices */
263 if (np->an_enable == 2) {
267 /* Auto-Negotiation is mandatory for 1000BASE-T,
268 IEEE 802.3ab Annex 28D page 14 */
269 if (np->speed == 1000)
273 err = register_netdev (dev);
275 goto err_out_unmap_rx;
279 printk (KERN_INFO "%s: %s, %pM, IRQ %d\n",
280 dev->name, np->name, dev->dev_addr, irq);
282 printk(KERN_INFO "tx_coalesce:\t%d packets\n",
286 "rx_coalesce:\t%d packets\n"
287 "rx_timeout: \t%d ns\n",
288 np->rx_coalesce, np->rx_timeout*640);
290 printk(KERN_INFO "vlan(id):\t%d\n", np->vlan);
294 pci_free_consistent (pdev, RX_TOTAL_SIZE, np->rx_ring, np->rx_ring_dma);
296 pci_free_consistent (pdev, TX_TOTAL_SIZE, np->tx_ring, np->tx_ring_dma);
299 pci_iounmap(pdev, np->ioaddr);
301 pci_iounmap(pdev, np->eeprom_addr);
305 pci_release_regions (pdev);
307 pci_disable_device (pdev);
312 find_miiphy (struct net_device *dev)
314 struct netdev_private *np = netdev_priv(dev);
315 int i, phy_found = 0;
316 np = netdev_priv(dev);
319 for (i = 31; i >= 0; i--) {
320 int mii_status = mii_read (dev, i, 1);
321 if (mii_status != 0xffff && mii_status != 0x0000) {
327 printk (KERN_ERR "%s: No MII PHY found!\n", dev->name);
334 parse_eeprom (struct net_device *dev)
336 struct netdev_private *np = netdev_priv(dev);
337 void __iomem *ioaddr = np->ioaddr;
342 PSROM_t psrom = (PSROM_t) sromdata;
346 for (i = 0; i < 128; i++)
347 ((__le16 *) sromdata)[i] = cpu_to_le16(read_eeprom(np, i));
349 if (np->pdev->vendor == PCI_VENDOR_ID_DLINK) { /* D-Link Only */
351 crc = ~ether_crc_le (256 - 4, sromdata);
352 if (psrom->crc != cpu_to_le32(crc)) {
353 printk (KERN_ERR "%s: EEPROM data CRC error.\n",
359 /* Set MAC address */
360 for (i = 0; i < 6; i++)
361 dev->dev_addr[i] = psrom->mac_addr[i];
363 if (np->chip_id == CHIP_IP1000A) {
364 np->led_mode = psrom->led_mode;
368 if (np->pdev->vendor != PCI_VENDOR_ID_DLINK) {
372 /* Parse Software Information Block */
374 psib = (u8 *) sromdata;
378 if ((cid == 0 && next == 0) || (cid == 0xff && next == 0xff)) {
379 printk (KERN_ERR "Cell data error\n");
383 case 0: /* Format version */
385 case 1: /* End of cell */
387 case 2: /* Duplex Polarity */
388 np->duplex_polarity = psib[i];
389 dw8(PhyCtrl, dr8(PhyCtrl) | psib[i]);
391 case 3: /* Wake Polarity */
392 np->wake_polarity = psib[i];
394 case 9: /* Adapter description */
395 j = (next - i > 255) ? 255 : next - i;
396 memcpy (np->name, &(psib[i]), j);
402 case 8: /* Reversed */
404 default: /* Unknown cell */
413 static void rio_set_led_mode(struct net_device *dev)
415 struct netdev_private *np = netdev_priv(dev);
416 void __iomem *ioaddr = np->ioaddr;
419 if (np->chip_id != CHIP_IP1000A)
422 mode = dr32(ASICCtrl);
423 mode &= ~(IPG_AC_LED_MODE_BIT_1 | IPG_AC_LED_MODE | IPG_AC_LED_SPEED);
425 if (np->led_mode & 0x01)
426 mode |= IPG_AC_LED_MODE;
427 if (np->led_mode & 0x02)
428 mode |= IPG_AC_LED_MODE_BIT_1;
429 if (np->led_mode & 0x08)
430 mode |= IPG_AC_LED_SPEED;
432 dw32(ASICCtrl, mode);
435 static inline dma_addr_t desc_to_dma(struct netdev_desc *desc)
437 return le64_to_cpu(desc->fraginfo) & DMA_BIT_MASK(48);
440 static void free_list(struct net_device *dev)
442 struct netdev_private *np = netdev_priv(dev);
446 /* Free all the skbuffs in the queue. */
447 for (i = 0; i < RX_RING_SIZE; i++) {
448 skb = np->rx_skbuff[i];
450 pci_unmap_single(np->pdev, desc_to_dma(&np->rx_ring[i]),
451 skb->len, PCI_DMA_FROMDEVICE);
453 np->rx_skbuff[i] = NULL;
455 np->rx_ring[i].status = 0;
456 np->rx_ring[i].fraginfo = 0;
458 for (i = 0; i < TX_RING_SIZE; i++) {
459 skb = np->tx_skbuff[i];
461 pci_unmap_single(np->pdev, desc_to_dma(&np->tx_ring[i]),
462 skb->len, PCI_DMA_TODEVICE);
464 np->tx_skbuff[i] = NULL;
469 static void rio_reset_ring(struct netdev_private *np)
478 for (i = 0; i < TX_RING_SIZE; i++)
479 np->tx_ring[i].status = cpu_to_le64(TFDDone);
481 for (i = 0; i < RX_RING_SIZE; i++)
482 np->rx_ring[i].status = 0;
485 /* allocate and initialize Tx and Rx descriptors */
486 static int alloc_list(struct net_device *dev)
488 struct netdev_private *np = netdev_priv(dev);
492 np->rx_buf_sz = (dev->mtu <= 1500 ? PACKET_SIZE : dev->mtu + 32);
494 /* Initialize Tx descriptors, TFDListPtr leaves in start_xmit(). */
495 for (i = 0; i < TX_RING_SIZE; i++) {
496 np->tx_skbuff[i] = NULL;
497 np->tx_ring[i].next_desc = cpu_to_le64(np->tx_ring_dma +
498 ((i + 1) % TX_RING_SIZE) *
499 sizeof(struct netdev_desc));
502 /* Initialize Rx descriptors & allocate buffers */
503 for (i = 0; i < RX_RING_SIZE; i++) {
504 /* Allocated fixed size of skbuff */
507 skb = netdev_alloc_skb_ip_align(dev, np->rx_buf_sz);
508 np->rx_skbuff[i] = skb;
514 np->rx_ring[i].next_desc = cpu_to_le64(np->rx_ring_dma +
515 ((i + 1) % RX_RING_SIZE) *
516 sizeof(struct netdev_desc));
517 /* Rubicon now supports 40 bits of addressing space. */
518 np->rx_ring[i].fraginfo =
519 cpu_to_le64(pci_map_single(
520 np->pdev, skb->data, np->rx_buf_sz,
521 PCI_DMA_FROMDEVICE));
522 np->rx_ring[i].fraginfo |= cpu_to_le64((u64)np->rx_buf_sz << 48);
528 static void rio_hw_init(struct net_device *dev)
530 struct netdev_private *np = netdev_priv(dev);
531 void __iomem *ioaddr = np->ioaddr;
535 /* Reset all logic functions */
537 GlobalReset | DMAReset | FIFOReset | NetworkReset | HostReset);
540 rio_set_led_mode(dev);
542 /* DebugCtrl bit 4, 5, 9 must set */
543 dw32(DebugCtrl, dr32(DebugCtrl) | 0x0230);
545 if (np->chip_id == CHIP_IP1000A &&
546 (np->pdev->revision == 0x40 || np->pdev->revision == 0x41)) {
547 /* PHY magic taken from ipg driver, undocumented registers */
548 mii_write(dev, np->phy_addr, 31, 0x0001);
549 mii_write(dev, np->phy_addr, 27, 0x01e0);
550 mii_write(dev, np->phy_addr, 31, 0x0002);
551 mii_write(dev, np->phy_addr, 27, 0xeb8e);
552 mii_write(dev, np->phy_addr, 31, 0x0000);
553 mii_write(dev, np->phy_addr, 30, 0x005e);
554 /* advertise 1000BASE-T half & full duplex, prefer MASTER */
555 mii_write(dev, np->phy_addr, MII_CTRL1000, 0x0700);
559 mii_set_media_pcs(dev);
565 dw16(MaxFrameSize, MAX_JUMBO+14);
568 dw32(RFDListPtr0, np->rx_ring_dma);
569 dw32(RFDListPtr1, 0);
571 /* Set station address */
572 /* 16 or 32-bit access is required by TC9020 datasheet but 8-bit works
573 * too. However, it doesn't work on IP1000A so we use 16-bit access.
575 for (i = 0; i < 3; i++)
576 dw16(StationAddr0 + 2 * i,
577 cpu_to_le16(((u16 *)dev->dev_addr)[i]));
581 dw32(RxDMAIntCtrl, np->rx_coalesce | np->rx_timeout << 16);
583 /* Set RIO to poll every N*320nsec. */
584 dw8(RxDMAPollPeriod, 0x20);
585 dw8(TxDMAPollPeriod, 0xff);
586 dw8(RxDMABurstThresh, 0x30);
587 dw8(RxDMAUrgentThresh, 0x30);
588 dw32(RmonStatMask, 0x0007ffff);
589 /* clear statistics */
594 /* priority field in RxDMAIntCtrl */
595 dw32(RxDMAIntCtrl, dr32(RxDMAIntCtrl) | 0x7 << 10);
597 dw16(VLANId, np->vlan);
598 /* Length/Type should be 0x8100 */
599 dw32(VLANTag, 0x8100 << 16 | np->vlan);
600 /* Enable AutoVLANuntagging, but disable AutoVLANtagging.
601 VLAN information tagged by TFC' VID, CFI fields. */
602 dw32(MACCtrl, dr32(MACCtrl) | AutoVLANuntagging);
606 dw32(MACCtrl, dr32(MACCtrl) | StatsEnable | RxEnable | TxEnable);
609 macctrl |= (np->vlan) ? AutoVLANuntagging : 0;
610 macctrl |= (np->full_duplex) ? DuplexSelect : 0;
611 macctrl |= (np->tx_flow) ? TxFlowControlEnable : 0;
612 macctrl |= (np->rx_flow) ? RxFlowControlEnable : 0;
613 dw16(MACCtrl, macctrl);
616 static void rio_hw_stop(struct net_device *dev)
618 struct netdev_private *np = netdev_priv(dev);
619 void __iomem *ioaddr = np->ioaddr;
621 /* Disable interrupts */
624 /* Stop Tx and Rx logics */
625 dw32(MACCtrl, TxDisable | RxDisable | StatsDisable);
628 static int rio_open(struct net_device *dev)
630 struct netdev_private *np = netdev_priv(dev);
631 const int irq = np->pdev->irq;
640 i = request_irq(irq, rio_interrupt, IRQF_SHARED, dev->name, dev);
647 setup_timer(&np->timer, rio_timer, (unsigned long)dev);
648 np->timer.expires = jiffies + 1 * HZ;
649 add_timer(&np->timer);
651 netif_start_queue (dev);
658 rio_timer (unsigned long data)
660 struct net_device *dev = (struct net_device *)data;
661 struct netdev_private *np = netdev_priv(dev);
663 int next_tick = 1*HZ;
666 spin_lock_irqsave(&np->rx_lock, flags);
667 /* Recover rx ring exhausted error */
668 if (np->cur_rx - np->old_rx >= RX_RING_SIZE) {
669 printk(KERN_INFO "Try to recover rx ring exhausted...\n");
670 /* Re-allocate skbuffs to fill the descriptor ring */
671 for (; np->cur_rx - np->old_rx > 0; np->old_rx++) {
673 entry = np->old_rx % RX_RING_SIZE;
674 /* Dropped packets don't need to re-allocate */
675 if (np->rx_skbuff[entry] == NULL) {
676 skb = netdev_alloc_skb_ip_align(dev,
679 np->rx_ring[entry].fraginfo = 0;
681 "%s: Still unable to re-allocate Rx skbuff.#%d\n",
685 np->rx_skbuff[entry] = skb;
686 np->rx_ring[entry].fraginfo =
687 cpu_to_le64 (pci_map_single
688 (np->pdev, skb->data, np->rx_buf_sz,
689 PCI_DMA_FROMDEVICE));
691 np->rx_ring[entry].fraginfo |=
692 cpu_to_le64((u64)np->rx_buf_sz << 48);
693 np->rx_ring[entry].status = 0;
696 spin_unlock_irqrestore (&np->rx_lock, flags);
697 np->timer.expires = jiffies + next_tick;
698 add_timer(&np->timer);
702 rio_tx_timeout (struct net_device *dev)
704 struct netdev_private *np = netdev_priv(dev);
705 void __iomem *ioaddr = np->ioaddr;
707 printk (KERN_INFO "%s: Tx timed out (%4.4x), is buffer full?\n",
708 dev->name, dr32(TxStatus));
711 netif_trans_update(dev); /* prevent tx timeout */
715 start_xmit (struct sk_buff *skb, struct net_device *dev)
717 struct netdev_private *np = netdev_priv(dev);
718 void __iomem *ioaddr = np->ioaddr;
719 struct netdev_desc *txdesc;
721 u64 tfc_vlan_tag = 0;
723 if (np->link_status == 0) { /* Link Down */
727 entry = np->cur_tx % TX_RING_SIZE;
728 np->tx_skbuff[entry] = skb;
729 txdesc = &np->tx_ring[entry];
732 if (skb->ip_summed == CHECKSUM_PARTIAL) {
734 cpu_to_le64 (TCPChecksumEnable | UDPChecksumEnable |
739 tfc_vlan_tag = VLANTagInsert |
740 ((u64)np->vlan << 32) |
741 ((u64)skb->priority << 45);
743 txdesc->fraginfo = cpu_to_le64 (pci_map_single (np->pdev, skb->data,
746 txdesc->fraginfo |= cpu_to_le64((u64)skb->len << 48);
748 /* DL2K bug: DMA fails to get next descriptor ptr in 10Mbps mode
749 * Work around: Always use 1 descriptor in 10Mbps mode */
750 if (entry % np->tx_coalesce == 0 || np->speed == 10)
751 txdesc->status = cpu_to_le64 (entry | tfc_vlan_tag |
754 (1 << FragCountShift));
756 txdesc->status = cpu_to_le64 (entry | tfc_vlan_tag |
758 (1 << FragCountShift));
761 dw32(DMACtrl, dr32(DMACtrl) | 0x00001000);
763 dw32(CountDown, 10000);
764 np->cur_tx = (np->cur_tx + 1) % TX_RING_SIZE;
765 if ((np->cur_tx - np->old_tx + TX_RING_SIZE) % TX_RING_SIZE
766 < TX_QUEUE_LEN - 1 && np->speed != 10) {
768 } else if (!netif_queue_stopped(dev)) {
769 netif_stop_queue (dev);
772 /* The first TFDListPtr */
773 if (!dr32(TFDListPtr0)) {
774 dw32(TFDListPtr0, np->tx_ring_dma +
775 entry * sizeof (struct netdev_desc));
776 dw32(TFDListPtr1, 0);
783 rio_interrupt (int irq, void *dev_instance)
785 struct net_device *dev = dev_instance;
786 struct netdev_private *np = netdev_priv(dev);
787 void __iomem *ioaddr = np->ioaddr;
789 int cnt = max_intrloop;
793 int_status = dr16(IntStatus);
794 dw16(IntStatus, int_status);
795 int_status &= DEFAULT_INTR;
796 if (int_status == 0 || --cnt < 0)
799 /* Processing received packets */
800 if (int_status & RxDMAComplete)
801 receive_packet (dev);
802 /* TxDMAComplete interrupt */
803 if ((int_status & (TxDMAComplete|IntRequested))) {
805 tx_status = dr32(TxStatus);
806 if (tx_status & 0x01)
807 tx_error (dev, tx_status);
808 /* Free used tx skbuffs */
809 rio_free_tx (dev, 1);
812 /* Handle uncommon events */
814 (HostError | LinkEvent | UpdateStats))
815 rio_error (dev, int_status);
817 if (np->cur_tx != np->old_tx)
818 dw32(CountDown, 100);
819 return IRQ_RETVAL(handled);
823 rio_free_tx (struct net_device *dev, int irq)
825 struct netdev_private *np = netdev_priv(dev);
826 int entry = np->old_tx % TX_RING_SIZE;
828 unsigned long flag = 0;
831 spin_lock(&np->tx_lock);
833 spin_lock_irqsave(&np->tx_lock, flag);
835 /* Free used tx skbuffs */
836 while (entry != np->cur_tx) {
839 if (!(np->tx_ring[entry].status & cpu_to_le64(TFDDone)))
841 skb = np->tx_skbuff[entry];
842 pci_unmap_single (np->pdev,
843 desc_to_dma(&np->tx_ring[entry]),
844 skb->len, PCI_DMA_TODEVICE);
846 dev_kfree_skb_irq (skb);
850 np->tx_skbuff[entry] = NULL;
851 entry = (entry + 1) % TX_RING_SIZE;
855 spin_unlock(&np->tx_lock);
857 spin_unlock_irqrestore(&np->tx_lock, flag);
860 /* If the ring is no longer full, clear tx_full and
861 call netif_wake_queue() */
863 if (netif_queue_stopped(dev) &&
864 ((np->cur_tx - np->old_tx + TX_RING_SIZE) % TX_RING_SIZE
865 < TX_QUEUE_LEN - 1 || np->speed == 10)) {
866 netif_wake_queue (dev);
871 tx_error (struct net_device *dev, int tx_status)
873 struct netdev_private *np = netdev_priv(dev);
874 void __iomem *ioaddr = np->ioaddr;
878 frame_id = (tx_status & 0xffff0000);
879 printk (KERN_ERR "%s: Transmit error, TxStatus %4.4x, FrameId %d.\n",
880 dev->name, tx_status, frame_id);
881 np->stats.tx_errors++;
882 /* Ttransmit Underrun */
883 if (tx_status & 0x10) {
884 np->stats.tx_fifo_errors++;
885 dw16(TxStartThresh, dr16(TxStartThresh) + 0x10);
886 /* Transmit Underrun need to set TxReset, DMARest, FIFOReset */
888 TxReset | DMAReset | FIFOReset | NetworkReset);
889 /* Wait for ResetBusy bit clear */
890 for (i = 50; i > 0; i--) {
891 if (!(dr16(ASICCtrl + 2) & ResetBusy))
895 rio_set_led_mode(dev);
896 rio_free_tx (dev, 1);
897 /* Reset TFDListPtr */
898 dw32(TFDListPtr0, np->tx_ring_dma +
899 np->old_tx * sizeof (struct netdev_desc));
900 dw32(TFDListPtr1, 0);
902 /* Let TxStartThresh stay default value */
905 if (tx_status & 0x04) {
906 np->stats.tx_fifo_errors++;
907 /* TxReset and clear FIFO */
908 dw16(ASICCtrl + 2, TxReset | FIFOReset);
909 /* Wait reset done */
910 for (i = 50; i > 0; i--) {
911 if (!(dr16(ASICCtrl + 2) & ResetBusy))
915 rio_set_led_mode(dev);
916 /* Let TxStartThresh stay default value */
918 /* Maximum Collisions */
920 if (tx_status & 0x08)
921 np->stats.collisions16++;
923 if (tx_status & 0x08)
924 np->stats.collisions++;
927 dw32(MACCtrl, dr16(MACCtrl) | TxEnable);
931 receive_packet (struct net_device *dev)
933 struct netdev_private *np = netdev_priv(dev);
934 int entry = np->cur_rx % RX_RING_SIZE;
937 /* If RFDDone, FrameStart and FrameEnd set, there is a new packet in. */
939 struct netdev_desc *desc = &np->rx_ring[entry];
943 if (!(desc->status & cpu_to_le64(RFDDone)) ||
944 !(desc->status & cpu_to_le64(FrameStart)) ||
945 !(desc->status & cpu_to_le64(FrameEnd)))
948 /* Chip omits the CRC. */
949 frame_status = le64_to_cpu(desc->status);
950 pkt_len = frame_status & 0xffff;
953 /* Update rx error statistics, drop packet. */
954 if (frame_status & RFS_Errors) {
955 np->stats.rx_errors++;
956 if (frame_status & (RxRuntFrame | RxLengthError))
957 np->stats.rx_length_errors++;
958 if (frame_status & RxFCSError)
959 np->stats.rx_crc_errors++;
960 if (frame_status & RxAlignmentError && np->speed != 1000)
961 np->stats.rx_frame_errors++;
962 if (frame_status & RxFIFOOverrun)
963 np->stats.rx_fifo_errors++;
967 /* Small skbuffs for short packets */
968 if (pkt_len > copy_thresh) {
969 pci_unmap_single (np->pdev,
973 skb_put (skb = np->rx_skbuff[entry], pkt_len);
974 np->rx_skbuff[entry] = NULL;
975 } else if ((skb = netdev_alloc_skb_ip_align(dev, pkt_len))) {
976 pci_dma_sync_single_for_cpu(np->pdev,
980 skb_copy_to_linear_data (skb,
981 np->rx_skbuff[entry]->data,
983 skb_put (skb, pkt_len);
984 pci_dma_sync_single_for_device(np->pdev,
989 skb->protocol = eth_type_trans (skb, dev);
991 /* Checksum done by hw, but csum value unavailable. */
992 if (np->pdev->pci_rev_id >= 0x0c &&
993 !(frame_status & (TCPError | UDPError | IPError))) {
994 skb->ip_summed = CHECKSUM_UNNECESSARY;
999 entry = (entry + 1) % RX_RING_SIZE;
1001 spin_lock(&np->rx_lock);
1003 /* Re-allocate skbuffs to fill the descriptor ring */
1005 while (entry != np->cur_rx) {
1006 struct sk_buff *skb;
1007 /* Dropped packets don't need to re-allocate */
1008 if (np->rx_skbuff[entry] == NULL) {
1009 skb = netdev_alloc_skb_ip_align(dev, np->rx_buf_sz);
1011 np->rx_ring[entry].fraginfo = 0;
1013 "%s: receive_packet: "
1014 "Unable to re-allocate Rx skbuff.#%d\n",
1018 np->rx_skbuff[entry] = skb;
1019 np->rx_ring[entry].fraginfo =
1020 cpu_to_le64 (pci_map_single
1021 (np->pdev, skb->data, np->rx_buf_sz,
1022 PCI_DMA_FROMDEVICE));
1024 np->rx_ring[entry].fraginfo |=
1025 cpu_to_le64((u64)np->rx_buf_sz << 48);
1026 np->rx_ring[entry].status = 0;
1027 entry = (entry + 1) % RX_RING_SIZE;
1030 spin_unlock(&np->rx_lock);
1035 rio_error (struct net_device *dev, int int_status)
1037 struct netdev_private *np = netdev_priv(dev);
1038 void __iomem *ioaddr = np->ioaddr;
1041 /* Link change event */
1042 if (int_status & LinkEvent) {
1043 if (mii_wait_link (dev, 10) == 0) {
1044 printk (KERN_INFO "%s: Link up\n", dev->name);
1046 mii_get_media_pcs (dev);
1048 mii_get_media (dev);
1049 if (np->speed == 1000)
1050 np->tx_coalesce = tx_coalesce;
1052 np->tx_coalesce = 1;
1054 macctrl |= (np->vlan) ? AutoVLANuntagging : 0;
1055 macctrl |= (np->full_duplex) ? DuplexSelect : 0;
1056 macctrl |= (np->tx_flow) ?
1057 TxFlowControlEnable : 0;
1058 macctrl |= (np->rx_flow) ?
1059 RxFlowControlEnable : 0;
1060 dw16(MACCtrl, macctrl);
1061 np->link_status = 1;
1062 netif_carrier_on(dev);
1064 printk (KERN_INFO "%s: Link off\n", dev->name);
1065 np->link_status = 0;
1066 netif_carrier_off(dev);
1070 /* UpdateStats statistics registers */
1071 if (int_status & UpdateStats) {
1075 /* PCI Error, a catastronphic error related to the bus interface
1076 occurs, set GlobalReset and HostReset to reset. */
1077 if (int_status & HostError) {
1078 printk (KERN_ERR "%s: HostError! IntStatus %4.4x.\n",
1079 dev->name, int_status);
1080 dw16(ASICCtrl + 2, GlobalReset | HostReset);
1082 rio_set_led_mode(dev);
1086 static struct net_device_stats *
1087 get_stats (struct net_device *dev)
1089 struct netdev_private *np = netdev_priv(dev);
1090 void __iomem *ioaddr = np->ioaddr;
1094 unsigned int stat_reg;
1096 /* All statistics registers need to be acknowledged,
1097 else statistic overflow could cause problems */
1099 np->stats.rx_packets += dr32(FramesRcvOk);
1100 np->stats.tx_packets += dr32(FramesXmtOk);
1101 np->stats.rx_bytes += dr32(OctetRcvOk);
1102 np->stats.tx_bytes += dr32(OctetXmtOk);
1104 np->stats.multicast = dr32(McstFramesRcvdOk);
1105 np->stats.collisions += dr32(SingleColFrames)
1106 + dr32(MultiColFrames);
1108 /* detailed tx errors */
1109 stat_reg = dr16(FramesAbortXSColls);
1110 np->stats.tx_aborted_errors += stat_reg;
1111 np->stats.tx_errors += stat_reg;
1113 stat_reg = dr16(CarrierSenseErrors);
1114 np->stats.tx_carrier_errors += stat_reg;
1115 np->stats.tx_errors += stat_reg;
1117 /* Clear all other statistic register. */
1118 dr32(McstOctetXmtOk);
1119 dr16(BcstFramesXmtdOk);
1120 dr32(McstFramesXmtdOk);
1121 dr16(BcstFramesRcvdOk);
1122 dr16(MacControlFramesRcvd);
1123 dr16(FrameTooLongErrors);
1124 dr16(InRangeLengthErrors);
1125 dr16(FramesCheckSeqErrors);
1126 dr16(FramesLostRxErrors);
1127 dr32(McstOctetXmtOk);
1128 dr32(BcstOctetXmtOk);
1129 dr32(McstFramesXmtdOk);
1130 dr32(FramesWDeferredXmt);
1131 dr32(LateCollisions);
1132 dr16(BcstFramesXmtdOk);
1133 dr16(MacControlFramesXmtd);
1134 dr16(FramesWEXDeferal);
1137 for (i = 0x100; i <= 0x150; i += 4)
1140 dr16(TxJumboFrames);
1141 dr16(RxJumboFrames);
1142 dr16(TCPCheckSumErrors);
1143 dr16(UDPCheckSumErrors);
1144 dr16(IPCheckSumErrors);
1149 clear_stats (struct net_device *dev)
1151 struct netdev_private *np = netdev_priv(dev);
1152 void __iomem *ioaddr = np->ioaddr;
1157 /* All statistics registers need to be acknowledged,
1158 else statistic overflow could cause problems */
1164 dr32(McstFramesRcvdOk);
1165 dr32(SingleColFrames);
1166 dr32(MultiColFrames);
1167 dr32(LateCollisions);
1168 /* detailed rx errors */
1169 dr16(FrameTooLongErrors);
1170 dr16(InRangeLengthErrors);
1171 dr16(FramesCheckSeqErrors);
1172 dr16(FramesLostRxErrors);
1174 /* detailed tx errors */
1175 dr16(FramesAbortXSColls);
1176 dr16(CarrierSenseErrors);
1178 /* Clear all other statistic register. */
1179 dr32(McstOctetXmtOk);
1180 dr16(BcstFramesXmtdOk);
1181 dr32(McstFramesXmtdOk);
1182 dr16(BcstFramesRcvdOk);
1183 dr16(MacControlFramesRcvd);
1184 dr32(McstOctetXmtOk);
1185 dr32(BcstOctetXmtOk);
1186 dr32(McstFramesXmtdOk);
1187 dr32(FramesWDeferredXmt);
1188 dr16(BcstFramesXmtdOk);
1189 dr16(MacControlFramesXmtd);
1190 dr16(FramesWEXDeferal);
1192 for (i = 0x100; i <= 0x150; i += 4)
1195 dr16(TxJumboFrames);
1196 dr16(RxJumboFrames);
1197 dr16(TCPCheckSumErrors);
1198 dr16(UDPCheckSumErrors);
1199 dr16(IPCheckSumErrors);
1204 set_multicast (struct net_device *dev)
1206 struct netdev_private *np = netdev_priv(dev);
1207 void __iomem *ioaddr = np->ioaddr;
1211 hash_table[0] = hash_table[1] = 0;
1212 /* RxFlowcontrol DA: 01-80-C2-00-00-01. Hash index=0x39 */
1213 hash_table[1] |= 0x02000000;
1214 if (dev->flags & IFF_PROMISC) {
1215 /* Receive all frames promiscuously. */
1216 rx_mode = ReceiveAllFrames;
1217 } else if ((dev->flags & IFF_ALLMULTI) ||
1218 (netdev_mc_count(dev) > multicast_filter_limit)) {
1219 /* Receive broadcast and multicast frames */
1220 rx_mode = ReceiveBroadcast | ReceiveMulticast | ReceiveUnicast;
1221 } else if (!netdev_mc_empty(dev)) {
1222 struct netdev_hw_addr *ha;
1223 /* Receive broadcast frames and multicast frames filtering
1226 ReceiveBroadcast | ReceiveMulticastHash | ReceiveUnicast;
1227 netdev_for_each_mc_addr(ha, dev) {
1229 int crc = ether_crc_le(ETH_ALEN, ha->addr);
1230 /* The inverted high significant 6 bits of CRC are
1231 used as an index to hashtable */
1232 for (bit = 0; bit < 6; bit++)
1233 if (crc & (1 << (31 - bit)))
1234 index |= (1 << bit);
1235 hash_table[index / 32] |= (1 << (index % 32));
1238 rx_mode = ReceiveBroadcast | ReceiveUnicast;
1241 /* ReceiveVLANMatch field in ReceiveMode */
1242 rx_mode |= ReceiveVLANMatch;
1245 dw32(HashTable0, hash_table[0]);
1246 dw32(HashTable1, hash_table[1]);
1247 dw16(ReceiveMode, rx_mode);
1250 static void rio_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1252 struct netdev_private *np = netdev_priv(dev);
1254 strlcpy(info->driver, "dl2k", sizeof(info->driver));
1255 strlcpy(info->version, DRV_VERSION, sizeof(info->version));
1256 strlcpy(info->bus_info, pci_name(np->pdev), sizeof(info->bus_info));
1259 static int rio_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
1261 struct netdev_private *np = netdev_priv(dev);
1262 if (np->phy_media) {
1264 cmd->supported = SUPPORTED_Autoneg | SUPPORTED_FIBRE;
1265 cmd->advertising= ADVERTISED_Autoneg | ADVERTISED_FIBRE;
1266 cmd->port = PORT_FIBRE;
1267 cmd->transceiver = XCVR_INTERNAL;
1270 cmd->supported = SUPPORTED_10baseT_Half |
1271 SUPPORTED_10baseT_Full | SUPPORTED_100baseT_Half
1272 | SUPPORTED_100baseT_Full | SUPPORTED_1000baseT_Full |
1273 SUPPORTED_Autoneg | SUPPORTED_MII;
1274 cmd->advertising = ADVERTISED_10baseT_Half |
1275 ADVERTISED_10baseT_Full | ADVERTISED_100baseT_Half |
1276 ADVERTISED_100baseT_Full | ADVERTISED_1000baseT_Full|
1277 ADVERTISED_Autoneg | ADVERTISED_MII;
1278 cmd->port = PORT_MII;
1279 cmd->transceiver = XCVR_INTERNAL;
1281 if ( np->link_status ) {
1282 ethtool_cmd_speed_set(cmd, np->speed);
1283 cmd->duplex = np->full_duplex ? DUPLEX_FULL : DUPLEX_HALF;
1285 ethtool_cmd_speed_set(cmd, SPEED_UNKNOWN);
1286 cmd->duplex = DUPLEX_UNKNOWN;
1289 cmd->autoneg = AUTONEG_ENABLE;
1291 cmd->autoneg = AUTONEG_DISABLE;
1293 cmd->phy_address = np->phy_addr;
1297 static int rio_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
1299 struct netdev_private *np = netdev_priv(dev);
1300 netif_carrier_off(dev);
1301 if (cmd->autoneg == AUTONEG_ENABLE) {
1311 if (np->speed == 1000) {
1312 ethtool_cmd_speed_set(cmd, SPEED_100);
1313 cmd->duplex = DUPLEX_FULL;
1314 printk("Warning!! Can't disable Auto negotiation in 1000Mbps, change to Manual 100Mbps, Full duplex.\n");
1316 switch (ethtool_cmd_speed(cmd)) {
1319 np->full_duplex = (cmd->duplex == DUPLEX_FULL);
1323 np->full_duplex = (cmd->duplex == DUPLEX_FULL);
1325 case SPEED_1000: /* not supported */
1334 static u32 rio_get_link(struct net_device *dev)
1336 struct netdev_private *np = netdev_priv(dev);
1337 return np->link_status;
1340 static const struct ethtool_ops ethtool_ops = {
1341 .get_drvinfo = rio_get_drvinfo,
1342 .get_settings = rio_get_settings,
1343 .set_settings = rio_set_settings,
1344 .get_link = rio_get_link,
1348 rio_ioctl (struct net_device *dev, struct ifreq *rq, int cmd)
1351 struct netdev_private *np = netdev_priv(dev);
1352 struct mii_ioctl_data *miidata = if_mii(rq);
1354 phy_addr = np->phy_addr;
1357 miidata->phy_id = phy_addr;
1360 miidata->val_out = mii_read (dev, phy_addr, miidata->reg_num);
1363 if (!capable(CAP_NET_ADMIN))
1365 mii_write (dev, phy_addr, miidata->reg_num, miidata->val_in);
1373 #define EEP_READ 0x0200
1374 #define EEP_BUSY 0x8000
1375 /* Read the EEPROM word */
1376 /* We use I/O instruction to read/write eeprom to avoid fail on some machines */
1377 static int read_eeprom(struct netdev_private *np, int eep_addr)
1379 void __iomem *ioaddr = np->eeprom_addr;
1382 dw16(EepromCtrl, EEP_READ | (eep_addr & 0xff));
1384 if (!(dr16(EepromCtrl) & EEP_BUSY))
1385 return dr16(EepromData);
1390 enum phy_ctrl_bits {
1391 MII_READ = 0x00, MII_CLK = 0x01, MII_DATA1 = 0x02, MII_WRITE = 0x04,
1395 #define mii_delay() dr8(PhyCtrl)
1397 mii_sendbit (struct net_device *dev, u32 data)
1399 struct netdev_private *np = netdev_priv(dev);
1400 void __iomem *ioaddr = np->ioaddr;
1402 data = ((data) ? MII_DATA1 : 0) | (dr8(PhyCtrl) & 0xf8) | MII_WRITE;
1405 dw8(PhyCtrl, data | MII_CLK);
1410 mii_getbit (struct net_device *dev)
1412 struct netdev_private *np = netdev_priv(dev);
1413 void __iomem *ioaddr = np->ioaddr;
1416 data = (dr8(PhyCtrl) & 0xf8) | MII_READ;
1419 dw8(PhyCtrl, data | MII_CLK);
1421 return (dr8(PhyCtrl) >> 1) & 1;
1425 mii_send_bits (struct net_device *dev, u32 data, int len)
1429 for (i = len - 1; i >= 0; i--) {
1430 mii_sendbit (dev, data & (1 << i));
1435 mii_read (struct net_device *dev, int phy_addr, int reg_num)
1442 mii_send_bits (dev, 0xffffffff, 32);
1443 /* ST(2), OP(2), ADDR(5), REG#(5), TA(2), Data(16) total 32 bits */
1444 /* ST,OP = 0110'b for read operation */
1445 cmd = (0x06 << 10 | phy_addr << 5 | reg_num);
1446 mii_send_bits (dev, cmd, 14);
1448 if (mii_getbit (dev))
1451 for (i = 0; i < 16; i++) {
1452 retval |= mii_getbit (dev);
1457 return (retval >> 1) & 0xffff;
1463 mii_write (struct net_device *dev, int phy_addr, int reg_num, u16 data)
1468 mii_send_bits (dev, 0xffffffff, 32);
1469 /* ST(2), OP(2), ADDR(5), REG#(5), TA(2), Data(16) total 32 bits */
1470 /* ST,OP,AAAAA,RRRRR,TA = 0101xxxxxxxxxx10'b = 0x5002 for write */
1471 cmd = (0x5002 << 16) | (phy_addr << 23) | (reg_num << 18) | data;
1472 mii_send_bits (dev, cmd, 32);
1478 mii_wait_link (struct net_device *dev, int wait)
1482 struct netdev_private *np;
1484 np = netdev_priv(dev);
1485 phy_addr = np->phy_addr;
1488 bmsr = mii_read (dev, phy_addr, MII_BMSR);
1489 if (bmsr & BMSR_LSTATUS)
1492 } while (--wait > 0);
1496 mii_get_media (struct net_device *dev)
1503 struct netdev_private *np;
1505 np = netdev_priv(dev);
1506 phy_addr = np->phy_addr;
1508 bmsr = mii_read (dev, phy_addr, MII_BMSR);
1509 if (np->an_enable) {
1510 if (!(bmsr & BMSR_ANEGCOMPLETE)) {
1511 /* Auto-Negotiation not completed */
1514 negotiate = mii_read (dev, phy_addr, MII_ADVERTISE) &
1515 mii_read (dev, phy_addr, MII_LPA);
1516 mscr = mii_read (dev, phy_addr, MII_CTRL1000);
1517 mssr = mii_read (dev, phy_addr, MII_STAT1000);
1518 if (mscr & ADVERTISE_1000FULL && mssr & LPA_1000FULL) {
1520 np->full_duplex = 1;
1521 printk (KERN_INFO "Auto 1000 Mbps, Full duplex\n");
1522 } else if (mscr & ADVERTISE_1000HALF && mssr & LPA_1000HALF) {
1524 np->full_duplex = 0;
1525 printk (KERN_INFO "Auto 1000 Mbps, Half duplex\n");
1526 } else if (negotiate & ADVERTISE_100FULL) {
1528 np->full_duplex = 1;
1529 printk (KERN_INFO "Auto 100 Mbps, Full duplex\n");
1530 } else if (negotiate & ADVERTISE_100HALF) {
1532 np->full_duplex = 0;
1533 printk (KERN_INFO "Auto 100 Mbps, Half duplex\n");
1534 } else if (negotiate & ADVERTISE_10FULL) {
1536 np->full_duplex = 1;
1537 printk (KERN_INFO "Auto 10 Mbps, Full duplex\n");
1538 } else if (negotiate & ADVERTISE_10HALF) {
1540 np->full_duplex = 0;
1541 printk (KERN_INFO "Auto 10 Mbps, Half duplex\n");
1543 if (negotiate & ADVERTISE_PAUSE_CAP) {
1546 } else if (negotiate & ADVERTISE_PAUSE_ASYM) {
1550 /* else tx_flow, rx_flow = user select */
1552 __u16 bmcr = mii_read (dev, phy_addr, MII_BMCR);
1553 switch (bmcr & (BMCR_SPEED100 | BMCR_SPEED1000)) {
1554 case BMCR_SPEED1000:
1555 printk (KERN_INFO "Operating at 1000 Mbps, ");
1558 printk (KERN_INFO "Operating at 100 Mbps, ");
1561 printk (KERN_INFO "Operating at 10 Mbps, ");
1563 if (bmcr & BMCR_FULLDPLX) {
1564 printk (KERN_CONT "Full duplex\n");
1566 printk (KERN_CONT "Half duplex\n");
1570 printk(KERN_INFO "Enable Tx Flow Control\n");
1572 printk(KERN_INFO "Disable Tx Flow Control\n");
1574 printk(KERN_INFO "Enable Rx Flow Control\n");
1576 printk(KERN_INFO "Disable Rx Flow Control\n");
1582 mii_set_media (struct net_device *dev)
1589 struct netdev_private *np;
1590 np = netdev_priv(dev);
1591 phy_addr = np->phy_addr;
1593 /* Does user set speed? */
1594 if (np->an_enable) {
1595 /* Advertise capabilities */
1596 bmsr = mii_read (dev, phy_addr, MII_BMSR);
1597 anar = mii_read (dev, phy_addr, MII_ADVERTISE) &
1598 ~(ADVERTISE_100FULL | ADVERTISE_10FULL |
1599 ADVERTISE_100HALF | ADVERTISE_10HALF |
1600 ADVERTISE_100BASE4);
1601 if (bmsr & BMSR_100FULL)
1602 anar |= ADVERTISE_100FULL;
1603 if (bmsr & BMSR_100HALF)
1604 anar |= ADVERTISE_100HALF;
1605 if (bmsr & BMSR_100BASE4)
1606 anar |= ADVERTISE_100BASE4;
1607 if (bmsr & BMSR_10FULL)
1608 anar |= ADVERTISE_10FULL;
1609 if (bmsr & BMSR_10HALF)
1610 anar |= ADVERTISE_10HALF;
1611 anar |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
1612 mii_write (dev, phy_addr, MII_ADVERTISE, anar);
1614 /* Enable Auto crossover */
1615 pscr = mii_read (dev, phy_addr, MII_PHY_SCR);
1616 pscr |= 3 << 5; /* 11'b */
1617 mii_write (dev, phy_addr, MII_PHY_SCR, pscr);
1619 /* Soft reset PHY */
1620 mii_write (dev, phy_addr, MII_BMCR, BMCR_RESET);
1621 bmcr = BMCR_ANENABLE | BMCR_ANRESTART | BMCR_RESET;
1622 mii_write (dev, phy_addr, MII_BMCR, bmcr);
1625 /* Force speed setting */
1626 /* 1) Disable Auto crossover */
1627 pscr = mii_read (dev, phy_addr, MII_PHY_SCR);
1629 mii_write (dev, phy_addr, MII_PHY_SCR, pscr);
1632 bmcr = mii_read (dev, phy_addr, MII_BMCR);
1634 mii_write (dev, phy_addr, MII_BMCR, bmcr);
1637 bmcr = 0x1940; /* must be 0x1940 */
1638 mii_write (dev, phy_addr, MII_BMCR, bmcr);
1639 mdelay (100); /* wait a certain time */
1641 /* 4) Advertise nothing */
1642 mii_write (dev, phy_addr, MII_ADVERTISE, 0);
1644 /* 5) Set media and Power Up */
1646 if (np->speed == 100) {
1647 bmcr |= BMCR_SPEED100;
1648 printk (KERN_INFO "Manual 100 Mbps, ");
1649 } else if (np->speed == 10) {
1650 printk (KERN_INFO "Manual 10 Mbps, ");
1652 if (np->full_duplex) {
1653 bmcr |= BMCR_FULLDPLX;
1654 printk (KERN_CONT "Full duplex\n");
1656 printk (KERN_CONT "Half duplex\n");
1659 /* Set 1000BaseT Master/Slave setting */
1660 mscr = mii_read (dev, phy_addr, MII_CTRL1000);
1661 mscr |= MII_MSCR_CFG_ENABLE;
1662 mscr &= ~MII_MSCR_CFG_VALUE = 0;
1664 mii_write (dev, phy_addr, MII_BMCR, bmcr);
1671 mii_get_media_pcs (struct net_device *dev)
1676 struct netdev_private *np;
1678 np = netdev_priv(dev);
1679 phy_addr = np->phy_addr;
1681 bmsr = mii_read (dev, phy_addr, PCS_BMSR);
1682 if (np->an_enable) {
1683 if (!(bmsr & BMSR_ANEGCOMPLETE)) {
1684 /* Auto-Negotiation not completed */
1687 negotiate = mii_read (dev, phy_addr, PCS_ANAR) &
1688 mii_read (dev, phy_addr, PCS_ANLPAR);
1690 if (negotiate & PCS_ANAR_FULL_DUPLEX) {
1691 printk (KERN_INFO "Auto 1000 Mbps, Full duplex\n");
1692 np->full_duplex = 1;
1694 printk (KERN_INFO "Auto 1000 Mbps, half duplex\n");
1695 np->full_duplex = 0;
1697 if (negotiate & PCS_ANAR_PAUSE) {
1700 } else if (negotiate & PCS_ANAR_ASYMMETRIC) {
1704 /* else tx_flow, rx_flow = user select */
1706 __u16 bmcr = mii_read (dev, phy_addr, PCS_BMCR);
1707 printk (KERN_INFO "Operating at 1000 Mbps, ");
1708 if (bmcr & BMCR_FULLDPLX) {
1709 printk (KERN_CONT "Full duplex\n");
1711 printk (KERN_CONT "Half duplex\n");
1715 printk(KERN_INFO "Enable Tx Flow Control\n");
1717 printk(KERN_INFO "Disable Tx Flow Control\n");
1719 printk(KERN_INFO "Enable Rx Flow Control\n");
1721 printk(KERN_INFO "Disable Rx Flow Control\n");
1727 mii_set_media_pcs (struct net_device *dev)
1733 struct netdev_private *np;
1734 np = netdev_priv(dev);
1735 phy_addr = np->phy_addr;
1737 /* Auto-Negotiation? */
1738 if (np->an_enable) {
1739 /* Advertise capabilities */
1740 esr = mii_read (dev, phy_addr, PCS_ESR);
1741 anar = mii_read (dev, phy_addr, MII_ADVERTISE) &
1742 ~PCS_ANAR_HALF_DUPLEX &
1743 ~PCS_ANAR_FULL_DUPLEX;
1744 if (esr & (MII_ESR_1000BT_HD | MII_ESR_1000BX_HD))
1745 anar |= PCS_ANAR_HALF_DUPLEX;
1746 if (esr & (MII_ESR_1000BT_FD | MII_ESR_1000BX_FD))
1747 anar |= PCS_ANAR_FULL_DUPLEX;
1748 anar |= PCS_ANAR_PAUSE | PCS_ANAR_ASYMMETRIC;
1749 mii_write (dev, phy_addr, MII_ADVERTISE, anar);
1751 /* Soft reset PHY */
1752 mii_write (dev, phy_addr, MII_BMCR, BMCR_RESET);
1753 bmcr = BMCR_ANENABLE | BMCR_ANRESTART | BMCR_RESET;
1754 mii_write (dev, phy_addr, MII_BMCR, bmcr);
1757 /* Force speed setting */
1760 mii_write (dev, phy_addr, MII_BMCR, bmcr);
1762 if (np->full_duplex) {
1763 bmcr = BMCR_FULLDPLX;
1764 printk (KERN_INFO "Manual full duplex\n");
1767 printk (KERN_INFO "Manual half duplex\n");
1769 mii_write (dev, phy_addr, MII_BMCR, bmcr);
1772 /* Advertise nothing */
1773 mii_write (dev, phy_addr, MII_ADVERTISE, 0);
1780 rio_close (struct net_device *dev)
1782 struct netdev_private *np = netdev_priv(dev);
1783 struct pci_dev *pdev = np->pdev;
1785 netif_stop_queue (dev);
1789 free_irq(pdev->irq, dev);
1790 del_timer_sync (&np->timer);
1798 rio_remove1 (struct pci_dev *pdev)
1800 struct net_device *dev = pci_get_drvdata (pdev);
1803 struct netdev_private *np = netdev_priv(dev);
1805 unregister_netdev (dev);
1806 pci_free_consistent (pdev, RX_TOTAL_SIZE, np->rx_ring,
1808 pci_free_consistent (pdev, TX_TOTAL_SIZE, np->tx_ring,
1811 pci_iounmap(pdev, np->ioaddr);
1813 pci_iounmap(pdev, np->eeprom_addr);
1815 pci_release_regions (pdev);
1816 pci_disable_device (pdev);
1820 #ifdef CONFIG_PM_SLEEP
1821 static int rio_suspend(struct device *device)
1823 struct net_device *dev = dev_get_drvdata(device);
1824 struct netdev_private *np = netdev_priv(dev);
1826 if (!netif_running(dev))
1829 netif_device_detach(dev);
1830 del_timer_sync(&np->timer);
1836 static int rio_resume(struct device *device)
1838 struct net_device *dev = dev_get_drvdata(device);
1839 struct netdev_private *np = netdev_priv(dev);
1841 if (!netif_running(dev))
1846 np->timer.expires = jiffies + 1 * HZ;
1847 add_timer(&np->timer);
1848 netif_device_attach(dev);
1849 dl2k_enable_int(np);
1854 static SIMPLE_DEV_PM_OPS(rio_pm_ops, rio_suspend, rio_resume);
1855 #define RIO_PM_OPS (&rio_pm_ops)
1859 #define RIO_PM_OPS NULL
1861 #endif /* CONFIG_PM_SLEEP */
1863 static struct pci_driver rio_driver = {
1865 .id_table = rio_pci_tbl,
1866 .probe = rio_probe1,
1867 .remove = rio_remove1,
1868 .driver.pm = RIO_PM_OPS,
1871 module_pci_driver(rio_driver);
1876 gcc -D__KERNEL__ -DMODULE -I/usr/src/linux/include -Wall -Wstrict-prototypes -O2 -c dl2k.c
1878 Read Documentation/networking/dl2k.txt for details.