2 * This file is part of the Chelsio T6 Crypto driver for Linux.
4 * Copyright (c) 2003-2017 Chelsio Communications, Inc. All rights reserved.
6 * This software is available to you under a choice of one of two
7 * licenses. You may choose to be licensed under the terms of the GNU
8 * General Public License (GPL) Version 2, available from the file
9 * COPYING in the main directory of this source tree, or the
10 * OpenIB.org BSD license below:
12 * Redistribution and use in source and binary forms, with or
13 * without modification, are permitted provided that the following
16 * - Redistributions of source code must retain the above
17 * copyright notice, this list of conditions and the following
20 * - Redistributions in binary form must reproduce the above
21 * copyright notice, this list of conditions and the following
22 * disclaimer in the documentation and/or other materials
23 * provided with the distribution.
25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
34 * Written and Maintained by:
35 * Atul Gupta (atul.gupta@chelsio.com)
38 #define pr_fmt(fmt) "ch_ipsec: " fmt
40 #include <linux/kernel.h>
41 #include <linux/module.h>
42 #include <linux/crypto.h>
43 #include <linux/skbuff.h>
44 #include <linux/rtnetlink.h>
45 #include <linux/highmem.h>
46 #include <linux/if_vlan.h>
48 #include <linux/netdevice.h>
51 #include <crypto/aes.h>
52 #include <crypto/algapi.h>
53 #include <crypto/hash.h>
54 #include <crypto/sha1.h>
55 #include <crypto/sha2.h>
56 #include <crypto/authenc.h>
57 #include <crypto/internal/aead.h>
58 #include <crypto/null.h>
59 #include <crypto/internal/skcipher.h>
60 #include <crypto/aead.h>
61 #include <crypto/scatterwalk.h>
62 #include <crypto/internal/hash.h>
64 #include "chcr_ipsec.h"
67 * Max Tx descriptor space we allow for an Ethernet packet to be inlined
70 #define MAX_IMM_TX_PKT_LEN 256
71 #define GCM_ESP_IV_SIZE 8
73 static LIST_HEAD(uld_ctx_list);
74 static DEFINE_MUTEX(dev_mutex);
76 static bool ch_ipsec_offload_ok(struct sk_buff *skb, struct xfrm_state *x);
77 static int ch_ipsec_uld_state_change(void *handle, enum cxgb4_state new_state);
78 static int ch_ipsec_xmit(struct sk_buff *skb, struct net_device *dev);
79 static void *ch_ipsec_uld_add(const struct cxgb4_lld_info *infop);
80 static void ch_ipsec_advance_esn_state(struct xfrm_state *x);
81 static void ch_ipsec_xfrm_free_state(struct xfrm_state *x);
82 static void ch_ipsec_xfrm_del_state(struct xfrm_state *x);
83 static int ch_ipsec_xfrm_add_state(struct xfrm_state *x);
85 static const struct xfrmdev_ops ch_ipsec_xfrmdev_ops = {
86 .xdo_dev_state_add = ch_ipsec_xfrm_add_state,
87 .xdo_dev_state_delete = ch_ipsec_xfrm_del_state,
88 .xdo_dev_state_free = ch_ipsec_xfrm_free_state,
89 .xdo_dev_offload_ok = ch_ipsec_offload_ok,
90 .xdo_dev_state_advance_esn = ch_ipsec_advance_esn_state,
93 static struct cxgb4_uld_info ch_ipsec_uld_info = {
94 .name = CHIPSEC_DRV_MODULE_NAME,
95 .nrxq = MAX_ULD_QSETS,
96 /* Max ntxq will be derived from fw config file*/
98 .add = ch_ipsec_uld_add,
99 .state_change = ch_ipsec_uld_state_change,
100 .tx_handler = ch_ipsec_xmit,
101 .xfrmdev_ops = &ch_ipsec_xfrmdev_ops,
104 static void *ch_ipsec_uld_add(const struct cxgb4_lld_info *infop)
106 struct ipsec_uld_ctx *u_ctx;
108 pr_info_once("%s - version %s\n", CHIPSEC_DRV_DESC,
109 CHIPSEC_DRV_VERSION);
110 u_ctx = kzalloc(sizeof(*u_ctx), GFP_KERNEL);
112 u_ctx = ERR_PTR(-ENOMEM);
115 u_ctx->lldi = *infop;
120 static int ch_ipsec_uld_state_change(void *handle, enum cxgb4_state new_state)
122 struct ipsec_uld_ctx *u_ctx = handle;
124 pr_debug("new_state %u\n", new_state);
127 pr_info("%s: Up\n", pci_name(u_ctx->lldi.pdev));
128 mutex_lock(&dev_mutex);
129 list_add_tail(&u_ctx->entry, &uld_ctx_list);
130 mutex_unlock(&dev_mutex);
132 case CXGB4_STATE_START_RECOVERY:
133 case CXGB4_STATE_DOWN:
134 case CXGB4_STATE_DETACH:
135 pr_info("%s: Down\n", pci_name(u_ctx->lldi.pdev));
136 list_del(&u_ctx->entry);
145 static int ch_ipsec_setauthsize(struct xfrm_state *x,
146 struct ipsec_sa_entry *sa_entry)
149 int authsize = x->aead->alg_icv_len / 8;
151 sa_entry->authsize = authsize;
155 hmac_ctrl = CHCR_SCMD_HMAC_CTRL_DIV2;
158 hmac_ctrl = CHCR_SCMD_HMAC_CTRL_IPSEC_96BIT;
161 hmac_ctrl = CHCR_SCMD_HMAC_CTRL_NO_TRUNC;
169 static int ch_ipsec_setkey(struct xfrm_state *x,
170 struct ipsec_sa_entry *sa_entry)
172 int keylen = (x->aead->alg_key_len + 7) / 8;
173 unsigned char *key = x->aead->alg_key;
174 int ck_size, key_ctx_size = 0;
175 unsigned char ghash_h[AEAD_H_SIZE];
176 struct crypto_aes_ctx aes;
180 keylen -= 4; /* nonce/salt is present in the last 4 bytes */
181 memcpy(sa_entry->salt, key + keylen, 4);
184 if (keylen == AES_KEYSIZE_128) {
185 ck_size = CHCR_KEYCTX_CIPHER_KEY_SIZE_128;
186 } else if (keylen == AES_KEYSIZE_192) {
187 ck_size = CHCR_KEYCTX_CIPHER_KEY_SIZE_192;
188 } else if (keylen == AES_KEYSIZE_256) {
189 ck_size = CHCR_KEYCTX_CIPHER_KEY_SIZE_256;
191 pr_err("GCM: Invalid key length %d\n", keylen);
196 memcpy(sa_entry->key, key, keylen);
197 sa_entry->enckey_len = keylen;
198 key_ctx_size = sizeof(struct _key_ctx) +
199 ((DIV_ROUND_UP(keylen, 16)) << 4) +
202 sa_entry->key_ctx_hdr = FILL_KEY_CTX_HDR(ck_size,
203 CHCR_KEYCTX_MAC_KEY_SIZE_128,
207 /* Calculate the H = CIPH(K, 0 repeated 16 times).
208 * It will go in key context
210 ret = aes_expandkey(&aes, key, keylen);
212 sa_entry->enckey_len = 0;
215 memset(ghash_h, 0, AEAD_H_SIZE);
216 aes_encrypt(&aes, ghash_h, ghash_h);
217 memzero_explicit(&aes, sizeof(aes));
219 memcpy(sa_entry->key + (DIV_ROUND_UP(sa_entry->enckey_len, 16) *
220 16), ghash_h, AEAD_H_SIZE);
221 sa_entry->kctx_len = ((DIV_ROUND_UP(sa_entry->enckey_len, 16)) << 4) +
228 * ch_ipsec_xfrm_add_state
229 * returns 0 on success, negative error if failed to send message to FPGA
230 * positive error if FPGA returned a bad response
232 static int ch_ipsec_xfrm_add_state(struct xfrm_state *x)
234 struct ipsec_sa_entry *sa_entry;
237 if (x->props.aalgo != SADB_AALG_NONE) {
238 pr_debug("Cannot offload authenticated xfrm states\n");
241 if (x->props.calgo != SADB_X_CALG_NONE) {
242 pr_debug("Cannot offload compressed xfrm states\n");
245 if (x->props.family != AF_INET &&
246 x->props.family != AF_INET6) {
247 pr_debug("Only IPv4/6 xfrm state offloaded\n");
250 if (x->props.mode != XFRM_MODE_TRANSPORT &&
251 x->props.mode != XFRM_MODE_TUNNEL) {
252 pr_debug("Only transport and tunnel xfrm offload\n");
255 if (x->id.proto != IPPROTO_ESP) {
256 pr_debug("Only ESP xfrm state offloaded\n");
260 pr_debug("Encapsulated xfrm state not offloaded\n");
264 pr_debug("Cannot offload xfrm states without aead\n");
267 if (x->aead->alg_icv_len != 128 &&
268 x->aead->alg_icv_len != 96) {
269 pr_debug("Cannot offload xfrm states with AEAD ICV length other than 96b & 128b\n");
272 if ((x->aead->alg_key_len != 128 + 32) &&
273 (x->aead->alg_key_len != 256 + 32)) {
274 pr_debug("cannot offload xfrm states with AEAD key length other than 128/256 bit\n");
278 pr_debug("Cannot offload xfrm states with tfc padding\n");
282 pr_debug("Cannot offload xfrm states without geniv\n");
285 if (strcmp(x->geniv, "seqiv")) {
286 pr_debug("Cannot offload xfrm states with geniv other than seqiv\n");
290 sa_entry = kzalloc(sizeof(*sa_entry), GFP_KERNEL);
296 sa_entry->hmac_ctrl = ch_ipsec_setauthsize(x, sa_entry);
297 if (x->props.flags & XFRM_STATE_ESN)
299 ch_ipsec_setkey(x, sa_entry);
300 x->xso.offload_handle = (unsigned long)sa_entry;
301 try_module_get(THIS_MODULE);
306 static void ch_ipsec_xfrm_del_state(struct xfrm_state *x)
309 if (!x->xso.offload_handle)
313 static void ch_ipsec_xfrm_free_state(struct xfrm_state *x)
315 struct ipsec_sa_entry *sa_entry;
317 if (!x->xso.offload_handle)
320 sa_entry = (struct ipsec_sa_entry *)x->xso.offload_handle;
322 module_put(THIS_MODULE);
325 static bool ch_ipsec_offload_ok(struct sk_buff *skb, struct xfrm_state *x)
327 if (x->props.family == AF_INET) {
328 /* Offload with IP options is not supported yet */
329 if (ip_hdr(skb)->ihl > 5)
332 /* Offload with IPv6 extension headers is not support yet */
333 if (ipv6_ext_hdr(ipv6_hdr(skb)->nexthdr))
339 static void ch_ipsec_advance_esn_state(struct xfrm_state *x)
342 if (!x->xso.offload_handle)
346 static int is_eth_imm(const struct sk_buff *skb,
347 struct ipsec_sa_entry *sa_entry)
349 unsigned int kctx_len;
352 kctx_len = sa_entry->kctx_len;
353 hdrlen = sizeof(struct fw_ulptx_wr) +
354 sizeof(struct chcr_ipsec_req) + kctx_len;
356 hdrlen += sizeof(struct cpl_tx_pkt);
358 hdrlen += (DIV_ROUND_UP(sizeof(struct chcr_ipsec_aadiv), 16)
360 if (skb->len <= MAX_IMM_TX_PKT_LEN - hdrlen)
365 static unsigned int calc_tx_sec_flits(const struct sk_buff *skb,
366 struct ipsec_sa_entry *sa_entry,
369 unsigned int kctx_len;
374 kctx_len = sa_entry->kctx_len;
375 hdrlen = is_eth_imm(skb, sa_entry);
376 aadivlen = sa_entry->esn ? DIV_ROUND_UP(sizeof(struct chcr_ipsec_aadiv),
380 /* If the skb is small enough, we can pump it out as a work request
381 * with only immediate data. In that case we just have to have the
382 * TX Packet header plus the skb data in the Work Request.
387 return DIV_ROUND_UP(skb->len + hdrlen, sizeof(__be64));
390 flits = sgl_len(skb_shinfo(skb)->nr_frags + 1);
392 /* Otherwise, we're going to have to construct a Scatter gather list
393 * of the skb body and fragments. We also include the flits necessary
394 * for the TX Packet Work Request and CPL. We always have a firmware
395 * Write Header (incorporated as part of the cpl_tx_pkt_lso and
396 * cpl_tx_pkt structures), followed by either a TX Packet Write CPL
397 * message or, if we're doing a Large Send Offload, an LSO CPL message
398 * with an embedded TX Packet Write CPL message.
400 flits += (sizeof(struct fw_ulptx_wr) +
401 sizeof(struct chcr_ipsec_req) +
403 sizeof(struct cpl_tx_pkt_core) +
404 aadivlen) / sizeof(__be64);
408 static void *copy_esn_pktxt(struct sk_buff *skb,
409 struct net_device *dev,
411 struct ipsec_sa_entry *sa_entry)
413 struct chcr_ipsec_aadiv *aadiv;
414 struct ulptx_idata *sc_imm;
415 struct ip_esp_hdr *esphdr;
416 struct xfrm_offload *xo;
417 struct sge_eth_txq *q;
418 struct adapter *adap;
419 struct port_info *pi;
427 pi = netdev_priv(dev);
429 qidx = skb->queue_mapping;
430 q = &adap->sge.ethtxq[qidx + pi->first_qset];
432 /* end of queue, reset pos to start of queue */
433 eoq = (void *)q->q.stat - pos;
437 len = DIV_ROUND_UP(sizeof(struct chcr_ipsec_aadiv), 16) << 4;
439 aadiv = (struct chcr_ipsec_aadiv *)pos;
440 esphdr = (struct ip_esp_hdr *)skb_transport_header(skb);
441 iv = skb_transport_header(skb) + sizeof(struct ip_esp_hdr);
442 xo = xfrm_offload(skb);
444 aadiv->spi = (esphdr->spi);
445 seqlo = ntohl(esphdr->seq_no);
446 seqno = cpu_to_be64(seqlo + ((u64)xo->seq.hi << 32));
447 memcpy(aadiv->seq_no, &seqno, 8);
448 iv = skb_transport_header(skb) + sizeof(struct ip_esp_hdr);
449 memcpy(aadiv->iv, iv, 8);
451 if (is_eth_imm(skb, sa_entry) && !skb_is_nonlinear(skb)) {
452 sc_imm = (struct ulptx_idata *)(pos +
453 (DIV_ROUND_UP(sizeof(struct chcr_ipsec_aadiv),
454 sizeof(__be64)) << 3));
455 sc_imm->cmd_more = FILL_CMD_MORE(0);
456 sc_imm->len = cpu_to_be32(skb->len);
462 static void *copy_cpltx_pktxt(struct sk_buff *skb,
463 struct net_device *dev,
465 struct ipsec_sa_entry *sa_entry)
467 struct cpl_tx_pkt_core *cpl;
468 struct sge_eth_txq *q;
469 struct adapter *adap;
470 struct port_info *pi;
475 pi = netdev_priv(dev);
477 qidx = skb->queue_mapping;
478 q = &adap->sge.ethtxq[qidx + pi->first_qset];
480 left = (void *)q->q.stat - pos;
484 cpl = (struct cpl_tx_pkt_core *)pos;
486 cntrl = TXPKT_L4CSUM_DIS_F | TXPKT_IPCSUM_DIS_F;
487 ctrl0 = TXPKT_OPCODE_V(CPL_TX_PKT_XT) | TXPKT_INTF_V(pi->tx_chan) |
488 TXPKT_PF_V(adap->pf);
489 if (skb_vlan_tag_present(skb)) {
491 cntrl |= TXPKT_VLAN_VLD_F | TXPKT_VLAN_V(skb_vlan_tag_get(skb));
494 cpl->ctrl0 = htonl(ctrl0);
495 cpl->pack = htons(0);
496 cpl->len = htons(skb->len);
497 cpl->ctrl1 = cpu_to_be64(cntrl);
499 pos += sizeof(struct cpl_tx_pkt_core);
500 /* Copy ESN info for HW */
502 pos = copy_esn_pktxt(skb, dev, pos, sa_entry);
506 static void *copy_key_cpltx_pktxt(struct sk_buff *skb,
507 struct net_device *dev,
509 struct ipsec_sa_entry *sa_entry)
511 struct _key_ctx *key_ctx;
512 int left, eoq, key_len;
513 struct sge_eth_txq *q;
514 struct adapter *adap;
515 struct port_info *pi;
518 pi = netdev_priv(dev);
520 qidx = skb->queue_mapping;
521 q = &adap->sge.ethtxq[qidx + pi->first_qset];
522 key_len = sa_entry->kctx_len;
524 /* end of queue, reset pos to start of queue */
525 eoq = (void *)q->q.stat - pos;
529 left = 64 * q->q.size;
532 /* Copy the Key context header */
533 key_ctx = (struct _key_ctx *)pos;
534 key_ctx->ctx_hdr = sa_entry->key_ctx_hdr;
535 memcpy(key_ctx->salt, sa_entry->salt, MAX_SALT);
536 pos += sizeof(struct _key_ctx);
537 left -= sizeof(struct _key_ctx);
539 if (likely(key_len <= left)) {
540 memcpy(key_ctx->key, sa_entry->key, key_len);
543 memcpy(pos, sa_entry->key, left);
544 memcpy(q->q.desc, sa_entry->key + left,
546 pos = (u8 *)q->q.desc + (key_len - left);
548 /* Copy CPL TX PKT XT */
549 pos = copy_cpltx_pktxt(skb, dev, pos, sa_entry);
554 static void *ch_ipsec_crypto_wreq(struct sk_buff *skb,
555 struct net_device *dev,
558 struct ipsec_sa_entry *sa_entry)
560 struct port_info *pi = netdev_priv(dev);
561 struct adapter *adap = pi->adapter;
562 unsigned int ivsize = GCM_ESP_IV_SIZE;
563 struct chcr_ipsec_wr *wr;
564 bool immediate = false;
576 int qidx = skb_get_queue_mapping(skb);
577 struct sge_eth_txq *q = &adap->sge.ethtxq[qidx + pi->first_qset];
578 unsigned int kctx_len = sa_entry->kctx_len;
579 int qid = q->q.cntxt_id;
581 atomic_inc(&adap->ch_ipsec_stats.ipsec_cnt);
583 flits = calc_tx_sec_flits(skb, sa_entry, &immediate);
584 ndesc = DIV_ROUND_UP(flits, 2);
589 immdatalen = skb->len;
592 esnlen = sizeof(struct chcr_ipsec_aadiv);
593 if (!skb_is_nonlinear(skb))
598 wr = (struct chcr_ipsec_wr *)pos;
599 wr->wreq.op_to_compl = htonl(FW_WR_OP_V(FW_ULPTX_WR));
600 wr_mid = FW_CRYPTO_LOOKASIDE_WR_LEN16_V(ndesc);
602 if (unlikely(credits < ETHTXQ_STOP_THRES)) {
603 netif_tx_stop_queue(q->txq);
606 wr_mid |= FW_WR_EQUEQ_F | FW_WR_EQUIQ_F;
608 wr_mid |= FW_ULPTX_WR_DATA_F;
609 wr->wreq.flowid_len16 = htonl(wr_mid);
612 wr->req.ulptx.cmd_dest = FILL_ULPTX_CMD_DEST(pi->port_id, qid);
613 wr->req.ulptx.len = htonl(ndesc - 1);
616 wr->req.sc_imm.cmd_more = FILL_CMD_MORE(!immdatalen || sc_more);
617 wr->req.sc_imm.len = cpu_to_be32(sizeof(struct cpl_tx_sec_pdu) +
618 sizeof(wr->req.key_ctx) +
620 sizeof(struct cpl_tx_pkt_core) +
622 (esnlen ? 0 : immdatalen));
625 ivinoffset = sa_entry->esn ? (ESN_IV_INSERT_OFFSET + 1) :
626 (skb_transport_offset(skb) +
627 sizeof(struct ip_esp_hdr) + 1);
628 wr->req.sec_cpl.op_ivinsrtofst = htonl(
629 CPL_TX_SEC_PDU_OPCODE_V(CPL_TX_SEC_PDU) |
630 CPL_TX_SEC_PDU_CPLLEN_V(2) |
631 CPL_TX_SEC_PDU_PLACEHOLDER_V(1) |
632 CPL_TX_SEC_PDU_IVINSRTOFST_V(
635 wr->req.sec_cpl.pldlen = htonl(skb->len + esnlen);
636 aadstart = sa_entry->esn ? 1 : (skb_transport_offset(skb) + 1);
637 aadstop = sa_entry->esn ? ESN_IV_INSERT_OFFSET :
638 (skb_transport_offset(skb) +
639 sizeof(struct ip_esp_hdr));
640 ciphstart = skb_transport_offset(skb) + sizeof(struct ip_esp_hdr) +
642 ciphstart += sa_entry->esn ? esnlen : 0;
644 wr->req.sec_cpl.aadstart_cipherstop_hi = FILL_SEC_CPL_CIPHERSTOP_HI(
649 wr->req.sec_cpl.cipherstop_lo_authinsert =
650 FILL_SEC_CPL_AUTHINSERT(0, ciphstart,
653 wr->req.sec_cpl.seqno_numivs =
654 FILL_SEC_CPL_SCMD0_SEQNO(CHCR_ENCRYPT_OP, 1,
655 CHCR_SCMD_CIPHER_MODE_AES_GCM,
656 CHCR_SCMD_AUTH_MODE_GHASH,
659 wr->req.sec_cpl.ivgen_hdrlen = FILL_SEC_CPL_IVGEN_HDRLEN(0, 0, 1,
662 pos += sizeof(struct fw_ulptx_wr) +
663 sizeof(struct ulp_txpkt) +
664 sizeof(struct ulptx_idata) +
665 sizeof(struct cpl_tx_sec_pdu);
667 pos = copy_key_cpltx_pktxt(skb, dev, pos, sa_entry);
673 * flits_to_desc - returns the num of Tx descriptors for the given flits
674 * @n: the number of flits
676 * Returns the number of Tx descriptors needed for the supplied number
679 static unsigned int flits_to_desc(unsigned int n)
681 WARN_ON(n > SGE_MAX_WR_LEN / 8);
682 return DIV_ROUND_UP(n, 8);
685 static unsigned int txq_avail(const struct sge_txq *q)
687 return q->size - 1 - q->in_use;
690 static void eth_txq_stop(struct sge_eth_txq *q)
692 netif_tx_stop_queue(q->txq);
696 static void txq_advance(struct sge_txq *q, unsigned int n)
700 if (q->pidx >= q->size)
705 * ch_ipsec_xmit called from ULD Tx handler
707 int ch_ipsec_xmit(struct sk_buff *skb, struct net_device *dev)
709 struct xfrm_state *x = xfrm_input_state(skb);
710 unsigned int last_desc, ndesc, flits = 0;
711 struct ipsec_sa_entry *sa_entry;
712 u64 *pos, *end, *before, *sgl;
713 struct tx_sw_desc *sgl_sdesc;
714 int qidx, left, credits;
715 bool immediate = false;
716 struct sge_eth_txq *q;
717 struct adapter *adap;
718 struct port_info *pi;
721 if (!x->xso.offload_handle)
722 return NETDEV_TX_BUSY;
724 sa_entry = (struct ipsec_sa_entry *)x->xso.offload_handle;
726 sp = skb_sec_path(skb);
728 out_free: dev_kfree_skb_any(skb);
732 pi = netdev_priv(dev);
734 qidx = skb->queue_mapping;
735 q = &adap->sge.ethtxq[qidx + pi->first_qset];
737 cxgb4_reclaim_completed_tx(adap, &q->q, true);
739 flits = calc_tx_sec_flits(skb, sa_entry, &immediate);
740 ndesc = flits_to_desc(flits);
741 credits = txq_avail(&q->q) - ndesc;
743 if (unlikely(credits < 0)) {
745 dev_err(adap->pdev_dev,
746 "%s: Tx ring %u full while queue awake! cred:%d %d %d flits:%d\n",
747 dev->name, qidx, credits, ndesc, txq_avail(&q->q),
749 return NETDEV_TX_BUSY;
752 last_desc = q->q.pidx + ndesc - 1;
753 if (last_desc >= q->q.size)
754 last_desc -= q->q.size;
755 sgl_sdesc = &q->q.sdesc[last_desc];
758 unlikely(cxgb4_map_skb(adap->pdev_dev, skb, sgl_sdesc->addr) < 0)) {
759 memset(sgl_sdesc->addr, 0, sizeof(sgl_sdesc->addr));
764 pos = (u64 *)&q->q.desc[q->q.pidx];
766 end = (u64 *)pos + flits;
767 /* Setup IPSec CPL */
768 pos = (void *)ch_ipsec_crypto_wreq(skb, dev, (void *)pos,
770 if (before > (u64 *)pos) {
771 left = (u8 *)end - (u8 *)q->q.stat;
772 end = (void *)q->q.desc + left;
774 if (pos == (u64 *)q->q.stat) {
775 left = (u8 *)end - (u8 *)q->q.stat;
776 end = (void *)q->q.desc + left;
777 pos = (void *)q->q.desc;
782 cxgb4_inline_tx_skb(skb, &q->q, sgl);
783 dev_consume_skb_any(skb);
785 cxgb4_write_sgl(skb, &q->q, (void *)sgl, end,
788 sgl_sdesc->skb = skb;
790 txq_advance(&q->q, ndesc);
792 cxgb4_ring_tx_db(adap, &q->q, ndesc);
796 static int __init ch_ipsec_init(void)
798 cxgb4_register_uld(CXGB4_ULD_IPSEC, &ch_ipsec_uld_info);
803 static void __exit ch_ipsec_exit(void)
805 struct ipsec_uld_ctx *u_ctx, *tmp;
806 struct adapter *adap;
808 mutex_lock(&dev_mutex);
809 list_for_each_entry_safe(u_ctx, tmp, &uld_ctx_list, entry) {
810 adap = pci_get_drvdata(u_ctx->lldi.pdev);
811 atomic_set(&adap->ch_ipsec_stats.ipsec_cnt, 0);
812 list_del(&u_ctx->entry);
815 mutex_unlock(&dev_mutex);
816 cxgb4_unregister_uld(CXGB4_ULD_IPSEC);
819 module_init(ch_ipsec_init);
820 module_exit(ch_ipsec_exit);
822 MODULE_DESCRIPTION("Crypto IPSEC for Chelsio Terminator cards.");
823 MODULE_LICENSE("GPL");
824 MODULE_AUTHOR("Chelsio Communications");
825 MODULE_VERSION(CHIPSEC_DRV_VERSION);