7118ba016f01f2e289b8351e4f98f50a2ecc9f0d
[linux-2.6-microblaze.git] / drivers / net / ethernet / chelsio / cxgb4 / cxgb4_ethtool.c
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  *  Copyright (C) 2013-2015 Chelsio Communications.  All rights reserved.
4  */
5
6 #include <linux/firmware.h>
7 #include <linux/mdio.h>
8
9 #include "cxgb4.h"
10 #include "t4_regs.h"
11 #include "t4fw_api.h"
12 #include "cxgb4_cudbg.h"
13
14 #define EEPROM_MAGIC 0x38E2F10C
15
16 static u32 get_msglevel(struct net_device *dev)
17 {
18         return netdev2adap(dev)->msg_enable;
19 }
20
21 static void set_msglevel(struct net_device *dev, u32 val)
22 {
23         netdev2adap(dev)->msg_enable = val;
24 }
25
26 static const char * const flash_region_strings[] = {
27         "All",
28         "Firmware",
29         "PHY Firmware",
30 };
31
32 static const char stats_strings[][ETH_GSTRING_LEN] = {
33         "tx_octets_ok           ",
34         "tx_frames_ok           ",
35         "tx_broadcast_frames    ",
36         "tx_multicast_frames    ",
37         "tx_unicast_frames      ",
38         "tx_error_frames        ",
39
40         "tx_frames_64           ",
41         "tx_frames_65_to_127    ",
42         "tx_frames_128_to_255   ",
43         "tx_frames_256_to_511   ",
44         "tx_frames_512_to_1023  ",
45         "tx_frames_1024_to_1518 ",
46         "tx_frames_1519_to_max  ",
47
48         "tx_frames_dropped      ",
49         "tx_pause_frames        ",
50         "tx_ppp0_frames         ",
51         "tx_ppp1_frames         ",
52         "tx_ppp2_frames         ",
53         "tx_ppp3_frames         ",
54         "tx_ppp4_frames         ",
55         "tx_ppp5_frames         ",
56         "tx_ppp6_frames         ",
57         "tx_ppp7_frames         ",
58
59         "rx_octets_ok           ",
60         "rx_frames_ok           ",
61         "rx_broadcast_frames    ",
62         "rx_multicast_frames    ",
63         "rx_unicast_frames      ",
64
65         "rx_frames_too_long     ",
66         "rx_jabber_errors       ",
67         "rx_fcs_errors          ",
68         "rx_length_errors       ",
69         "rx_symbol_errors       ",
70         "rx_runt_frames         ",
71
72         "rx_frames_64           ",
73         "rx_frames_65_to_127    ",
74         "rx_frames_128_to_255   ",
75         "rx_frames_256_to_511   ",
76         "rx_frames_512_to_1023  ",
77         "rx_frames_1024_to_1518 ",
78         "rx_frames_1519_to_max  ",
79
80         "rx_pause_frames        ",
81         "rx_ppp0_frames         ",
82         "rx_ppp1_frames         ",
83         "rx_ppp2_frames         ",
84         "rx_ppp3_frames         ",
85         "rx_ppp4_frames         ",
86         "rx_ppp5_frames         ",
87         "rx_ppp6_frames         ",
88         "rx_ppp7_frames         ",
89
90         "rx_bg0_frames_dropped  ",
91         "rx_bg1_frames_dropped  ",
92         "rx_bg2_frames_dropped  ",
93         "rx_bg3_frames_dropped  ",
94         "rx_bg0_frames_trunc    ",
95         "rx_bg1_frames_trunc    ",
96         "rx_bg2_frames_trunc    ",
97         "rx_bg3_frames_trunc    ",
98
99         "tso                    ",
100         "uso                    ",
101         "tx_csum_offload        ",
102         "rx_csum_good           ",
103         "vlan_extractions       ",
104         "vlan_insertions        ",
105         "gro_packets            ",
106         "gro_merged             ",
107 };
108
109 static char adapter_stats_strings[][ETH_GSTRING_LEN] = {
110         "db_drop                ",
111         "db_full                ",
112         "db_empty               ",
113         "write_coal_success     ",
114         "write_coal_fail        ",
115 #ifdef CONFIG_CHELSIO_TLS_DEVICE
116         "tx_tls_encrypted_packets",
117         "tx_tls_encrypted_bytes  ",
118         "tx_tls_ctx              ",
119         "tx_tls_ooo              ",
120         "tx_tls_skip_no_sync_data",
121         "tx_tls_drop_no_sync_data",
122         "tx_tls_drop_bypass_req  ",
123 #endif
124 };
125
126 static char loopback_stats_strings[][ETH_GSTRING_LEN] = {
127         "-------Loopback----------- ",
128         "octets_ok              ",
129         "frames_ok              ",
130         "bcast_frames           ",
131         "mcast_frames           ",
132         "ucast_frames           ",
133         "error_frames           ",
134         "frames_64              ",
135         "frames_65_to_127       ",
136         "frames_128_to_255      ",
137         "frames_256_to_511      ",
138         "frames_512_to_1023     ",
139         "frames_1024_to_1518    ",
140         "frames_1519_to_max     ",
141         "frames_dropped         ",
142         "bg0_frames_dropped     ",
143         "bg1_frames_dropped     ",
144         "bg2_frames_dropped     ",
145         "bg3_frames_dropped     ",
146         "bg0_frames_trunc       ",
147         "bg1_frames_trunc       ",
148         "bg2_frames_trunc       ",
149         "bg3_frames_trunc       ",
150 };
151
152 static const char cxgb4_priv_flags_strings[][ETH_GSTRING_LEN] = {
153         [PRIV_FLAG_PORT_TX_VM_BIT] = "port_tx_vm_wr",
154 };
155
156 static int get_sset_count(struct net_device *dev, int sset)
157 {
158         switch (sset) {
159         case ETH_SS_STATS:
160                 return ARRAY_SIZE(stats_strings) +
161                        ARRAY_SIZE(adapter_stats_strings) +
162                        ARRAY_SIZE(loopback_stats_strings);
163         case ETH_SS_PRIV_FLAGS:
164                 return ARRAY_SIZE(cxgb4_priv_flags_strings);
165         default:
166                 return -EOPNOTSUPP;
167         }
168 }
169
170 static int get_regs_len(struct net_device *dev)
171 {
172         struct adapter *adap = netdev2adap(dev);
173
174         return t4_get_regs_len(adap);
175 }
176
177 static int get_eeprom_len(struct net_device *dev)
178 {
179         return EEPROMSIZE;
180 }
181
182 static void get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
183 {
184         struct adapter *adapter = netdev2adap(dev);
185         u32 exprom_vers;
186
187         strlcpy(info->driver, cxgb4_driver_name, sizeof(info->driver));
188         strlcpy(info->bus_info, pci_name(adapter->pdev),
189                 sizeof(info->bus_info));
190         info->regdump_len = get_regs_len(dev);
191
192         if (adapter->params.fw_vers)
193                 snprintf(info->fw_version, sizeof(info->fw_version),
194                          "%u.%u.%u.%u, TP %u.%u.%u.%u",
195                          FW_HDR_FW_VER_MAJOR_G(adapter->params.fw_vers),
196                          FW_HDR_FW_VER_MINOR_G(adapter->params.fw_vers),
197                          FW_HDR_FW_VER_MICRO_G(adapter->params.fw_vers),
198                          FW_HDR_FW_VER_BUILD_G(adapter->params.fw_vers),
199                          FW_HDR_FW_VER_MAJOR_G(adapter->params.tp_vers),
200                          FW_HDR_FW_VER_MINOR_G(adapter->params.tp_vers),
201                          FW_HDR_FW_VER_MICRO_G(adapter->params.tp_vers),
202                          FW_HDR_FW_VER_BUILD_G(adapter->params.tp_vers));
203
204         if (!t4_get_exprom_version(adapter, &exprom_vers))
205                 snprintf(info->erom_version, sizeof(info->erom_version),
206                          "%u.%u.%u.%u",
207                          FW_HDR_FW_VER_MAJOR_G(exprom_vers),
208                          FW_HDR_FW_VER_MINOR_G(exprom_vers),
209                          FW_HDR_FW_VER_MICRO_G(exprom_vers),
210                          FW_HDR_FW_VER_BUILD_G(exprom_vers));
211         info->n_priv_flags = ARRAY_SIZE(cxgb4_priv_flags_strings);
212 }
213
214 static void get_strings(struct net_device *dev, u32 stringset, u8 *data)
215 {
216         if (stringset == ETH_SS_STATS) {
217                 memcpy(data, stats_strings, sizeof(stats_strings));
218                 data += sizeof(stats_strings);
219                 memcpy(data, adapter_stats_strings,
220                        sizeof(adapter_stats_strings));
221                 data += sizeof(adapter_stats_strings);
222                 memcpy(data, loopback_stats_strings,
223                        sizeof(loopback_stats_strings));
224         } else if (stringset == ETH_SS_PRIV_FLAGS) {
225                 memcpy(data, cxgb4_priv_flags_strings,
226                        sizeof(cxgb4_priv_flags_strings));
227         }
228 }
229
230 /* port stats maintained per queue of the port. They should be in the same
231  * order as in stats_strings above.
232  */
233 struct queue_port_stats {
234         u64 tso;
235         u64 uso;
236         u64 tx_csum;
237         u64 rx_csum;
238         u64 vlan_ex;
239         u64 vlan_ins;
240         u64 gro_pkts;
241         u64 gro_merged;
242 };
243
244 struct adapter_stats {
245         u64 db_drop;
246         u64 db_full;
247         u64 db_empty;
248         u64 wc_success;
249         u64 wc_fail;
250 #ifdef CONFIG_CHELSIO_TLS_DEVICE
251         u64 tx_tls_encrypted_packets;
252         u64 tx_tls_encrypted_bytes;
253         u64 tx_tls_ctx;
254         u64 tx_tls_ooo;
255         u64 tx_tls_skip_no_sync_data;
256         u64 tx_tls_drop_no_sync_data;
257         u64 tx_tls_drop_bypass_req;
258 #endif
259 };
260
261 static void collect_sge_port_stats(const struct adapter *adap,
262                                    const struct port_info *p,
263                                    struct queue_port_stats *s)
264 {
265         const struct sge_eth_txq *tx = &adap->sge.ethtxq[p->first_qset];
266         const struct sge_eth_rxq *rx = &adap->sge.ethrxq[p->first_qset];
267         struct sge_eohw_txq *eohw_tx;
268         unsigned int i;
269
270         memset(s, 0, sizeof(*s));
271         for (i = 0; i < p->nqsets; i++, rx++, tx++) {
272                 s->tso += tx->tso;
273                 s->uso += tx->uso;
274                 s->tx_csum += tx->tx_cso;
275                 s->rx_csum += rx->stats.rx_cso;
276                 s->vlan_ex += rx->stats.vlan_ex;
277                 s->vlan_ins += tx->vlan_ins;
278                 s->gro_pkts += rx->stats.lro_pkts;
279                 s->gro_merged += rx->stats.lro_merged;
280         }
281
282         if (adap->sge.eohw_txq) {
283                 eohw_tx = &adap->sge.eohw_txq[p->first_qset];
284                 for (i = 0; i < p->nqsets; i++, eohw_tx++) {
285                         s->tso += eohw_tx->tso;
286                         s->uso += eohw_tx->uso;
287                         s->tx_csum += eohw_tx->tx_cso;
288                         s->vlan_ins += eohw_tx->vlan_ins;
289                 }
290         }
291 }
292
293 static void collect_adapter_stats(struct adapter *adap, struct adapter_stats *s)
294 {
295         u64 val1, val2;
296
297         memset(s, 0, sizeof(*s));
298
299         s->db_drop = adap->db_stats.db_drop;
300         s->db_full = adap->db_stats.db_full;
301         s->db_empty = adap->db_stats.db_empty;
302
303         if (!is_t4(adap->params.chip)) {
304                 int v;
305
306                 v = t4_read_reg(adap, SGE_STAT_CFG_A);
307                 if (STATSOURCE_T5_G(v) == 7) {
308                         val2 = t4_read_reg(adap, SGE_STAT_MATCH_A);
309                         val1 = t4_read_reg(adap, SGE_STAT_TOTAL_A);
310                         s->wc_success = val1 - val2;
311                         s->wc_fail = val2;
312                 }
313         }
314 }
315
316 static void get_stats(struct net_device *dev, struct ethtool_stats *stats,
317                       u64 *data)
318 {
319         struct port_info *pi = netdev_priv(dev);
320         struct adapter *adapter = pi->adapter;
321         struct lb_port_stats s;
322         int i;
323         u64 *p0;
324
325         t4_get_port_stats_offset(adapter, pi->tx_chan,
326                                  (struct port_stats *)data,
327                                  &pi->stats_base);
328
329         data += sizeof(struct port_stats) / sizeof(u64);
330         collect_sge_port_stats(adapter, pi, (struct queue_port_stats *)data);
331         data += sizeof(struct queue_port_stats) / sizeof(u64);
332         collect_adapter_stats(adapter, (struct adapter_stats *)data);
333         data += sizeof(struct adapter_stats) / sizeof(u64);
334
335         *data++ = (u64)pi->port_id;
336         memset(&s, 0, sizeof(s));
337         t4_get_lb_stats(adapter, pi->port_id, &s);
338
339         p0 = &s.octets;
340         for (i = 0; i < ARRAY_SIZE(loopback_stats_strings) - 1; i++)
341                 *data++ = (unsigned long long)*p0++;
342 }
343
344 static void get_regs(struct net_device *dev, struct ethtool_regs *regs,
345                      void *buf)
346 {
347         struct adapter *adap = netdev2adap(dev);
348         size_t buf_size;
349
350         buf_size = t4_get_regs_len(adap);
351         regs->version = mk_adap_vers(adap);
352         t4_get_regs(adap, buf, buf_size);
353 }
354
355 static int restart_autoneg(struct net_device *dev)
356 {
357         struct port_info *p = netdev_priv(dev);
358
359         if (!netif_running(dev))
360                 return -EAGAIN;
361         if (p->link_cfg.autoneg != AUTONEG_ENABLE)
362                 return -EINVAL;
363         t4_restart_aneg(p->adapter, p->adapter->pf, p->tx_chan);
364         return 0;
365 }
366
367 static int identify_port(struct net_device *dev,
368                          enum ethtool_phys_id_state state)
369 {
370         unsigned int val;
371         struct adapter *adap = netdev2adap(dev);
372
373         if (state == ETHTOOL_ID_ACTIVE)
374                 val = 0xffff;
375         else if (state == ETHTOOL_ID_INACTIVE)
376                 val = 0;
377         else
378                 return -EINVAL;
379
380         return t4_identify_port(adap, adap->pf, netdev2pinfo(dev)->viid, val);
381 }
382
383 /**
384  *      from_fw_port_mod_type - translate Firmware Port/Module type to Ethtool
385  *      @port_type: Firmware Port Type
386  *      @mod_type: Firmware Module Type
387  *
388  *      Translate Firmware Port/Module type to Ethtool Port Type.
389  */
390 static int from_fw_port_mod_type(enum fw_port_type port_type,
391                                  enum fw_port_module_type mod_type)
392 {
393         if (port_type == FW_PORT_TYPE_BT_SGMII ||
394             port_type == FW_PORT_TYPE_BT_XFI ||
395             port_type == FW_PORT_TYPE_BT_XAUI) {
396                 return PORT_TP;
397         } else if (port_type == FW_PORT_TYPE_FIBER_XFI ||
398                    port_type == FW_PORT_TYPE_FIBER_XAUI) {
399                 return PORT_FIBRE;
400         } else if (port_type == FW_PORT_TYPE_SFP ||
401                    port_type == FW_PORT_TYPE_QSFP_10G ||
402                    port_type == FW_PORT_TYPE_QSA ||
403                    port_type == FW_PORT_TYPE_QSFP ||
404                    port_type == FW_PORT_TYPE_CR4_QSFP ||
405                    port_type == FW_PORT_TYPE_CR_QSFP ||
406                    port_type == FW_PORT_TYPE_CR2_QSFP ||
407                    port_type == FW_PORT_TYPE_SFP28) {
408                 if (mod_type == FW_PORT_MOD_TYPE_LR ||
409                     mod_type == FW_PORT_MOD_TYPE_SR ||
410                     mod_type == FW_PORT_MOD_TYPE_ER ||
411                     mod_type == FW_PORT_MOD_TYPE_LRM)
412                         return PORT_FIBRE;
413                 else if (mod_type == FW_PORT_MOD_TYPE_TWINAX_PASSIVE ||
414                          mod_type == FW_PORT_MOD_TYPE_TWINAX_ACTIVE)
415                         return PORT_DA;
416                 else
417                         return PORT_OTHER;
418         } else if (port_type == FW_PORT_TYPE_KR4_100G ||
419                    port_type == FW_PORT_TYPE_KR_SFP28 ||
420                    port_type == FW_PORT_TYPE_KR_XLAUI) {
421                 return PORT_NONE;
422         }
423
424         return PORT_OTHER;
425 }
426
427 /**
428  *      speed_to_fw_caps - translate Port Speed to Firmware Port Capabilities
429  *      @speed: speed in Kb/s
430  *
431  *      Translates a specific Port Speed into a Firmware Port Capabilities
432  *      value.
433  */
434 static unsigned int speed_to_fw_caps(int speed)
435 {
436         if (speed == 100)
437                 return FW_PORT_CAP32_SPEED_100M;
438         if (speed == 1000)
439                 return FW_PORT_CAP32_SPEED_1G;
440         if (speed == 10000)
441                 return FW_PORT_CAP32_SPEED_10G;
442         if (speed == 25000)
443                 return FW_PORT_CAP32_SPEED_25G;
444         if (speed == 40000)
445                 return FW_PORT_CAP32_SPEED_40G;
446         if (speed == 50000)
447                 return FW_PORT_CAP32_SPEED_50G;
448         if (speed == 100000)
449                 return FW_PORT_CAP32_SPEED_100G;
450         if (speed == 200000)
451                 return FW_PORT_CAP32_SPEED_200G;
452         if (speed == 400000)
453                 return FW_PORT_CAP32_SPEED_400G;
454         return 0;
455 }
456
457 /**
458  *      fw_caps_to_lmm - translate Firmware to ethtool Link Mode Mask
459  *      @port_type: Firmware Port Type
460  *      @fw_caps: Firmware Port Capabilities
461  *      @link_mode_mask: ethtool Link Mode Mask
462  *
463  *      Translate a Firmware Port Capabilities specification to an ethtool
464  *      Link Mode Mask.
465  */
466 static void fw_caps_to_lmm(enum fw_port_type port_type,
467                            fw_port_cap32_t fw_caps,
468                            unsigned long *link_mode_mask)
469 {
470         #define SET_LMM(__lmm_name) \
471                 do { \
472                         __set_bit(ETHTOOL_LINK_MODE_ ## __lmm_name ## _BIT, \
473                                   link_mode_mask); \
474                 } while (0)
475
476         #define FW_CAPS_TO_LMM(__fw_name, __lmm_name) \
477                 do { \
478                         if (fw_caps & FW_PORT_CAP32_ ## __fw_name) \
479                                 SET_LMM(__lmm_name); \
480                 } while (0)
481
482         switch (port_type) {
483         case FW_PORT_TYPE_BT_SGMII:
484         case FW_PORT_TYPE_BT_XFI:
485         case FW_PORT_TYPE_BT_XAUI:
486                 SET_LMM(TP);
487                 FW_CAPS_TO_LMM(SPEED_100M, 100baseT_Full);
488                 FW_CAPS_TO_LMM(SPEED_1G, 1000baseT_Full);
489                 FW_CAPS_TO_LMM(SPEED_10G, 10000baseT_Full);
490                 break;
491
492         case FW_PORT_TYPE_KX4:
493         case FW_PORT_TYPE_KX:
494                 SET_LMM(Backplane);
495                 FW_CAPS_TO_LMM(SPEED_1G, 1000baseKX_Full);
496                 FW_CAPS_TO_LMM(SPEED_10G, 10000baseKX4_Full);
497                 break;
498
499         case FW_PORT_TYPE_KR:
500                 SET_LMM(Backplane);
501                 FW_CAPS_TO_LMM(SPEED_10G, 10000baseKR_Full);
502                 break;
503
504         case FW_PORT_TYPE_BP_AP:
505                 SET_LMM(Backplane);
506                 FW_CAPS_TO_LMM(SPEED_1G, 1000baseKX_Full);
507                 FW_CAPS_TO_LMM(SPEED_10G, 10000baseR_FEC);
508                 FW_CAPS_TO_LMM(SPEED_10G, 10000baseKR_Full);
509                 break;
510
511         case FW_PORT_TYPE_BP4_AP:
512                 SET_LMM(Backplane);
513                 FW_CAPS_TO_LMM(SPEED_1G, 1000baseKX_Full);
514                 FW_CAPS_TO_LMM(SPEED_10G, 10000baseR_FEC);
515                 FW_CAPS_TO_LMM(SPEED_10G, 10000baseKR_Full);
516                 FW_CAPS_TO_LMM(SPEED_10G, 10000baseKX4_Full);
517                 break;
518
519         case FW_PORT_TYPE_FIBER_XFI:
520         case FW_PORT_TYPE_FIBER_XAUI:
521         case FW_PORT_TYPE_SFP:
522         case FW_PORT_TYPE_QSFP_10G:
523         case FW_PORT_TYPE_QSA:
524                 SET_LMM(FIBRE);
525                 FW_CAPS_TO_LMM(SPEED_1G, 1000baseT_Full);
526                 FW_CAPS_TO_LMM(SPEED_10G, 10000baseT_Full);
527                 break;
528
529         case FW_PORT_TYPE_BP40_BA:
530         case FW_PORT_TYPE_QSFP:
531                 SET_LMM(FIBRE);
532                 FW_CAPS_TO_LMM(SPEED_1G, 1000baseT_Full);
533                 FW_CAPS_TO_LMM(SPEED_10G, 10000baseT_Full);
534                 FW_CAPS_TO_LMM(SPEED_40G, 40000baseSR4_Full);
535                 break;
536
537         case FW_PORT_TYPE_CR_QSFP:
538         case FW_PORT_TYPE_SFP28:
539                 SET_LMM(FIBRE);
540                 FW_CAPS_TO_LMM(SPEED_1G, 1000baseT_Full);
541                 FW_CAPS_TO_LMM(SPEED_10G, 10000baseT_Full);
542                 FW_CAPS_TO_LMM(SPEED_25G, 25000baseCR_Full);
543                 break;
544
545         case FW_PORT_TYPE_KR_SFP28:
546                 SET_LMM(Backplane);
547                 FW_CAPS_TO_LMM(SPEED_1G, 1000baseT_Full);
548                 FW_CAPS_TO_LMM(SPEED_10G, 10000baseKR_Full);
549                 FW_CAPS_TO_LMM(SPEED_25G, 25000baseKR_Full);
550                 break;
551
552         case FW_PORT_TYPE_KR_XLAUI:
553                 SET_LMM(Backplane);
554                 FW_CAPS_TO_LMM(SPEED_1G, 1000baseKX_Full);
555                 FW_CAPS_TO_LMM(SPEED_10G, 10000baseKR_Full);
556                 FW_CAPS_TO_LMM(SPEED_40G, 40000baseKR4_Full);
557                 break;
558
559         case FW_PORT_TYPE_CR2_QSFP:
560                 SET_LMM(FIBRE);
561                 FW_CAPS_TO_LMM(SPEED_50G, 50000baseSR2_Full);
562                 break;
563
564         case FW_PORT_TYPE_KR4_100G:
565         case FW_PORT_TYPE_CR4_QSFP:
566                 SET_LMM(FIBRE);
567                 FW_CAPS_TO_LMM(SPEED_1G,  1000baseT_Full);
568                 FW_CAPS_TO_LMM(SPEED_10G, 10000baseKR_Full);
569                 FW_CAPS_TO_LMM(SPEED_40G, 40000baseSR4_Full);
570                 FW_CAPS_TO_LMM(SPEED_25G, 25000baseCR_Full);
571                 FW_CAPS_TO_LMM(SPEED_50G, 50000baseCR2_Full);
572                 FW_CAPS_TO_LMM(SPEED_100G, 100000baseCR4_Full);
573                 break;
574
575         default:
576                 break;
577         }
578
579         if (fw_caps & FW_PORT_CAP32_FEC_V(FW_PORT_CAP32_FEC_M)) {
580                 FW_CAPS_TO_LMM(FEC_RS, FEC_RS);
581                 FW_CAPS_TO_LMM(FEC_BASER_RS, FEC_BASER);
582         } else {
583                 SET_LMM(FEC_NONE);
584         }
585
586         FW_CAPS_TO_LMM(ANEG, Autoneg);
587         FW_CAPS_TO_LMM(802_3_PAUSE, Pause);
588         FW_CAPS_TO_LMM(802_3_ASM_DIR, Asym_Pause);
589
590         #undef FW_CAPS_TO_LMM
591         #undef SET_LMM
592 }
593
594 /**
595  *      lmm_to_fw_caps - translate ethtool Link Mode Mask to Firmware
596  *      capabilities
597  *      @et_lmm: ethtool Link Mode Mask
598  *
599  *      Translate ethtool Link Mode Mask into a Firmware Port capabilities
600  *      value.
601  */
602 static unsigned int lmm_to_fw_caps(const unsigned long *link_mode_mask)
603 {
604         unsigned int fw_caps = 0;
605
606         #define LMM_TO_FW_CAPS(__lmm_name, __fw_name) \
607                 do { \
608                         if (test_bit(ETHTOOL_LINK_MODE_ ## __lmm_name ## _BIT, \
609                                      link_mode_mask)) \
610                                 fw_caps |= FW_PORT_CAP32_ ## __fw_name; \
611                 } while (0)
612
613         LMM_TO_FW_CAPS(100baseT_Full, SPEED_100M);
614         LMM_TO_FW_CAPS(1000baseT_Full, SPEED_1G);
615         LMM_TO_FW_CAPS(10000baseT_Full, SPEED_10G);
616         LMM_TO_FW_CAPS(40000baseSR4_Full, SPEED_40G);
617         LMM_TO_FW_CAPS(25000baseCR_Full, SPEED_25G);
618         LMM_TO_FW_CAPS(50000baseCR2_Full, SPEED_50G);
619         LMM_TO_FW_CAPS(100000baseCR4_Full, SPEED_100G);
620
621         #undef LMM_TO_FW_CAPS
622
623         return fw_caps;
624 }
625
626 static int get_link_ksettings(struct net_device *dev,
627                               struct ethtool_link_ksettings *link_ksettings)
628 {
629         struct port_info *pi = netdev_priv(dev);
630         struct ethtool_link_settings *base = &link_ksettings->base;
631
632         /* For the nonce, the Firmware doesn't send up Port State changes
633          * when the Virtual Interface attached to the Port is down.  So
634          * if it's down, let's grab any changes.
635          */
636         if (!netif_running(dev))
637                 (void)t4_update_port_info(pi);
638
639         ethtool_link_ksettings_zero_link_mode(link_ksettings, supported);
640         ethtool_link_ksettings_zero_link_mode(link_ksettings, advertising);
641         ethtool_link_ksettings_zero_link_mode(link_ksettings, lp_advertising);
642
643         base->port = from_fw_port_mod_type(pi->port_type, pi->mod_type);
644
645         if (pi->mdio_addr >= 0) {
646                 base->phy_address = pi->mdio_addr;
647                 base->mdio_support = (pi->port_type == FW_PORT_TYPE_BT_SGMII
648                                       ? ETH_MDIO_SUPPORTS_C22
649                                       : ETH_MDIO_SUPPORTS_C45);
650         } else {
651                 base->phy_address = 255;
652                 base->mdio_support = 0;
653         }
654
655         fw_caps_to_lmm(pi->port_type, pi->link_cfg.pcaps,
656                        link_ksettings->link_modes.supported);
657         fw_caps_to_lmm(pi->port_type,
658                        t4_link_acaps(pi->adapter,
659                                      pi->lport,
660                                      &pi->link_cfg),
661                        link_ksettings->link_modes.advertising);
662         fw_caps_to_lmm(pi->port_type, pi->link_cfg.lpacaps,
663                        link_ksettings->link_modes.lp_advertising);
664
665         base->speed = (netif_carrier_ok(dev)
666                        ? pi->link_cfg.speed
667                        : SPEED_UNKNOWN);
668         base->duplex = DUPLEX_FULL;
669
670         base->autoneg = pi->link_cfg.autoneg;
671         if (pi->link_cfg.pcaps & FW_PORT_CAP32_ANEG)
672                 ethtool_link_ksettings_add_link_mode(link_ksettings,
673                                                      supported, Autoneg);
674         if (pi->link_cfg.autoneg)
675                 ethtool_link_ksettings_add_link_mode(link_ksettings,
676                                                      advertising, Autoneg);
677
678         return 0;
679 }
680
681 static int set_link_ksettings(struct net_device *dev,
682                             const struct ethtool_link_ksettings *link_ksettings)
683 {
684         struct port_info *pi = netdev_priv(dev);
685         struct link_config *lc = &pi->link_cfg;
686         const struct ethtool_link_settings *base = &link_ksettings->base;
687         struct link_config old_lc;
688         unsigned int fw_caps;
689         int ret = 0;
690
691         /* only full-duplex supported */
692         if (base->duplex != DUPLEX_FULL)
693                 return -EINVAL;
694
695         old_lc = *lc;
696         if (!(lc->pcaps & FW_PORT_CAP32_ANEG) ||
697             base->autoneg == AUTONEG_DISABLE) {
698                 fw_caps = speed_to_fw_caps(base->speed);
699
700                 /* Speed must be supported by Physical Port Capabilities. */
701                 if (!(lc->pcaps & fw_caps))
702                         return -EINVAL;
703
704                 lc->speed_caps = fw_caps;
705                 lc->acaps = fw_caps;
706         } else {
707                 fw_caps =
708                         lmm_to_fw_caps(link_ksettings->link_modes.advertising);
709                 if (!(lc->pcaps & fw_caps))
710                         return -EINVAL;
711                 lc->speed_caps = 0;
712                 lc->acaps = fw_caps | FW_PORT_CAP32_ANEG;
713         }
714         lc->autoneg = base->autoneg;
715
716         /* If the firmware rejects the Link Configuration request, back out
717          * the changes and report the error.
718          */
719         ret = t4_link_l1cfg(pi->adapter, pi->adapter->mbox, pi->tx_chan, lc);
720         if (ret)
721                 *lc = old_lc;
722
723         return ret;
724 }
725
726 /* Translate the Firmware FEC value into the ethtool value. */
727 static inline unsigned int fwcap_to_eth_fec(unsigned int fw_fec)
728 {
729         unsigned int eth_fec = 0;
730
731         if (fw_fec & FW_PORT_CAP32_FEC_RS)
732                 eth_fec |= ETHTOOL_FEC_RS;
733         if (fw_fec & FW_PORT_CAP32_FEC_BASER_RS)
734                 eth_fec |= ETHTOOL_FEC_BASER;
735
736         /* if nothing is set, then FEC is off */
737         if (!eth_fec)
738                 eth_fec = ETHTOOL_FEC_OFF;
739
740         return eth_fec;
741 }
742
743 /* Translate Common Code FEC value into ethtool value. */
744 static inline unsigned int cc_to_eth_fec(unsigned int cc_fec)
745 {
746         unsigned int eth_fec = 0;
747
748         if (cc_fec & FEC_AUTO)
749                 eth_fec |= ETHTOOL_FEC_AUTO;
750         if (cc_fec & FEC_RS)
751                 eth_fec |= ETHTOOL_FEC_RS;
752         if (cc_fec & FEC_BASER_RS)
753                 eth_fec |= ETHTOOL_FEC_BASER;
754
755         /* if nothing is set, then FEC is off */
756         if (!eth_fec)
757                 eth_fec = ETHTOOL_FEC_OFF;
758
759         return eth_fec;
760 }
761
762 /* Translate ethtool FEC value into Common Code value. */
763 static inline unsigned int eth_to_cc_fec(unsigned int eth_fec)
764 {
765         unsigned int cc_fec = 0;
766
767         if (eth_fec & ETHTOOL_FEC_OFF)
768                 return cc_fec;
769
770         if (eth_fec & ETHTOOL_FEC_AUTO)
771                 cc_fec |= FEC_AUTO;
772         if (eth_fec & ETHTOOL_FEC_RS)
773                 cc_fec |= FEC_RS;
774         if (eth_fec & ETHTOOL_FEC_BASER)
775                 cc_fec |= FEC_BASER_RS;
776
777         return cc_fec;
778 }
779
780 static int get_fecparam(struct net_device *dev, struct ethtool_fecparam *fec)
781 {
782         const struct port_info *pi = netdev_priv(dev);
783         const struct link_config *lc = &pi->link_cfg;
784
785         /* Translate the Firmware FEC Support into the ethtool value.  We
786          * always support IEEE 802.3 "automatic" selection of Link FEC type if
787          * any FEC is supported.
788          */
789         fec->fec = fwcap_to_eth_fec(lc->pcaps);
790         if (fec->fec != ETHTOOL_FEC_OFF)
791                 fec->fec |= ETHTOOL_FEC_AUTO;
792
793         /* Translate the current internal FEC parameters into the
794          * ethtool values.
795          */
796         fec->active_fec = cc_to_eth_fec(lc->fec);
797
798         return 0;
799 }
800
801 static int set_fecparam(struct net_device *dev, struct ethtool_fecparam *fec)
802 {
803         struct port_info *pi = netdev_priv(dev);
804         struct link_config *lc = &pi->link_cfg;
805         struct link_config old_lc;
806         int ret;
807
808         /* Save old Link Configuration in case the L1 Configure below
809          * fails.
810          */
811         old_lc = *lc;
812
813         /* Try to perform the L1 Configure and return the result of that
814          * effort.  If it fails, revert the attempted change.
815          */
816         lc->requested_fec = eth_to_cc_fec(fec->fec);
817         ret = t4_link_l1cfg(pi->adapter, pi->adapter->mbox,
818                             pi->tx_chan, lc);
819         if (ret)
820                 *lc = old_lc;
821         return ret;
822 }
823
824 static void get_pauseparam(struct net_device *dev,
825                            struct ethtool_pauseparam *epause)
826 {
827         struct port_info *p = netdev_priv(dev);
828
829         epause->autoneg = (p->link_cfg.requested_fc & PAUSE_AUTONEG) != 0;
830         epause->rx_pause = (p->link_cfg.advertised_fc & PAUSE_RX) != 0;
831         epause->tx_pause = (p->link_cfg.advertised_fc & PAUSE_TX) != 0;
832 }
833
834 static int set_pauseparam(struct net_device *dev,
835                           struct ethtool_pauseparam *epause)
836 {
837         struct port_info *p = netdev_priv(dev);
838         struct link_config *lc = &p->link_cfg;
839
840         if (epause->autoneg == AUTONEG_DISABLE)
841                 lc->requested_fc = 0;
842         else if (lc->pcaps & FW_PORT_CAP32_ANEG)
843                 lc->requested_fc = PAUSE_AUTONEG;
844         else
845                 return -EINVAL;
846
847         if (epause->rx_pause)
848                 lc->requested_fc |= PAUSE_RX;
849         if (epause->tx_pause)
850                 lc->requested_fc |= PAUSE_TX;
851         if (netif_running(dev))
852                 return t4_link_l1cfg(p->adapter, p->adapter->mbox, p->tx_chan,
853                                      lc);
854         return 0;
855 }
856
857 static void get_sge_param(struct net_device *dev, struct ethtool_ringparam *e)
858 {
859         const struct port_info *pi = netdev_priv(dev);
860         const struct sge *s = &pi->adapter->sge;
861
862         e->rx_max_pending = MAX_RX_BUFFERS;
863         e->rx_mini_max_pending = MAX_RSPQ_ENTRIES;
864         e->rx_jumbo_max_pending = 0;
865         e->tx_max_pending = MAX_TXQ_ENTRIES;
866
867         e->rx_pending = s->ethrxq[pi->first_qset].fl.size - 8;
868         e->rx_mini_pending = s->ethrxq[pi->first_qset].rspq.size;
869         e->rx_jumbo_pending = 0;
870         e->tx_pending = s->ethtxq[pi->first_qset].q.size;
871 }
872
873 static int set_sge_param(struct net_device *dev, struct ethtool_ringparam *e)
874 {
875         int i;
876         const struct port_info *pi = netdev_priv(dev);
877         struct adapter *adapter = pi->adapter;
878         struct sge *s = &adapter->sge;
879
880         if (e->rx_pending > MAX_RX_BUFFERS || e->rx_jumbo_pending ||
881             e->tx_pending > MAX_TXQ_ENTRIES ||
882             e->rx_mini_pending > MAX_RSPQ_ENTRIES ||
883             e->rx_mini_pending < MIN_RSPQ_ENTRIES ||
884             e->rx_pending < MIN_FL_ENTRIES || e->tx_pending < MIN_TXQ_ENTRIES)
885                 return -EINVAL;
886
887         if (adapter->flags & CXGB4_FULL_INIT_DONE)
888                 return -EBUSY;
889
890         for (i = 0; i < pi->nqsets; ++i) {
891                 s->ethtxq[pi->first_qset + i].q.size = e->tx_pending;
892                 s->ethrxq[pi->first_qset + i].fl.size = e->rx_pending + 8;
893                 s->ethrxq[pi->first_qset + i].rspq.size = e->rx_mini_pending;
894         }
895         return 0;
896 }
897
898 /**
899  * set_rx_intr_params - set a net devices's RX interrupt holdoff paramete!
900  * @dev: the network device
901  * @us: the hold-off time in us, or 0 to disable timer
902  * @cnt: the hold-off packet count, or 0 to disable counter
903  *
904  * Set the RX interrupt hold-off parameters for a network device.
905  */
906 static int set_rx_intr_params(struct net_device *dev,
907                               unsigned int us, unsigned int cnt)
908 {
909         int i, err;
910         struct port_info *pi = netdev_priv(dev);
911         struct adapter *adap = pi->adapter;
912         struct sge_eth_rxq *q = &adap->sge.ethrxq[pi->first_qset];
913
914         for (i = 0; i < pi->nqsets; i++, q++) {
915                 err = cxgb4_set_rspq_intr_params(&q->rspq, us, cnt);
916                 if (err)
917                         return err;
918         }
919         return 0;
920 }
921
922 static int set_adaptive_rx_setting(struct net_device *dev, int adaptive_rx)
923 {
924         int i;
925         struct port_info *pi = netdev_priv(dev);
926         struct adapter *adap = pi->adapter;
927         struct sge_eth_rxq *q = &adap->sge.ethrxq[pi->first_qset];
928
929         for (i = 0; i < pi->nqsets; i++, q++)
930                 q->rspq.adaptive_rx = adaptive_rx;
931
932         return 0;
933 }
934
935 static int get_adaptive_rx_setting(struct net_device *dev)
936 {
937         struct port_info *pi = netdev_priv(dev);
938         struct adapter *adap = pi->adapter;
939         struct sge_eth_rxq *q = &adap->sge.ethrxq[pi->first_qset];
940
941         return q->rspq.adaptive_rx;
942 }
943
944 /* Return the current global Adapter SGE Doorbell Queue Timer Tick for all
945  * Ethernet TX Queues.
946  */
947 static int get_dbqtimer_tick(struct net_device *dev)
948 {
949         struct port_info *pi = netdev_priv(dev);
950         struct adapter *adap = pi->adapter;
951
952         if (!(adap->flags & CXGB4_SGE_DBQ_TIMER))
953                 return 0;
954
955         return adap->sge.dbqtimer_tick;
956 }
957
958 /* Return the SGE Doorbell Queue Timer Value for the Ethernet TX Queues
959  * associated with a Network Device.
960  */
961 static int get_dbqtimer(struct net_device *dev)
962 {
963         struct port_info *pi = netdev_priv(dev);
964         struct adapter *adap = pi->adapter;
965         struct sge_eth_txq *txq;
966
967         txq = &adap->sge.ethtxq[pi->first_qset];
968
969         if (!(adap->flags & CXGB4_SGE_DBQ_TIMER))
970                 return 0;
971
972         /* all of the TX Queues use the same Timer Index */
973         return adap->sge.dbqtimer_val[txq->dbqtimerix];
974 }
975
976 /* Set the global Adapter SGE Doorbell Queue Timer Tick for all Ethernet TX
977  * Queues.  This is the fundamental "Tick" that sets the scale of values which
978  * can be used.  Individual Ethernet TX Queues index into a relatively small
979  * array of Tick Multipliers.  Changing the base Tick will thus change all of
980  * the resulting Timer Values associated with those multipliers for all
981  * Ethernet TX Queues.
982  */
983 static int set_dbqtimer_tick(struct net_device *dev, int usecs)
984 {
985         struct port_info *pi = netdev_priv(dev);
986         struct adapter *adap = pi->adapter;
987         struct sge *s = &adap->sge;
988         u32 param, val;
989         int ret;
990
991         if (!(adap->flags & CXGB4_SGE_DBQ_TIMER))
992                 return 0;
993
994         /* return early if it's the same Timer Tick we're already using */
995         if (s->dbqtimer_tick == usecs)
996                 return 0;
997
998         /* attempt to set the new Timer Tick value */
999         param = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) |
1000                  FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_DBQ_TIMERTICK));
1001         val = usecs;
1002         ret = t4_set_params(adap, adap->mbox, adap->pf, 0, 1, &param, &val);
1003         if (ret)
1004                 return ret;
1005         s->dbqtimer_tick = usecs;
1006
1007         /* if successful, reread resulting dependent Timer values */
1008         ret = t4_read_sge_dbqtimers(adap, ARRAY_SIZE(s->dbqtimer_val),
1009                                     s->dbqtimer_val);
1010         return ret;
1011 }
1012
1013 /* Set the SGE Doorbell Queue Timer Value for the Ethernet TX Queues
1014  * associated with a Network Device.  There is a relatively small array of
1015  * possible Timer Values so we need to pick the closest value available.
1016  */
1017 static int set_dbqtimer(struct net_device *dev, int usecs)
1018 {
1019         int qix, timerix, min_timerix, delta, min_delta;
1020         struct port_info *pi = netdev_priv(dev);
1021         struct adapter *adap = pi->adapter;
1022         struct sge *s = &adap->sge;
1023         struct sge_eth_txq *txq;
1024         u32 param, val;
1025         int ret;
1026
1027         if (!(adap->flags & CXGB4_SGE_DBQ_TIMER))
1028                 return 0;
1029
1030         /* Find the SGE Doorbell Timer Value that's closest to the requested
1031          * value.
1032          */
1033         min_delta = INT_MAX;
1034         min_timerix = 0;
1035         for (timerix = 0; timerix < ARRAY_SIZE(s->dbqtimer_val); timerix++) {
1036                 delta = s->dbqtimer_val[timerix] - usecs;
1037                 if (delta < 0)
1038                         delta = -delta;
1039                 if (delta < min_delta) {
1040                         min_delta = delta;
1041                         min_timerix = timerix;
1042                 }
1043         }
1044
1045         /* Return early if it's the same Timer Index we're already using.
1046          * We use the same Timer Index for all of the TX Queues for an
1047          * interface so it's only necessary to check the first one.
1048          */
1049         txq = &s->ethtxq[pi->first_qset];
1050         if (txq->dbqtimerix == min_timerix)
1051                 return 0;
1052
1053         for (qix = 0; qix < pi->nqsets; qix++, txq++) {
1054                 if (adap->flags & CXGB4_FULL_INIT_DONE) {
1055                         param =
1056                          (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DMAQ) |
1057                           FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DMAQ_EQ_TIMERIX) |
1058                           FW_PARAMS_PARAM_YZ_V(txq->q.cntxt_id));
1059                         val = min_timerix;
1060                         ret = t4_set_params(adap, adap->mbox, adap->pf, 0,
1061                                             1, &param, &val);
1062                         if (ret)
1063                                 return ret;
1064                 }
1065                 txq->dbqtimerix = min_timerix;
1066         }
1067         return 0;
1068 }
1069
1070 /* Set the global Adapter SGE Doorbell Queue Timer Tick for all Ethernet TX
1071  * Queues and the Timer Value for the Ethernet TX Queues associated with a
1072  * Network Device.  Since changing the global Tick changes all of the
1073  * available Timer Values, we need to do this first before selecting the
1074  * resulting closest Timer Value.  Moreover, since the Tick is global,
1075  * changing it affects the Timer Values for all Network Devices on the
1076  * adapter.  So, before changing the Tick, we grab all of the current Timer
1077  * Values for other Network Devices on this Adapter and then attempt to select
1078  * new Timer Values which are close to the old values ...
1079  */
1080 static int set_dbqtimer_tickval(struct net_device *dev,
1081                                 int tick_usecs, int timer_usecs)
1082 {
1083         struct port_info *pi = netdev_priv(dev);
1084         struct adapter *adap = pi->adapter;
1085         int timer[MAX_NPORTS];
1086         unsigned int port;
1087         int ret;
1088
1089         /* Grab the other adapter Network Interface current timers and fill in
1090          * the new one for this Network Interface.
1091          */
1092         for_each_port(adap, port)
1093                 if (port == pi->port_id)
1094                         timer[port] = timer_usecs;
1095                 else
1096                         timer[port] = get_dbqtimer(adap->port[port]);
1097
1098         /* Change the global Tick first ... */
1099         ret = set_dbqtimer_tick(dev, tick_usecs);
1100         if (ret)
1101                 return ret;
1102
1103         /* ... and then set all of the Network Interface Timer Values ... */
1104         for_each_port(adap, port) {
1105                 ret = set_dbqtimer(adap->port[port], timer[port]);
1106                 if (ret)
1107                         return ret;
1108         }
1109
1110         return 0;
1111 }
1112
1113 static int set_coalesce(struct net_device *dev,
1114                         struct ethtool_coalesce *coalesce)
1115 {
1116         int ret;
1117
1118         set_adaptive_rx_setting(dev, coalesce->use_adaptive_rx_coalesce);
1119
1120         ret = set_rx_intr_params(dev, coalesce->rx_coalesce_usecs,
1121                                  coalesce->rx_max_coalesced_frames);
1122         if (ret)
1123                 return ret;
1124
1125         return set_dbqtimer_tickval(dev,
1126                                     coalesce->tx_coalesce_usecs_irq,
1127                                     coalesce->tx_coalesce_usecs);
1128 }
1129
1130 static int get_coalesce(struct net_device *dev, struct ethtool_coalesce *c)
1131 {
1132         const struct port_info *pi = netdev_priv(dev);
1133         const struct adapter *adap = pi->adapter;
1134         const struct sge_rspq *rq = &adap->sge.ethrxq[pi->first_qset].rspq;
1135
1136         c->rx_coalesce_usecs = qtimer_val(adap, rq);
1137         c->rx_max_coalesced_frames = (rq->intr_params & QINTR_CNT_EN_F) ?
1138                 adap->sge.counter_val[rq->pktcnt_idx] : 0;
1139         c->use_adaptive_rx_coalesce = get_adaptive_rx_setting(dev);
1140         c->tx_coalesce_usecs_irq = get_dbqtimer_tick(dev);
1141         c->tx_coalesce_usecs = get_dbqtimer(dev);
1142         return 0;
1143 }
1144
1145 /* The next two routines implement eeprom read/write from physical addresses.
1146  */
1147 static int eeprom_rd_phys(struct adapter *adap, unsigned int phys_addr, u32 *v)
1148 {
1149         int vaddr = t4_eeprom_ptov(phys_addr, adap->pf, EEPROMPFSIZE);
1150
1151         if (vaddr >= 0)
1152                 vaddr = pci_read_vpd(adap->pdev, vaddr, sizeof(u32), v);
1153         return vaddr < 0 ? vaddr : 0;
1154 }
1155
1156 static int eeprom_wr_phys(struct adapter *adap, unsigned int phys_addr, u32 v)
1157 {
1158         int vaddr = t4_eeprom_ptov(phys_addr, adap->pf, EEPROMPFSIZE);
1159
1160         if (vaddr >= 0)
1161                 vaddr = pci_write_vpd(adap->pdev, vaddr, sizeof(u32), &v);
1162         return vaddr < 0 ? vaddr : 0;
1163 }
1164
1165 #define EEPROM_MAGIC 0x38E2F10C
1166
1167 static int get_eeprom(struct net_device *dev, struct ethtool_eeprom *e,
1168                       u8 *data)
1169 {
1170         int i, err = 0;
1171         struct adapter *adapter = netdev2adap(dev);
1172         u8 *buf = kvzalloc(EEPROMSIZE, GFP_KERNEL);
1173
1174         if (!buf)
1175                 return -ENOMEM;
1176
1177         e->magic = EEPROM_MAGIC;
1178         for (i = e->offset & ~3; !err && i < e->offset + e->len; i += 4)
1179                 err = eeprom_rd_phys(adapter, i, (u32 *)&buf[i]);
1180
1181         if (!err)
1182                 memcpy(data, buf + e->offset, e->len);
1183         kvfree(buf);
1184         return err;
1185 }
1186
1187 static int set_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom,
1188                       u8 *data)
1189 {
1190         u8 *buf;
1191         int err = 0;
1192         u32 aligned_offset, aligned_len, *p;
1193         struct adapter *adapter = netdev2adap(dev);
1194
1195         if (eeprom->magic != EEPROM_MAGIC)
1196                 return -EINVAL;
1197
1198         aligned_offset = eeprom->offset & ~3;
1199         aligned_len = (eeprom->len + (eeprom->offset & 3) + 3) & ~3;
1200
1201         if (adapter->pf > 0) {
1202                 u32 start = 1024 + adapter->pf * EEPROMPFSIZE;
1203
1204                 if (aligned_offset < start ||
1205                     aligned_offset + aligned_len > start + EEPROMPFSIZE)
1206                         return -EPERM;
1207         }
1208
1209         if (aligned_offset != eeprom->offset || aligned_len != eeprom->len) {
1210                 /* RMW possibly needed for first or last words.
1211                  */
1212                 buf = kvzalloc(aligned_len, GFP_KERNEL);
1213                 if (!buf)
1214                         return -ENOMEM;
1215                 err = eeprom_rd_phys(adapter, aligned_offset, (u32 *)buf);
1216                 if (!err && aligned_len > 4)
1217                         err = eeprom_rd_phys(adapter,
1218                                              aligned_offset + aligned_len - 4,
1219                                              (u32 *)&buf[aligned_len - 4]);
1220                 if (err)
1221                         goto out;
1222                 memcpy(buf + (eeprom->offset & 3), data, eeprom->len);
1223         } else {
1224                 buf = data;
1225         }
1226
1227         err = t4_seeprom_wp(adapter, false);
1228         if (err)
1229                 goto out;
1230
1231         for (p = (u32 *)buf; !err && aligned_len; aligned_len -= 4, p++) {
1232                 err = eeprom_wr_phys(adapter, aligned_offset, *p);
1233                 aligned_offset += 4;
1234         }
1235
1236         if (!err)
1237                 err = t4_seeprom_wp(adapter, true);
1238 out:
1239         if (buf != data)
1240                 kvfree(buf);
1241         return err;
1242 }
1243
1244 #define CXGB4_PHY_SIG 0x130000ea
1245
1246 static int cxgb4_validate_phy_image(const u8 *data, u32 *size)
1247 {
1248         struct cxgb4_fw_data *header;
1249
1250         header = (struct cxgb4_fw_data *)data;
1251         if (be32_to_cpu(header->signature) != CXGB4_PHY_SIG)
1252                 return -EINVAL;
1253
1254         return 0;
1255 }
1256
1257 static int cxgb4_ethtool_flash_phy(struct net_device *netdev,
1258                                    const u8 *data, u32 size)
1259 {
1260         struct adapter *adap = netdev2adap(netdev);
1261         int ret;
1262
1263         ret = cxgb4_validate_phy_image(data, NULL);
1264         if (ret) {
1265                 dev_err(adap->pdev_dev, "PHY signature mismatch\n");
1266                 return ret;
1267         }
1268
1269         ret = t4_load_phy_fw(adap, MEMWIN_NIC, &adap->win0_lock,
1270                              NULL, data, size);
1271         if (ret)
1272                 dev_err(adap->pdev_dev, "Failed to load PHY FW\n");
1273
1274         return ret;
1275 }
1276
1277 static int cxgb4_ethtool_flash_fw(struct net_device *netdev,
1278                                   const u8 *data, u32 size)
1279 {
1280         struct adapter *adap = netdev2adap(netdev);
1281         unsigned int mbox = PCIE_FW_MASTER_M + 1;
1282         int ret;
1283
1284         /* If the adapter has been fully initialized then we'll go ahead and
1285          * try to get the firmware's cooperation in upgrading to the new
1286          * firmware image otherwise we'll try to do the entire job from the
1287          * host ... and we always "force" the operation in this path.
1288          */
1289         if (adap->flags & CXGB4_FULL_INIT_DONE)
1290                 mbox = adap->mbox;
1291
1292         ret = t4_fw_upgrade(adap, mbox, data, size, 1);
1293         if (ret)
1294                 dev_err(adap->pdev_dev,
1295                         "Failed to flash firmware\n");
1296
1297         return ret;
1298 }
1299
1300 static int cxgb4_ethtool_flash_region(struct net_device *netdev,
1301                                       const u8 *data, u32 size, u32 region)
1302 {
1303         struct adapter *adap = netdev2adap(netdev);
1304         int ret;
1305
1306         switch (region) {
1307         case CXGB4_ETHTOOL_FLASH_FW:
1308                 ret = cxgb4_ethtool_flash_fw(netdev, data, size);
1309                 break;
1310         case CXGB4_ETHTOOL_FLASH_PHY:
1311                 ret = cxgb4_ethtool_flash_phy(netdev, data, size);
1312                 break;
1313         default:
1314                 ret = -EOPNOTSUPP;
1315                 break;
1316         }
1317
1318         if (!ret)
1319                 dev_info(adap->pdev_dev,
1320                          "loading %s successful, reload cxgb4 driver\n",
1321                          flash_region_strings[region]);
1322         return ret;
1323 }
1324
1325 #define CXGB4_FW_SIG 0x4368656c
1326 #define CXGB4_FW_SIG_OFFSET 0x160
1327
1328 static int cxgb4_validate_fw_image(const u8 *data, u32 *size)
1329 {
1330         struct cxgb4_fw_data *header;
1331
1332         header = (struct cxgb4_fw_data *)&data[CXGB4_FW_SIG_OFFSET];
1333         if (be32_to_cpu(header->signature) != CXGB4_FW_SIG)
1334                 return -EINVAL;
1335
1336         if (size)
1337                 *size = be16_to_cpu(((struct fw_hdr *)data)->len512) * 512;
1338
1339         return 0;
1340 }
1341
1342 static int cxgb4_ethtool_get_flash_region(const u8 *data, u32 *size)
1343 {
1344         if (!cxgb4_validate_fw_image(data, size))
1345                 return CXGB4_ETHTOOL_FLASH_FW;
1346         if (!cxgb4_validate_phy_image(data, size))
1347                 return CXGB4_ETHTOOL_FLASH_PHY;
1348
1349         return -EOPNOTSUPP;
1350 }
1351
1352 static int set_flash(struct net_device *netdev, struct ethtool_flash *ef)
1353 {
1354         struct adapter *adap = netdev2adap(netdev);
1355         const struct firmware *fw;
1356         unsigned int master;
1357         u8 master_vld = 0;
1358         const u8 *fw_data;
1359         size_t fw_size;
1360         u32 size = 0;
1361         u32 pcie_fw;
1362         int region;
1363         int ret;
1364
1365         pcie_fw = t4_read_reg(adap, PCIE_FW_A);
1366         master = PCIE_FW_MASTER_G(pcie_fw);
1367         if (pcie_fw & PCIE_FW_MASTER_VLD_F)
1368                 master_vld = 1;
1369         /* if csiostor is the master return */
1370         if (master_vld && (master != adap->pf)) {
1371                 dev_warn(adap->pdev_dev,
1372                          "cxgb4 driver needs to be loaded as MASTER to support FW flash\n");
1373                 return -EOPNOTSUPP;
1374         }
1375
1376         ef->data[sizeof(ef->data) - 1] = '\0';
1377         ret = request_firmware(&fw, ef->data, adap->pdev_dev);
1378         if (ret < 0)
1379                 return ret;
1380
1381         fw_data = fw->data;
1382         fw_size = fw->size;
1383         if (ef->region == ETHTOOL_FLASH_ALL_REGIONS) {
1384                 while (fw_size > 0) {
1385                         size = 0;
1386                         region = cxgb4_ethtool_get_flash_region(fw_data, &size);
1387                         if (region < 0 || !size) {
1388                                 ret = region;
1389                                 goto out_free_fw;
1390                         }
1391
1392                         ret = cxgb4_ethtool_flash_region(netdev, fw_data, size,
1393                                                          region);
1394                         if (ret)
1395                                 goto out_free_fw;
1396
1397                         fw_data += size;
1398                         fw_size -= size;
1399                 }
1400         } else {
1401                 ret = cxgb4_ethtool_flash_region(netdev, fw_data, fw_size,
1402                                                  ef->region);
1403         }
1404
1405 out_free_fw:
1406         release_firmware(fw);
1407         return ret;
1408 }
1409
1410 static int get_ts_info(struct net_device *dev, struct ethtool_ts_info *ts_info)
1411 {
1412         struct port_info *pi = netdev_priv(dev);
1413         struct  adapter *adapter = pi->adapter;
1414
1415         ts_info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE |
1416                                    SOF_TIMESTAMPING_RX_SOFTWARE |
1417                                    SOF_TIMESTAMPING_SOFTWARE;
1418
1419         ts_info->so_timestamping |= SOF_TIMESTAMPING_RX_HARDWARE |
1420                                     SOF_TIMESTAMPING_TX_HARDWARE |
1421                                     SOF_TIMESTAMPING_RAW_HARDWARE;
1422
1423         ts_info->tx_types = (1 << HWTSTAMP_TX_OFF) |
1424                             (1 << HWTSTAMP_TX_ON);
1425
1426         ts_info->rx_filters = (1 << HWTSTAMP_FILTER_NONE) |
1427                               (1 << HWTSTAMP_FILTER_PTP_V2_L4_EVENT) |
1428                               (1 << HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
1429                               (1 << HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
1430                               (1 << HWTSTAMP_FILTER_PTP_V2_L4_SYNC) |
1431                               (1 << HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ);
1432
1433         if (adapter->ptp_clock)
1434                 ts_info->phc_index = ptp_clock_index(adapter->ptp_clock);
1435         else
1436                 ts_info->phc_index = -1;
1437
1438         return 0;
1439 }
1440
1441 static u32 get_rss_table_size(struct net_device *dev)
1442 {
1443         const struct port_info *pi = netdev_priv(dev);
1444
1445         return pi->rss_size;
1446 }
1447
1448 static int get_rss_table(struct net_device *dev, u32 *p, u8 *key, u8 *hfunc)
1449 {
1450         const struct port_info *pi = netdev_priv(dev);
1451         unsigned int n = pi->rss_size;
1452
1453         if (hfunc)
1454                 *hfunc = ETH_RSS_HASH_TOP;
1455         if (!p)
1456                 return 0;
1457         while (n--)
1458                 p[n] = pi->rss[n];
1459         return 0;
1460 }
1461
1462 static int set_rss_table(struct net_device *dev, const u32 *p, const u8 *key,
1463                          const u8 hfunc)
1464 {
1465         unsigned int i;
1466         struct port_info *pi = netdev_priv(dev);
1467
1468         /* We require at least one supported parameter to be changed and no
1469          * change in any of the unsupported parameters
1470          */
1471         if (key ||
1472             (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP))
1473                 return -EOPNOTSUPP;
1474         if (!p)
1475                 return 0;
1476
1477         /* Interface must be brought up atleast once */
1478         if (pi->adapter->flags & CXGB4_FULL_INIT_DONE) {
1479                 for (i = 0; i < pi->rss_size; i++)
1480                         pi->rss[i] = p[i];
1481
1482                 return cxgb4_write_rss(pi, pi->rss);
1483         }
1484
1485         return -EPERM;
1486 }
1487
1488 static int get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info,
1489                      u32 *rules)
1490 {
1491         const struct port_info *pi = netdev_priv(dev);
1492
1493         switch (info->cmd) {
1494         case ETHTOOL_GRXFH: {
1495                 unsigned int v = pi->rss_mode;
1496
1497                 info->data = 0;
1498                 switch (info->flow_type) {
1499                 case TCP_V4_FLOW:
1500                         if (v & FW_RSS_VI_CONFIG_CMD_IP4FOURTUPEN_F)
1501                                 info->data = RXH_IP_SRC | RXH_IP_DST |
1502                                              RXH_L4_B_0_1 | RXH_L4_B_2_3;
1503                         else if (v & FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN_F)
1504                                 info->data = RXH_IP_SRC | RXH_IP_DST;
1505                         break;
1506                 case UDP_V4_FLOW:
1507                         if ((v & FW_RSS_VI_CONFIG_CMD_IP4FOURTUPEN_F) &&
1508                             (v & FW_RSS_VI_CONFIG_CMD_UDPEN_F))
1509                                 info->data = RXH_IP_SRC | RXH_IP_DST |
1510                                              RXH_L4_B_0_1 | RXH_L4_B_2_3;
1511                         else if (v & FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN_F)
1512                                 info->data = RXH_IP_SRC | RXH_IP_DST;
1513                         break;
1514                 case SCTP_V4_FLOW:
1515                 case AH_ESP_V4_FLOW:
1516                 case IPV4_FLOW:
1517                         if (v & FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN_F)
1518                                 info->data = RXH_IP_SRC | RXH_IP_DST;
1519                         break;
1520                 case TCP_V6_FLOW:
1521                         if (v & FW_RSS_VI_CONFIG_CMD_IP6FOURTUPEN_F)
1522                                 info->data = RXH_IP_SRC | RXH_IP_DST |
1523                                              RXH_L4_B_0_1 | RXH_L4_B_2_3;
1524                         else if (v & FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN_F)
1525                                 info->data = RXH_IP_SRC | RXH_IP_DST;
1526                         break;
1527                 case UDP_V6_FLOW:
1528                         if ((v & FW_RSS_VI_CONFIG_CMD_IP6FOURTUPEN_F) &&
1529                             (v & FW_RSS_VI_CONFIG_CMD_UDPEN_F))
1530                                 info->data = RXH_IP_SRC | RXH_IP_DST |
1531                                              RXH_L4_B_0_1 | RXH_L4_B_2_3;
1532                         else if (v & FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN_F)
1533                                 info->data = RXH_IP_SRC | RXH_IP_DST;
1534                         break;
1535                 case SCTP_V6_FLOW:
1536                 case AH_ESP_V6_FLOW:
1537                 case IPV6_FLOW:
1538                         if (v & FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN_F)
1539                                 info->data = RXH_IP_SRC | RXH_IP_DST;
1540                         break;
1541                 }
1542                 return 0;
1543         }
1544         case ETHTOOL_GRXRINGS:
1545                 info->data = pi->nqsets;
1546                 return 0;
1547         }
1548         return -EOPNOTSUPP;
1549 }
1550
1551 static int set_dump(struct net_device *dev, struct ethtool_dump *eth_dump)
1552 {
1553         struct adapter *adapter = netdev2adap(dev);
1554         u32 len = 0;
1555
1556         len = sizeof(struct cudbg_hdr) +
1557               sizeof(struct cudbg_entity_hdr) * CUDBG_MAX_ENTITY;
1558         len += cxgb4_get_dump_length(adapter, eth_dump->flag);
1559
1560         adapter->eth_dump.flag = eth_dump->flag;
1561         adapter->eth_dump.len = len;
1562         return 0;
1563 }
1564
1565 static int get_dump_flag(struct net_device *dev, struct ethtool_dump *eth_dump)
1566 {
1567         struct adapter *adapter = netdev2adap(dev);
1568
1569         eth_dump->flag = adapter->eth_dump.flag;
1570         eth_dump->len = adapter->eth_dump.len;
1571         eth_dump->version = adapter->eth_dump.version;
1572         return 0;
1573 }
1574
1575 static int get_dump_data(struct net_device *dev, struct ethtool_dump *eth_dump,
1576                          void *buf)
1577 {
1578         struct adapter *adapter = netdev2adap(dev);
1579         u32 len = 0;
1580         int ret = 0;
1581
1582         if (adapter->eth_dump.flag == CXGB4_ETH_DUMP_NONE)
1583                 return -ENOENT;
1584
1585         len = sizeof(struct cudbg_hdr) +
1586               sizeof(struct cudbg_entity_hdr) * CUDBG_MAX_ENTITY;
1587         len += cxgb4_get_dump_length(adapter, adapter->eth_dump.flag);
1588         if (eth_dump->len < len)
1589                 return -ENOMEM;
1590
1591         ret = cxgb4_cudbg_collect(adapter, buf, &len, adapter->eth_dump.flag);
1592         if (ret)
1593                 return ret;
1594
1595         eth_dump->flag = adapter->eth_dump.flag;
1596         eth_dump->len = len;
1597         eth_dump->version = adapter->eth_dump.version;
1598         return 0;
1599 }
1600
1601 static int cxgb4_get_module_info(struct net_device *dev,
1602                                  struct ethtool_modinfo *modinfo)
1603 {
1604         struct port_info *pi = netdev_priv(dev);
1605         u8 sff8472_comp, sff_diag_type, sff_rev;
1606         struct adapter *adapter = pi->adapter;
1607         int ret;
1608
1609         if (!t4_is_inserted_mod_type(pi->mod_type))
1610                 return -EINVAL;
1611
1612         switch (pi->port_type) {
1613         case FW_PORT_TYPE_SFP:
1614         case FW_PORT_TYPE_QSA:
1615         case FW_PORT_TYPE_SFP28:
1616                 ret = t4_i2c_rd(adapter, adapter->mbox, pi->tx_chan,
1617                                 I2C_DEV_ADDR_A0, SFF_8472_COMP_ADDR,
1618                                 SFF_8472_COMP_LEN, &sff8472_comp);
1619                 if (ret)
1620                         return ret;
1621                 ret = t4_i2c_rd(adapter, adapter->mbox, pi->tx_chan,
1622                                 I2C_DEV_ADDR_A0, SFP_DIAG_TYPE_ADDR,
1623                                 SFP_DIAG_TYPE_LEN, &sff_diag_type);
1624                 if (ret)
1625                         return ret;
1626
1627                 if (!sff8472_comp || (sff_diag_type & 4)) {
1628                         modinfo->type = ETH_MODULE_SFF_8079;
1629                         modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN;
1630                 } else {
1631                         modinfo->type = ETH_MODULE_SFF_8472;
1632                         modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
1633                 }
1634                 break;
1635
1636         case FW_PORT_TYPE_QSFP:
1637         case FW_PORT_TYPE_QSFP_10G:
1638         case FW_PORT_TYPE_CR_QSFP:
1639         case FW_PORT_TYPE_CR2_QSFP:
1640         case FW_PORT_TYPE_CR4_QSFP:
1641                 ret = t4_i2c_rd(adapter, adapter->mbox, pi->tx_chan,
1642                                 I2C_DEV_ADDR_A0, SFF_REV_ADDR,
1643                                 SFF_REV_LEN, &sff_rev);
1644                 /* For QSFP type ports, revision value >= 3
1645                  * means the SFP is 8636 compliant.
1646                  */
1647                 if (ret)
1648                         return ret;
1649                 if (sff_rev >= 0x3) {
1650                         modinfo->type = ETH_MODULE_SFF_8636;
1651                         modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
1652                 } else {
1653                         modinfo->type = ETH_MODULE_SFF_8436;
1654                         modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
1655                 }
1656                 break;
1657
1658         default:
1659                 return -EINVAL;
1660         }
1661
1662         return 0;
1663 }
1664
1665 static int cxgb4_get_module_eeprom(struct net_device *dev,
1666                                    struct ethtool_eeprom *eprom, u8 *data)
1667 {
1668         int ret = 0, offset = eprom->offset, len = eprom->len;
1669         struct port_info *pi = netdev_priv(dev);
1670         struct adapter *adapter = pi->adapter;
1671
1672         memset(data, 0, eprom->len);
1673         if (offset + len <= I2C_PAGE_SIZE)
1674                 return t4_i2c_rd(adapter, adapter->mbox, pi->tx_chan,
1675                                  I2C_DEV_ADDR_A0, offset, len, data);
1676
1677         /* offset + len spans 0xa0 and 0xa1 pages */
1678         if (offset <= I2C_PAGE_SIZE) {
1679                 /* read 0xa0 page */
1680                 len = I2C_PAGE_SIZE - offset;
1681                 ret =  t4_i2c_rd(adapter, adapter->mbox, pi->tx_chan,
1682                                  I2C_DEV_ADDR_A0, offset, len, data);
1683                 if (ret)
1684                         return ret;
1685                 offset = I2C_PAGE_SIZE;
1686                 /* Remaining bytes to be read from second page =
1687                  * Total length - bytes read from first page
1688                  */
1689                 len = eprom->len - len;
1690         }
1691         /* Read additional optical diagnostics from page 0xa2 if supported */
1692         return t4_i2c_rd(adapter, adapter->mbox, pi->tx_chan, I2C_DEV_ADDR_A2,
1693                          offset, len, &data[eprom->len - len]);
1694 }
1695
1696 static u32 cxgb4_get_priv_flags(struct net_device *netdev)
1697 {
1698         struct port_info *pi = netdev_priv(netdev);
1699         struct adapter *adapter = pi->adapter;
1700
1701         return (adapter->eth_flags | pi->eth_flags);
1702 }
1703
1704 /**
1705  *      set_flags - set/unset specified flags if passed in new_flags
1706  *      @cur_flags: pointer to current flags
1707  *      @new_flags: new incoming flags
1708  *      @flags: set of flags to set/unset
1709  */
1710 static inline void set_flags(u32 *cur_flags, u32 new_flags, u32 flags)
1711 {
1712         *cur_flags = (*cur_flags & ~flags) | (new_flags & flags);
1713 }
1714
1715 static int cxgb4_set_priv_flags(struct net_device *netdev, u32 flags)
1716 {
1717         struct port_info *pi = netdev_priv(netdev);
1718         struct adapter *adapter = pi->adapter;
1719
1720         set_flags(&adapter->eth_flags, flags, PRIV_FLAGS_ADAP);
1721         set_flags(&pi->eth_flags, flags, PRIV_FLAGS_PORT);
1722
1723         return 0;
1724 }
1725
1726 static const struct ethtool_ops cxgb_ethtool_ops = {
1727         .supported_coalesce_params = ETHTOOL_COALESCE_USECS |
1728                                      ETHTOOL_COALESCE_RX_MAX_FRAMES |
1729                                      ETHTOOL_COALESCE_TX_USECS_IRQ |
1730                                      ETHTOOL_COALESCE_USE_ADAPTIVE_RX,
1731         .get_link_ksettings = get_link_ksettings,
1732         .set_link_ksettings = set_link_ksettings,
1733         .get_fecparam      = get_fecparam,
1734         .set_fecparam      = set_fecparam,
1735         .get_drvinfo       = get_drvinfo,
1736         .get_msglevel      = get_msglevel,
1737         .set_msglevel      = set_msglevel,
1738         .get_ringparam     = get_sge_param,
1739         .set_ringparam     = set_sge_param,
1740         .get_coalesce      = get_coalesce,
1741         .set_coalesce      = set_coalesce,
1742         .get_eeprom_len    = get_eeprom_len,
1743         .get_eeprom        = get_eeprom,
1744         .set_eeprom        = set_eeprom,
1745         .get_pauseparam    = get_pauseparam,
1746         .set_pauseparam    = set_pauseparam,
1747         .get_link          = ethtool_op_get_link,
1748         .get_strings       = get_strings,
1749         .set_phys_id       = identify_port,
1750         .nway_reset        = restart_autoneg,
1751         .get_sset_count    = get_sset_count,
1752         .get_ethtool_stats = get_stats,
1753         .get_regs_len      = get_regs_len,
1754         .get_regs          = get_regs,
1755         .get_rxnfc         = get_rxnfc,
1756         .get_rxfh_indir_size = get_rss_table_size,
1757         .get_rxfh          = get_rss_table,
1758         .set_rxfh          = set_rss_table,
1759         .flash_device      = set_flash,
1760         .get_ts_info       = get_ts_info,
1761         .set_dump          = set_dump,
1762         .get_dump_flag     = get_dump_flag,
1763         .get_dump_data     = get_dump_data,
1764         .get_module_info   = cxgb4_get_module_info,
1765         .get_module_eeprom = cxgb4_get_module_eeprom,
1766         .get_priv_flags    = cxgb4_get_priv_flags,
1767         .set_priv_flags    = cxgb4_set_priv_flags,
1768 };
1769
1770 void cxgb4_set_ethtool_ops(struct net_device *netdev)
1771 {
1772         netdev->ethtool_ops = &cxgb_ethtool_ops;
1773 }