1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2013-2015 Chelsio Communications. All rights reserved.
6 #include <linux/firmware.h>
7 #include <linux/mdio.h>
12 #include "cxgb4_cudbg.h"
14 #define EEPROM_MAGIC 0x38E2F10C
16 static u32 get_msglevel(struct net_device *dev)
18 return netdev2adap(dev)->msg_enable;
21 static void set_msglevel(struct net_device *dev, u32 val)
23 netdev2adap(dev)->msg_enable = val;
26 static const char * const flash_region_strings[] = {
33 static const char stats_strings[][ETH_GSTRING_LEN] = {
36 "tx_broadcast_frames ",
37 "tx_multicast_frames ",
42 "tx_frames_65_to_127 ",
43 "tx_frames_128_to_255 ",
44 "tx_frames_256_to_511 ",
45 "tx_frames_512_to_1023 ",
46 "tx_frames_1024_to_1518 ",
47 "tx_frames_1519_to_max ",
62 "rx_broadcast_frames ",
63 "rx_multicast_frames ",
66 "rx_frames_too_long ",
74 "rx_frames_65_to_127 ",
75 "rx_frames_128_to_255 ",
76 "rx_frames_256_to_511 ",
77 "rx_frames_512_to_1023 ",
78 "rx_frames_1024_to_1518 ",
79 "rx_frames_1519_to_max ",
91 "rx_bg0_frames_dropped ",
92 "rx_bg1_frames_dropped ",
93 "rx_bg2_frames_dropped ",
94 "rx_bg3_frames_dropped ",
95 "rx_bg0_frames_trunc ",
96 "rx_bg1_frames_trunc ",
97 "rx_bg2_frames_trunc ",
98 "rx_bg3_frames_trunc ",
110 static char adapter_stats_strings[][ETH_GSTRING_LEN] = {
114 "write_coal_success ",
116 #ifdef CONFIG_CHELSIO_TLS_DEVICE
117 "tx_tls_encrypted_packets",
118 "tx_tls_encrypted_bytes ",
121 "tx_tls_skip_no_sync_data",
122 "tx_tls_drop_no_sync_data",
123 "tx_tls_drop_bypass_req ",
127 static char loopback_stats_strings[][ETH_GSTRING_LEN] = {
128 "-------Loopback----------- ",
137 "frames_128_to_255 ",
138 "frames_256_to_511 ",
139 "frames_512_to_1023 ",
140 "frames_1024_to_1518 ",
141 "frames_1519_to_max ",
143 "bg0_frames_dropped ",
144 "bg1_frames_dropped ",
145 "bg2_frames_dropped ",
146 "bg3_frames_dropped ",
153 static const char cxgb4_priv_flags_strings[][ETH_GSTRING_LEN] = {
154 [PRIV_FLAG_PORT_TX_VM_BIT] = "port_tx_vm_wr",
157 static int get_sset_count(struct net_device *dev, int sset)
161 return ARRAY_SIZE(stats_strings) +
162 ARRAY_SIZE(adapter_stats_strings) +
163 ARRAY_SIZE(loopback_stats_strings);
164 case ETH_SS_PRIV_FLAGS:
165 return ARRAY_SIZE(cxgb4_priv_flags_strings);
171 static int get_regs_len(struct net_device *dev)
173 struct adapter *adap = netdev2adap(dev);
175 return t4_get_regs_len(adap);
178 static int get_eeprom_len(struct net_device *dev)
183 static void get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
185 struct adapter *adapter = netdev2adap(dev);
188 strlcpy(info->driver, cxgb4_driver_name, sizeof(info->driver));
189 strlcpy(info->bus_info, pci_name(adapter->pdev),
190 sizeof(info->bus_info));
191 info->regdump_len = get_regs_len(dev);
193 if (adapter->params.fw_vers)
194 snprintf(info->fw_version, sizeof(info->fw_version),
195 "%u.%u.%u.%u, TP %u.%u.%u.%u",
196 FW_HDR_FW_VER_MAJOR_G(adapter->params.fw_vers),
197 FW_HDR_FW_VER_MINOR_G(adapter->params.fw_vers),
198 FW_HDR_FW_VER_MICRO_G(adapter->params.fw_vers),
199 FW_HDR_FW_VER_BUILD_G(adapter->params.fw_vers),
200 FW_HDR_FW_VER_MAJOR_G(adapter->params.tp_vers),
201 FW_HDR_FW_VER_MINOR_G(adapter->params.tp_vers),
202 FW_HDR_FW_VER_MICRO_G(adapter->params.tp_vers),
203 FW_HDR_FW_VER_BUILD_G(adapter->params.tp_vers));
205 if (!t4_get_exprom_version(adapter, &exprom_vers))
206 snprintf(info->erom_version, sizeof(info->erom_version),
208 FW_HDR_FW_VER_MAJOR_G(exprom_vers),
209 FW_HDR_FW_VER_MINOR_G(exprom_vers),
210 FW_HDR_FW_VER_MICRO_G(exprom_vers),
211 FW_HDR_FW_VER_BUILD_G(exprom_vers));
212 info->n_priv_flags = ARRAY_SIZE(cxgb4_priv_flags_strings);
215 static void get_strings(struct net_device *dev, u32 stringset, u8 *data)
217 if (stringset == ETH_SS_STATS) {
218 memcpy(data, stats_strings, sizeof(stats_strings));
219 data += sizeof(stats_strings);
220 memcpy(data, adapter_stats_strings,
221 sizeof(adapter_stats_strings));
222 data += sizeof(adapter_stats_strings);
223 memcpy(data, loopback_stats_strings,
224 sizeof(loopback_stats_strings));
225 } else if (stringset == ETH_SS_PRIV_FLAGS) {
226 memcpy(data, cxgb4_priv_flags_strings,
227 sizeof(cxgb4_priv_flags_strings));
231 /* port stats maintained per queue of the port. They should be in the same
232 * order as in stats_strings above.
234 struct queue_port_stats {
245 struct adapter_stats {
251 #ifdef CONFIG_CHELSIO_TLS_DEVICE
252 u64 tx_tls_encrypted_packets;
253 u64 tx_tls_encrypted_bytes;
256 u64 tx_tls_skip_no_sync_data;
257 u64 tx_tls_drop_no_sync_data;
258 u64 tx_tls_drop_bypass_req;
262 static void collect_sge_port_stats(const struct adapter *adap,
263 const struct port_info *p,
264 struct queue_port_stats *s)
266 const struct sge_eth_txq *tx = &adap->sge.ethtxq[p->first_qset];
267 const struct sge_eth_rxq *rx = &adap->sge.ethrxq[p->first_qset];
268 struct sge_eohw_txq *eohw_tx;
271 memset(s, 0, sizeof(*s));
272 for (i = 0; i < p->nqsets; i++, rx++, tx++) {
275 s->tx_csum += tx->tx_cso;
276 s->rx_csum += rx->stats.rx_cso;
277 s->vlan_ex += rx->stats.vlan_ex;
278 s->vlan_ins += tx->vlan_ins;
279 s->gro_pkts += rx->stats.lro_pkts;
280 s->gro_merged += rx->stats.lro_merged;
283 if (adap->sge.eohw_txq) {
284 eohw_tx = &adap->sge.eohw_txq[p->first_qset];
285 for (i = 0; i < p->nqsets; i++, eohw_tx++) {
286 s->tso += eohw_tx->tso;
287 s->uso += eohw_tx->uso;
288 s->tx_csum += eohw_tx->tx_cso;
289 s->vlan_ins += eohw_tx->vlan_ins;
294 static void collect_adapter_stats(struct adapter *adap, struct adapter_stats *s)
298 memset(s, 0, sizeof(*s));
300 s->db_drop = adap->db_stats.db_drop;
301 s->db_full = adap->db_stats.db_full;
302 s->db_empty = adap->db_stats.db_empty;
304 if (!is_t4(adap->params.chip)) {
307 v = t4_read_reg(adap, SGE_STAT_CFG_A);
308 if (STATSOURCE_T5_G(v) == 7) {
309 val2 = t4_read_reg(adap, SGE_STAT_MATCH_A);
310 val1 = t4_read_reg(adap, SGE_STAT_TOTAL_A);
311 s->wc_success = val1 - val2;
317 static void get_stats(struct net_device *dev, struct ethtool_stats *stats,
320 struct port_info *pi = netdev_priv(dev);
321 struct adapter *adapter = pi->adapter;
322 struct lb_port_stats s;
326 t4_get_port_stats_offset(adapter, pi->tx_chan,
327 (struct port_stats *)data,
330 data += sizeof(struct port_stats) / sizeof(u64);
331 collect_sge_port_stats(adapter, pi, (struct queue_port_stats *)data);
332 data += sizeof(struct queue_port_stats) / sizeof(u64);
333 collect_adapter_stats(adapter, (struct adapter_stats *)data);
334 data += sizeof(struct adapter_stats) / sizeof(u64);
336 *data++ = (u64)pi->port_id;
337 memset(&s, 0, sizeof(s));
338 t4_get_lb_stats(adapter, pi->port_id, &s);
341 for (i = 0; i < ARRAY_SIZE(loopback_stats_strings) - 1; i++)
342 *data++ = (unsigned long long)*p0++;
345 static void get_regs(struct net_device *dev, struct ethtool_regs *regs,
348 struct adapter *adap = netdev2adap(dev);
351 buf_size = t4_get_regs_len(adap);
352 regs->version = mk_adap_vers(adap);
353 t4_get_regs(adap, buf, buf_size);
356 static int restart_autoneg(struct net_device *dev)
358 struct port_info *p = netdev_priv(dev);
360 if (!netif_running(dev))
362 if (p->link_cfg.autoneg != AUTONEG_ENABLE)
364 t4_restart_aneg(p->adapter, p->adapter->pf, p->tx_chan);
368 static int identify_port(struct net_device *dev,
369 enum ethtool_phys_id_state state)
372 struct adapter *adap = netdev2adap(dev);
374 if (state == ETHTOOL_ID_ACTIVE)
376 else if (state == ETHTOOL_ID_INACTIVE)
381 return t4_identify_port(adap, adap->pf, netdev2pinfo(dev)->viid, val);
385 * from_fw_port_mod_type - translate Firmware Port/Module type to Ethtool
386 * @port_type: Firmware Port Type
387 * @mod_type: Firmware Module Type
389 * Translate Firmware Port/Module type to Ethtool Port Type.
391 static int from_fw_port_mod_type(enum fw_port_type port_type,
392 enum fw_port_module_type mod_type)
394 if (port_type == FW_PORT_TYPE_BT_SGMII ||
395 port_type == FW_PORT_TYPE_BT_XFI ||
396 port_type == FW_PORT_TYPE_BT_XAUI) {
398 } else if (port_type == FW_PORT_TYPE_FIBER_XFI ||
399 port_type == FW_PORT_TYPE_FIBER_XAUI) {
401 } else if (port_type == FW_PORT_TYPE_SFP ||
402 port_type == FW_PORT_TYPE_QSFP_10G ||
403 port_type == FW_PORT_TYPE_QSA ||
404 port_type == FW_PORT_TYPE_QSFP ||
405 port_type == FW_PORT_TYPE_CR4_QSFP ||
406 port_type == FW_PORT_TYPE_CR_QSFP ||
407 port_type == FW_PORT_TYPE_CR2_QSFP ||
408 port_type == FW_PORT_TYPE_SFP28) {
409 if (mod_type == FW_PORT_MOD_TYPE_LR ||
410 mod_type == FW_PORT_MOD_TYPE_SR ||
411 mod_type == FW_PORT_MOD_TYPE_ER ||
412 mod_type == FW_PORT_MOD_TYPE_LRM)
414 else if (mod_type == FW_PORT_MOD_TYPE_TWINAX_PASSIVE ||
415 mod_type == FW_PORT_MOD_TYPE_TWINAX_ACTIVE)
419 } else if (port_type == FW_PORT_TYPE_KR4_100G ||
420 port_type == FW_PORT_TYPE_KR_SFP28 ||
421 port_type == FW_PORT_TYPE_KR_XLAUI) {
429 * speed_to_fw_caps - translate Port Speed to Firmware Port Capabilities
430 * @speed: speed in Kb/s
432 * Translates a specific Port Speed into a Firmware Port Capabilities
435 static unsigned int speed_to_fw_caps(int speed)
438 return FW_PORT_CAP32_SPEED_100M;
440 return FW_PORT_CAP32_SPEED_1G;
442 return FW_PORT_CAP32_SPEED_10G;
444 return FW_PORT_CAP32_SPEED_25G;
446 return FW_PORT_CAP32_SPEED_40G;
448 return FW_PORT_CAP32_SPEED_50G;
450 return FW_PORT_CAP32_SPEED_100G;
452 return FW_PORT_CAP32_SPEED_200G;
454 return FW_PORT_CAP32_SPEED_400G;
459 * fw_caps_to_lmm - translate Firmware to ethtool Link Mode Mask
460 * @port_type: Firmware Port Type
461 * @fw_caps: Firmware Port Capabilities
462 * @link_mode_mask: ethtool Link Mode Mask
464 * Translate a Firmware Port Capabilities specification to an ethtool
467 static void fw_caps_to_lmm(enum fw_port_type port_type,
468 fw_port_cap32_t fw_caps,
469 unsigned long *link_mode_mask)
471 #define SET_LMM(__lmm_name) \
473 __set_bit(ETHTOOL_LINK_MODE_ ## __lmm_name ## _BIT, \
477 #define FW_CAPS_TO_LMM(__fw_name, __lmm_name) \
479 if (fw_caps & FW_PORT_CAP32_ ## __fw_name) \
480 SET_LMM(__lmm_name); \
484 case FW_PORT_TYPE_BT_SGMII:
485 case FW_PORT_TYPE_BT_XFI:
486 case FW_PORT_TYPE_BT_XAUI:
488 FW_CAPS_TO_LMM(SPEED_100M, 100baseT_Full);
489 FW_CAPS_TO_LMM(SPEED_1G, 1000baseT_Full);
490 FW_CAPS_TO_LMM(SPEED_10G, 10000baseT_Full);
493 case FW_PORT_TYPE_KX4:
494 case FW_PORT_TYPE_KX:
496 FW_CAPS_TO_LMM(SPEED_1G, 1000baseKX_Full);
497 FW_CAPS_TO_LMM(SPEED_10G, 10000baseKX4_Full);
500 case FW_PORT_TYPE_KR:
502 FW_CAPS_TO_LMM(SPEED_10G, 10000baseKR_Full);
505 case FW_PORT_TYPE_BP_AP:
507 FW_CAPS_TO_LMM(SPEED_1G, 1000baseKX_Full);
508 FW_CAPS_TO_LMM(SPEED_10G, 10000baseR_FEC);
509 FW_CAPS_TO_LMM(SPEED_10G, 10000baseKR_Full);
512 case FW_PORT_TYPE_BP4_AP:
514 FW_CAPS_TO_LMM(SPEED_1G, 1000baseKX_Full);
515 FW_CAPS_TO_LMM(SPEED_10G, 10000baseR_FEC);
516 FW_CAPS_TO_LMM(SPEED_10G, 10000baseKR_Full);
517 FW_CAPS_TO_LMM(SPEED_10G, 10000baseKX4_Full);
520 case FW_PORT_TYPE_FIBER_XFI:
521 case FW_PORT_TYPE_FIBER_XAUI:
522 case FW_PORT_TYPE_SFP:
523 case FW_PORT_TYPE_QSFP_10G:
524 case FW_PORT_TYPE_QSA:
526 FW_CAPS_TO_LMM(SPEED_1G, 1000baseT_Full);
527 FW_CAPS_TO_LMM(SPEED_10G, 10000baseT_Full);
530 case FW_PORT_TYPE_BP40_BA:
531 case FW_PORT_TYPE_QSFP:
533 FW_CAPS_TO_LMM(SPEED_1G, 1000baseT_Full);
534 FW_CAPS_TO_LMM(SPEED_10G, 10000baseT_Full);
535 FW_CAPS_TO_LMM(SPEED_40G, 40000baseSR4_Full);
538 case FW_PORT_TYPE_CR_QSFP:
539 case FW_PORT_TYPE_SFP28:
541 FW_CAPS_TO_LMM(SPEED_1G, 1000baseT_Full);
542 FW_CAPS_TO_LMM(SPEED_10G, 10000baseT_Full);
543 FW_CAPS_TO_LMM(SPEED_25G, 25000baseCR_Full);
546 case FW_PORT_TYPE_KR_SFP28:
548 FW_CAPS_TO_LMM(SPEED_1G, 1000baseT_Full);
549 FW_CAPS_TO_LMM(SPEED_10G, 10000baseKR_Full);
550 FW_CAPS_TO_LMM(SPEED_25G, 25000baseKR_Full);
553 case FW_PORT_TYPE_KR_XLAUI:
555 FW_CAPS_TO_LMM(SPEED_1G, 1000baseKX_Full);
556 FW_CAPS_TO_LMM(SPEED_10G, 10000baseKR_Full);
557 FW_CAPS_TO_LMM(SPEED_40G, 40000baseKR4_Full);
560 case FW_PORT_TYPE_CR2_QSFP:
562 FW_CAPS_TO_LMM(SPEED_50G, 50000baseSR2_Full);
565 case FW_PORT_TYPE_KR4_100G:
566 case FW_PORT_TYPE_CR4_QSFP:
568 FW_CAPS_TO_LMM(SPEED_1G, 1000baseT_Full);
569 FW_CAPS_TO_LMM(SPEED_10G, 10000baseKR_Full);
570 FW_CAPS_TO_LMM(SPEED_40G, 40000baseSR4_Full);
571 FW_CAPS_TO_LMM(SPEED_25G, 25000baseCR_Full);
572 FW_CAPS_TO_LMM(SPEED_50G, 50000baseCR2_Full);
573 FW_CAPS_TO_LMM(SPEED_100G, 100000baseCR4_Full);
580 if (fw_caps & FW_PORT_CAP32_FEC_V(FW_PORT_CAP32_FEC_M)) {
581 FW_CAPS_TO_LMM(FEC_RS, FEC_RS);
582 FW_CAPS_TO_LMM(FEC_BASER_RS, FEC_BASER);
587 FW_CAPS_TO_LMM(ANEG, Autoneg);
588 FW_CAPS_TO_LMM(802_3_PAUSE, Pause);
589 FW_CAPS_TO_LMM(802_3_ASM_DIR, Asym_Pause);
591 #undef FW_CAPS_TO_LMM
596 * lmm_to_fw_caps - translate ethtool Link Mode Mask to Firmware
598 * @et_lmm: ethtool Link Mode Mask
600 * Translate ethtool Link Mode Mask into a Firmware Port capabilities
603 static unsigned int lmm_to_fw_caps(const unsigned long *link_mode_mask)
605 unsigned int fw_caps = 0;
607 #define LMM_TO_FW_CAPS(__lmm_name, __fw_name) \
609 if (test_bit(ETHTOOL_LINK_MODE_ ## __lmm_name ## _BIT, \
611 fw_caps |= FW_PORT_CAP32_ ## __fw_name; \
614 LMM_TO_FW_CAPS(100baseT_Full, SPEED_100M);
615 LMM_TO_FW_CAPS(1000baseT_Full, SPEED_1G);
616 LMM_TO_FW_CAPS(10000baseT_Full, SPEED_10G);
617 LMM_TO_FW_CAPS(40000baseSR4_Full, SPEED_40G);
618 LMM_TO_FW_CAPS(25000baseCR_Full, SPEED_25G);
619 LMM_TO_FW_CAPS(50000baseCR2_Full, SPEED_50G);
620 LMM_TO_FW_CAPS(100000baseCR4_Full, SPEED_100G);
622 #undef LMM_TO_FW_CAPS
627 static int get_link_ksettings(struct net_device *dev,
628 struct ethtool_link_ksettings *link_ksettings)
630 struct port_info *pi = netdev_priv(dev);
631 struct ethtool_link_settings *base = &link_ksettings->base;
633 /* For the nonce, the Firmware doesn't send up Port State changes
634 * when the Virtual Interface attached to the Port is down. So
635 * if it's down, let's grab any changes.
637 if (!netif_running(dev))
638 (void)t4_update_port_info(pi);
640 ethtool_link_ksettings_zero_link_mode(link_ksettings, supported);
641 ethtool_link_ksettings_zero_link_mode(link_ksettings, advertising);
642 ethtool_link_ksettings_zero_link_mode(link_ksettings, lp_advertising);
644 base->port = from_fw_port_mod_type(pi->port_type, pi->mod_type);
646 if (pi->mdio_addr >= 0) {
647 base->phy_address = pi->mdio_addr;
648 base->mdio_support = (pi->port_type == FW_PORT_TYPE_BT_SGMII
649 ? ETH_MDIO_SUPPORTS_C22
650 : ETH_MDIO_SUPPORTS_C45);
652 base->phy_address = 255;
653 base->mdio_support = 0;
656 fw_caps_to_lmm(pi->port_type, pi->link_cfg.pcaps,
657 link_ksettings->link_modes.supported);
658 fw_caps_to_lmm(pi->port_type,
659 t4_link_acaps(pi->adapter,
662 link_ksettings->link_modes.advertising);
663 fw_caps_to_lmm(pi->port_type, pi->link_cfg.lpacaps,
664 link_ksettings->link_modes.lp_advertising);
666 base->speed = (netif_carrier_ok(dev)
669 base->duplex = DUPLEX_FULL;
671 base->autoneg = pi->link_cfg.autoneg;
672 if (pi->link_cfg.pcaps & FW_PORT_CAP32_ANEG)
673 ethtool_link_ksettings_add_link_mode(link_ksettings,
675 if (pi->link_cfg.autoneg)
676 ethtool_link_ksettings_add_link_mode(link_ksettings,
677 advertising, Autoneg);
682 static int set_link_ksettings(struct net_device *dev,
683 const struct ethtool_link_ksettings *link_ksettings)
685 struct port_info *pi = netdev_priv(dev);
686 struct link_config *lc = &pi->link_cfg;
687 const struct ethtool_link_settings *base = &link_ksettings->base;
688 struct link_config old_lc;
689 unsigned int fw_caps;
692 /* only full-duplex supported */
693 if (base->duplex != DUPLEX_FULL)
697 if (!(lc->pcaps & FW_PORT_CAP32_ANEG) ||
698 base->autoneg == AUTONEG_DISABLE) {
699 fw_caps = speed_to_fw_caps(base->speed);
701 /* Speed must be supported by Physical Port Capabilities. */
702 if (!(lc->pcaps & fw_caps))
705 lc->speed_caps = fw_caps;
709 lmm_to_fw_caps(link_ksettings->link_modes.advertising);
710 if (!(lc->pcaps & fw_caps))
713 lc->acaps = fw_caps | FW_PORT_CAP32_ANEG;
715 lc->autoneg = base->autoneg;
717 /* If the firmware rejects the Link Configuration request, back out
718 * the changes and report the error.
720 ret = t4_link_l1cfg(pi->adapter, pi->adapter->mbox, pi->tx_chan, lc);
727 /* Translate the Firmware FEC value into the ethtool value. */
728 static inline unsigned int fwcap_to_eth_fec(unsigned int fw_fec)
730 unsigned int eth_fec = 0;
732 if (fw_fec & FW_PORT_CAP32_FEC_RS)
733 eth_fec |= ETHTOOL_FEC_RS;
734 if (fw_fec & FW_PORT_CAP32_FEC_BASER_RS)
735 eth_fec |= ETHTOOL_FEC_BASER;
737 /* if nothing is set, then FEC is off */
739 eth_fec = ETHTOOL_FEC_OFF;
744 /* Translate Common Code FEC value into ethtool value. */
745 static inline unsigned int cc_to_eth_fec(unsigned int cc_fec)
747 unsigned int eth_fec = 0;
749 if (cc_fec & FEC_AUTO)
750 eth_fec |= ETHTOOL_FEC_AUTO;
752 eth_fec |= ETHTOOL_FEC_RS;
753 if (cc_fec & FEC_BASER_RS)
754 eth_fec |= ETHTOOL_FEC_BASER;
756 /* if nothing is set, then FEC is off */
758 eth_fec = ETHTOOL_FEC_OFF;
763 /* Translate ethtool FEC value into Common Code value. */
764 static inline unsigned int eth_to_cc_fec(unsigned int eth_fec)
766 unsigned int cc_fec = 0;
768 if (eth_fec & ETHTOOL_FEC_OFF)
771 if (eth_fec & ETHTOOL_FEC_AUTO)
773 if (eth_fec & ETHTOOL_FEC_RS)
775 if (eth_fec & ETHTOOL_FEC_BASER)
776 cc_fec |= FEC_BASER_RS;
781 static int get_fecparam(struct net_device *dev, struct ethtool_fecparam *fec)
783 const struct port_info *pi = netdev_priv(dev);
784 const struct link_config *lc = &pi->link_cfg;
786 /* Translate the Firmware FEC Support into the ethtool value. We
787 * always support IEEE 802.3 "automatic" selection of Link FEC type if
788 * any FEC is supported.
790 fec->fec = fwcap_to_eth_fec(lc->pcaps);
791 if (fec->fec != ETHTOOL_FEC_OFF)
792 fec->fec |= ETHTOOL_FEC_AUTO;
794 /* Translate the current internal FEC parameters into the
797 fec->active_fec = cc_to_eth_fec(lc->fec);
802 static int set_fecparam(struct net_device *dev, struct ethtool_fecparam *fec)
804 struct port_info *pi = netdev_priv(dev);
805 struct link_config *lc = &pi->link_cfg;
806 struct link_config old_lc;
809 /* Save old Link Configuration in case the L1 Configure below
814 /* Try to perform the L1 Configure and return the result of that
815 * effort. If it fails, revert the attempted change.
817 lc->requested_fec = eth_to_cc_fec(fec->fec);
818 ret = t4_link_l1cfg(pi->adapter, pi->adapter->mbox,
825 static void get_pauseparam(struct net_device *dev,
826 struct ethtool_pauseparam *epause)
828 struct port_info *p = netdev_priv(dev);
830 epause->autoneg = (p->link_cfg.requested_fc & PAUSE_AUTONEG) != 0;
831 epause->rx_pause = (p->link_cfg.advertised_fc & PAUSE_RX) != 0;
832 epause->tx_pause = (p->link_cfg.advertised_fc & PAUSE_TX) != 0;
835 static int set_pauseparam(struct net_device *dev,
836 struct ethtool_pauseparam *epause)
838 struct port_info *p = netdev_priv(dev);
839 struct link_config *lc = &p->link_cfg;
841 if (epause->autoneg == AUTONEG_DISABLE)
842 lc->requested_fc = 0;
843 else if (lc->pcaps & FW_PORT_CAP32_ANEG)
844 lc->requested_fc = PAUSE_AUTONEG;
848 if (epause->rx_pause)
849 lc->requested_fc |= PAUSE_RX;
850 if (epause->tx_pause)
851 lc->requested_fc |= PAUSE_TX;
852 if (netif_running(dev))
853 return t4_link_l1cfg(p->adapter, p->adapter->mbox, p->tx_chan,
858 static void get_sge_param(struct net_device *dev, struct ethtool_ringparam *e)
860 const struct port_info *pi = netdev_priv(dev);
861 const struct sge *s = &pi->adapter->sge;
863 e->rx_max_pending = MAX_RX_BUFFERS;
864 e->rx_mini_max_pending = MAX_RSPQ_ENTRIES;
865 e->rx_jumbo_max_pending = 0;
866 e->tx_max_pending = MAX_TXQ_ENTRIES;
868 e->rx_pending = s->ethrxq[pi->first_qset].fl.size - 8;
869 e->rx_mini_pending = s->ethrxq[pi->first_qset].rspq.size;
870 e->rx_jumbo_pending = 0;
871 e->tx_pending = s->ethtxq[pi->first_qset].q.size;
874 static int set_sge_param(struct net_device *dev, struct ethtool_ringparam *e)
877 const struct port_info *pi = netdev_priv(dev);
878 struct adapter *adapter = pi->adapter;
879 struct sge *s = &adapter->sge;
881 if (e->rx_pending > MAX_RX_BUFFERS || e->rx_jumbo_pending ||
882 e->tx_pending > MAX_TXQ_ENTRIES ||
883 e->rx_mini_pending > MAX_RSPQ_ENTRIES ||
884 e->rx_mini_pending < MIN_RSPQ_ENTRIES ||
885 e->rx_pending < MIN_FL_ENTRIES || e->tx_pending < MIN_TXQ_ENTRIES)
888 if (adapter->flags & CXGB4_FULL_INIT_DONE)
891 for (i = 0; i < pi->nqsets; ++i) {
892 s->ethtxq[pi->first_qset + i].q.size = e->tx_pending;
893 s->ethrxq[pi->first_qset + i].fl.size = e->rx_pending + 8;
894 s->ethrxq[pi->first_qset + i].rspq.size = e->rx_mini_pending;
900 * set_rx_intr_params - set a net devices's RX interrupt holdoff paramete!
901 * @dev: the network device
902 * @us: the hold-off time in us, or 0 to disable timer
903 * @cnt: the hold-off packet count, or 0 to disable counter
905 * Set the RX interrupt hold-off parameters for a network device.
907 static int set_rx_intr_params(struct net_device *dev,
908 unsigned int us, unsigned int cnt)
911 struct port_info *pi = netdev_priv(dev);
912 struct adapter *adap = pi->adapter;
913 struct sge_eth_rxq *q = &adap->sge.ethrxq[pi->first_qset];
915 for (i = 0; i < pi->nqsets; i++, q++) {
916 err = cxgb4_set_rspq_intr_params(&q->rspq, us, cnt);
923 static int set_adaptive_rx_setting(struct net_device *dev, int adaptive_rx)
926 struct port_info *pi = netdev_priv(dev);
927 struct adapter *adap = pi->adapter;
928 struct sge_eth_rxq *q = &adap->sge.ethrxq[pi->first_qset];
930 for (i = 0; i < pi->nqsets; i++, q++)
931 q->rspq.adaptive_rx = adaptive_rx;
936 static int get_adaptive_rx_setting(struct net_device *dev)
938 struct port_info *pi = netdev_priv(dev);
939 struct adapter *adap = pi->adapter;
940 struct sge_eth_rxq *q = &adap->sge.ethrxq[pi->first_qset];
942 return q->rspq.adaptive_rx;
945 /* Return the current global Adapter SGE Doorbell Queue Timer Tick for all
946 * Ethernet TX Queues.
948 static int get_dbqtimer_tick(struct net_device *dev)
950 struct port_info *pi = netdev_priv(dev);
951 struct adapter *adap = pi->adapter;
953 if (!(adap->flags & CXGB4_SGE_DBQ_TIMER))
956 return adap->sge.dbqtimer_tick;
959 /* Return the SGE Doorbell Queue Timer Value for the Ethernet TX Queues
960 * associated with a Network Device.
962 static int get_dbqtimer(struct net_device *dev)
964 struct port_info *pi = netdev_priv(dev);
965 struct adapter *adap = pi->adapter;
966 struct sge_eth_txq *txq;
968 txq = &adap->sge.ethtxq[pi->first_qset];
970 if (!(adap->flags & CXGB4_SGE_DBQ_TIMER))
973 /* all of the TX Queues use the same Timer Index */
974 return adap->sge.dbqtimer_val[txq->dbqtimerix];
977 /* Set the global Adapter SGE Doorbell Queue Timer Tick for all Ethernet TX
978 * Queues. This is the fundamental "Tick" that sets the scale of values which
979 * can be used. Individual Ethernet TX Queues index into a relatively small
980 * array of Tick Multipliers. Changing the base Tick will thus change all of
981 * the resulting Timer Values associated with those multipliers for all
982 * Ethernet TX Queues.
984 static int set_dbqtimer_tick(struct net_device *dev, int usecs)
986 struct port_info *pi = netdev_priv(dev);
987 struct adapter *adap = pi->adapter;
988 struct sge *s = &adap->sge;
992 if (!(adap->flags & CXGB4_SGE_DBQ_TIMER))
995 /* return early if it's the same Timer Tick we're already using */
996 if (s->dbqtimer_tick == usecs)
999 /* attempt to set the new Timer Tick value */
1000 param = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) |
1001 FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_DBQ_TIMERTICK));
1003 ret = t4_set_params(adap, adap->mbox, adap->pf, 0, 1, ¶m, &val);
1006 s->dbqtimer_tick = usecs;
1008 /* if successful, reread resulting dependent Timer values */
1009 ret = t4_read_sge_dbqtimers(adap, ARRAY_SIZE(s->dbqtimer_val),
1014 /* Set the SGE Doorbell Queue Timer Value for the Ethernet TX Queues
1015 * associated with a Network Device. There is a relatively small array of
1016 * possible Timer Values so we need to pick the closest value available.
1018 static int set_dbqtimer(struct net_device *dev, int usecs)
1020 int qix, timerix, min_timerix, delta, min_delta;
1021 struct port_info *pi = netdev_priv(dev);
1022 struct adapter *adap = pi->adapter;
1023 struct sge *s = &adap->sge;
1024 struct sge_eth_txq *txq;
1028 if (!(adap->flags & CXGB4_SGE_DBQ_TIMER))
1031 /* Find the SGE Doorbell Timer Value that's closest to the requested
1034 min_delta = INT_MAX;
1036 for (timerix = 0; timerix < ARRAY_SIZE(s->dbqtimer_val); timerix++) {
1037 delta = s->dbqtimer_val[timerix] - usecs;
1040 if (delta < min_delta) {
1042 min_timerix = timerix;
1046 /* Return early if it's the same Timer Index we're already using.
1047 * We use the same Timer Index for all of the TX Queues for an
1048 * interface so it's only necessary to check the first one.
1050 txq = &s->ethtxq[pi->first_qset];
1051 if (txq->dbqtimerix == min_timerix)
1054 for (qix = 0; qix < pi->nqsets; qix++, txq++) {
1055 if (adap->flags & CXGB4_FULL_INIT_DONE) {
1057 (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DMAQ) |
1058 FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DMAQ_EQ_TIMERIX) |
1059 FW_PARAMS_PARAM_YZ_V(txq->q.cntxt_id));
1061 ret = t4_set_params(adap, adap->mbox, adap->pf, 0,
1066 txq->dbqtimerix = min_timerix;
1071 /* Set the global Adapter SGE Doorbell Queue Timer Tick for all Ethernet TX
1072 * Queues and the Timer Value for the Ethernet TX Queues associated with a
1073 * Network Device. Since changing the global Tick changes all of the
1074 * available Timer Values, we need to do this first before selecting the
1075 * resulting closest Timer Value. Moreover, since the Tick is global,
1076 * changing it affects the Timer Values for all Network Devices on the
1077 * adapter. So, before changing the Tick, we grab all of the current Timer
1078 * Values for other Network Devices on this Adapter and then attempt to select
1079 * new Timer Values which are close to the old values ...
1081 static int set_dbqtimer_tickval(struct net_device *dev,
1082 int tick_usecs, int timer_usecs)
1084 struct port_info *pi = netdev_priv(dev);
1085 struct adapter *adap = pi->adapter;
1086 int timer[MAX_NPORTS];
1090 /* Grab the other adapter Network Interface current timers and fill in
1091 * the new one for this Network Interface.
1093 for_each_port(adap, port)
1094 if (port == pi->port_id)
1095 timer[port] = timer_usecs;
1097 timer[port] = get_dbqtimer(adap->port[port]);
1099 /* Change the global Tick first ... */
1100 ret = set_dbqtimer_tick(dev, tick_usecs);
1104 /* ... and then set all of the Network Interface Timer Values ... */
1105 for_each_port(adap, port) {
1106 ret = set_dbqtimer(adap->port[port], timer[port]);
1114 static int set_coalesce(struct net_device *dev,
1115 struct ethtool_coalesce *coalesce)
1119 set_adaptive_rx_setting(dev, coalesce->use_adaptive_rx_coalesce);
1121 ret = set_rx_intr_params(dev, coalesce->rx_coalesce_usecs,
1122 coalesce->rx_max_coalesced_frames);
1126 return set_dbqtimer_tickval(dev,
1127 coalesce->tx_coalesce_usecs_irq,
1128 coalesce->tx_coalesce_usecs);
1131 static int get_coalesce(struct net_device *dev, struct ethtool_coalesce *c)
1133 const struct port_info *pi = netdev_priv(dev);
1134 const struct adapter *adap = pi->adapter;
1135 const struct sge_rspq *rq = &adap->sge.ethrxq[pi->first_qset].rspq;
1137 c->rx_coalesce_usecs = qtimer_val(adap, rq);
1138 c->rx_max_coalesced_frames = (rq->intr_params & QINTR_CNT_EN_F) ?
1139 adap->sge.counter_val[rq->pktcnt_idx] : 0;
1140 c->use_adaptive_rx_coalesce = get_adaptive_rx_setting(dev);
1141 c->tx_coalesce_usecs_irq = get_dbqtimer_tick(dev);
1142 c->tx_coalesce_usecs = get_dbqtimer(dev);
1146 /* The next two routines implement eeprom read/write from physical addresses.
1148 static int eeprom_rd_phys(struct adapter *adap, unsigned int phys_addr, u32 *v)
1150 int vaddr = t4_eeprom_ptov(phys_addr, adap->pf, EEPROMPFSIZE);
1153 vaddr = pci_read_vpd(adap->pdev, vaddr, sizeof(u32), v);
1154 return vaddr < 0 ? vaddr : 0;
1157 static int eeprom_wr_phys(struct adapter *adap, unsigned int phys_addr, u32 v)
1159 int vaddr = t4_eeprom_ptov(phys_addr, adap->pf, EEPROMPFSIZE);
1162 vaddr = pci_write_vpd(adap->pdev, vaddr, sizeof(u32), &v);
1163 return vaddr < 0 ? vaddr : 0;
1166 #define EEPROM_MAGIC 0x38E2F10C
1168 static int get_eeprom(struct net_device *dev, struct ethtool_eeprom *e,
1172 struct adapter *adapter = netdev2adap(dev);
1173 u8 *buf = kvzalloc(EEPROMSIZE, GFP_KERNEL);
1178 e->magic = EEPROM_MAGIC;
1179 for (i = e->offset & ~3; !err && i < e->offset + e->len; i += 4)
1180 err = eeprom_rd_phys(adapter, i, (u32 *)&buf[i]);
1183 memcpy(data, buf + e->offset, e->len);
1188 static int set_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom,
1193 u32 aligned_offset, aligned_len, *p;
1194 struct adapter *adapter = netdev2adap(dev);
1196 if (eeprom->magic != EEPROM_MAGIC)
1199 aligned_offset = eeprom->offset & ~3;
1200 aligned_len = (eeprom->len + (eeprom->offset & 3) + 3) & ~3;
1202 if (adapter->pf > 0) {
1203 u32 start = 1024 + adapter->pf * EEPROMPFSIZE;
1205 if (aligned_offset < start ||
1206 aligned_offset + aligned_len > start + EEPROMPFSIZE)
1210 if (aligned_offset != eeprom->offset || aligned_len != eeprom->len) {
1211 /* RMW possibly needed for first or last words.
1213 buf = kvzalloc(aligned_len, GFP_KERNEL);
1216 err = eeprom_rd_phys(adapter, aligned_offset, (u32 *)buf);
1217 if (!err && aligned_len > 4)
1218 err = eeprom_rd_phys(adapter,
1219 aligned_offset + aligned_len - 4,
1220 (u32 *)&buf[aligned_len - 4]);
1223 memcpy(buf + (eeprom->offset & 3), data, eeprom->len);
1228 err = t4_seeprom_wp(adapter, false);
1232 for (p = (u32 *)buf; !err && aligned_len; aligned_len -= 4, p++) {
1233 err = eeprom_wr_phys(adapter, aligned_offset, *p);
1234 aligned_offset += 4;
1238 err = t4_seeprom_wp(adapter, true);
1245 static int cxgb4_ethtool_flash_boot(struct net_device *netdev,
1246 const u8 *bdata, u32 size)
1248 struct adapter *adap = netdev2adap(netdev);
1249 unsigned int offset;
1253 data = kmemdup(bdata, size, GFP_KERNEL);
1257 offset = OFFSET_G(t4_read_reg(adap, PF_REG(0, PCIE_PF_EXPROM_OFST_A)));
1259 ret = t4_load_boot(adap, data, offset, size);
1261 dev_err(adap->pdev_dev, "Failed to load boot image\n");
1267 #define CXGB4_PHY_SIG 0x130000ea
1269 static int cxgb4_validate_phy_image(const u8 *data, u32 *size)
1271 struct cxgb4_fw_data *header;
1273 header = (struct cxgb4_fw_data *)data;
1274 if (be32_to_cpu(header->signature) != CXGB4_PHY_SIG)
1280 static int cxgb4_ethtool_flash_phy(struct net_device *netdev,
1281 const u8 *data, u32 size)
1283 struct adapter *adap = netdev2adap(netdev);
1286 ret = cxgb4_validate_phy_image(data, NULL);
1288 dev_err(adap->pdev_dev, "PHY signature mismatch\n");
1292 ret = t4_load_phy_fw(adap, MEMWIN_NIC, &adap->win0_lock,
1295 dev_err(adap->pdev_dev, "Failed to load PHY FW\n");
1300 static int cxgb4_ethtool_flash_fw(struct net_device *netdev,
1301 const u8 *data, u32 size)
1303 struct adapter *adap = netdev2adap(netdev);
1304 unsigned int mbox = PCIE_FW_MASTER_M + 1;
1307 /* If the adapter has been fully initialized then we'll go ahead and
1308 * try to get the firmware's cooperation in upgrading to the new
1309 * firmware image otherwise we'll try to do the entire job from the
1310 * host ... and we always "force" the operation in this path.
1312 if (adap->flags & CXGB4_FULL_INIT_DONE)
1315 ret = t4_fw_upgrade(adap, mbox, data, size, 1);
1317 dev_err(adap->pdev_dev,
1318 "Failed to flash firmware\n");
1323 static int cxgb4_ethtool_flash_region(struct net_device *netdev,
1324 const u8 *data, u32 size, u32 region)
1326 struct adapter *adap = netdev2adap(netdev);
1330 case CXGB4_ETHTOOL_FLASH_FW:
1331 ret = cxgb4_ethtool_flash_fw(netdev, data, size);
1333 case CXGB4_ETHTOOL_FLASH_PHY:
1334 ret = cxgb4_ethtool_flash_phy(netdev, data, size);
1336 case CXGB4_ETHTOOL_FLASH_BOOT:
1337 ret = cxgb4_ethtool_flash_boot(netdev, data, size);
1345 dev_info(adap->pdev_dev,
1346 "loading %s successful, reload cxgb4 driver\n",
1347 flash_region_strings[region]);
1351 #define CXGB4_FW_SIG 0x4368656c
1352 #define CXGB4_FW_SIG_OFFSET 0x160
1354 static int cxgb4_validate_fw_image(const u8 *data, u32 *size)
1356 struct cxgb4_fw_data *header;
1358 header = (struct cxgb4_fw_data *)&data[CXGB4_FW_SIG_OFFSET];
1359 if (be32_to_cpu(header->signature) != CXGB4_FW_SIG)
1363 *size = be16_to_cpu(((struct fw_hdr *)data)->len512) * 512;
1368 static int cxgb4_validate_boot_image(const u8 *data, u32 *size)
1370 struct cxgb4_pci_exp_rom_header *exp_header;
1371 struct cxgb4_pcir_data *pcir_header;
1372 struct legacy_pci_rom_hdr *header;
1373 const u8 *cur_header = data;
1376 exp_header = (struct cxgb4_pci_exp_rom_header *)data;
1378 if (le16_to_cpu(exp_header->signature) != BOOT_SIGNATURE)
1383 header = (struct legacy_pci_rom_hdr *)cur_header;
1384 pcir_offset = le16_to_cpu(header->pcir_offset);
1385 pcir_header = (struct cxgb4_pcir_data *)(cur_header +
1388 *size += header->size512 * 512;
1389 cur_header += header->size512 * 512;
1390 } while (!(pcir_header->indicator & CXGB4_HDR_INDI));
1396 static int cxgb4_ethtool_get_flash_region(const u8 *data, u32 *size)
1398 if (!cxgb4_validate_fw_image(data, size))
1399 return CXGB4_ETHTOOL_FLASH_FW;
1400 if (!cxgb4_validate_boot_image(data, size))
1401 return CXGB4_ETHTOOL_FLASH_BOOT;
1402 if (!cxgb4_validate_phy_image(data, size))
1403 return CXGB4_ETHTOOL_FLASH_PHY;
1408 static int set_flash(struct net_device *netdev, struct ethtool_flash *ef)
1410 struct adapter *adap = netdev2adap(netdev);
1411 const struct firmware *fw;
1412 unsigned int master;
1421 pcie_fw = t4_read_reg(adap, PCIE_FW_A);
1422 master = PCIE_FW_MASTER_G(pcie_fw);
1423 if (pcie_fw & PCIE_FW_MASTER_VLD_F)
1425 /* if csiostor is the master return */
1426 if (master_vld && (master != adap->pf)) {
1427 dev_warn(adap->pdev_dev,
1428 "cxgb4 driver needs to be loaded as MASTER to support FW flash\n");
1432 ef->data[sizeof(ef->data) - 1] = '\0';
1433 ret = request_firmware(&fw, ef->data, adap->pdev_dev);
1439 if (ef->region == ETHTOOL_FLASH_ALL_REGIONS) {
1440 while (fw_size > 0) {
1442 region = cxgb4_ethtool_get_flash_region(fw_data, &size);
1443 if (region < 0 || !size) {
1448 ret = cxgb4_ethtool_flash_region(netdev, fw_data, size,
1457 ret = cxgb4_ethtool_flash_region(netdev, fw_data, fw_size,
1462 release_firmware(fw);
1466 static int get_ts_info(struct net_device *dev, struct ethtool_ts_info *ts_info)
1468 struct port_info *pi = netdev_priv(dev);
1469 struct adapter *adapter = pi->adapter;
1471 ts_info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE |
1472 SOF_TIMESTAMPING_RX_SOFTWARE |
1473 SOF_TIMESTAMPING_SOFTWARE;
1475 ts_info->so_timestamping |= SOF_TIMESTAMPING_RX_HARDWARE |
1476 SOF_TIMESTAMPING_TX_HARDWARE |
1477 SOF_TIMESTAMPING_RAW_HARDWARE;
1479 ts_info->tx_types = (1 << HWTSTAMP_TX_OFF) |
1480 (1 << HWTSTAMP_TX_ON);
1482 ts_info->rx_filters = (1 << HWTSTAMP_FILTER_NONE) |
1483 (1 << HWTSTAMP_FILTER_PTP_V2_L4_EVENT) |
1484 (1 << HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
1485 (1 << HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
1486 (1 << HWTSTAMP_FILTER_PTP_V2_L4_SYNC) |
1487 (1 << HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ);
1489 if (adapter->ptp_clock)
1490 ts_info->phc_index = ptp_clock_index(adapter->ptp_clock);
1492 ts_info->phc_index = -1;
1497 static u32 get_rss_table_size(struct net_device *dev)
1499 const struct port_info *pi = netdev_priv(dev);
1501 return pi->rss_size;
1504 static int get_rss_table(struct net_device *dev, u32 *p, u8 *key, u8 *hfunc)
1506 const struct port_info *pi = netdev_priv(dev);
1507 unsigned int n = pi->rss_size;
1510 *hfunc = ETH_RSS_HASH_TOP;
1518 static int set_rss_table(struct net_device *dev, const u32 *p, const u8 *key,
1522 struct port_info *pi = netdev_priv(dev);
1524 /* We require at least one supported parameter to be changed and no
1525 * change in any of the unsupported parameters
1528 (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP))
1533 /* Interface must be brought up atleast once */
1534 if (pi->adapter->flags & CXGB4_FULL_INIT_DONE) {
1535 for (i = 0; i < pi->rss_size; i++)
1538 return cxgb4_write_rss(pi, pi->rss);
1544 static int get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info,
1547 const struct port_info *pi = netdev_priv(dev);
1549 switch (info->cmd) {
1550 case ETHTOOL_GRXFH: {
1551 unsigned int v = pi->rss_mode;
1554 switch (info->flow_type) {
1556 if (v & FW_RSS_VI_CONFIG_CMD_IP4FOURTUPEN_F)
1557 info->data = RXH_IP_SRC | RXH_IP_DST |
1558 RXH_L4_B_0_1 | RXH_L4_B_2_3;
1559 else if (v & FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN_F)
1560 info->data = RXH_IP_SRC | RXH_IP_DST;
1563 if ((v & FW_RSS_VI_CONFIG_CMD_IP4FOURTUPEN_F) &&
1564 (v & FW_RSS_VI_CONFIG_CMD_UDPEN_F))
1565 info->data = RXH_IP_SRC | RXH_IP_DST |
1566 RXH_L4_B_0_1 | RXH_L4_B_2_3;
1567 else if (v & FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN_F)
1568 info->data = RXH_IP_SRC | RXH_IP_DST;
1571 case AH_ESP_V4_FLOW:
1573 if (v & FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN_F)
1574 info->data = RXH_IP_SRC | RXH_IP_DST;
1577 if (v & FW_RSS_VI_CONFIG_CMD_IP6FOURTUPEN_F)
1578 info->data = RXH_IP_SRC | RXH_IP_DST |
1579 RXH_L4_B_0_1 | RXH_L4_B_2_3;
1580 else if (v & FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN_F)
1581 info->data = RXH_IP_SRC | RXH_IP_DST;
1584 if ((v & FW_RSS_VI_CONFIG_CMD_IP6FOURTUPEN_F) &&
1585 (v & FW_RSS_VI_CONFIG_CMD_UDPEN_F))
1586 info->data = RXH_IP_SRC | RXH_IP_DST |
1587 RXH_L4_B_0_1 | RXH_L4_B_2_3;
1588 else if (v & FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN_F)
1589 info->data = RXH_IP_SRC | RXH_IP_DST;
1592 case AH_ESP_V6_FLOW:
1594 if (v & FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN_F)
1595 info->data = RXH_IP_SRC | RXH_IP_DST;
1600 case ETHTOOL_GRXRINGS:
1601 info->data = pi->nqsets;
1607 static int set_dump(struct net_device *dev, struct ethtool_dump *eth_dump)
1609 struct adapter *adapter = netdev2adap(dev);
1612 len = sizeof(struct cudbg_hdr) +
1613 sizeof(struct cudbg_entity_hdr) * CUDBG_MAX_ENTITY;
1614 len += cxgb4_get_dump_length(adapter, eth_dump->flag);
1616 adapter->eth_dump.flag = eth_dump->flag;
1617 adapter->eth_dump.len = len;
1621 static int get_dump_flag(struct net_device *dev, struct ethtool_dump *eth_dump)
1623 struct adapter *adapter = netdev2adap(dev);
1625 eth_dump->flag = adapter->eth_dump.flag;
1626 eth_dump->len = adapter->eth_dump.len;
1627 eth_dump->version = adapter->eth_dump.version;
1631 static int get_dump_data(struct net_device *dev, struct ethtool_dump *eth_dump,
1634 struct adapter *adapter = netdev2adap(dev);
1638 if (adapter->eth_dump.flag == CXGB4_ETH_DUMP_NONE)
1641 len = sizeof(struct cudbg_hdr) +
1642 sizeof(struct cudbg_entity_hdr) * CUDBG_MAX_ENTITY;
1643 len += cxgb4_get_dump_length(adapter, adapter->eth_dump.flag);
1644 if (eth_dump->len < len)
1647 ret = cxgb4_cudbg_collect(adapter, buf, &len, adapter->eth_dump.flag);
1651 eth_dump->flag = adapter->eth_dump.flag;
1652 eth_dump->len = len;
1653 eth_dump->version = adapter->eth_dump.version;
1657 static int cxgb4_get_module_info(struct net_device *dev,
1658 struct ethtool_modinfo *modinfo)
1660 struct port_info *pi = netdev_priv(dev);
1661 u8 sff8472_comp, sff_diag_type, sff_rev;
1662 struct adapter *adapter = pi->adapter;
1665 if (!t4_is_inserted_mod_type(pi->mod_type))
1668 switch (pi->port_type) {
1669 case FW_PORT_TYPE_SFP:
1670 case FW_PORT_TYPE_QSA:
1671 case FW_PORT_TYPE_SFP28:
1672 ret = t4_i2c_rd(adapter, adapter->mbox, pi->tx_chan,
1673 I2C_DEV_ADDR_A0, SFF_8472_COMP_ADDR,
1674 SFF_8472_COMP_LEN, &sff8472_comp);
1677 ret = t4_i2c_rd(adapter, adapter->mbox, pi->tx_chan,
1678 I2C_DEV_ADDR_A0, SFP_DIAG_TYPE_ADDR,
1679 SFP_DIAG_TYPE_LEN, &sff_diag_type);
1683 if (!sff8472_comp || (sff_diag_type & 4)) {
1684 modinfo->type = ETH_MODULE_SFF_8079;
1685 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN;
1687 modinfo->type = ETH_MODULE_SFF_8472;
1688 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
1692 case FW_PORT_TYPE_QSFP:
1693 case FW_PORT_TYPE_QSFP_10G:
1694 case FW_PORT_TYPE_CR_QSFP:
1695 case FW_PORT_TYPE_CR2_QSFP:
1696 case FW_PORT_TYPE_CR4_QSFP:
1697 ret = t4_i2c_rd(adapter, adapter->mbox, pi->tx_chan,
1698 I2C_DEV_ADDR_A0, SFF_REV_ADDR,
1699 SFF_REV_LEN, &sff_rev);
1700 /* For QSFP type ports, revision value >= 3
1701 * means the SFP is 8636 compliant.
1705 if (sff_rev >= 0x3) {
1706 modinfo->type = ETH_MODULE_SFF_8636;
1707 modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
1709 modinfo->type = ETH_MODULE_SFF_8436;
1710 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
1721 static int cxgb4_get_module_eeprom(struct net_device *dev,
1722 struct ethtool_eeprom *eprom, u8 *data)
1724 int ret = 0, offset = eprom->offset, len = eprom->len;
1725 struct port_info *pi = netdev_priv(dev);
1726 struct adapter *adapter = pi->adapter;
1728 memset(data, 0, eprom->len);
1729 if (offset + len <= I2C_PAGE_SIZE)
1730 return t4_i2c_rd(adapter, adapter->mbox, pi->tx_chan,
1731 I2C_DEV_ADDR_A0, offset, len, data);
1733 /* offset + len spans 0xa0 and 0xa1 pages */
1734 if (offset <= I2C_PAGE_SIZE) {
1735 /* read 0xa0 page */
1736 len = I2C_PAGE_SIZE - offset;
1737 ret = t4_i2c_rd(adapter, adapter->mbox, pi->tx_chan,
1738 I2C_DEV_ADDR_A0, offset, len, data);
1741 offset = I2C_PAGE_SIZE;
1742 /* Remaining bytes to be read from second page =
1743 * Total length - bytes read from first page
1745 len = eprom->len - len;
1747 /* Read additional optical diagnostics from page 0xa2 if supported */
1748 return t4_i2c_rd(adapter, adapter->mbox, pi->tx_chan, I2C_DEV_ADDR_A2,
1749 offset, len, &data[eprom->len - len]);
1752 static u32 cxgb4_get_priv_flags(struct net_device *netdev)
1754 struct port_info *pi = netdev_priv(netdev);
1755 struct adapter *adapter = pi->adapter;
1757 return (adapter->eth_flags | pi->eth_flags);
1761 * set_flags - set/unset specified flags if passed in new_flags
1762 * @cur_flags: pointer to current flags
1763 * @new_flags: new incoming flags
1764 * @flags: set of flags to set/unset
1766 static inline void set_flags(u32 *cur_flags, u32 new_flags, u32 flags)
1768 *cur_flags = (*cur_flags & ~flags) | (new_flags & flags);
1771 static int cxgb4_set_priv_flags(struct net_device *netdev, u32 flags)
1773 struct port_info *pi = netdev_priv(netdev);
1774 struct adapter *adapter = pi->adapter;
1776 set_flags(&adapter->eth_flags, flags, PRIV_FLAGS_ADAP);
1777 set_flags(&pi->eth_flags, flags, PRIV_FLAGS_PORT);
1782 static const struct ethtool_ops cxgb_ethtool_ops = {
1783 .supported_coalesce_params = ETHTOOL_COALESCE_USECS |
1784 ETHTOOL_COALESCE_RX_MAX_FRAMES |
1785 ETHTOOL_COALESCE_TX_USECS_IRQ |
1786 ETHTOOL_COALESCE_USE_ADAPTIVE_RX,
1787 .get_link_ksettings = get_link_ksettings,
1788 .set_link_ksettings = set_link_ksettings,
1789 .get_fecparam = get_fecparam,
1790 .set_fecparam = set_fecparam,
1791 .get_drvinfo = get_drvinfo,
1792 .get_msglevel = get_msglevel,
1793 .set_msglevel = set_msglevel,
1794 .get_ringparam = get_sge_param,
1795 .set_ringparam = set_sge_param,
1796 .get_coalesce = get_coalesce,
1797 .set_coalesce = set_coalesce,
1798 .get_eeprom_len = get_eeprom_len,
1799 .get_eeprom = get_eeprom,
1800 .set_eeprom = set_eeprom,
1801 .get_pauseparam = get_pauseparam,
1802 .set_pauseparam = set_pauseparam,
1803 .get_link = ethtool_op_get_link,
1804 .get_strings = get_strings,
1805 .set_phys_id = identify_port,
1806 .nway_reset = restart_autoneg,
1807 .get_sset_count = get_sset_count,
1808 .get_ethtool_stats = get_stats,
1809 .get_regs_len = get_regs_len,
1810 .get_regs = get_regs,
1811 .get_rxnfc = get_rxnfc,
1812 .get_rxfh_indir_size = get_rss_table_size,
1813 .get_rxfh = get_rss_table,
1814 .set_rxfh = set_rss_table,
1815 .flash_device = set_flash,
1816 .get_ts_info = get_ts_info,
1817 .set_dump = set_dump,
1818 .get_dump_flag = get_dump_flag,
1819 .get_dump_data = get_dump_data,
1820 .get_module_info = cxgb4_get_module_info,
1821 .get_module_eeprom = cxgb4_get_module_eeprom,
1822 .get_priv_flags = cxgb4_get_priv_flags,
1823 .set_priv_flags = cxgb4_set_priv_flags,
1826 void cxgb4_set_ethtool_ops(struct net_device *netdev)
1828 netdev->ethtool_ops = &cxgb_ethtool_ops;