2 * Copyright (C) 2015 Cavium, Inc.
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of version 2 of the GNU General Public License
6 * as published by the Free Software Foundation.
9 #include <linux/module.h>
10 #include <linux/interrupt.h>
11 #include <linux/pci.h>
12 #include <linux/netdevice.h>
13 #include <linux/if_vlan.h>
14 #include <linux/etherdevice.h>
15 #include <linux/ethtool.h>
16 #include <linux/log2.h>
17 #include <linux/prefetch.h>
18 #include <linux/irq.h>
22 #include "nicvf_queues.h"
23 #include "thunder_bgx.h"
25 #define DRV_NAME "thunder-nicvf"
26 #define DRV_VERSION "1.0"
28 /* Supported devices */
29 static const struct pci_device_id nicvf_id_table[] = {
30 { PCI_DEVICE_SUB(PCI_VENDOR_ID_CAVIUM,
31 PCI_DEVICE_ID_THUNDER_NIC_VF,
33 PCI_SUBSYS_DEVID_88XX_NIC_VF) },
34 { PCI_DEVICE_SUB(PCI_VENDOR_ID_CAVIUM,
35 PCI_DEVICE_ID_THUNDER_PASS1_NIC_VF,
37 PCI_SUBSYS_DEVID_88XX_PASS1_NIC_VF) },
38 { PCI_DEVICE_SUB(PCI_VENDOR_ID_CAVIUM,
39 PCI_DEVICE_ID_THUNDER_NIC_VF,
41 PCI_SUBSYS_DEVID_81XX_NIC_VF) },
42 { PCI_DEVICE_SUB(PCI_VENDOR_ID_CAVIUM,
43 PCI_DEVICE_ID_THUNDER_NIC_VF,
45 PCI_SUBSYS_DEVID_83XX_NIC_VF) },
46 { 0, } /* end of table */
49 MODULE_AUTHOR("Sunil Goutham");
50 MODULE_DESCRIPTION("Cavium Thunder NIC Virtual Function Driver");
51 MODULE_LICENSE("GPL v2");
52 MODULE_VERSION(DRV_VERSION);
53 MODULE_DEVICE_TABLE(pci, nicvf_id_table);
55 static int debug = 0x00;
56 module_param(debug, int, 0644);
57 MODULE_PARM_DESC(debug, "Debug message level bitmap");
59 static int cpi_alg = CPI_ALG_NONE;
60 module_param(cpi_alg, int, S_IRUGO);
61 MODULE_PARM_DESC(cpi_alg,
62 "PFC algorithm (0=none, 1=VLAN, 2=VLAN16, 3=IP Diffserv)");
64 static inline u8 nicvf_netdev_qidx(struct nicvf *nic, u8 qidx)
67 return qidx + ((nic->sqs_id + 1) * MAX_CMP_QUEUES_PER_QS);
72 static inline void nicvf_set_rx_frame_cnt(struct nicvf *nic,
76 nic->drv_stats.rx_frames_64++;
77 else if (skb->len <= 127)
78 nic->drv_stats.rx_frames_127++;
79 else if (skb->len <= 255)
80 nic->drv_stats.rx_frames_255++;
81 else if (skb->len <= 511)
82 nic->drv_stats.rx_frames_511++;
83 else if (skb->len <= 1023)
84 nic->drv_stats.rx_frames_1023++;
85 else if (skb->len <= 1518)
86 nic->drv_stats.rx_frames_1518++;
88 nic->drv_stats.rx_frames_jumbo++;
91 /* The Cavium ThunderX network controller can *only* be found in SoCs
92 * containing the ThunderX ARM64 CPU implementation. All accesses to the device
93 * registers on this platform are implicitly strongly ordered with respect
94 * to memory accesses. So writeq_relaxed() and readq_relaxed() are safe to use
95 * with no memory barriers in this driver. The readq()/writeq() functions add
96 * explicit ordering operation which in this case are redundant, and only
100 /* Register read/write APIs */
101 void nicvf_reg_write(struct nicvf *nic, u64 offset, u64 val)
103 writeq_relaxed(val, nic->reg_base + offset);
106 u64 nicvf_reg_read(struct nicvf *nic, u64 offset)
108 return readq_relaxed(nic->reg_base + offset);
111 void nicvf_queue_reg_write(struct nicvf *nic, u64 offset,
114 void __iomem *addr = nic->reg_base + offset;
116 writeq_relaxed(val, addr + (qidx << NIC_Q_NUM_SHIFT));
119 u64 nicvf_queue_reg_read(struct nicvf *nic, u64 offset, u64 qidx)
121 void __iomem *addr = nic->reg_base + offset;
123 return readq_relaxed(addr + (qidx << NIC_Q_NUM_SHIFT));
126 /* VF -> PF mailbox communication */
127 static void nicvf_write_to_mbx(struct nicvf *nic, union nic_mbx *mbx)
129 u64 *msg = (u64 *)mbx;
131 nicvf_reg_write(nic, NIC_VF_PF_MAILBOX_0_1 + 0, msg[0]);
132 nicvf_reg_write(nic, NIC_VF_PF_MAILBOX_0_1 + 8, msg[1]);
135 int nicvf_send_msg_to_pf(struct nicvf *nic, union nic_mbx *mbx)
137 int timeout = NIC_MBOX_MSG_TIMEOUT;
140 nic->pf_acked = false;
141 nic->pf_nacked = false;
143 nicvf_write_to_mbx(nic, mbx);
145 /* Wait for previous message to be acked, timeout 2sec */
146 while (!nic->pf_acked) {
147 if (nic->pf_nacked) {
148 netdev_err(nic->netdev,
149 "PF NACK to mbox msg 0x%02x from VF%d\n",
150 (mbx->msg.msg & 0xFF), nic->vf_id);
158 netdev_err(nic->netdev,
159 "PF didn't ACK to mbox msg 0x%02x from VF%d\n",
160 (mbx->msg.msg & 0xFF), nic->vf_id);
167 /* Checks if VF is able to comminicate with PF
168 * and also gets the VNIC number this VF is associated to.
170 static int nicvf_check_pf_ready(struct nicvf *nic)
172 union nic_mbx mbx = {};
174 mbx.msg.msg = NIC_MBOX_MSG_READY;
175 if (nicvf_send_msg_to_pf(nic, &mbx)) {
176 netdev_err(nic->netdev,
177 "PF didn't respond to READY msg\n");
184 static void nicvf_read_bgx_stats(struct nicvf *nic, struct bgx_stats_msg *bgx)
187 nic->bgx_stats.rx_stats[bgx->idx] = bgx->stats;
189 nic->bgx_stats.tx_stats[bgx->idx] = bgx->stats;
192 static void nicvf_handle_mbx_intr(struct nicvf *nic)
194 union nic_mbx mbx = {};
199 mbx_addr = NIC_VF_PF_MAILBOX_0_1;
200 mbx_data = (u64 *)&mbx;
202 for (i = 0; i < NIC_PF_VF_MAILBOX_SIZE; i++) {
203 *mbx_data = nicvf_reg_read(nic, mbx_addr);
205 mbx_addr += sizeof(u64);
208 netdev_dbg(nic->netdev, "Mbox message: msg: 0x%x\n", mbx.msg.msg);
209 switch (mbx.msg.msg) {
210 case NIC_MBOX_MSG_READY:
211 nic->pf_acked = true;
212 nic->vf_id = mbx.nic_cfg.vf_id & 0x7F;
213 nic->tns_mode = mbx.nic_cfg.tns_mode & 0x7F;
214 nic->node = mbx.nic_cfg.node_id;
215 if (!nic->set_mac_pending)
216 ether_addr_copy(nic->netdev->dev_addr,
217 mbx.nic_cfg.mac_addr);
218 nic->sqs_mode = mbx.nic_cfg.sqs_mode;
219 nic->loopback_supported = mbx.nic_cfg.loopback_supported;
220 nic->link_up = false;
224 case NIC_MBOX_MSG_ACK:
225 nic->pf_acked = true;
227 case NIC_MBOX_MSG_NACK:
228 nic->pf_nacked = true;
230 case NIC_MBOX_MSG_RSS_SIZE:
231 nic->rss_info.rss_size = mbx.rss_size.ind_tbl_size;
232 nic->pf_acked = true;
234 case NIC_MBOX_MSG_BGX_STATS:
235 nicvf_read_bgx_stats(nic, &mbx.bgx_stats);
236 nic->pf_acked = true;
238 case NIC_MBOX_MSG_BGX_LINK_CHANGE:
239 nic->pf_acked = true;
240 nic->link_up = mbx.link_status.link_up;
241 nic->duplex = mbx.link_status.duplex;
242 nic->speed = mbx.link_status.speed;
244 netdev_info(nic->netdev, "%s: Link is Up %d Mbps %s\n",
245 nic->netdev->name, nic->speed,
246 nic->duplex == DUPLEX_FULL ?
247 "Full duplex" : "Half duplex");
248 netif_carrier_on(nic->netdev);
249 netif_tx_start_all_queues(nic->netdev);
251 netdev_info(nic->netdev, "%s: Link is Down\n",
253 netif_carrier_off(nic->netdev);
254 netif_tx_stop_all_queues(nic->netdev);
257 case NIC_MBOX_MSG_ALLOC_SQS:
258 nic->sqs_count = mbx.sqs_alloc.qs_count;
259 nic->pf_acked = true;
261 case NIC_MBOX_MSG_SNICVF_PTR:
262 /* Primary VF: make note of secondary VF's pointer
263 * to be used while packet transmission.
265 nic->snicvf[mbx.nicvf.sqs_id] =
266 (struct nicvf *)mbx.nicvf.nicvf;
267 nic->pf_acked = true;
269 case NIC_MBOX_MSG_PNICVF_PTR:
270 /* Secondary VF/Qset: make note of primary VF's pointer
271 * to be used while packet reception, to handover packet
272 * to primary VF's netdev.
274 nic->pnicvf = (struct nicvf *)mbx.nicvf.nicvf;
275 nic->pf_acked = true;
278 netdev_err(nic->netdev,
279 "Invalid message from PF, msg 0x%x\n", mbx.msg.msg);
282 nicvf_clear_intr(nic, NICVF_INTR_MBOX, 0);
285 static int nicvf_hw_set_mac_addr(struct nicvf *nic, struct net_device *netdev)
287 union nic_mbx mbx = {};
289 mbx.mac.msg = NIC_MBOX_MSG_SET_MAC;
290 mbx.mac.vf_id = nic->vf_id;
291 ether_addr_copy(mbx.mac.mac_addr, netdev->dev_addr);
293 return nicvf_send_msg_to_pf(nic, &mbx);
296 static void nicvf_config_cpi(struct nicvf *nic)
298 union nic_mbx mbx = {};
300 mbx.cpi_cfg.msg = NIC_MBOX_MSG_CPI_CFG;
301 mbx.cpi_cfg.vf_id = nic->vf_id;
302 mbx.cpi_cfg.cpi_alg = nic->cpi_alg;
303 mbx.cpi_cfg.rq_cnt = nic->qs->rq_cnt;
305 nicvf_send_msg_to_pf(nic, &mbx);
308 static void nicvf_get_rss_size(struct nicvf *nic)
310 union nic_mbx mbx = {};
312 mbx.rss_size.msg = NIC_MBOX_MSG_RSS_SIZE;
313 mbx.rss_size.vf_id = nic->vf_id;
314 nicvf_send_msg_to_pf(nic, &mbx);
317 void nicvf_config_rss(struct nicvf *nic)
319 union nic_mbx mbx = {};
320 struct nicvf_rss_info *rss = &nic->rss_info;
321 int ind_tbl_len = rss->rss_size;
324 mbx.rss_cfg.vf_id = nic->vf_id;
325 mbx.rss_cfg.hash_bits = rss->hash_bits;
326 while (ind_tbl_len) {
327 mbx.rss_cfg.tbl_offset = nextq;
328 mbx.rss_cfg.tbl_len = min(ind_tbl_len,
329 RSS_IND_TBL_LEN_PER_MBX_MSG);
330 mbx.rss_cfg.msg = mbx.rss_cfg.tbl_offset ?
331 NIC_MBOX_MSG_RSS_CFG_CONT : NIC_MBOX_MSG_RSS_CFG;
333 for (i = 0; i < mbx.rss_cfg.tbl_len; i++)
334 mbx.rss_cfg.ind_tbl[i] = rss->ind_tbl[nextq++];
336 nicvf_send_msg_to_pf(nic, &mbx);
338 ind_tbl_len -= mbx.rss_cfg.tbl_len;
342 void nicvf_set_rss_key(struct nicvf *nic)
344 struct nicvf_rss_info *rss = &nic->rss_info;
345 u64 key_addr = NIC_VNIC_RSS_KEY_0_4;
348 for (idx = 0; idx < RSS_HASH_KEY_SIZE; idx++) {
349 nicvf_reg_write(nic, key_addr, rss->key[idx]);
350 key_addr += sizeof(u64);
354 static int nicvf_rss_init(struct nicvf *nic)
356 struct nicvf_rss_info *rss = &nic->rss_info;
359 nicvf_get_rss_size(nic);
361 if (cpi_alg != CPI_ALG_NONE) {
369 netdev_rss_key_fill(rss->key, RSS_HASH_KEY_SIZE * sizeof(u64));
370 nicvf_set_rss_key(nic);
372 rss->cfg = RSS_IP_HASH_ENA | RSS_TCP_HASH_ENA | RSS_UDP_HASH_ENA;
373 nicvf_reg_write(nic, NIC_VNIC_RSS_CFG, rss->cfg);
375 rss->hash_bits = ilog2(rounddown_pow_of_two(rss->rss_size));
377 for (idx = 0; idx < rss->rss_size; idx++)
378 rss->ind_tbl[idx] = ethtool_rxfh_indir_default(idx,
380 nicvf_config_rss(nic);
384 /* Request PF to allocate additional Qsets */
385 static void nicvf_request_sqs(struct nicvf *nic)
387 union nic_mbx mbx = {};
389 int sqs_count = nic->sqs_count;
390 int rx_queues = 0, tx_queues = 0;
392 /* Only primary VF should request */
393 if (nic->sqs_mode || !nic->sqs_count)
396 mbx.sqs_alloc.msg = NIC_MBOX_MSG_ALLOC_SQS;
397 mbx.sqs_alloc.vf_id = nic->vf_id;
398 mbx.sqs_alloc.qs_count = nic->sqs_count;
399 if (nicvf_send_msg_to_pf(nic, &mbx)) {
400 /* No response from PF */
405 /* Return if no Secondary Qsets available */
409 if (nic->rx_queues > MAX_RCV_QUEUES_PER_QS)
410 rx_queues = nic->rx_queues - MAX_RCV_QUEUES_PER_QS;
411 if (nic->tx_queues > MAX_SND_QUEUES_PER_QS)
412 tx_queues = nic->tx_queues - MAX_SND_QUEUES_PER_QS;
414 /* Set no of Rx/Tx queues in each of the SQsets */
415 for (sqs = 0; sqs < nic->sqs_count; sqs++) {
416 mbx.nicvf.msg = NIC_MBOX_MSG_SNICVF_PTR;
417 mbx.nicvf.vf_id = nic->vf_id;
418 mbx.nicvf.sqs_id = sqs;
419 nicvf_send_msg_to_pf(nic, &mbx);
421 nic->snicvf[sqs]->sqs_id = sqs;
422 if (rx_queues > MAX_RCV_QUEUES_PER_QS) {
423 nic->snicvf[sqs]->qs->rq_cnt = MAX_RCV_QUEUES_PER_QS;
424 rx_queues -= MAX_RCV_QUEUES_PER_QS;
426 nic->snicvf[sqs]->qs->rq_cnt = rx_queues;
430 if (tx_queues > MAX_SND_QUEUES_PER_QS) {
431 nic->snicvf[sqs]->qs->sq_cnt = MAX_SND_QUEUES_PER_QS;
432 tx_queues -= MAX_SND_QUEUES_PER_QS;
434 nic->snicvf[sqs]->qs->sq_cnt = tx_queues;
438 nic->snicvf[sqs]->qs->cq_cnt =
439 max(nic->snicvf[sqs]->qs->rq_cnt, nic->snicvf[sqs]->qs->sq_cnt);
441 /* Initialize secondary Qset's queues and its interrupts */
442 nicvf_open(nic->snicvf[sqs]->netdev);
445 /* Update stack with actual Rx/Tx queue count allocated */
446 if (sqs_count != nic->sqs_count)
447 nicvf_set_real_num_queues(nic->netdev,
448 nic->tx_queues, nic->rx_queues);
451 /* Send this Qset's nicvf pointer to PF.
452 * PF inturn sends primary VF's nicvf struct to secondary Qsets/VFs
453 * so that packets received by these Qsets can use primary VF's netdev
455 static void nicvf_send_vf_struct(struct nicvf *nic)
457 union nic_mbx mbx = {};
459 mbx.nicvf.msg = NIC_MBOX_MSG_NICVF_PTR;
460 mbx.nicvf.sqs_mode = nic->sqs_mode;
461 mbx.nicvf.nicvf = (u64)nic;
462 nicvf_send_msg_to_pf(nic, &mbx);
465 static void nicvf_get_primary_vf_struct(struct nicvf *nic)
467 union nic_mbx mbx = {};
469 mbx.nicvf.msg = NIC_MBOX_MSG_PNICVF_PTR;
470 nicvf_send_msg_to_pf(nic, &mbx);
473 int nicvf_set_real_num_queues(struct net_device *netdev,
474 int tx_queues, int rx_queues)
478 err = netif_set_real_num_tx_queues(netdev, tx_queues);
481 "Failed to set no of Tx queues: %d\n", tx_queues);
485 err = netif_set_real_num_rx_queues(netdev, rx_queues);
488 "Failed to set no of Rx queues: %d\n", rx_queues);
492 static int nicvf_init_resources(struct nicvf *nic)
495 union nic_mbx mbx = {};
497 mbx.msg.msg = NIC_MBOX_MSG_CFG_DONE;
500 nicvf_qset_config(nic, true);
502 /* Initialize queues and HW for data transfer */
503 err = nicvf_config_data_transfer(nic, true);
505 netdev_err(nic->netdev,
506 "Failed to alloc/config VF's QSet resources\n");
510 /* Send VF config done msg to PF */
511 nicvf_write_to_mbx(nic, &mbx);
516 static void nicvf_snd_pkt_handler(struct net_device *netdev,
517 struct cmp_queue *cq,
518 struct cqe_send_t *cqe_tx,
519 int cqe_type, int budget)
521 struct sk_buff *skb = NULL;
522 struct nicvf *nic = netdev_priv(netdev);
523 struct snd_queue *sq;
524 struct sq_hdr_subdesc *hdr;
525 struct sq_hdr_subdesc *tso_sqe;
527 sq = &nic->qs->sq[cqe_tx->sq_idx];
529 hdr = (struct sq_hdr_subdesc *)GET_SQ_DESC(sq, cqe_tx->sqe_ptr);
530 if (hdr->subdesc_type != SQ_DESC_TYPE_HEADER)
533 netdev_dbg(nic->netdev,
534 "%s Qset #%d SQ #%d SQ ptr #%d subdesc count %d\n",
535 __func__, cqe_tx->sq_qs, cqe_tx->sq_idx,
536 cqe_tx->sqe_ptr, hdr->subdesc_cnt);
538 nicvf_check_cqe_tx_errs(nic, cq, cqe_tx);
539 skb = (struct sk_buff *)sq->skbuff[cqe_tx->sqe_ptr];
541 /* Check for dummy descriptor used for HW TSO offload on 88xx */
542 if (hdr->dont_send) {
543 /* Get actual TSO descriptors and free them */
545 (struct sq_hdr_subdesc *)GET_SQ_DESC(sq, hdr->rsvd2);
546 nicvf_put_sq_desc(sq, tso_sqe->subdesc_cnt + 1);
548 nicvf_put_sq_desc(sq, hdr->subdesc_cnt + 1);
550 napi_consume_skb(skb, budget);
551 sq->skbuff[cqe_tx->sqe_ptr] = (u64)NULL;
553 /* In case of SW TSO on 88xx, only last segment will have
554 * a SKB attached, so just free SQEs here.
557 nicvf_put_sq_desc(sq, hdr->subdesc_cnt + 1);
561 static inline void nicvf_set_rxhash(struct net_device *netdev,
562 struct cqe_rx_t *cqe_rx,
568 if (!(netdev->features & NETIF_F_RXHASH))
571 switch (cqe_rx->rss_alg) {
574 hash_type = PKT_HASH_TYPE_L4;
575 hash = cqe_rx->rss_tag;
578 hash_type = PKT_HASH_TYPE_L3;
579 hash = cqe_rx->rss_tag;
582 hash_type = PKT_HASH_TYPE_NONE;
586 skb_set_hash(skb, hash, hash_type);
589 static void nicvf_rcv_pkt_handler(struct net_device *netdev,
590 struct napi_struct *napi,
591 struct cqe_rx_t *cqe_rx)
594 struct nicvf *nic = netdev_priv(netdev);
598 rq_idx = nicvf_netdev_qidx(nic, cqe_rx->rq_idx);
601 /* Use primary VF's 'nicvf' struct */
603 netdev = nic->netdev;
606 /* Check for errors */
607 err = nicvf_check_cqe_rx_errs(nic, cqe_rx);
608 if (err && !cqe_rx->rb_cnt)
611 skb = nicvf_get_rcv_skb(nic, cqe_rx);
613 netdev_dbg(nic->netdev, "Packet not received\n");
617 if (netif_msg_pktdata(nic)) {
618 netdev_info(nic->netdev, "%s: skb 0x%p, len=%d\n", netdev->name,
620 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_OFFSET, 16, 1,
621 skb->data, skb->len, true);
624 /* If error packet, drop it here */
626 dev_kfree_skb_any(skb);
630 nicvf_set_rx_frame_cnt(nic, skb);
632 nicvf_set_rxhash(netdev, cqe_rx, skb);
634 skb_record_rx_queue(skb, rq_idx);
635 if (netdev->hw_features & NETIF_F_RXCSUM) {
636 /* HW by default verifies TCP/UDP/SCTP checksums */
637 skb->ip_summed = CHECKSUM_UNNECESSARY;
639 skb_checksum_none_assert(skb);
642 skb->protocol = eth_type_trans(skb, netdev);
644 /* Check for stripped VLAN */
645 if (cqe_rx->vlan_found && cqe_rx->vlan_stripped)
646 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
647 ntohs((__force __be16)cqe_rx->vlan_tci));
649 if (napi && (netdev->features & NETIF_F_GRO))
650 napi_gro_receive(napi, skb);
652 netif_receive_skb(skb);
655 static int nicvf_cq_intr_handler(struct net_device *netdev, u8 cq_idx,
656 struct napi_struct *napi, int budget)
658 int processed_cqe, work_done = 0, tx_done = 0;
659 int cqe_count, cqe_head;
660 struct nicvf *nic = netdev_priv(netdev);
661 struct queue_set *qs = nic->qs;
662 struct cmp_queue *cq = &qs->cq[cq_idx];
663 struct cqe_rx_t *cq_desc;
664 struct netdev_queue *txq;
666 spin_lock_bh(&cq->lock);
669 /* Get no of valid CQ entries to process */
670 cqe_count = nicvf_queue_reg_read(nic, NIC_QSET_CQ_0_7_STATUS, cq_idx);
671 cqe_count &= CQ_CQE_COUNT;
675 /* Get head of the valid CQ entries */
676 cqe_head = nicvf_queue_reg_read(nic, NIC_QSET_CQ_0_7_HEAD, cq_idx) >> 9;
679 netdev_dbg(nic->netdev, "%s CQ%d cqe_count %d cqe_head %d\n",
680 __func__, cq_idx, cqe_count, cqe_head);
681 while (processed_cqe < cqe_count) {
682 /* Get the CQ descriptor */
683 cq_desc = (struct cqe_rx_t *)GET_CQ_DESC(cq, cqe_head);
685 cqe_head &= (cq->dmem.q_len - 1);
686 /* Initiate prefetch for next descriptor */
687 prefetch((struct cqe_rx_t *)GET_CQ_DESC(cq, cqe_head));
689 if ((work_done >= budget) && napi &&
690 (cq_desc->cqe_type != CQE_TYPE_SEND)) {
694 netdev_dbg(nic->netdev, "CQ%d cq_desc->cqe_type %d\n",
695 cq_idx, cq_desc->cqe_type);
696 switch (cq_desc->cqe_type) {
698 nicvf_rcv_pkt_handler(netdev, napi, cq_desc);
702 nicvf_snd_pkt_handler(netdev, cq,
703 (void *)cq_desc, CQE_TYPE_SEND,
707 case CQE_TYPE_INVALID:
708 case CQE_TYPE_RX_SPLIT:
709 case CQE_TYPE_RX_TCP:
710 case CQE_TYPE_SEND_PTP:
716 netdev_dbg(nic->netdev,
717 "%s CQ%d processed_cqe %d work_done %d budget %d\n",
718 __func__, cq_idx, processed_cqe, work_done, budget);
720 /* Ring doorbell to inform H/W to reuse processed CQEs */
721 nicvf_queue_reg_write(nic, NIC_QSET_CQ_0_7_DOOR,
722 cq_idx, processed_cqe);
724 if ((work_done < budget) && napi)
728 /* Wakeup TXQ if its stopped earlier due to SQ full */
730 netdev = nic->pnicvf->netdev;
731 txq = netdev_get_tx_queue(netdev,
732 nicvf_netdev_qidx(nic, cq_idx));
734 if (netif_tx_queue_stopped(txq) && netif_carrier_ok(netdev)) {
735 netif_tx_start_queue(txq);
736 nic->drv_stats.txq_wake++;
737 if (netif_msg_tx_err(nic))
739 "%s: Transmit queue wakeup SQ%d\n",
740 netdev->name, cq_idx);
744 spin_unlock_bh(&cq->lock);
748 static int nicvf_poll(struct napi_struct *napi, int budget)
752 struct net_device *netdev = napi->dev;
753 struct nicvf *nic = netdev_priv(netdev);
754 struct nicvf_cq_poll *cq;
756 cq = container_of(napi, struct nicvf_cq_poll, napi);
757 work_done = nicvf_cq_intr_handler(netdev, cq->cq_idx, napi, budget);
759 if (work_done < budget) {
760 /* Slow packet rate, exit polling */
762 /* Re-enable interrupts */
763 cq_head = nicvf_queue_reg_read(nic, NIC_QSET_CQ_0_7_HEAD,
765 nicvf_clear_intr(nic, NICVF_INTR_CQ, cq->cq_idx);
766 nicvf_queue_reg_write(nic, NIC_QSET_CQ_0_7_HEAD,
767 cq->cq_idx, cq_head);
768 nicvf_enable_intr(nic, NICVF_INTR_CQ, cq->cq_idx);
773 /* Qset error interrupt handler
775 * As of now only CQ errors are handled
777 static void nicvf_handle_qs_err(unsigned long data)
779 struct nicvf *nic = (struct nicvf *)data;
780 struct queue_set *qs = nic->qs;
784 netif_tx_disable(nic->netdev);
786 /* Check if it is CQ err */
787 for (qidx = 0; qidx < qs->cq_cnt; qidx++) {
788 status = nicvf_queue_reg_read(nic, NIC_QSET_CQ_0_7_STATUS,
790 if (!(status & CQ_ERR_MASK))
792 /* Process already queued CQEs and reconfig CQ */
793 nicvf_disable_intr(nic, NICVF_INTR_CQ, qidx);
794 nicvf_sq_disable(nic, qidx);
795 nicvf_cq_intr_handler(nic->netdev, qidx, NULL, 0);
796 nicvf_cmp_queue_config(nic, qs, qidx, true);
797 nicvf_sq_free_used_descs(nic->netdev, &qs->sq[qidx], qidx);
798 nicvf_sq_enable(nic, &qs->sq[qidx], qidx);
800 nicvf_enable_intr(nic, NICVF_INTR_CQ, qidx);
803 netif_tx_start_all_queues(nic->netdev);
804 /* Re-enable Qset error interrupt */
805 nicvf_enable_intr(nic, NICVF_INTR_QS_ERR, 0);
808 static void nicvf_dump_intr_status(struct nicvf *nic)
810 if (netif_msg_intr(nic))
811 netdev_info(nic->netdev, "%s: interrupt status 0x%llx\n",
812 nic->netdev->name, nicvf_reg_read(nic, NIC_VF_INT));
815 static irqreturn_t nicvf_misc_intr_handler(int irq, void *nicvf_irq)
817 struct nicvf *nic = (struct nicvf *)nicvf_irq;
820 nicvf_dump_intr_status(nic);
822 intr = nicvf_reg_read(nic, NIC_VF_INT);
823 /* Check for spurious interrupt */
824 if (!(intr & NICVF_INTR_MBOX_MASK))
827 nicvf_handle_mbx_intr(nic);
832 static irqreturn_t nicvf_intr_handler(int irq, void *cq_irq)
834 struct nicvf_cq_poll *cq_poll = (struct nicvf_cq_poll *)cq_irq;
835 struct nicvf *nic = cq_poll->nicvf;
836 int qidx = cq_poll->cq_idx;
838 nicvf_dump_intr_status(nic);
840 /* Disable interrupts */
841 nicvf_disable_intr(nic, NICVF_INTR_CQ, qidx);
844 napi_schedule_irqoff(&cq_poll->napi);
846 /* Clear interrupt */
847 nicvf_clear_intr(nic, NICVF_INTR_CQ, qidx);
852 static irqreturn_t nicvf_rbdr_intr_handler(int irq, void *nicvf_irq)
854 struct nicvf *nic = (struct nicvf *)nicvf_irq;
858 nicvf_dump_intr_status(nic);
860 /* Disable RBDR interrupt and schedule softirq */
861 for (qidx = 0; qidx < nic->qs->rbdr_cnt; qidx++) {
862 if (!nicvf_is_intr_enabled(nic, NICVF_INTR_RBDR, qidx))
864 nicvf_disable_intr(nic, NICVF_INTR_RBDR, qidx);
865 tasklet_hi_schedule(&nic->rbdr_task);
866 /* Clear interrupt */
867 nicvf_clear_intr(nic, NICVF_INTR_RBDR, qidx);
873 static irqreturn_t nicvf_qs_err_intr_handler(int irq, void *nicvf_irq)
875 struct nicvf *nic = (struct nicvf *)nicvf_irq;
877 nicvf_dump_intr_status(nic);
879 /* Disable Qset err interrupt and schedule softirq */
880 nicvf_disable_intr(nic, NICVF_INTR_QS_ERR, 0);
881 tasklet_hi_schedule(&nic->qs_err_task);
882 nicvf_clear_intr(nic, NICVF_INTR_QS_ERR, 0);
887 static int nicvf_enable_msix(struct nicvf *nic)
891 nic->num_vec = NIC_VF_MSIX_VECTORS;
893 for (vec = 0; vec < nic->num_vec; vec++)
894 nic->msix_entries[vec].entry = vec;
896 ret = pci_enable_msix(nic->pdev, nic->msix_entries, nic->num_vec);
898 netdev_err(nic->netdev,
899 "Req for #%d msix vectors failed\n", nic->num_vec);
902 nic->msix_enabled = 1;
906 static void nicvf_disable_msix(struct nicvf *nic)
908 if (nic->msix_enabled) {
909 pci_disable_msix(nic->pdev);
910 nic->msix_enabled = 0;
915 static void nicvf_set_irq_affinity(struct nicvf *nic)
920 for (vec = 0; vec < nic->num_vec; vec++) {
921 if (!nic->irq_allocated[vec])
924 if (!zalloc_cpumask_var(&nic->affinity_mask[vec], GFP_KERNEL))
927 if (vec < NICVF_INTR_ID_SQ)
928 /* Leave CPU0 for RBDR and other interrupts */
929 cpu = nicvf_netdev_qidx(nic, vec) + 1;
933 cpumask_set_cpu(cpumask_local_spread(cpu, nic->node),
934 nic->affinity_mask[vec]);
935 irqnum = nic->msix_entries[vec].vector;
936 irq_set_affinity_hint(irqnum, nic->affinity_mask[vec]);
940 static int nicvf_register_interrupts(struct nicvf *nic)
946 sprintf(nic->irq_name[irq], "%s-rxtx-%d",
947 nic->pnicvf->netdev->name,
948 nicvf_netdev_qidx(nic, irq));
951 sprintf(nic->irq_name[irq], "%s-sq-%d",
952 nic->pnicvf->netdev->name,
953 nicvf_netdev_qidx(nic, irq - NICVF_INTR_ID_SQ));
955 for_each_rbdr_irq(irq)
956 sprintf(nic->irq_name[irq], "%s-rbdr-%d",
957 nic->pnicvf->netdev->name,
958 nic->sqs_mode ? (nic->sqs_id + 1) : 0);
960 /* Register CQ interrupts */
961 for (irq = 0; irq < nic->qs->cq_cnt; irq++) {
962 vector = nic->msix_entries[irq].vector;
963 ret = request_irq(vector, nicvf_intr_handler,
964 0, nic->irq_name[irq], nic->napi[irq]);
967 nic->irq_allocated[irq] = true;
970 /* Register RBDR interrupt */
971 for (irq = NICVF_INTR_ID_RBDR;
972 irq < (NICVF_INTR_ID_RBDR + nic->qs->rbdr_cnt); irq++) {
973 vector = nic->msix_entries[irq].vector;
974 ret = request_irq(vector, nicvf_rbdr_intr_handler,
975 0, nic->irq_name[irq], nic);
978 nic->irq_allocated[irq] = true;
981 /* Register QS error interrupt */
982 sprintf(nic->irq_name[NICVF_INTR_ID_QS_ERR], "%s-qset-err-%d",
983 nic->pnicvf->netdev->name,
984 nic->sqs_mode ? (nic->sqs_id + 1) : 0);
985 irq = NICVF_INTR_ID_QS_ERR;
986 ret = request_irq(nic->msix_entries[irq].vector,
987 nicvf_qs_err_intr_handler,
988 0, nic->irq_name[irq], nic);
992 nic->irq_allocated[irq] = true;
994 /* Set IRQ affinities */
995 nicvf_set_irq_affinity(nic);
999 netdev_err(nic->netdev, "request_irq failed, vector %d\n", irq);
1004 static void nicvf_unregister_interrupts(struct nicvf *nic)
1008 /* Free registered interrupts */
1009 for (irq = 0; irq < nic->num_vec; irq++) {
1010 if (!nic->irq_allocated[irq])
1013 irq_set_affinity_hint(nic->msix_entries[irq].vector, NULL);
1014 free_cpumask_var(nic->affinity_mask[irq]);
1016 if (irq < NICVF_INTR_ID_SQ)
1017 free_irq(nic->msix_entries[irq].vector, nic->napi[irq]);
1019 free_irq(nic->msix_entries[irq].vector, nic);
1021 nic->irq_allocated[irq] = false;
1025 nicvf_disable_msix(nic);
1028 /* Initialize MSIX vectors and register MISC interrupt.
1029 * Send READY message to PF to check if its alive
1031 static int nicvf_register_misc_interrupt(struct nicvf *nic)
1034 int irq = NICVF_INTR_ID_MISC;
1036 /* Return if mailbox interrupt is already registered */
1037 if (nic->msix_enabled)
1041 if (!nicvf_enable_msix(nic))
1044 sprintf(nic->irq_name[irq], "%s Mbox", "NICVF");
1045 /* Register Misc interrupt */
1046 ret = request_irq(nic->msix_entries[irq].vector,
1047 nicvf_misc_intr_handler, 0, nic->irq_name[irq], nic);
1051 nic->irq_allocated[irq] = true;
1053 /* Enable mailbox interrupt */
1054 nicvf_enable_intr(nic, NICVF_INTR_MBOX, 0);
1056 /* Check if VF is able to communicate with PF */
1057 if (!nicvf_check_pf_ready(nic)) {
1058 nicvf_disable_intr(nic, NICVF_INTR_MBOX, 0);
1059 nicvf_unregister_interrupts(nic);
1066 static netdev_tx_t nicvf_xmit(struct sk_buff *skb, struct net_device *netdev)
1068 struct nicvf *nic = netdev_priv(netdev);
1069 int qid = skb_get_queue_mapping(skb);
1070 struct netdev_queue *txq = netdev_get_tx_queue(netdev, qid);
1072 /* Check for minimum packet length */
1073 if (skb->len <= ETH_HLEN) {
1075 return NETDEV_TX_OK;
1078 if (!netif_tx_queue_stopped(txq) && !nicvf_sq_append_skb(nic, skb)) {
1079 netif_tx_stop_queue(txq);
1080 nic->drv_stats.txq_stop++;
1081 if (netif_msg_tx_err(nic))
1083 "%s: Transmit ring full, stopping SQ%d\n",
1085 return NETDEV_TX_BUSY;
1088 return NETDEV_TX_OK;
1091 static inline void nicvf_free_cq_poll(struct nicvf *nic)
1093 struct nicvf_cq_poll *cq_poll;
1096 for (qidx = 0; qidx < nic->qs->cq_cnt; qidx++) {
1097 cq_poll = nic->napi[qidx];
1100 nic->napi[qidx] = NULL;
1105 int nicvf_stop(struct net_device *netdev)
1108 struct nicvf *nic = netdev_priv(netdev);
1109 struct queue_set *qs = nic->qs;
1110 struct nicvf_cq_poll *cq_poll = NULL;
1111 union nic_mbx mbx = {};
1113 mbx.msg.msg = NIC_MBOX_MSG_SHUTDOWN;
1114 nicvf_send_msg_to_pf(nic, &mbx);
1116 netif_carrier_off(netdev);
1117 netif_tx_stop_all_queues(nic->netdev);
1118 nic->link_up = false;
1120 /* Teardown secondary qsets first */
1121 if (!nic->sqs_mode) {
1122 for (qidx = 0; qidx < nic->sqs_count; qidx++) {
1123 if (!nic->snicvf[qidx])
1125 nicvf_stop(nic->snicvf[qidx]->netdev);
1126 nic->snicvf[qidx] = NULL;
1130 /* Disable RBDR & QS error interrupts */
1131 for (qidx = 0; qidx < qs->rbdr_cnt; qidx++) {
1132 nicvf_disable_intr(nic, NICVF_INTR_RBDR, qidx);
1133 nicvf_clear_intr(nic, NICVF_INTR_RBDR, qidx);
1135 nicvf_disable_intr(nic, NICVF_INTR_QS_ERR, 0);
1136 nicvf_clear_intr(nic, NICVF_INTR_QS_ERR, 0);
1138 /* Wait for pending IRQ handlers to finish */
1139 for (irq = 0; irq < nic->num_vec; irq++)
1140 synchronize_irq(nic->msix_entries[irq].vector);
1142 tasklet_kill(&nic->rbdr_task);
1143 tasklet_kill(&nic->qs_err_task);
1144 if (nic->rb_work_scheduled)
1145 cancel_delayed_work_sync(&nic->rbdr_work);
1147 for (qidx = 0; qidx < nic->qs->cq_cnt; qidx++) {
1148 cq_poll = nic->napi[qidx];
1151 napi_synchronize(&cq_poll->napi);
1152 /* CQ intr is enabled while napi_complete,
1155 nicvf_disable_intr(nic, NICVF_INTR_CQ, qidx);
1156 nicvf_clear_intr(nic, NICVF_INTR_CQ, qidx);
1157 napi_disable(&cq_poll->napi);
1158 netif_napi_del(&cq_poll->napi);
1161 netif_tx_disable(netdev);
1163 /* Free resources */
1164 nicvf_config_data_transfer(nic, false);
1166 /* Disable HW Qset */
1167 nicvf_qset_config(nic, false);
1169 /* disable mailbox interrupt */
1170 nicvf_disable_intr(nic, NICVF_INTR_MBOX, 0);
1172 nicvf_unregister_interrupts(nic);
1174 nicvf_free_cq_poll(nic);
1176 /* Clear multiqset info */
1182 int nicvf_open(struct net_device *netdev)
1185 struct nicvf *nic = netdev_priv(netdev);
1186 struct queue_set *qs = nic->qs;
1187 struct nicvf_cq_poll *cq_poll = NULL;
1189 nic->mtu = netdev->mtu;
1191 netif_carrier_off(netdev);
1193 err = nicvf_register_misc_interrupt(nic);
1197 /* Register NAPI handler for processing CQEs */
1198 for (qidx = 0; qidx < qs->cq_cnt; qidx++) {
1199 cq_poll = kzalloc(sizeof(*cq_poll), GFP_KERNEL);
1204 cq_poll->cq_idx = qidx;
1205 cq_poll->nicvf = nic;
1206 netif_napi_add(netdev, &cq_poll->napi, nicvf_poll,
1208 napi_enable(&cq_poll->napi);
1209 nic->napi[qidx] = cq_poll;
1212 /* Check if we got MAC address from PF or else generate a radom MAC */
1213 if (!nic->sqs_mode && is_zero_ether_addr(netdev->dev_addr)) {
1214 eth_hw_addr_random(netdev);
1215 nicvf_hw_set_mac_addr(nic, netdev);
1218 if (nic->set_mac_pending) {
1219 nic->set_mac_pending = false;
1220 nicvf_hw_set_mac_addr(nic, netdev);
1223 /* Init tasklet for handling Qset err interrupt */
1224 tasklet_init(&nic->qs_err_task, nicvf_handle_qs_err,
1225 (unsigned long)nic);
1227 /* Init RBDR tasklet which will refill RBDR */
1228 tasklet_init(&nic->rbdr_task, nicvf_rbdr_task,
1229 (unsigned long)nic);
1230 INIT_DELAYED_WORK(&nic->rbdr_work, nicvf_rbdr_work);
1232 /* Configure CPI alorithm */
1233 nic->cpi_alg = cpi_alg;
1235 nicvf_config_cpi(nic);
1237 nicvf_request_sqs(nic);
1239 nicvf_get_primary_vf_struct(nic);
1241 /* Configure receive side scaling */
1243 nicvf_rss_init(nic);
1245 err = nicvf_register_interrupts(nic);
1249 /* Initialize the queues */
1250 err = nicvf_init_resources(nic);
1254 /* Make sure queue initialization is written */
1257 nicvf_reg_write(nic, NIC_VF_INT, -1);
1258 /* Enable Qset err interrupt */
1259 nicvf_enable_intr(nic, NICVF_INTR_QS_ERR, 0);
1261 /* Enable completion queue interrupt */
1262 for (qidx = 0; qidx < qs->cq_cnt; qidx++)
1263 nicvf_enable_intr(nic, NICVF_INTR_CQ, qidx);
1265 /* Enable RBDR threshold interrupt */
1266 for (qidx = 0; qidx < qs->rbdr_cnt; qidx++)
1267 nicvf_enable_intr(nic, NICVF_INTR_RBDR, qidx);
1269 nic->drv_stats.txq_stop = 0;
1270 nic->drv_stats.txq_wake = 0;
1274 nicvf_disable_intr(nic, NICVF_INTR_MBOX, 0);
1275 nicvf_unregister_interrupts(nic);
1276 tasklet_kill(&nic->qs_err_task);
1277 tasklet_kill(&nic->rbdr_task);
1279 for (qidx = 0; qidx < qs->cq_cnt; qidx++) {
1280 cq_poll = nic->napi[qidx];
1283 napi_disable(&cq_poll->napi);
1284 netif_napi_del(&cq_poll->napi);
1286 nicvf_free_cq_poll(nic);
1290 static int nicvf_update_hw_max_frs(struct nicvf *nic, int mtu)
1292 union nic_mbx mbx = {};
1294 mbx.frs.msg = NIC_MBOX_MSG_SET_MAX_FRS;
1295 mbx.frs.max_frs = mtu;
1296 mbx.frs.vf_id = nic->vf_id;
1298 return nicvf_send_msg_to_pf(nic, &mbx);
1301 static int nicvf_change_mtu(struct net_device *netdev, int new_mtu)
1303 struct nicvf *nic = netdev_priv(netdev);
1305 if (new_mtu > NIC_HW_MAX_FRS)
1308 if (new_mtu < NIC_HW_MIN_FRS)
1311 if (nicvf_update_hw_max_frs(nic, new_mtu))
1313 netdev->mtu = new_mtu;
1319 static int nicvf_set_mac_address(struct net_device *netdev, void *p)
1321 struct sockaddr *addr = p;
1322 struct nicvf *nic = netdev_priv(netdev);
1324 if (!is_valid_ether_addr(addr->sa_data))
1325 return -EADDRNOTAVAIL;
1327 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1329 if (nic->msix_enabled) {
1330 if (nicvf_hw_set_mac_addr(nic, netdev))
1333 nic->set_mac_pending = true;
1339 void nicvf_update_lmac_stats(struct nicvf *nic)
1342 union nic_mbx mbx = {};
1344 if (!netif_running(nic->netdev))
1347 mbx.bgx_stats.msg = NIC_MBOX_MSG_BGX_STATS;
1348 mbx.bgx_stats.vf_id = nic->vf_id;
1350 mbx.bgx_stats.rx = 1;
1351 while (stat < BGX_RX_STATS_COUNT) {
1352 mbx.bgx_stats.idx = stat;
1353 if (nicvf_send_msg_to_pf(nic, &mbx))
1361 mbx.bgx_stats.rx = 0;
1362 while (stat < BGX_TX_STATS_COUNT) {
1363 mbx.bgx_stats.idx = stat;
1364 if (nicvf_send_msg_to_pf(nic, &mbx))
1370 void nicvf_update_stats(struct nicvf *nic)
1373 struct nicvf_hw_stats *stats = &nic->hw_stats;
1374 struct nicvf_drv_stats *drv_stats = &nic->drv_stats;
1375 struct queue_set *qs = nic->qs;
1377 #define GET_RX_STATS(reg) \
1378 nicvf_reg_read(nic, NIC_VNIC_RX_STAT_0_13 | (reg << 3))
1379 #define GET_TX_STATS(reg) \
1380 nicvf_reg_read(nic, NIC_VNIC_TX_STAT_0_4 | (reg << 3))
1382 stats->rx_bytes = GET_RX_STATS(RX_OCTS);
1383 stats->rx_ucast_frames = GET_RX_STATS(RX_UCAST);
1384 stats->rx_bcast_frames = GET_RX_STATS(RX_BCAST);
1385 stats->rx_mcast_frames = GET_RX_STATS(RX_MCAST);
1386 stats->rx_fcs_errors = GET_RX_STATS(RX_FCS);
1387 stats->rx_l2_errors = GET_RX_STATS(RX_L2ERR);
1388 stats->rx_drop_red = GET_RX_STATS(RX_RED);
1389 stats->rx_drop_red_bytes = GET_RX_STATS(RX_RED_OCTS);
1390 stats->rx_drop_overrun = GET_RX_STATS(RX_ORUN);
1391 stats->rx_drop_overrun_bytes = GET_RX_STATS(RX_ORUN_OCTS);
1392 stats->rx_drop_bcast = GET_RX_STATS(RX_DRP_BCAST);
1393 stats->rx_drop_mcast = GET_RX_STATS(RX_DRP_MCAST);
1394 stats->rx_drop_l3_bcast = GET_RX_STATS(RX_DRP_L3BCAST);
1395 stats->rx_drop_l3_mcast = GET_RX_STATS(RX_DRP_L3MCAST);
1397 stats->tx_bytes_ok = GET_TX_STATS(TX_OCTS);
1398 stats->tx_ucast_frames_ok = GET_TX_STATS(TX_UCAST);
1399 stats->tx_bcast_frames_ok = GET_TX_STATS(TX_BCAST);
1400 stats->tx_mcast_frames_ok = GET_TX_STATS(TX_MCAST);
1401 stats->tx_drops = GET_TX_STATS(TX_DROP);
1403 drv_stats->tx_frames_ok = stats->tx_ucast_frames_ok +
1404 stats->tx_bcast_frames_ok +
1405 stats->tx_mcast_frames_ok;
1406 drv_stats->rx_frames_ok = stats->rx_ucast_frames +
1407 stats->rx_bcast_frames +
1408 stats->rx_mcast_frames;
1409 drv_stats->rx_drops = stats->rx_drop_red +
1410 stats->rx_drop_overrun;
1411 drv_stats->tx_drops = stats->tx_drops;
1413 /* Update RQ and SQ stats */
1414 for (qidx = 0; qidx < qs->rq_cnt; qidx++)
1415 nicvf_update_rq_stats(nic, qidx);
1416 for (qidx = 0; qidx < qs->sq_cnt; qidx++)
1417 nicvf_update_sq_stats(nic, qidx);
1420 static struct rtnl_link_stats64 *nicvf_get_stats64(struct net_device *netdev,
1421 struct rtnl_link_stats64 *stats)
1423 struct nicvf *nic = netdev_priv(netdev);
1424 struct nicvf_hw_stats *hw_stats = &nic->hw_stats;
1425 struct nicvf_drv_stats *drv_stats = &nic->drv_stats;
1427 nicvf_update_stats(nic);
1429 stats->rx_bytes = hw_stats->rx_bytes;
1430 stats->rx_packets = drv_stats->rx_frames_ok;
1431 stats->rx_dropped = drv_stats->rx_drops;
1432 stats->multicast = hw_stats->rx_mcast_frames;
1434 stats->tx_bytes = hw_stats->tx_bytes_ok;
1435 stats->tx_packets = drv_stats->tx_frames_ok;
1436 stats->tx_dropped = drv_stats->tx_drops;
1441 static void nicvf_tx_timeout(struct net_device *dev)
1443 struct nicvf *nic = netdev_priv(dev);
1445 if (netif_msg_tx_err(nic))
1446 netdev_warn(dev, "%s: Transmit timed out, resetting\n",
1449 nic->drv_stats.tx_timeout++;
1450 schedule_work(&nic->reset_task);
1453 static void nicvf_reset_task(struct work_struct *work)
1457 nic = container_of(work, struct nicvf, reset_task);
1459 if (!netif_running(nic->netdev))
1462 nicvf_stop(nic->netdev);
1463 nicvf_open(nic->netdev);
1464 netif_trans_update(nic->netdev);
1467 static int nicvf_config_loopback(struct nicvf *nic,
1468 netdev_features_t features)
1470 union nic_mbx mbx = {};
1472 mbx.lbk.msg = NIC_MBOX_MSG_LOOPBACK;
1473 mbx.lbk.vf_id = nic->vf_id;
1474 mbx.lbk.enable = (features & NETIF_F_LOOPBACK) != 0;
1476 return nicvf_send_msg_to_pf(nic, &mbx);
1479 static netdev_features_t nicvf_fix_features(struct net_device *netdev,
1480 netdev_features_t features)
1482 struct nicvf *nic = netdev_priv(netdev);
1484 if ((features & NETIF_F_LOOPBACK) &&
1485 netif_running(netdev) && !nic->loopback_supported)
1486 features &= ~NETIF_F_LOOPBACK;
1491 static int nicvf_set_features(struct net_device *netdev,
1492 netdev_features_t features)
1494 struct nicvf *nic = netdev_priv(netdev);
1495 netdev_features_t changed = features ^ netdev->features;
1497 if (changed & NETIF_F_HW_VLAN_CTAG_RX)
1498 nicvf_config_vlan_stripping(nic, features);
1500 if ((changed & NETIF_F_LOOPBACK) && netif_running(netdev))
1501 return nicvf_config_loopback(nic, features);
1506 static const struct net_device_ops nicvf_netdev_ops = {
1507 .ndo_open = nicvf_open,
1508 .ndo_stop = nicvf_stop,
1509 .ndo_start_xmit = nicvf_xmit,
1510 .ndo_change_mtu = nicvf_change_mtu,
1511 .ndo_set_mac_address = nicvf_set_mac_address,
1512 .ndo_get_stats64 = nicvf_get_stats64,
1513 .ndo_tx_timeout = nicvf_tx_timeout,
1514 .ndo_fix_features = nicvf_fix_features,
1515 .ndo_set_features = nicvf_set_features,
1518 static int nicvf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1520 struct device *dev = &pdev->dev;
1521 struct net_device *netdev;
1526 err = pci_enable_device(pdev);
1528 dev_err(dev, "Failed to enable PCI device\n");
1532 err = pci_request_regions(pdev, DRV_NAME);
1534 dev_err(dev, "PCI request regions failed 0x%x\n", err);
1535 goto err_disable_device;
1538 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(48));
1540 dev_err(dev, "Unable to get usable DMA configuration\n");
1541 goto err_release_regions;
1544 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(48));
1546 dev_err(dev, "unable to get 48-bit DMA for consistent allocations\n");
1547 goto err_release_regions;
1550 qcount = netif_get_num_default_rss_queues();
1552 /* Restrict multiqset support only for host bound VFs */
1553 if (pdev->is_virtfn) {
1554 /* Set max number of queues per VF */
1555 qcount = min_t(int, num_online_cpus(),
1556 (MAX_SQS_PER_VF + 1) * MAX_CMP_QUEUES_PER_QS);
1559 netdev = alloc_etherdev_mqs(sizeof(struct nicvf), qcount, qcount);
1562 goto err_release_regions;
1565 pci_set_drvdata(pdev, netdev);
1567 SET_NETDEV_DEV(netdev, &pdev->dev);
1569 nic = netdev_priv(netdev);
1570 nic->netdev = netdev;
1573 nic->max_queues = qcount;
1575 /* MAP VF's configuration registers */
1576 nic->reg_base = pcim_iomap(pdev, PCI_CFG_REG_BAR_NUM, 0);
1577 if (!nic->reg_base) {
1578 dev_err(dev, "Cannot map config register space, aborting\n");
1580 goto err_free_netdev;
1583 err = nicvf_set_qset_resources(nic);
1585 goto err_free_netdev;
1587 /* Check if PF is alive and get MAC address for this VF */
1588 err = nicvf_register_misc_interrupt(nic);
1590 goto err_free_netdev;
1592 nicvf_send_vf_struct(nic);
1594 if (!pass1_silicon(nic->pdev))
1597 pci_read_config_word(nic->pdev, PCI_SUBSYSTEM_ID, &sdevid);
1598 if (sdevid == 0xA134)
1601 /* Check if this VF is in QS only mode */
1605 err = nicvf_set_real_num_queues(netdev, nic->tx_queues, nic->rx_queues);
1607 goto err_unregister_interrupts;
1609 netdev->hw_features = (NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
1610 NETIF_F_TSO | NETIF_F_GRO |
1611 NETIF_F_HW_VLAN_CTAG_RX);
1613 netdev->hw_features |= NETIF_F_RXHASH;
1615 netdev->features |= netdev->hw_features;
1616 netdev->hw_features |= NETIF_F_LOOPBACK;
1618 netdev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO;
1620 netdev->netdev_ops = &nicvf_netdev_ops;
1621 netdev->watchdog_timeo = NICVF_TX_TIMEOUT;
1623 INIT_WORK(&nic->reset_task, nicvf_reset_task);
1625 err = register_netdev(netdev);
1627 dev_err(dev, "Failed to register netdevice\n");
1628 goto err_unregister_interrupts;
1631 nic->msg_enable = debug;
1633 nicvf_set_ethtool_ops(netdev);
1637 err_unregister_interrupts:
1638 nicvf_unregister_interrupts(nic);
1640 pci_set_drvdata(pdev, NULL);
1641 free_netdev(netdev);
1642 err_release_regions:
1643 pci_release_regions(pdev);
1645 pci_disable_device(pdev);
1649 static void nicvf_remove(struct pci_dev *pdev)
1651 struct net_device *netdev = pci_get_drvdata(pdev);
1653 struct net_device *pnetdev;
1658 nic = netdev_priv(netdev);
1659 pnetdev = nic->pnicvf->netdev;
1661 /* Check if this Qset is assigned to different VF.
1662 * If yes, clean primary and all secondary Qsets.
1664 if (pnetdev && (pnetdev->reg_state == NETREG_REGISTERED))
1665 unregister_netdev(pnetdev);
1666 nicvf_unregister_interrupts(nic);
1667 pci_set_drvdata(pdev, NULL);
1668 free_netdev(netdev);
1669 pci_release_regions(pdev);
1670 pci_disable_device(pdev);
1673 static void nicvf_shutdown(struct pci_dev *pdev)
1678 static struct pci_driver nicvf_driver = {
1680 .id_table = nicvf_id_table,
1681 .probe = nicvf_probe,
1682 .remove = nicvf_remove,
1683 .shutdown = nicvf_shutdown,
1686 static int __init nicvf_init_module(void)
1688 pr_info("%s, ver %s\n", DRV_NAME, DRV_VERSION);
1690 return pci_register_driver(&nicvf_driver);
1693 static void __exit nicvf_cleanup_module(void)
1695 pci_unregister_driver(&nicvf_driver);
1698 module_init(nicvf_init_module);
1699 module_exit(nicvf_cleanup_module);