rtw88: debug: Fix uninitialized memory in debugfs code
[linux-2.6-microblaze.git] / drivers / net / ethernet / broadcom / bnxt / bnxt_ethtool.c
1 /* Broadcom NetXtreme-C/E network driver.
2  *
3  * Copyright (c) 2014-2016 Broadcom Corporation
4  * Copyright (c) 2016-2017 Broadcom Limited
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation.
9  */
10
11 #include <linux/ctype.h>
12 #include <linux/stringify.h>
13 #include <linux/ethtool.h>
14 #include <linux/linkmode.h>
15 #include <linux/interrupt.h>
16 #include <linux/pci.h>
17 #include <linux/etherdevice.h>
18 #include <linux/crc32.h>
19 #include <linux/firmware.h>
20 #include <linux/utsname.h>
21 #include <linux/time.h>
22 #include "bnxt_hsi.h"
23 #include "bnxt.h"
24 #include "bnxt_xdp.h"
25 #include "bnxt_ethtool.h"
26 #include "bnxt_nvm_defs.h"      /* NVRAM content constant and structure defs */
27 #include "bnxt_fw_hdr.h"        /* Firmware hdr constant and structure defs */
28 #include "bnxt_coredump.h"
29 #define FLASH_NVRAM_TIMEOUT     ((HWRM_CMD_TIMEOUT) * 100)
30 #define FLASH_PACKAGE_TIMEOUT   ((HWRM_CMD_TIMEOUT) * 200)
31 #define INSTALL_PACKAGE_TIMEOUT ((HWRM_CMD_TIMEOUT) * 200)
32
33 static u32 bnxt_get_msglevel(struct net_device *dev)
34 {
35         struct bnxt *bp = netdev_priv(dev);
36
37         return bp->msg_enable;
38 }
39
40 static void bnxt_set_msglevel(struct net_device *dev, u32 value)
41 {
42         struct bnxt *bp = netdev_priv(dev);
43
44         bp->msg_enable = value;
45 }
46
47 static int bnxt_get_coalesce(struct net_device *dev,
48                              struct ethtool_coalesce *coal)
49 {
50         struct bnxt *bp = netdev_priv(dev);
51         struct bnxt_coal *hw_coal;
52         u16 mult;
53
54         memset(coal, 0, sizeof(*coal));
55
56         coal->use_adaptive_rx_coalesce = bp->flags & BNXT_FLAG_DIM;
57
58         hw_coal = &bp->rx_coal;
59         mult = hw_coal->bufs_per_record;
60         coal->rx_coalesce_usecs = hw_coal->coal_ticks;
61         coal->rx_max_coalesced_frames = hw_coal->coal_bufs / mult;
62         coal->rx_coalesce_usecs_irq = hw_coal->coal_ticks_irq;
63         coal->rx_max_coalesced_frames_irq = hw_coal->coal_bufs_irq / mult;
64
65         hw_coal = &bp->tx_coal;
66         mult = hw_coal->bufs_per_record;
67         coal->tx_coalesce_usecs = hw_coal->coal_ticks;
68         coal->tx_max_coalesced_frames = hw_coal->coal_bufs / mult;
69         coal->tx_coalesce_usecs_irq = hw_coal->coal_ticks_irq;
70         coal->tx_max_coalesced_frames_irq = hw_coal->coal_bufs_irq / mult;
71
72         coal->stats_block_coalesce_usecs = bp->stats_coal_ticks;
73
74         return 0;
75 }
76
77 static int bnxt_set_coalesce(struct net_device *dev,
78                              struct ethtool_coalesce *coal)
79 {
80         struct bnxt *bp = netdev_priv(dev);
81         bool update_stats = false;
82         struct bnxt_coal *hw_coal;
83         int rc = 0;
84         u16 mult;
85
86         if (coal->use_adaptive_rx_coalesce) {
87                 bp->flags |= BNXT_FLAG_DIM;
88         } else {
89                 if (bp->flags & BNXT_FLAG_DIM) {
90                         bp->flags &= ~(BNXT_FLAG_DIM);
91                         goto reset_coalesce;
92                 }
93         }
94
95         hw_coal = &bp->rx_coal;
96         mult = hw_coal->bufs_per_record;
97         hw_coal->coal_ticks = coal->rx_coalesce_usecs;
98         hw_coal->coal_bufs = coal->rx_max_coalesced_frames * mult;
99         hw_coal->coal_ticks_irq = coal->rx_coalesce_usecs_irq;
100         hw_coal->coal_bufs_irq = coal->rx_max_coalesced_frames_irq * mult;
101
102         hw_coal = &bp->tx_coal;
103         mult = hw_coal->bufs_per_record;
104         hw_coal->coal_ticks = coal->tx_coalesce_usecs;
105         hw_coal->coal_bufs = coal->tx_max_coalesced_frames * mult;
106         hw_coal->coal_ticks_irq = coal->tx_coalesce_usecs_irq;
107         hw_coal->coal_bufs_irq = coal->tx_max_coalesced_frames_irq * mult;
108
109         if (bp->stats_coal_ticks != coal->stats_block_coalesce_usecs) {
110                 u32 stats_ticks = coal->stats_block_coalesce_usecs;
111
112                 /* Allow 0, which means disable. */
113                 if (stats_ticks)
114                         stats_ticks = clamp_t(u32, stats_ticks,
115                                               BNXT_MIN_STATS_COAL_TICKS,
116                                               BNXT_MAX_STATS_COAL_TICKS);
117                 stats_ticks = rounddown(stats_ticks, BNXT_MIN_STATS_COAL_TICKS);
118                 bp->stats_coal_ticks = stats_ticks;
119                 if (bp->stats_coal_ticks)
120                         bp->current_interval =
121                                 bp->stats_coal_ticks * HZ / 1000000;
122                 else
123                         bp->current_interval = BNXT_TIMER_INTERVAL;
124                 update_stats = true;
125         }
126
127 reset_coalesce:
128         if (netif_running(dev)) {
129                 if (update_stats) {
130                         rc = bnxt_close_nic(bp, true, false);
131                         if (!rc)
132                                 rc = bnxt_open_nic(bp, true, false);
133                 } else {
134                         rc = bnxt_hwrm_set_coal(bp);
135                 }
136         }
137
138         return rc;
139 }
140
141 static const char * const bnxt_ring_rx_stats_str[] = {
142         "rx_ucast_packets",
143         "rx_mcast_packets",
144         "rx_bcast_packets",
145         "rx_discards",
146         "rx_errors",
147         "rx_ucast_bytes",
148         "rx_mcast_bytes",
149         "rx_bcast_bytes",
150 };
151
152 static const char * const bnxt_ring_tx_stats_str[] = {
153         "tx_ucast_packets",
154         "tx_mcast_packets",
155         "tx_bcast_packets",
156         "tx_errors",
157         "tx_discards",
158         "tx_ucast_bytes",
159         "tx_mcast_bytes",
160         "tx_bcast_bytes",
161 };
162
163 static const char * const bnxt_ring_tpa_stats_str[] = {
164         "tpa_packets",
165         "tpa_bytes",
166         "tpa_events",
167         "tpa_aborts",
168 };
169
170 static const char * const bnxt_ring_tpa2_stats_str[] = {
171         "rx_tpa_eligible_pkt",
172         "rx_tpa_eligible_bytes",
173         "rx_tpa_pkt",
174         "rx_tpa_bytes",
175         "rx_tpa_errors",
176         "rx_tpa_events",
177 };
178
179 static const char * const bnxt_rx_sw_stats_str[] = {
180         "rx_l4_csum_errors",
181         "rx_resets",
182         "rx_buf_errors",
183 };
184
185 static const char * const bnxt_cmn_sw_stats_str[] = {
186         "missed_irqs",
187 };
188
189 #define BNXT_RX_STATS_ENTRY(counter)    \
190         { BNXT_RX_STATS_OFFSET(counter), __stringify(counter) }
191
192 #define BNXT_TX_STATS_ENTRY(counter)    \
193         { BNXT_TX_STATS_OFFSET(counter), __stringify(counter) }
194
195 #define BNXT_RX_STATS_EXT_ENTRY(counter)        \
196         { BNXT_RX_STATS_EXT_OFFSET(counter), __stringify(counter) }
197
198 #define BNXT_TX_STATS_EXT_ENTRY(counter)        \
199         { BNXT_TX_STATS_EXT_OFFSET(counter), __stringify(counter) }
200
201 #define BNXT_RX_STATS_EXT_PFC_ENTRY(n)                          \
202         BNXT_RX_STATS_EXT_ENTRY(pfc_pri##n##_rx_duration_us),   \
203         BNXT_RX_STATS_EXT_ENTRY(pfc_pri##n##_rx_transitions)
204
205 #define BNXT_TX_STATS_EXT_PFC_ENTRY(n)                          \
206         BNXT_TX_STATS_EXT_ENTRY(pfc_pri##n##_tx_duration_us),   \
207         BNXT_TX_STATS_EXT_ENTRY(pfc_pri##n##_tx_transitions)
208
209 #define BNXT_RX_STATS_EXT_PFC_ENTRIES                           \
210         BNXT_RX_STATS_EXT_PFC_ENTRY(0),                         \
211         BNXT_RX_STATS_EXT_PFC_ENTRY(1),                         \
212         BNXT_RX_STATS_EXT_PFC_ENTRY(2),                         \
213         BNXT_RX_STATS_EXT_PFC_ENTRY(3),                         \
214         BNXT_RX_STATS_EXT_PFC_ENTRY(4),                         \
215         BNXT_RX_STATS_EXT_PFC_ENTRY(5),                         \
216         BNXT_RX_STATS_EXT_PFC_ENTRY(6),                         \
217         BNXT_RX_STATS_EXT_PFC_ENTRY(7)
218
219 #define BNXT_TX_STATS_EXT_PFC_ENTRIES                           \
220         BNXT_TX_STATS_EXT_PFC_ENTRY(0),                         \
221         BNXT_TX_STATS_EXT_PFC_ENTRY(1),                         \
222         BNXT_TX_STATS_EXT_PFC_ENTRY(2),                         \
223         BNXT_TX_STATS_EXT_PFC_ENTRY(3),                         \
224         BNXT_TX_STATS_EXT_PFC_ENTRY(4),                         \
225         BNXT_TX_STATS_EXT_PFC_ENTRY(5),                         \
226         BNXT_TX_STATS_EXT_PFC_ENTRY(6),                         \
227         BNXT_TX_STATS_EXT_PFC_ENTRY(7)
228
229 #define BNXT_RX_STATS_EXT_COS_ENTRY(n)                          \
230         BNXT_RX_STATS_EXT_ENTRY(rx_bytes_cos##n),               \
231         BNXT_RX_STATS_EXT_ENTRY(rx_packets_cos##n)
232
233 #define BNXT_TX_STATS_EXT_COS_ENTRY(n)                          \
234         BNXT_TX_STATS_EXT_ENTRY(tx_bytes_cos##n),               \
235         BNXT_TX_STATS_EXT_ENTRY(tx_packets_cos##n)
236
237 #define BNXT_RX_STATS_EXT_COS_ENTRIES                           \
238         BNXT_RX_STATS_EXT_COS_ENTRY(0),                         \
239         BNXT_RX_STATS_EXT_COS_ENTRY(1),                         \
240         BNXT_RX_STATS_EXT_COS_ENTRY(2),                         \
241         BNXT_RX_STATS_EXT_COS_ENTRY(3),                         \
242         BNXT_RX_STATS_EXT_COS_ENTRY(4),                         \
243         BNXT_RX_STATS_EXT_COS_ENTRY(5),                         \
244         BNXT_RX_STATS_EXT_COS_ENTRY(6),                         \
245         BNXT_RX_STATS_EXT_COS_ENTRY(7)                          \
246
247 #define BNXT_TX_STATS_EXT_COS_ENTRIES                           \
248         BNXT_TX_STATS_EXT_COS_ENTRY(0),                         \
249         BNXT_TX_STATS_EXT_COS_ENTRY(1),                         \
250         BNXT_TX_STATS_EXT_COS_ENTRY(2),                         \
251         BNXT_TX_STATS_EXT_COS_ENTRY(3),                         \
252         BNXT_TX_STATS_EXT_COS_ENTRY(4),                         \
253         BNXT_TX_STATS_EXT_COS_ENTRY(5),                         \
254         BNXT_TX_STATS_EXT_COS_ENTRY(6),                         \
255         BNXT_TX_STATS_EXT_COS_ENTRY(7)                          \
256
257 #define BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(n)                  \
258         BNXT_RX_STATS_EXT_ENTRY(rx_discard_bytes_cos##n),       \
259         BNXT_RX_STATS_EXT_ENTRY(rx_discard_packets_cos##n)
260
261 #define BNXT_RX_STATS_EXT_DISCARD_COS_ENTRIES                           \
262         BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(0),                         \
263         BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(1),                         \
264         BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(2),                         \
265         BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(3),                         \
266         BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(4),                         \
267         BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(5),                         \
268         BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(6),                         \
269         BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(7)
270
271 #define BNXT_RX_STATS_PRI_ENTRY(counter, n)             \
272         { BNXT_RX_STATS_EXT_OFFSET(counter##_cos0),     \
273           __stringify(counter##_pri##n) }
274
275 #define BNXT_TX_STATS_PRI_ENTRY(counter, n)             \
276         { BNXT_TX_STATS_EXT_OFFSET(counter##_cos0),     \
277           __stringify(counter##_pri##n) }
278
279 #define BNXT_RX_STATS_PRI_ENTRIES(counter)              \
280         BNXT_RX_STATS_PRI_ENTRY(counter, 0),            \
281         BNXT_RX_STATS_PRI_ENTRY(counter, 1),            \
282         BNXT_RX_STATS_PRI_ENTRY(counter, 2),            \
283         BNXT_RX_STATS_PRI_ENTRY(counter, 3),            \
284         BNXT_RX_STATS_PRI_ENTRY(counter, 4),            \
285         BNXT_RX_STATS_PRI_ENTRY(counter, 5),            \
286         BNXT_RX_STATS_PRI_ENTRY(counter, 6),            \
287         BNXT_RX_STATS_PRI_ENTRY(counter, 7)
288
289 #define BNXT_TX_STATS_PRI_ENTRIES(counter)              \
290         BNXT_TX_STATS_PRI_ENTRY(counter, 0),            \
291         BNXT_TX_STATS_PRI_ENTRY(counter, 1),            \
292         BNXT_TX_STATS_PRI_ENTRY(counter, 2),            \
293         BNXT_TX_STATS_PRI_ENTRY(counter, 3),            \
294         BNXT_TX_STATS_PRI_ENTRY(counter, 4),            \
295         BNXT_TX_STATS_PRI_ENTRY(counter, 5),            \
296         BNXT_TX_STATS_PRI_ENTRY(counter, 6),            \
297         BNXT_TX_STATS_PRI_ENTRY(counter, 7)
298
299 enum {
300         RX_TOTAL_DISCARDS,
301         TX_TOTAL_DISCARDS,
302 };
303
304 static struct {
305         u64                     counter;
306         char                    string[ETH_GSTRING_LEN];
307 } bnxt_sw_func_stats[] = {
308         {0, "rx_total_discard_pkts"},
309         {0, "tx_total_discard_pkts"},
310 };
311
312 #define NUM_RING_RX_SW_STATS            ARRAY_SIZE(bnxt_rx_sw_stats_str)
313 #define NUM_RING_CMN_SW_STATS           ARRAY_SIZE(bnxt_cmn_sw_stats_str)
314 #define NUM_RING_RX_HW_STATS            ARRAY_SIZE(bnxt_ring_rx_stats_str)
315 #define NUM_RING_TX_HW_STATS            ARRAY_SIZE(bnxt_ring_tx_stats_str)
316
317 static const struct {
318         long offset;
319         char string[ETH_GSTRING_LEN];
320 } bnxt_port_stats_arr[] = {
321         BNXT_RX_STATS_ENTRY(rx_64b_frames),
322         BNXT_RX_STATS_ENTRY(rx_65b_127b_frames),
323         BNXT_RX_STATS_ENTRY(rx_128b_255b_frames),
324         BNXT_RX_STATS_ENTRY(rx_256b_511b_frames),
325         BNXT_RX_STATS_ENTRY(rx_512b_1023b_frames),
326         BNXT_RX_STATS_ENTRY(rx_1024b_1518b_frames),
327         BNXT_RX_STATS_ENTRY(rx_good_vlan_frames),
328         BNXT_RX_STATS_ENTRY(rx_1519b_2047b_frames),
329         BNXT_RX_STATS_ENTRY(rx_2048b_4095b_frames),
330         BNXT_RX_STATS_ENTRY(rx_4096b_9216b_frames),
331         BNXT_RX_STATS_ENTRY(rx_9217b_16383b_frames),
332         BNXT_RX_STATS_ENTRY(rx_total_frames),
333         BNXT_RX_STATS_ENTRY(rx_ucast_frames),
334         BNXT_RX_STATS_ENTRY(rx_mcast_frames),
335         BNXT_RX_STATS_ENTRY(rx_bcast_frames),
336         BNXT_RX_STATS_ENTRY(rx_fcs_err_frames),
337         BNXT_RX_STATS_ENTRY(rx_ctrl_frames),
338         BNXT_RX_STATS_ENTRY(rx_pause_frames),
339         BNXT_RX_STATS_ENTRY(rx_pfc_frames),
340         BNXT_RX_STATS_ENTRY(rx_align_err_frames),
341         BNXT_RX_STATS_ENTRY(rx_ovrsz_frames),
342         BNXT_RX_STATS_ENTRY(rx_jbr_frames),
343         BNXT_RX_STATS_ENTRY(rx_mtu_err_frames),
344         BNXT_RX_STATS_ENTRY(rx_tagged_frames),
345         BNXT_RX_STATS_ENTRY(rx_double_tagged_frames),
346         BNXT_RX_STATS_ENTRY(rx_good_frames),
347         BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri0),
348         BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri1),
349         BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri2),
350         BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri3),
351         BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri4),
352         BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri5),
353         BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri6),
354         BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri7),
355         BNXT_RX_STATS_ENTRY(rx_undrsz_frames),
356         BNXT_RX_STATS_ENTRY(rx_eee_lpi_events),
357         BNXT_RX_STATS_ENTRY(rx_eee_lpi_duration),
358         BNXT_RX_STATS_ENTRY(rx_bytes),
359         BNXT_RX_STATS_ENTRY(rx_runt_bytes),
360         BNXT_RX_STATS_ENTRY(rx_runt_frames),
361         BNXT_RX_STATS_ENTRY(rx_stat_discard),
362         BNXT_RX_STATS_ENTRY(rx_stat_err),
363
364         BNXT_TX_STATS_ENTRY(tx_64b_frames),
365         BNXT_TX_STATS_ENTRY(tx_65b_127b_frames),
366         BNXT_TX_STATS_ENTRY(tx_128b_255b_frames),
367         BNXT_TX_STATS_ENTRY(tx_256b_511b_frames),
368         BNXT_TX_STATS_ENTRY(tx_512b_1023b_frames),
369         BNXT_TX_STATS_ENTRY(tx_1024b_1518b_frames),
370         BNXT_TX_STATS_ENTRY(tx_good_vlan_frames),
371         BNXT_TX_STATS_ENTRY(tx_1519b_2047b_frames),
372         BNXT_TX_STATS_ENTRY(tx_2048b_4095b_frames),
373         BNXT_TX_STATS_ENTRY(tx_4096b_9216b_frames),
374         BNXT_TX_STATS_ENTRY(tx_9217b_16383b_frames),
375         BNXT_TX_STATS_ENTRY(tx_good_frames),
376         BNXT_TX_STATS_ENTRY(tx_total_frames),
377         BNXT_TX_STATS_ENTRY(tx_ucast_frames),
378         BNXT_TX_STATS_ENTRY(tx_mcast_frames),
379         BNXT_TX_STATS_ENTRY(tx_bcast_frames),
380         BNXT_TX_STATS_ENTRY(tx_pause_frames),
381         BNXT_TX_STATS_ENTRY(tx_pfc_frames),
382         BNXT_TX_STATS_ENTRY(tx_jabber_frames),
383         BNXT_TX_STATS_ENTRY(tx_fcs_err_frames),
384         BNXT_TX_STATS_ENTRY(tx_err),
385         BNXT_TX_STATS_ENTRY(tx_fifo_underruns),
386         BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri0),
387         BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri1),
388         BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri2),
389         BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri3),
390         BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri4),
391         BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri5),
392         BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri6),
393         BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri7),
394         BNXT_TX_STATS_ENTRY(tx_eee_lpi_events),
395         BNXT_TX_STATS_ENTRY(tx_eee_lpi_duration),
396         BNXT_TX_STATS_ENTRY(tx_total_collisions),
397         BNXT_TX_STATS_ENTRY(tx_bytes),
398         BNXT_TX_STATS_ENTRY(tx_xthol_frames),
399         BNXT_TX_STATS_ENTRY(tx_stat_discard),
400         BNXT_TX_STATS_ENTRY(tx_stat_error),
401 };
402
403 static const struct {
404         long offset;
405         char string[ETH_GSTRING_LEN];
406 } bnxt_port_stats_ext_arr[] = {
407         BNXT_RX_STATS_EXT_ENTRY(link_down_events),
408         BNXT_RX_STATS_EXT_ENTRY(continuous_pause_events),
409         BNXT_RX_STATS_EXT_ENTRY(resume_pause_events),
410         BNXT_RX_STATS_EXT_ENTRY(continuous_roce_pause_events),
411         BNXT_RX_STATS_EXT_ENTRY(resume_roce_pause_events),
412         BNXT_RX_STATS_EXT_COS_ENTRIES,
413         BNXT_RX_STATS_EXT_PFC_ENTRIES,
414         BNXT_RX_STATS_EXT_ENTRY(rx_bits),
415         BNXT_RX_STATS_EXT_ENTRY(rx_buffer_passed_threshold),
416         BNXT_RX_STATS_EXT_ENTRY(rx_pcs_symbol_err),
417         BNXT_RX_STATS_EXT_ENTRY(rx_corrected_bits),
418         BNXT_RX_STATS_EXT_DISCARD_COS_ENTRIES,
419 };
420
421 static const struct {
422         long offset;
423         char string[ETH_GSTRING_LEN];
424 } bnxt_tx_port_stats_ext_arr[] = {
425         BNXT_TX_STATS_EXT_COS_ENTRIES,
426         BNXT_TX_STATS_EXT_PFC_ENTRIES,
427 };
428
429 static const struct {
430         long base_off;
431         char string[ETH_GSTRING_LEN];
432 } bnxt_rx_bytes_pri_arr[] = {
433         BNXT_RX_STATS_PRI_ENTRIES(rx_bytes),
434 };
435
436 static const struct {
437         long base_off;
438         char string[ETH_GSTRING_LEN];
439 } bnxt_rx_pkts_pri_arr[] = {
440         BNXT_RX_STATS_PRI_ENTRIES(rx_packets),
441 };
442
443 static const struct {
444         long base_off;
445         char string[ETH_GSTRING_LEN];
446 } bnxt_tx_bytes_pri_arr[] = {
447         BNXT_TX_STATS_PRI_ENTRIES(tx_bytes),
448 };
449
450 static const struct {
451         long base_off;
452         char string[ETH_GSTRING_LEN];
453 } bnxt_tx_pkts_pri_arr[] = {
454         BNXT_TX_STATS_PRI_ENTRIES(tx_packets),
455 };
456
457 #define BNXT_NUM_SW_FUNC_STATS  ARRAY_SIZE(bnxt_sw_func_stats)
458 #define BNXT_NUM_PORT_STATS ARRAY_SIZE(bnxt_port_stats_arr)
459 #define BNXT_NUM_STATS_PRI                      \
460         (ARRAY_SIZE(bnxt_rx_bytes_pri_arr) +    \
461          ARRAY_SIZE(bnxt_rx_pkts_pri_arr) +     \
462          ARRAY_SIZE(bnxt_tx_bytes_pri_arr) +    \
463          ARRAY_SIZE(bnxt_tx_pkts_pri_arr))
464
465 static int bnxt_get_num_tpa_ring_stats(struct bnxt *bp)
466 {
467         if (BNXT_SUPPORTS_TPA(bp)) {
468                 if (bp->max_tpa_v2) {
469                         if (BNXT_CHIP_P5_THOR(bp))
470                                 return BNXT_NUM_TPA_RING_STATS_P5;
471                         return BNXT_NUM_TPA_RING_STATS_P5_SR2;
472                 }
473                 return BNXT_NUM_TPA_RING_STATS;
474         }
475         return 0;
476 }
477
478 static int bnxt_get_num_ring_stats(struct bnxt *bp)
479 {
480         int rx, tx, cmn;
481
482         rx = NUM_RING_RX_HW_STATS + NUM_RING_RX_SW_STATS +
483              bnxt_get_num_tpa_ring_stats(bp);
484         tx = NUM_RING_TX_HW_STATS;
485         cmn = NUM_RING_CMN_SW_STATS;
486         return rx * bp->rx_nr_rings + tx * bp->tx_nr_rings +
487                cmn * bp->cp_nr_rings;
488 }
489
490 static int bnxt_get_num_stats(struct bnxt *bp)
491 {
492         int num_stats = bnxt_get_num_ring_stats(bp);
493
494         num_stats += BNXT_NUM_SW_FUNC_STATS;
495
496         if (bp->flags & BNXT_FLAG_PORT_STATS)
497                 num_stats += BNXT_NUM_PORT_STATS;
498
499         if (bp->flags & BNXT_FLAG_PORT_STATS_EXT) {
500                 num_stats += bp->fw_rx_stats_ext_size +
501                              bp->fw_tx_stats_ext_size;
502                 if (bp->pri2cos_valid)
503                         num_stats += BNXT_NUM_STATS_PRI;
504         }
505
506         return num_stats;
507 }
508
509 static int bnxt_get_sset_count(struct net_device *dev, int sset)
510 {
511         struct bnxt *bp = netdev_priv(dev);
512
513         switch (sset) {
514         case ETH_SS_STATS:
515                 return bnxt_get_num_stats(bp);
516         case ETH_SS_TEST:
517                 if (!bp->num_tests)
518                         return -EOPNOTSUPP;
519                 return bp->num_tests;
520         default:
521                 return -EOPNOTSUPP;
522         }
523 }
524
525 static bool is_rx_ring(struct bnxt *bp, int ring_num)
526 {
527         return ring_num < bp->rx_nr_rings;
528 }
529
530 static bool is_tx_ring(struct bnxt *bp, int ring_num)
531 {
532         int tx_base = 0;
533
534         if (!(bp->flags & BNXT_FLAG_SHARED_RINGS))
535                 tx_base = bp->rx_nr_rings;
536
537         if (ring_num >= tx_base && ring_num < (tx_base + bp->tx_nr_rings))
538                 return true;
539         return false;
540 }
541
542 static void bnxt_get_ethtool_stats(struct net_device *dev,
543                                    struct ethtool_stats *stats, u64 *buf)
544 {
545         u32 i, j = 0;
546         struct bnxt *bp = netdev_priv(dev);
547         u32 tpa_stats;
548
549         if (!bp->bnapi) {
550                 j += bnxt_get_num_ring_stats(bp) + BNXT_NUM_SW_FUNC_STATS;
551                 goto skip_ring_stats;
552         }
553
554         for (i = 0; i < BNXT_NUM_SW_FUNC_STATS; i++)
555                 bnxt_sw_func_stats[i].counter = 0;
556
557         tpa_stats = bnxt_get_num_tpa_ring_stats(bp);
558         for (i = 0; i < bp->cp_nr_rings; i++) {
559                 struct bnxt_napi *bnapi = bp->bnapi[i];
560                 struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring;
561                 u64 *sw_stats = cpr->stats.sw_stats;
562                 u64 *sw;
563                 int k;
564
565                 if (is_rx_ring(bp, i)) {
566                         for (k = 0; k < NUM_RING_RX_HW_STATS; j++, k++)
567                                 buf[j] = sw_stats[k];
568                 }
569                 if (is_tx_ring(bp, i)) {
570                         k = NUM_RING_RX_HW_STATS;
571                         for (; k < NUM_RING_RX_HW_STATS + NUM_RING_TX_HW_STATS;
572                                j++, k++)
573                                 buf[j] = sw_stats[k];
574                 }
575                 if (!tpa_stats || !is_rx_ring(bp, i))
576                         goto skip_tpa_ring_stats;
577
578                 k = NUM_RING_RX_HW_STATS + NUM_RING_TX_HW_STATS;
579                 for (; k < NUM_RING_RX_HW_STATS + NUM_RING_TX_HW_STATS +
580                            tpa_stats; j++, k++)
581                         buf[j] = sw_stats[k];
582
583 skip_tpa_ring_stats:
584                 sw = (u64 *)&cpr->sw_stats.rx;
585                 if (is_rx_ring(bp, i)) {
586                         for (k = 0; k < NUM_RING_RX_SW_STATS; j++, k++)
587                                 buf[j] = sw[k];
588                 }
589
590                 sw = (u64 *)&cpr->sw_stats.cmn;
591                 for (k = 0; k < NUM_RING_CMN_SW_STATS; j++, k++)
592                         buf[j] = sw[k];
593
594                 bnxt_sw_func_stats[RX_TOTAL_DISCARDS].counter +=
595                         BNXT_GET_RING_STATS64(sw_stats, rx_discard_pkts);
596                 bnxt_sw_func_stats[TX_TOTAL_DISCARDS].counter +=
597                         BNXT_GET_RING_STATS64(sw_stats, tx_discard_pkts);
598         }
599
600         for (i = 0; i < BNXT_NUM_SW_FUNC_STATS; i++, j++)
601                 buf[j] = bnxt_sw_func_stats[i].counter;
602
603 skip_ring_stats:
604         if (bp->flags & BNXT_FLAG_PORT_STATS) {
605                 u64 *port_stats = bp->port_stats.sw_stats;
606
607                 for (i = 0; i < BNXT_NUM_PORT_STATS; i++, j++)
608                         buf[j] = *(port_stats + bnxt_port_stats_arr[i].offset);
609         }
610         if (bp->flags & BNXT_FLAG_PORT_STATS_EXT) {
611                 u64 *rx_port_stats_ext = bp->rx_port_stats_ext.sw_stats;
612                 u64 *tx_port_stats_ext = bp->tx_port_stats_ext.sw_stats;
613
614                 for (i = 0; i < bp->fw_rx_stats_ext_size; i++, j++) {
615                         buf[j] = *(rx_port_stats_ext +
616                                    bnxt_port_stats_ext_arr[i].offset);
617                 }
618                 for (i = 0; i < bp->fw_tx_stats_ext_size; i++, j++) {
619                         buf[j] = *(tx_port_stats_ext +
620                                    bnxt_tx_port_stats_ext_arr[i].offset);
621                 }
622                 if (bp->pri2cos_valid) {
623                         for (i = 0; i < 8; i++, j++) {
624                                 long n = bnxt_rx_bytes_pri_arr[i].base_off +
625                                          bp->pri2cos_idx[i];
626
627                                 buf[j] = *(rx_port_stats_ext + n);
628                         }
629                         for (i = 0; i < 8; i++, j++) {
630                                 long n = bnxt_rx_pkts_pri_arr[i].base_off +
631                                          bp->pri2cos_idx[i];
632
633                                 buf[j] = *(rx_port_stats_ext + n);
634                         }
635                         for (i = 0; i < 8; i++, j++) {
636                                 long n = bnxt_tx_bytes_pri_arr[i].base_off +
637                                          bp->pri2cos_idx[i];
638
639                                 buf[j] = *(tx_port_stats_ext + n);
640                         }
641                         for (i = 0; i < 8; i++, j++) {
642                                 long n = bnxt_tx_pkts_pri_arr[i].base_off +
643                                          bp->pri2cos_idx[i];
644
645                                 buf[j] = *(tx_port_stats_ext + n);
646                         }
647                 }
648         }
649 }
650
651 static void bnxt_get_strings(struct net_device *dev, u32 stringset, u8 *buf)
652 {
653         struct bnxt *bp = netdev_priv(dev);
654         static const char * const *str;
655         u32 i, j, num_str;
656
657         switch (stringset) {
658         case ETH_SS_STATS:
659                 for (i = 0; i < bp->cp_nr_rings; i++) {
660                         if (is_rx_ring(bp, i)) {
661                                 num_str = NUM_RING_RX_HW_STATS;
662                                 for (j = 0; j < num_str; j++) {
663                                         sprintf(buf, "[%d]: %s", i,
664                                                 bnxt_ring_rx_stats_str[j]);
665                                         buf += ETH_GSTRING_LEN;
666                                 }
667                         }
668                         if (is_tx_ring(bp, i)) {
669                                 num_str = NUM_RING_TX_HW_STATS;
670                                 for (j = 0; j < num_str; j++) {
671                                         sprintf(buf, "[%d]: %s", i,
672                                                 bnxt_ring_tx_stats_str[j]);
673                                         buf += ETH_GSTRING_LEN;
674                                 }
675                         }
676                         num_str = bnxt_get_num_tpa_ring_stats(bp);
677                         if (!num_str || !is_rx_ring(bp, i))
678                                 goto skip_tpa_stats;
679
680                         if (bp->max_tpa_v2)
681                                 str = bnxt_ring_tpa2_stats_str;
682                         else
683                                 str = bnxt_ring_tpa_stats_str;
684
685                         for (j = 0; j < num_str; j++) {
686                                 sprintf(buf, "[%d]: %s", i, str[j]);
687                                 buf += ETH_GSTRING_LEN;
688                         }
689 skip_tpa_stats:
690                         if (is_rx_ring(bp, i)) {
691                                 num_str = NUM_RING_RX_SW_STATS;
692                                 for (j = 0; j < num_str; j++) {
693                                         sprintf(buf, "[%d]: %s", i,
694                                                 bnxt_rx_sw_stats_str[j]);
695                                         buf += ETH_GSTRING_LEN;
696                                 }
697                         }
698                         num_str = NUM_RING_CMN_SW_STATS;
699                         for (j = 0; j < num_str; j++) {
700                                 sprintf(buf, "[%d]: %s", i,
701                                         bnxt_cmn_sw_stats_str[j]);
702                                 buf += ETH_GSTRING_LEN;
703                         }
704                 }
705                 for (i = 0; i < BNXT_NUM_SW_FUNC_STATS; i++) {
706                         strcpy(buf, bnxt_sw_func_stats[i].string);
707                         buf += ETH_GSTRING_LEN;
708                 }
709
710                 if (bp->flags & BNXT_FLAG_PORT_STATS) {
711                         for (i = 0; i < BNXT_NUM_PORT_STATS; i++) {
712                                 strcpy(buf, bnxt_port_stats_arr[i].string);
713                                 buf += ETH_GSTRING_LEN;
714                         }
715                 }
716                 if (bp->flags & BNXT_FLAG_PORT_STATS_EXT) {
717                         for (i = 0; i < bp->fw_rx_stats_ext_size; i++) {
718                                 strcpy(buf, bnxt_port_stats_ext_arr[i].string);
719                                 buf += ETH_GSTRING_LEN;
720                         }
721                         for (i = 0; i < bp->fw_tx_stats_ext_size; i++) {
722                                 strcpy(buf,
723                                        bnxt_tx_port_stats_ext_arr[i].string);
724                                 buf += ETH_GSTRING_LEN;
725                         }
726                         if (bp->pri2cos_valid) {
727                                 for (i = 0; i < 8; i++) {
728                                         strcpy(buf,
729                                                bnxt_rx_bytes_pri_arr[i].string);
730                                         buf += ETH_GSTRING_LEN;
731                                 }
732                                 for (i = 0; i < 8; i++) {
733                                         strcpy(buf,
734                                                bnxt_rx_pkts_pri_arr[i].string);
735                                         buf += ETH_GSTRING_LEN;
736                                 }
737                                 for (i = 0; i < 8; i++) {
738                                         strcpy(buf,
739                                                bnxt_tx_bytes_pri_arr[i].string);
740                                         buf += ETH_GSTRING_LEN;
741                                 }
742                                 for (i = 0; i < 8; i++) {
743                                         strcpy(buf,
744                                                bnxt_tx_pkts_pri_arr[i].string);
745                                         buf += ETH_GSTRING_LEN;
746                                 }
747                         }
748                 }
749                 break;
750         case ETH_SS_TEST:
751                 if (bp->num_tests)
752                         memcpy(buf, bp->test_info->string,
753                                bp->num_tests * ETH_GSTRING_LEN);
754                 break;
755         default:
756                 netdev_err(bp->dev, "bnxt_get_strings invalid request %x\n",
757                            stringset);
758                 break;
759         }
760 }
761
762 static void bnxt_get_ringparam(struct net_device *dev,
763                                struct ethtool_ringparam *ering)
764 {
765         struct bnxt *bp = netdev_priv(dev);
766
767         ering->rx_max_pending = BNXT_MAX_RX_DESC_CNT;
768         ering->rx_jumbo_max_pending = BNXT_MAX_RX_JUM_DESC_CNT;
769         ering->tx_max_pending = BNXT_MAX_TX_DESC_CNT;
770
771         ering->rx_pending = bp->rx_ring_size;
772         ering->rx_jumbo_pending = bp->rx_agg_ring_size;
773         ering->tx_pending = bp->tx_ring_size;
774 }
775
776 static int bnxt_set_ringparam(struct net_device *dev,
777                               struct ethtool_ringparam *ering)
778 {
779         struct bnxt *bp = netdev_priv(dev);
780
781         if ((ering->rx_pending > BNXT_MAX_RX_DESC_CNT) ||
782             (ering->tx_pending > BNXT_MAX_TX_DESC_CNT) ||
783             (ering->tx_pending <= MAX_SKB_FRAGS))
784                 return -EINVAL;
785
786         if (netif_running(dev))
787                 bnxt_close_nic(bp, false, false);
788
789         bp->rx_ring_size = ering->rx_pending;
790         bp->tx_ring_size = ering->tx_pending;
791         bnxt_set_ring_params(bp);
792
793         if (netif_running(dev))
794                 return bnxt_open_nic(bp, false, false);
795
796         return 0;
797 }
798
799 static void bnxt_get_channels(struct net_device *dev,
800                               struct ethtool_channels *channel)
801 {
802         struct bnxt *bp = netdev_priv(dev);
803         struct bnxt_hw_resc *hw_resc = &bp->hw_resc;
804         int max_rx_rings, max_tx_rings, tcs;
805         int max_tx_sch_inputs, tx_grps;
806
807         /* Get the most up-to-date max_tx_sch_inputs. */
808         if (netif_running(dev) && BNXT_NEW_RM(bp))
809                 bnxt_hwrm_func_resc_qcaps(bp, false);
810         max_tx_sch_inputs = hw_resc->max_tx_sch_inputs;
811
812         bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, true);
813         if (max_tx_sch_inputs)
814                 max_tx_rings = min_t(int, max_tx_rings, max_tx_sch_inputs);
815
816         tcs = netdev_get_num_tc(dev);
817         tx_grps = max(tcs, 1);
818         if (bp->tx_nr_rings_xdp)
819                 tx_grps++;
820         max_tx_rings /= tx_grps;
821         channel->max_combined = min_t(int, max_rx_rings, max_tx_rings);
822
823         if (bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, false)) {
824                 max_rx_rings = 0;
825                 max_tx_rings = 0;
826         }
827         if (max_tx_sch_inputs)
828                 max_tx_rings = min_t(int, max_tx_rings, max_tx_sch_inputs);
829
830         if (tcs > 1)
831                 max_tx_rings /= tcs;
832
833         channel->max_rx = max_rx_rings;
834         channel->max_tx = max_tx_rings;
835         channel->max_other = 0;
836         if (bp->flags & BNXT_FLAG_SHARED_RINGS) {
837                 channel->combined_count = bp->rx_nr_rings;
838                 if (BNXT_CHIP_TYPE_NITRO_A0(bp))
839                         channel->combined_count--;
840         } else {
841                 if (!BNXT_CHIP_TYPE_NITRO_A0(bp)) {
842                         channel->rx_count = bp->rx_nr_rings;
843                         channel->tx_count = bp->tx_nr_rings_per_tc;
844                 }
845         }
846 }
847
848 static int bnxt_set_channels(struct net_device *dev,
849                              struct ethtool_channels *channel)
850 {
851         struct bnxt *bp = netdev_priv(dev);
852         int req_tx_rings, req_rx_rings, tcs;
853         bool sh = false;
854         int tx_xdp = 0;
855         int rc = 0;
856
857         if (channel->other_count)
858                 return -EINVAL;
859
860         if (!channel->combined_count &&
861             (!channel->rx_count || !channel->tx_count))
862                 return -EINVAL;
863
864         if (channel->combined_count &&
865             (channel->rx_count || channel->tx_count))
866                 return -EINVAL;
867
868         if (BNXT_CHIP_TYPE_NITRO_A0(bp) && (channel->rx_count ||
869                                             channel->tx_count))
870                 return -EINVAL;
871
872         if (channel->combined_count)
873                 sh = true;
874
875         tcs = netdev_get_num_tc(dev);
876
877         req_tx_rings = sh ? channel->combined_count : channel->tx_count;
878         req_rx_rings = sh ? channel->combined_count : channel->rx_count;
879         if (bp->tx_nr_rings_xdp) {
880                 if (!sh) {
881                         netdev_err(dev, "Only combined mode supported when XDP is enabled.\n");
882                         return -EINVAL;
883                 }
884                 tx_xdp = req_rx_rings;
885         }
886         rc = bnxt_check_rings(bp, req_tx_rings, req_rx_rings, sh, tcs, tx_xdp);
887         if (rc) {
888                 netdev_warn(dev, "Unable to allocate the requested rings\n");
889                 return rc;
890         }
891
892         if (bnxt_get_nr_rss_ctxs(bp, req_rx_rings) !=
893             bnxt_get_nr_rss_ctxs(bp, bp->rx_nr_rings) &&
894             (dev->priv_flags & IFF_RXFH_CONFIGURED)) {
895                 netdev_warn(dev, "RSS table size change required, RSS table entries must be default to proceed\n");
896                 return -EINVAL;
897         }
898
899         if (netif_running(dev)) {
900                 if (BNXT_PF(bp)) {
901                         /* TODO CHIMP_FW: Send message to all VF's
902                          * before PF unload
903                          */
904                 }
905                 rc = bnxt_close_nic(bp, true, false);
906                 if (rc) {
907                         netdev_err(bp->dev, "Set channel failure rc :%x\n",
908                                    rc);
909                         return rc;
910                 }
911         }
912
913         if (sh) {
914                 bp->flags |= BNXT_FLAG_SHARED_RINGS;
915                 bp->rx_nr_rings = channel->combined_count;
916                 bp->tx_nr_rings_per_tc = channel->combined_count;
917         } else {
918                 bp->flags &= ~BNXT_FLAG_SHARED_RINGS;
919                 bp->rx_nr_rings = channel->rx_count;
920                 bp->tx_nr_rings_per_tc = channel->tx_count;
921         }
922         bp->tx_nr_rings_xdp = tx_xdp;
923         bp->tx_nr_rings = bp->tx_nr_rings_per_tc + tx_xdp;
924         if (tcs > 1)
925                 bp->tx_nr_rings = bp->tx_nr_rings_per_tc * tcs + tx_xdp;
926
927         bp->cp_nr_rings = sh ? max_t(int, bp->tx_nr_rings, bp->rx_nr_rings) :
928                                bp->tx_nr_rings + bp->rx_nr_rings;
929
930         /* After changing number of rx channels, update NTUPLE feature. */
931         netdev_update_features(dev);
932         if (netif_running(dev)) {
933                 rc = bnxt_open_nic(bp, true, false);
934                 if ((!rc) && BNXT_PF(bp)) {
935                         /* TODO CHIMP_FW: Send message to all VF's
936                          * to renable
937                          */
938                 }
939         } else {
940                 rc = bnxt_reserve_rings(bp, true);
941         }
942
943         return rc;
944 }
945
946 #ifdef CONFIG_RFS_ACCEL
947 static int bnxt_grxclsrlall(struct bnxt *bp, struct ethtool_rxnfc *cmd,
948                             u32 *rule_locs)
949 {
950         int i, j = 0;
951
952         cmd->data = bp->ntp_fltr_count;
953         for (i = 0; i < BNXT_NTP_FLTR_HASH_SIZE; i++) {
954                 struct hlist_head *head;
955                 struct bnxt_ntuple_filter *fltr;
956
957                 head = &bp->ntp_fltr_hash_tbl[i];
958                 rcu_read_lock();
959                 hlist_for_each_entry_rcu(fltr, head, hash) {
960                         if (j == cmd->rule_cnt)
961                                 break;
962                         rule_locs[j++] = fltr->sw_id;
963                 }
964                 rcu_read_unlock();
965                 if (j == cmd->rule_cnt)
966                         break;
967         }
968         cmd->rule_cnt = j;
969         return 0;
970 }
971
972 static int bnxt_grxclsrule(struct bnxt *bp, struct ethtool_rxnfc *cmd)
973 {
974         struct ethtool_rx_flow_spec *fs =
975                 (struct ethtool_rx_flow_spec *)&cmd->fs;
976         struct bnxt_ntuple_filter *fltr;
977         struct flow_keys *fkeys;
978         int i, rc = -EINVAL;
979
980         if (fs->location >= BNXT_NTP_FLTR_MAX_FLTR)
981                 return rc;
982
983         for (i = 0; i < BNXT_NTP_FLTR_HASH_SIZE; i++) {
984                 struct hlist_head *head;
985
986                 head = &bp->ntp_fltr_hash_tbl[i];
987                 rcu_read_lock();
988                 hlist_for_each_entry_rcu(fltr, head, hash) {
989                         if (fltr->sw_id == fs->location)
990                                 goto fltr_found;
991                 }
992                 rcu_read_unlock();
993         }
994         return rc;
995
996 fltr_found:
997         fkeys = &fltr->fkeys;
998         if (fkeys->basic.n_proto == htons(ETH_P_IP)) {
999                 if (fkeys->basic.ip_proto == IPPROTO_TCP)
1000                         fs->flow_type = TCP_V4_FLOW;
1001                 else if (fkeys->basic.ip_proto == IPPROTO_UDP)
1002                         fs->flow_type = UDP_V4_FLOW;
1003                 else
1004                         goto fltr_err;
1005
1006                 fs->h_u.tcp_ip4_spec.ip4src = fkeys->addrs.v4addrs.src;
1007                 fs->m_u.tcp_ip4_spec.ip4src = cpu_to_be32(~0);
1008
1009                 fs->h_u.tcp_ip4_spec.ip4dst = fkeys->addrs.v4addrs.dst;
1010                 fs->m_u.tcp_ip4_spec.ip4dst = cpu_to_be32(~0);
1011
1012                 fs->h_u.tcp_ip4_spec.psrc = fkeys->ports.src;
1013                 fs->m_u.tcp_ip4_spec.psrc = cpu_to_be16(~0);
1014
1015                 fs->h_u.tcp_ip4_spec.pdst = fkeys->ports.dst;
1016                 fs->m_u.tcp_ip4_spec.pdst = cpu_to_be16(~0);
1017         } else {
1018                 int i;
1019
1020                 if (fkeys->basic.ip_proto == IPPROTO_TCP)
1021                         fs->flow_type = TCP_V6_FLOW;
1022                 else if (fkeys->basic.ip_proto == IPPROTO_UDP)
1023                         fs->flow_type = UDP_V6_FLOW;
1024                 else
1025                         goto fltr_err;
1026
1027                 *(struct in6_addr *)&fs->h_u.tcp_ip6_spec.ip6src[0] =
1028                         fkeys->addrs.v6addrs.src;
1029                 *(struct in6_addr *)&fs->h_u.tcp_ip6_spec.ip6dst[0] =
1030                         fkeys->addrs.v6addrs.dst;
1031                 for (i = 0; i < 4; i++) {
1032                         fs->m_u.tcp_ip6_spec.ip6src[i] = cpu_to_be32(~0);
1033                         fs->m_u.tcp_ip6_spec.ip6dst[i] = cpu_to_be32(~0);
1034                 }
1035                 fs->h_u.tcp_ip6_spec.psrc = fkeys->ports.src;
1036                 fs->m_u.tcp_ip6_spec.psrc = cpu_to_be16(~0);
1037
1038                 fs->h_u.tcp_ip6_spec.pdst = fkeys->ports.dst;
1039                 fs->m_u.tcp_ip6_spec.pdst = cpu_to_be16(~0);
1040         }
1041
1042         fs->ring_cookie = fltr->rxq;
1043         rc = 0;
1044
1045 fltr_err:
1046         rcu_read_unlock();
1047
1048         return rc;
1049 }
1050 #endif
1051
1052 static u64 get_ethtool_ipv4_rss(struct bnxt *bp)
1053 {
1054         if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4)
1055                 return RXH_IP_SRC | RXH_IP_DST;
1056         return 0;
1057 }
1058
1059 static u64 get_ethtool_ipv6_rss(struct bnxt *bp)
1060 {
1061         if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6)
1062                 return RXH_IP_SRC | RXH_IP_DST;
1063         return 0;
1064 }
1065
1066 static int bnxt_grxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd)
1067 {
1068         cmd->data = 0;
1069         switch (cmd->flow_type) {
1070         case TCP_V4_FLOW:
1071                 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4)
1072                         cmd->data |= RXH_IP_SRC | RXH_IP_DST |
1073                                      RXH_L4_B_0_1 | RXH_L4_B_2_3;
1074                 cmd->data |= get_ethtool_ipv4_rss(bp);
1075                 break;
1076         case UDP_V4_FLOW:
1077                 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4)
1078                         cmd->data |= RXH_IP_SRC | RXH_IP_DST |
1079                                      RXH_L4_B_0_1 | RXH_L4_B_2_3;
1080                 fallthrough;
1081         case SCTP_V4_FLOW:
1082         case AH_ESP_V4_FLOW:
1083         case AH_V4_FLOW:
1084         case ESP_V4_FLOW:
1085         case IPV4_FLOW:
1086                 cmd->data |= get_ethtool_ipv4_rss(bp);
1087                 break;
1088
1089         case TCP_V6_FLOW:
1090                 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6)
1091                         cmd->data |= RXH_IP_SRC | RXH_IP_DST |
1092                                      RXH_L4_B_0_1 | RXH_L4_B_2_3;
1093                 cmd->data |= get_ethtool_ipv6_rss(bp);
1094                 break;
1095         case UDP_V6_FLOW:
1096                 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6)
1097                         cmd->data |= RXH_IP_SRC | RXH_IP_DST |
1098                                      RXH_L4_B_0_1 | RXH_L4_B_2_3;
1099                 fallthrough;
1100         case SCTP_V6_FLOW:
1101         case AH_ESP_V6_FLOW:
1102         case AH_V6_FLOW:
1103         case ESP_V6_FLOW:
1104         case IPV6_FLOW:
1105                 cmd->data |= get_ethtool_ipv6_rss(bp);
1106                 break;
1107         }
1108         return 0;
1109 }
1110
1111 #define RXH_4TUPLE (RXH_IP_SRC | RXH_IP_DST | RXH_L4_B_0_1 | RXH_L4_B_2_3)
1112 #define RXH_2TUPLE (RXH_IP_SRC | RXH_IP_DST)
1113
1114 static int bnxt_srxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd)
1115 {
1116         u32 rss_hash_cfg = bp->rss_hash_cfg;
1117         int tuple, rc = 0;
1118
1119         if (cmd->data == RXH_4TUPLE)
1120                 tuple = 4;
1121         else if (cmd->data == RXH_2TUPLE)
1122                 tuple = 2;
1123         else if (!cmd->data)
1124                 tuple = 0;
1125         else
1126                 return -EINVAL;
1127
1128         if (cmd->flow_type == TCP_V4_FLOW) {
1129                 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4;
1130                 if (tuple == 4)
1131                         rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4;
1132         } else if (cmd->flow_type == UDP_V4_FLOW) {
1133                 if (tuple == 4 && !(bp->flags & BNXT_FLAG_UDP_RSS_CAP))
1134                         return -EINVAL;
1135                 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4;
1136                 if (tuple == 4)
1137                         rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4;
1138         } else if (cmd->flow_type == TCP_V6_FLOW) {
1139                 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6;
1140                 if (tuple == 4)
1141                         rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6;
1142         } else if (cmd->flow_type == UDP_V6_FLOW) {
1143                 if (tuple == 4 && !(bp->flags & BNXT_FLAG_UDP_RSS_CAP))
1144                         return -EINVAL;
1145                 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6;
1146                 if (tuple == 4)
1147                         rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6;
1148         } else if (tuple == 4) {
1149                 return -EINVAL;
1150         }
1151
1152         switch (cmd->flow_type) {
1153         case TCP_V4_FLOW:
1154         case UDP_V4_FLOW:
1155         case SCTP_V4_FLOW:
1156         case AH_ESP_V4_FLOW:
1157         case AH_V4_FLOW:
1158         case ESP_V4_FLOW:
1159         case IPV4_FLOW:
1160                 if (tuple == 2)
1161                         rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4;
1162                 else if (!tuple)
1163                         rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4;
1164                 break;
1165
1166         case TCP_V6_FLOW:
1167         case UDP_V6_FLOW:
1168         case SCTP_V6_FLOW:
1169         case AH_ESP_V6_FLOW:
1170         case AH_V6_FLOW:
1171         case ESP_V6_FLOW:
1172         case IPV6_FLOW:
1173                 if (tuple == 2)
1174                         rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6;
1175                 else if (!tuple)
1176                         rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6;
1177                 break;
1178         }
1179
1180         if (bp->rss_hash_cfg == rss_hash_cfg)
1181                 return 0;
1182
1183         bp->rss_hash_cfg = rss_hash_cfg;
1184         if (netif_running(bp->dev)) {
1185                 bnxt_close_nic(bp, false, false);
1186                 rc = bnxt_open_nic(bp, false, false);
1187         }
1188         return rc;
1189 }
1190
1191 static int bnxt_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
1192                           u32 *rule_locs)
1193 {
1194         struct bnxt *bp = netdev_priv(dev);
1195         int rc = 0;
1196
1197         switch (cmd->cmd) {
1198 #ifdef CONFIG_RFS_ACCEL
1199         case ETHTOOL_GRXRINGS:
1200                 cmd->data = bp->rx_nr_rings;
1201                 break;
1202
1203         case ETHTOOL_GRXCLSRLCNT:
1204                 cmd->rule_cnt = bp->ntp_fltr_count;
1205                 cmd->data = BNXT_NTP_FLTR_MAX_FLTR;
1206                 break;
1207
1208         case ETHTOOL_GRXCLSRLALL:
1209                 rc = bnxt_grxclsrlall(bp, cmd, (u32 *)rule_locs);
1210                 break;
1211
1212         case ETHTOOL_GRXCLSRULE:
1213                 rc = bnxt_grxclsrule(bp, cmd);
1214                 break;
1215 #endif
1216
1217         case ETHTOOL_GRXFH:
1218                 rc = bnxt_grxfh(bp, cmd);
1219                 break;
1220
1221         default:
1222                 rc = -EOPNOTSUPP;
1223                 break;
1224         }
1225
1226         return rc;
1227 }
1228
1229 static int bnxt_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
1230 {
1231         struct bnxt *bp = netdev_priv(dev);
1232         int rc;
1233
1234         switch (cmd->cmd) {
1235         case ETHTOOL_SRXFH:
1236                 rc = bnxt_srxfh(bp, cmd);
1237                 break;
1238
1239         default:
1240                 rc = -EOPNOTSUPP;
1241                 break;
1242         }
1243         return rc;
1244 }
1245
1246 u32 bnxt_get_rxfh_indir_size(struct net_device *dev)
1247 {
1248         struct bnxt *bp = netdev_priv(dev);
1249
1250         if (bp->flags & BNXT_FLAG_CHIP_P5)
1251                 return ALIGN(bp->rx_nr_rings, BNXT_RSS_TABLE_ENTRIES_P5);
1252         return HW_HASH_INDEX_SIZE;
1253 }
1254
1255 static u32 bnxt_get_rxfh_key_size(struct net_device *dev)
1256 {
1257         return HW_HASH_KEY_SIZE;
1258 }
1259
1260 static int bnxt_get_rxfh(struct net_device *dev, u32 *indir, u8 *key,
1261                          u8 *hfunc)
1262 {
1263         struct bnxt *bp = netdev_priv(dev);
1264         struct bnxt_vnic_info *vnic;
1265         u32 i, tbl_size;
1266
1267         if (hfunc)
1268                 *hfunc = ETH_RSS_HASH_TOP;
1269
1270         if (!bp->vnic_info)
1271                 return 0;
1272
1273         vnic = &bp->vnic_info[0];
1274         if (indir && bp->rss_indir_tbl) {
1275                 tbl_size = bnxt_get_rxfh_indir_size(dev);
1276                 for (i = 0; i < tbl_size; i++)
1277                         indir[i] = bp->rss_indir_tbl[i];
1278         }
1279
1280         if (key && vnic->rss_hash_key)
1281                 memcpy(key, vnic->rss_hash_key, HW_HASH_KEY_SIZE);
1282
1283         return 0;
1284 }
1285
1286 static int bnxt_set_rxfh(struct net_device *dev, const u32 *indir,
1287                          const u8 *key, const u8 hfunc)
1288 {
1289         struct bnxt *bp = netdev_priv(dev);
1290         int rc = 0;
1291
1292         if (hfunc && hfunc != ETH_RSS_HASH_TOP)
1293                 return -EOPNOTSUPP;
1294
1295         if (key)
1296                 return -EOPNOTSUPP;
1297
1298         if (indir) {
1299                 u32 i, pad, tbl_size = bnxt_get_rxfh_indir_size(dev);
1300
1301                 for (i = 0; i < tbl_size; i++)
1302                         bp->rss_indir_tbl[i] = indir[i];
1303                 pad = bp->rss_indir_tbl_entries - tbl_size;
1304                 if (pad)
1305                         memset(&bp->rss_indir_tbl[i], 0, pad * sizeof(u16));
1306         }
1307
1308         if (netif_running(bp->dev)) {
1309                 bnxt_close_nic(bp, false, false);
1310                 rc = bnxt_open_nic(bp, false, false);
1311         }
1312         return rc;
1313 }
1314
1315 static void bnxt_get_drvinfo(struct net_device *dev,
1316                              struct ethtool_drvinfo *info)
1317 {
1318         struct bnxt *bp = netdev_priv(dev);
1319
1320         strlcpy(info->driver, DRV_MODULE_NAME, sizeof(info->driver));
1321         strlcpy(info->fw_version, bp->fw_ver_str, sizeof(info->fw_version));
1322         strlcpy(info->bus_info, pci_name(bp->pdev), sizeof(info->bus_info));
1323         info->n_stats = bnxt_get_num_stats(bp);
1324         info->testinfo_len = bp->num_tests;
1325         /* TODO CHIMP_FW: eeprom dump details */
1326         info->eedump_len = 0;
1327         /* TODO CHIMP FW: reg dump details */
1328         info->regdump_len = 0;
1329 }
1330
1331 static int bnxt_get_regs_len(struct net_device *dev)
1332 {
1333         struct bnxt *bp = netdev_priv(dev);
1334         int reg_len;
1335
1336         if (!BNXT_PF(bp))
1337                 return -EOPNOTSUPP;
1338
1339         reg_len = BNXT_PXP_REG_LEN;
1340
1341         if (bp->fw_cap & BNXT_FW_CAP_PCIE_STATS_SUPPORTED)
1342                 reg_len += sizeof(struct pcie_ctx_hw_stats);
1343
1344         return reg_len;
1345 }
1346
1347 static void bnxt_get_regs(struct net_device *dev, struct ethtool_regs *regs,
1348                           void *_p)
1349 {
1350         struct pcie_ctx_hw_stats *hw_pcie_stats;
1351         struct hwrm_pcie_qstats_input req = {0};
1352         struct bnxt *bp = netdev_priv(dev);
1353         dma_addr_t hw_pcie_stats_addr;
1354         int rc;
1355
1356         regs->version = 0;
1357         bnxt_dbg_hwrm_rd_reg(bp, 0, BNXT_PXP_REG_LEN / 4, _p);
1358
1359         if (!(bp->fw_cap & BNXT_FW_CAP_PCIE_STATS_SUPPORTED))
1360                 return;
1361
1362         hw_pcie_stats = dma_alloc_coherent(&bp->pdev->dev,
1363                                            sizeof(*hw_pcie_stats),
1364                                            &hw_pcie_stats_addr, GFP_KERNEL);
1365         if (!hw_pcie_stats)
1366                 return;
1367
1368         regs->version = 1;
1369         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PCIE_QSTATS, -1, -1);
1370         req.pcie_stat_size = cpu_to_le16(sizeof(*hw_pcie_stats));
1371         req.pcie_stat_host_addr = cpu_to_le64(hw_pcie_stats_addr);
1372         mutex_lock(&bp->hwrm_cmd_lock);
1373         rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
1374         if (!rc) {
1375                 __le64 *src = (__le64 *)hw_pcie_stats;
1376                 u64 *dst = (u64 *)(_p + BNXT_PXP_REG_LEN);
1377                 int i;
1378
1379                 for (i = 0; i < sizeof(*hw_pcie_stats) / sizeof(__le64); i++)
1380                         dst[i] = le64_to_cpu(src[i]);
1381         }
1382         mutex_unlock(&bp->hwrm_cmd_lock);
1383         dma_free_coherent(&bp->pdev->dev, sizeof(*hw_pcie_stats), hw_pcie_stats,
1384                           hw_pcie_stats_addr);
1385 }
1386
1387 static void bnxt_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
1388 {
1389         struct bnxt *bp = netdev_priv(dev);
1390
1391         wol->supported = 0;
1392         wol->wolopts = 0;
1393         memset(&wol->sopass, 0, sizeof(wol->sopass));
1394         if (bp->flags & BNXT_FLAG_WOL_CAP) {
1395                 wol->supported = WAKE_MAGIC;
1396                 if (bp->wol)
1397                         wol->wolopts = WAKE_MAGIC;
1398         }
1399 }
1400
1401 static int bnxt_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
1402 {
1403         struct bnxt *bp = netdev_priv(dev);
1404
1405         if (wol->wolopts & ~WAKE_MAGIC)
1406                 return -EINVAL;
1407
1408         if (wol->wolopts & WAKE_MAGIC) {
1409                 if (!(bp->flags & BNXT_FLAG_WOL_CAP))
1410                         return -EINVAL;
1411                 if (!bp->wol) {
1412                         if (bnxt_hwrm_alloc_wol_fltr(bp))
1413                                 return -EBUSY;
1414                         bp->wol = 1;
1415                 }
1416         } else {
1417                 if (bp->wol) {
1418                         if (bnxt_hwrm_free_wol_fltr(bp))
1419                                 return -EBUSY;
1420                         bp->wol = 0;
1421                 }
1422         }
1423         return 0;
1424 }
1425
1426 u32 _bnxt_fw_to_ethtool_adv_spds(u16 fw_speeds, u8 fw_pause)
1427 {
1428         u32 speed_mask = 0;
1429
1430         /* TODO: support 25GB, 40GB, 50GB with different cable type */
1431         /* set the advertised speeds */
1432         if (fw_speeds & BNXT_LINK_SPEED_MSK_100MB)
1433                 speed_mask |= ADVERTISED_100baseT_Full;
1434         if (fw_speeds & BNXT_LINK_SPEED_MSK_1GB)
1435                 speed_mask |= ADVERTISED_1000baseT_Full;
1436         if (fw_speeds & BNXT_LINK_SPEED_MSK_2_5GB)
1437                 speed_mask |= ADVERTISED_2500baseX_Full;
1438         if (fw_speeds & BNXT_LINK_SPEED_MSK_10GB)
1439                 speed_mask |= ADVERTISED_10000baseT_Full;
1440         if (fw_speeds & BNXT_LINK_SPEED_MSK_40GB)
1441                 speed_mask |= ADVERTISED_40000baseCR4_Full;
1442
1443         if ((fw_pause & BNXT_LINK_PAUSE_BOTH) == BNXT_LINK_PAUSE_BOTH)
1444                 speed_mask |= ADVERTISED_Pause;
1445         else if (fw_pause & BNXT_LINK_PAUSE_TX)
1446                 speed_mask |= ADVERTISED_Asym_Pause;
1447         else if (fw_pause & BNXT_LINK_PAUSE_RX)
1448                 speed_mask |= ADVERTISED_Pause | ADVERTISED_Asym_Pause;
1449
1450         return speed_mask;
1451 }
1452
1453 #define BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, name)\
1454 {                                                                       \
1455         if ((fw_speeds) & BNXT_LINK_SPEED_MSK_100MB)                    \
1456                 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1457                                                      100baseT_Full);    \
1458         if ((fw_speeds) & BNXT_LINK_SPEED_MSK_1GB)                      \
1459                 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1460                                                      1000baseT_Full);   \
1461         if ((fw_speeds) & BNXT_LINK_SPEED_MSK_10GB)                     \
1462                 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1463                                                      10000baseT_Full);  \
1464         if ((fw_speeds) & BNXT_LINK_SPEED_MSK_25GB)                     \
1465                 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1466                                                      25000baseCR_Full); \
1467         if ((fw_speeds) & BNXT_LINK_SPEED_MSK_40GB)                     \
1468                 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1469                                                      40000baseCR4_Full);\
1470         if ((fw_speeds) & BNXT_LINK_SPEED_MSK_50GB)                     \
1471                 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1472                                                      50000baseCR2_Full);\
1473         if ((fw_speeds) & BNXT_LINK_SPEED_MSK_100GB)                    \
1474                 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1475                                                      100000baseCR4_Full);\
1476         if ((fw_pause) & BNXT_LINK_PAUSE_RX) {                          \
1477                 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1478                                                      Pause);            \
1479                 if (!((fw_pause) & BNXT_LINK_PAUSE_TX))                 \
1480                         ethtool_link_ksettings_add_link_mode(           \
1481                                         lk_ksettings, name, Asym_Pause);\
1482         } else if ((fw_pause) & BNXT_LINK_PAUSE_TX) {                   \
1483                 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1484                                                      Asym_Pause);       \
1485         }                                                               \
1486 }
1487
1488 #define BNXT_ETHTOOL_TO_FW_SPDS(fw_speeds, lk_ksettings, name)          \
1489 {                                                                       \
1490         if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name,   \
1491                                                   100baseT_Full) ||     \
1492             ethtool_link_ksettings_test_link_mode(lk_ksettings, name,   \
1493                                                   100baseT_Half))       \
1494                 (fw_speeds) |= BNXT_LINK_SPEED_MSK_100MB;               \
1495         if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name,   \
1496                                                   1000baseT_Full) ||    \
1497             ethtool_link_ksettings_test_link_mode(lk_ksettings, name,   \
1498                                                   1000baseT_Half))      \
1499                 (fw_speeds) |= BNXT_LINK_SPEED_MSK_1GB;                 \
1500         if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name,   \
1501                                                   10000baseT_Full))     \
1502                 (fw_speeds) |= BNXT_LINK_SPEED_MSK_10GB;                \
1503         if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name,   \
1504                                                   25000baseCR_Full))    \
1505                 (fw_speeds) |= BNXT_LINK_SPEED_MSK_25GB;                \
1506         if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name,   \
1507                                                   40000baseCR4_Full))   \
1508                 (fw_speeds) |= BNXT_LINK_SPEED_MSK_40GB;                \
1509         if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name,   \
1510                                                   50000baseCR2_Full))   \
1511                 (fw_speeds) |= BNXT_LINK_SPEED_MSK_50GB;                \
1512         if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name,   \
1513                                                   100000baseCR4_Full))  \
1514                 (fw_speeds) |= BNXT_LINK_SPEED_MSK_100GB;               \
1515 }
1516
1517 #define BNXT_FW_TO_ETHTOOL_PAM4_SPDS(fw_speeds, lk_ksettings, name)     \
1518 {                                                                       \
1519         if ((fw_speeds) & BNXT_LINK_PAM4_SPEED_MSK_50GB)                \
1520                 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1521                                                      50000baseCR_Full); \
1522         if ((fw_speeds) & BNXT_LINK_PAM4_SPEED_MSK_100GB)               \
1523                 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1524                                                      100000baseCR2_Full);\
1525         if ((fw_speeds) & BNXT_LINK_PAM4_SPEED_MSK_200GB)               \
1526                 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1527                                                      200000baseCR4_Full);\
1528 }
1529
1530 #define BNXT_ETHTOOL_TO_FW_PAM4_SPDS(fw_speeds, lk_ksettings, name)     \
1531 {                                                                       \
1532         if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name,   \
1533                                                   50000baseCR_Full))    \
1534                 (fw_speeds) |= BNXT_LINK_PAM4_SPEED_MSK_50GB;           \
1535         if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name,   \
1536                                                   100000baseCR2_Full))  \
1537                 (fw_speeds) |= BNXT_LINK_PAM4_SPEED_MSK_100GB;          \
1538         if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name,   \
1539                                                   200000baseCR4_Full))  \
1540                 (fw_speeds) |= BNXT_LINK_PAM4_SPEED_MSK_200GB;          \
1541 }
1542
1543 static void bnxt_fw_to_ethtool_advertised_fec(struct bnxt_link_info *link_info,
1544                                 struct ethtool_link_ksettings *lk_ksettings)
1545 {
1546         u16 fec_cfg = link_info->fec_cfg;
1547
1548         if ((fec_cfg & BNXT_FEC_NONE) || !(fec_cfg & BNXT_FEC_AUTONEG)) {
1549                 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_NONE_BIT,
1550                                  lk_ksettings->link_modes.advertising);
1551                 return;
1552         }
1553         if (fec_cfg & BNXT_FEC_ENC_BASE_R)
1554                 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_BASER_BIT,
1555                                  lk_ksettings->link_modes.advertising);
1556         if (fec_cfg & BNXT_FEC_ENC_RS)
1557                 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_RS_BIT,
1558                                  lk_ksettings->link_modes.advertising);
1559         if (fec_cfg & BNXT_FEC_ENC_LLRS)
1560                 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_LLRS_BIT,
1561                                  lk_ksettings->link_modes.advertising);
1562 }
1563
1564 static void bnxt_fw_to_ethtool_advertised_spds(struct bnxt_link_info *link_info,
1565                                 struct ethtool_link_ksettings *lk_ksettings)
1566 {
1567         u16 fw_speeds = link_info->advertising;
1568         u8 fw_pause = 0;
1569
1570         if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
1571                 fw_pause = link_info->auto_pause_setting;
1572
1573         BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, advertising);
1574         fw_speeds = link_info->advertising_pam4;
1575         BNXT_FW_TO_ETHTOOL_PAM4_SPDS(fw_speeds, lk_ksettings, advertising);
1576         bnxt_fw_to_ethtool_advertised_fec(link_info, lk_ksettings);
1577 }
1578
1579 static void bnxt_fw_to_ethtool_lp_adv(struct bnxt_link_info *link_info,
1580                                 struct ethtool_link_ksettings *lk_ksettings)
1581 {
1582         u16 fw_speeds = link_info->lp_auto_link_speeds;
1583         u8 fw_pause = 0;
1584
1585         if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
1586                 fw_pause = link_info->lp_pause;
1587
1588         BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings,
1589                                 lp_advertising);
1590         fw_speeds = link_info->lp_auto_pam4_link_speeds;
1591         BNXT_FW_TO_ETHTOOL_PAM4_SPDS(fw_speeds, lk_ksettings, lp_advertising);
1592 }
1593
1594 static void bnxt_fw_to_ethtool_support_fec(struct bnxt_link_info *link_info,
1595                                 struct ethtool_link_ksettings *lk_ksettings)
1596 {
1597         u16 fec_cfg = link_info->fec_cfg;
1598
1599         if (fec_cfg & BNXT_FEC_NONE) {
1600                 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_NONE_BIT,
1601                                  lk_ksettings->link_modes.supported);
1602                 return;
1603         }
1604         if (fec_cfg & BNXT_FEC_ENC_BASE_R_CAP)
1605                 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_BASER_BIT,
1606                                  lk_ksettings->link_modes.supported);
1607         if (fec_cfg & BNXT_FEC_ENC_RS_CAP)
1608                 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_RS_BIT,
1609                                  lk_ksettings->link_modes.supported);
1610         if (fec_cfg & BNXT_FEC_ENC_LLRS_CAP)
1611                 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_LLRS_BIT,
1612                                  lk_ksettings->link_modes.supported);
1613 }
1614
1615 static void bnxt_fw_to_ethtool_support_spds(struct bnxt_link_info *link_info,
1616                                 struct ethtool_link_ksettings *lk_ksettings)
1617 {
1618         u16 fw_speeds = link_info->support_speeds;
1619
1620         BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, 0, lk_ksettings, supported);
1621         fw_speeds = link_info->support_pam4_speeds;
1622         BNXT_FW_TO_ETHTOOL_PAM4_SPDS(fw_speeds, lk_ksettings, supported);
1623
1624         ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, Pause);
1625         ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
1626                                              Asym_Pause);
1627
1628         if (link_info->support_auto_speeds ||
1629             link_info->support_pam4_auto_speeds)
1630                 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
1631                                                      Autoneg);
1632         bnxt_fw_to_ethtool_support_fec(link_info, lk_ksettings);
1633 }
1634
1635 u32 bnxt_fw_to_ethtool_speed(u16 fw_link_speed)
1636 {
1637         switch (fw_link_speed) {
1638         case BNXT_LINK_SPEED_100MB:
1639                 return SPEED_100;
1640         case BNXT_LINK_SPEED_1GB:
1641                 return SPEED_1000;
1642         case BNXT_LINK_SPEED_2_5GB:
1643                 return SPEED_2500;
1644         case BNXT_LINK_SPEED_10GB:
1645                 return SPEED_10000;
1646         case BNXT_LINK_SPEED_20GB:
1647                 return SPEED_20000;
1648         case BNXT_LINK_SPEED_25GB:
1649                 return SPEED_25000;
1650         case BNXT_LINK_SPEED_40GB:
1651                 return SPEED_40000;
1652         case BNXT_LINK_SPEED_50GB:
1653                 return SPEED_50000;
1654         case BNXT_LINK_SPEED_100GB:
1655                 return SPEED_100000;
1656         default:
1657                 return SPEED_UNKNOWN;
1658         }
1659 }
1660
1661 static int bnxt_get_link_ksettings(struct net_device *dev,
1662                                    struct ethtool_link_ksettings *lk_ksettings)
1663 {
1664         struct bnxt *bp = netdev_priv(dev);
1665         struct bnxt_link_info *link_info = &bp->link_info;
1666         struct ethtool_link_settings *base = &lk_ksettings->base;
1667         u32 ethtool_speed;
1668
1669         ethtool_link_ksettings_zero_link_mode(lk_ksettings, supported);
1670         mutex_lock(&bp->link_lock);
1671         bnxt_fw_to_ethtool_support_spds(link_info, lk_ksettings);
1672
1673         ethtool_link_ksettings_zero_link_mode(lk_ksettings, advertising);
1674         if (link_info->autoneg) {
1675                 bnxt_fw_to_ethtool_advertised_spds(link_info, lk_ksettings);
1676                 ethtool_link_ksettings_add_link_mode(lk_ksettings,
1677                                                      advertising, Autoneg);
1678                 base->autoneg = AUTONEG_ENABLE;
1679                 base->duplex = DUPLEX_UNKNOWN;
1680                 if (link_info->phy_link_status == BNXT_LINK_LINK) {
1681                         bnxt_fw_to_ethtool_lp_adv(link_info, lk_ksettings);
1682                         if (link_info->duplex & BNXT_LINK_DUPLEX_FULL)
1683                                 base->duplex = DUPLEX_FULL;
1684                         else
1685                                 base->duplex = DUPLEX_HALF;
1686                 }
1687                 ethtool_speed = bnxt_fw_to_ethtool_speed(link_info->link_speed);
1688         } else {
1689                 base->autoneg = AUTONEG_DISABLE;
1690                 ethtool_speed =
1691                         bnxt_fw_to_ethtool_speed(link_info->req_link_speed);
1692                 base->duplex = DUPLEX_HALF;
1693                 if (link_info->req_duplex == BNXT_LINK_DUPLEX_FULL)
1694                         base->duplex = DUPLEX_FULL;
1695         }
1696         base->speed = ethtool_speed;
1697
1698         base->port = PORT_NONE;
1699         if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) {
1700                 base->port = PORT_TP;
1701                 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
1702                                                      TP);
1703                 ethtool_link_ksettings_add_link_mode(lk_ksettings, advertising,
1704                                                      TP);
1705         } else {
1706                 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
1707                                                      FIBRE);
1708                 ethtool_link_ksettings_add_link_mode(lk_ksettings, advertising,
1709                                                      FIBRE);
1710
1711                 if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_DAC)
1712                         base->port = PORT_DA;
1713                 else if (link_info->media_type ==
1714                          PORT_PHY_QCFG_RESP_MEDIA_TYPE_FIBRE)
1715                         base->port = PORT_FIBRE;
1716         }
1717         base->phy_address = link_info->phy_addr;
1718         mutex_unlock(&bp->link_lock);
1719
1720         return 0;
1721 }
1722
1723 static int bnxt_force_link_speed(struct net_device *dev, u32 ethtool_speed)
1724 {
1725         struct bnxt *bp = netdev_priv(dev);
1726         struct bnxt_link_info *link_info = &bp->link_info;
1727         u16 support_pam4_spds = link_info->support_pam4_speeds;
1728         u16 support_spds = link_info->support_speeds;
1729         u8 sig_mode = BNXT_SIG_MODE_NRZ;
1730         u16 fw_speed = 0;
1731
1732         switch (ethtool_speed) {
1733         case SPEED_100:
1734                 if (support_spds & BNXT_LINK_SPEED_MSK_100MB)
1735                         fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_100MB;
1736                 break;
1737         case SPEED_1000:
1738                 if (support_spds & BNXT_LINK_SPEED_MSK_1GB)
1739                         fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_1GB;
1740                 break;
1741         case SPEED_2500:
1742                 if (support_spds & BNXT_LINK_SPEED_MSK_2_5GB)
1743                         fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_2_5GB;
1744                 break;
1745         case SPEED_10000:
1746                 if (support_spds & BNXT_LINK_SPEED_MSK_10GB)
1747                         fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_10GB;
1748                 break;
1749         case SPEED_20000:
1750                 if (support_spds & BNXT_LINK_SPEED_MSK_20GB)
1751                         fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_20GB;
1752                 break;
1753         case SPEED_25000:
1754                 if (support_spds & BNXT_LINK_SPEED_MSK_25GB)
1755                         fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_25GB;
1756                 break;
1757         case SPEED_40000:
1758                 if (support_spds & BNXT_LINK_SPEED_MSK_40GB)
1759                         fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_40GB;
1760                 break;
1761         case SPEED_50000:
1762                 if (support_spds & BNXT_LINK_SPEED_MSK_50GB) {
1763                         fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_50GB;
1764                 } else if (support_pam4_spds & BNXT_LINK_PAM4_SPEED_MSK_50GB) {
1765                         fw_speed = PORT_PHY_CFG_REQ_FORCE_PAM4_LINK_SPEED_50GB;
1766                         sig_mode = BNXT_SIG_MODE_PAM4;
1767                 }
1768                 break;
1769         case SPEED_100000:
1770                 if (support_spds & BNXT_LINK_SPEED_MSK_100GB) {
1771                         fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_100GB;
1772                 } else if (support_pam4_spds & BNXT_LINK_PAM4_SPEED_MSK_100GB) {
1773                         fw_speed = PORT_PHY_CFG_REQ_FORCE_PAM4_LINK_SPEED_100GB;
1774                         sig_mode = BNXT_SIG_MODE_PAM4;
1775                 }
1776                 break;
1777         case SPEED_200000:
1778                 if (support_pam4_spds & BNXT_LINK_PAM4_SPEED_MSK_200GB) {
1779                         fw_speed = PORT_PHY_CFG_REQ_FORCE_PAM4_LINK_SPEED_200GB;
1780                         sig_mode = BNXT_SIG_MODE_PAM4;
1781                 }
1782                 break;
1783         }
1784
1785         if (!fw_speed) {
1786                 netdev_err(dev, "unsupported speed!\n");
1787                 return -EINVAL;
1788         }
1789
1790         if (link_info->req_link_speed == fw_speed &&
1791             link_info->req_signal_mode == sig_mode &&
1792             link_info->autoneg == 0)
1793                 return -EALREADY;
1794
1795         link_info->req_link_speed = fw_speed;
1796         link_info->req_signal_mode = sig_mode;
1797         link_info->req_duplex = BNXT_LINK_DUPLEX_FULL;
1798         link_info->autoneg = 0;
1799         link_info->advertising = 0;
1800         link_info->advertising_pam4 = 0;
1801
1802         return 0;
1803 }
1804
1805 u16 bnxt_get_fw_auto_link_speeds(u32 advertising)
1806 {
1807         u16 fw_speed_mask = 0;
1808
1809         /* only support autoneg at speed 100, 1000, and 10000 */
1810         if (advertising & (ADVERTISED_100baseT_Full |
1811                            ADVERTISED_100baseT_Half)) {
1812                 fw_speed_mask |= BNXT_LINK_SPEED_MSK_100MB;
1813         }
1814         if (advertising & (ADVERTISED_1000baseT_Full |
1815                            ADVERTISED_1000baseT_Half)) {
1816                 fw_speed_mask |= BNXT_LINK_SPEED_MSK_1GB;
1817         }
1818         if (advertising & ADVERTISED_10000baseT_Full)
1819                 fw_speed_mask |= BNXT_LINK_SPEED_MSK_10GB;
1820
1821         if (advertising & ADVERTISED_40000baseCR4_Full)
1822                 fw_speed_mask |= BNXT_LINK_SPEED_MSK_40GB;
1823
1824         return fw_speed_mask;
1825 }
1826
1827 static int bnxt_set_link_ksettings(struct net_device *dev,
1828                            const struct ethtool_link_ksettings *lk_ksettings)
1829 {
1830         struct bnxt *bp = netdev_priv(dev);
1831         struct bnxt_link_info *link_info = &bp->link_info;
1832         const struct ethtool_link_settings *base = &lk_ksettings->base;
1833         bool set_pause = false;
1834         u32 speed;
1835         int rc = 0;
1836
1837         if (!BNXT_PHY_CFG_ABLE(bp))
1838                 return -EOPNOTSUPP;
1839
1840         mutex_lock(&bp->link_lock);
1841         if (base->autoneg == AUTONEG_ENABLE) {
1842                 link_info->advertising = 0;
1843                 link_info->advertising_pam4 = 0;
1844                 BNXT_ETHTOOL_TO_FW_SPDS(link_info->advertising, lk_ksettings,
1845                                         advertising);
1846                 BNXT_ETHTOOL_TO_FW_PAM4_SPDS(link_info->advertising_pam4,
1847                                              lk_ksettings, advertising);
1848                 link_info->autoneg |= BNXT_AUTONEG_SPEED;
1849                 if (!link_info->advertising && !link_info->advertising_pam4) {
1850                         link_info->advertising = link_info->support_auto_speeds;
1851                         link_info->advertising_pam4 =
1852                                 link_info->support_pam4_auto_speeds;
1853                 }
1854                 /* any change to autoneg will cause link change, therefore the
1855                  * driver should put back the original pause setting in autoneg
1856                  */
1857                 set_pause = true;
1858         } else {
1859                 u8 phy_type = link_info->phy_type;
1860
1861                 if (phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASET  ||
1862                     phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASETE ||
1863                     link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) {
1864                         netdev_err(dev, "10GBase-T devices must autoneg\n");
1865                         rc = -EINVAL;
1866                         goto set_setting_exit;
1867                 }
1868                 if (base->duplex == DUPLEX_HALF) {
1869                         netdev_err(dev, "HALF DUPLEX is not supported!\n");
1870                         rc = -EINVAL;
1871                         goto set_setting_exit;
1872                 }
1873                 speed = base->speed;
1874                 rc = bnxt_force_link_speed(dev, speed);
1875                 if (rc) {
1876                         if (rc == -EALREADY)
1877                                 rc = 0;
1878                         goto set_setting_exit;
1879                 }
1880         }
1881
1882         if (netif_running(dev))
1883                 rc = bnxt_hwrm_set_link_setting(bp, set_pause, false);
1884
1885 set_setting_exit:
1886         mutex_unlock(&bp->link_lock);
1887         return rc;
1888 }
1889
1890 static int bnxt_get_fecparam(struct net_device *dev,
1891                              struct ethtool_fecparam *fec)
1892 {
1893         struct bnxt *bp = netdev_priv(dev);
1894         struct bnxt_link_info *link_info;
1895         u8 active_fec;
1896         u16 fec_cfg;
1897
1898         link_info = &bp->link_info;
1899         fec_cfg = link_info->fec_cfg;
1900         active_fec = link_info->active_fec_sig_mode &
1901                      PORT_PHY_QCFG_RESP_ACTIVE_FEC_MASK;
1902         if (fec_cfg & BNXT_FEC_NONE) {
1903                 fec->fec = ETHTOOL_FEC_NONE;
1904                 fec->active_fec = ETHTOOL_FEC_NONE;
1905                 return 0;
1906         }
1907         if (fec_cfg & BNXT_FEC_AUTONEG)
1908                 fec->fec |= ETHTOOL_FEC_AUTO;
1909         if (fec_cfg & BNXT_FEC_ENC_BASE_R)
1910                 fec->fec |= ETHTOOL_FEC_BASER;
1911         if (fec_cfg & BNXT_FEC_ENC_RS)
1912                 fec->fec |= ETHTOOL_FEC_RS;
1913         if (fec_cfg & BNXT_FEC_ENC_LLRS)
1914                 fec->fec |= ETHTOOL_FEC_LLRS;
1915
1916         switch (active_fec) {
1917         case PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_CLAUSE74_ACTIVE:
1918                 fec->active_fec |= ETHTOOL_FEC_BASER;
1919                 break;
1920         case PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_CLAUSE91_ACTIVE:
1921         case PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_RS544_1XN_ACTIVE:
1922         case PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_RS544_IEEE_ACTIVE:
1923                 fec->active_fec |= ETHTOOL_FEC_RS;
1924                 break;
1925         case PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_RS272_1XN_ACTIVE:
1926         case PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_RS272_IEEE_ACTIVE:
1927                 fec->active_fec |= ETHTOOL_FEC_LLRS;
1928                 break;
1929         }
1930         return 0;
1931 }
1932
1933 static u32 bnxt_ethtool_forced_fec_to_fw(struct bnxt_link_info *link_info,
1934                                          u32 fec)
1935 {
1936         u32 fw_fec = PORT_PHY_CFG_REQ_FLAGS_FEC_AUTONEG_DISABLE;
1937
1938         if (fec & ETHTOOL_FEC_BASER)
1939                 fw_fec |= BNXT_FEC_BASE_R_ON(link_info);
1940         else if (fec & ETHTOOL_FEC_RS)
1941                 fw_fec |= BNXT_FEC_RS_ON(link_info);
1942         else if (fec & ETHTOOL_FEC_LLRS)
1943                 fw_fec |= BNXT_FEC_LLRS_ON;
1944         return fw_fec;
1945 }
1946
1947 static int bnxt_set_fecparam(struct net_device *dev,
1948                              struct ethtool_fecparam *fecparam)
1949 {
1950         struct hwrm_port_phy_cfg_input req = {0};
1951         struct bnxt *bp = netdev_priv(dev);
1952         struct bnxt_link_info *link_info;
1953         u32 new_cfg, fec = fecparam->fec;
1954         u16 fec_cfg;
1955         int rc;
1956
1957         link_info = &bp->link_info;
1958         fec_cfg = link_info->fec_cfg;
1959         if (fec_cfg & BNXT_FEC_NONE)
1960                 return -EOPNOTSUPP;
1961
1962         if (fec & ETHTOOL_FEC_OFF) {
1963                 new_cfg = PORT_PHY_CFG_REQ_FLAGS_FEC_AUTONEG_DISABLE |
1964                           BNXT_FEC_ALL_OFF(link_info);
1965                 goto apply_fec;
1966         }
1967         if (((fec & ETHTOOL_FEC_AUTO) && !(fec_cfg & BNXT_FEC_AUTONEG_CAP)) ||
1968             ((fec & ETHTOOL_FEC_RS) && !(fec_cfg & BNXT_FEC_ENC_RS_CAP)) ||
1969             ((fec & ETHTOOL_FEC_LLRS) && !(fec_cfg & BNXT_FEC_ENC_LLRS_CAP)) ||
1970             ((fec & ETHTOOL_FEC_BASER) && !(fec_cfg & BNXT_FEC_ENC_BASE_R_CAP)))
1971                 return -EINVAL;
1972
1973         if (fec & ETHTOOL_FEC_AUTO) {
1974                 if (!link_info->autoneg)
1975                         return -EINVAL;
1976                 new_cfg = PORT_PHY_CFG_REQ_FLAGS_FEC_AUTONEG_ENABLE;
1977         } else {
1978                 new_cfg = bnxt_ethtool_forced_fec_to_fw(link_info, fec);
1979         }
1980
1981 apply_fec:
1982         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_CFG, -1, -1);
1983         req.flags = cpu_to_le32(new_cfg | PORT_PHY_CFG_REQ_FLAGS_RESET_PHY);
1984         rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
1985         /* update current settings */
1986         if (!rc) {
1987                 mutex_lock(&bp->link_lock);
1988                 bnxt_update_link(bp, false);
1989                 mutex_unlock(&bp->link_lock);
1990         }
1991         return rc;
1992 }
1993
1994 static void bnxt_get_pauseparam(struct net_device *dev,
1995                                 struct ethtool_pauseparam *epause)
1996 {
1997         struct bnxt *bp = netdev_priv(dev);
1998         struct bnxt_link_info *link_info = &bp->link_info;
1999
2000         if (BNXT_VF(bp))
2001                 return;
2002         epause->autoneg = !!(link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL);
2003         epause->rx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_RX);
2004         epause->tx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_TX);
2005 }
2006
2007 static void bnxt_get_pause_stats(struct net_device *dev,
2008                                  struct ethtool_pause_stats *epstat)
2009 {
2010         struct bnxt *bp = netdev_priv(dev);
2011         u64 *rx, *tx;
2012
2013         if (BNXT_VF(bp) || !(bp->flags & BNXT_FLAG_PORT_STATS))
2014                 return;
2015
2016         rx = bp->port_stats.sw_stats;
2017         tx = bp->port_stats.sw_stats + BNXT_TX_PORT_STATS_BYTE_OFFSET / 8;
2018
2019         epstat->rx_pause_frames = BNXT_GET_RX_PORT_STATS64(rx, rx_pause_frames);
2020         epstat->tx_pause_frames = BNXT_GET_TX_PORT_STATS64(tx, tx_pause_frames);
2021 }
2022
2023 static int bnxt_set_pauseparam(struct net_device *dev,
2024                                struct ethtool_pauseparam *epause)
2025 {
2026         int rc = 0;
2027         struct bnxt *bp = netdev_priv(dev);
2028         struct bnxt_link_info *link_info = &bp->link_info;
2029
2030         if (!BNXT_PHY_CFG_ABLE(bp))
2031                 return -EOPNOTSUPP;
2032
2033         mutex_lock(&bp->link_lock);
2034         if (epause->autoneg) {
2035                 if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) {
2036                         rc = -EINVAL;
2037                         goto pause_exit;
2038                 }
2039
2040                 link_info->autoneg |= BNXT_AUTONEG_FLOW_CTRL;
2041                 if (bp->hwrm_spec_code >= 0x10201)
2042                         link_info->req_flow_ctrl =
2043                                 PORT_PHY_CFG_REQ_AUTO_PAUSE_AUTONEG_PAUSE;
2044         } else {
2045                 /* when transition from auto pause to force pause,
2046                  * force a link change
2047                  */
2048                 if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
2049                         link_info->force_link_chng = true;
2050                 link_info->autoneg &= ~BNXT_AUTONEG_FLOW_CTRL;
2051                 link_info->req_flow_ctrl = 0;
2052         }
2053         if (epause->rx_pause)
2054                 link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_RX;
2055
2056         if (epause->tx_pause)
2057                 link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_TX;
2058
2059         if (netif_running(dev))
2060                 rc = bnxt_hwrm_set_pause(bp);
2061
2062 pause_exit:
2063         mutex_unlock(&bp->link_lock);
2064         return rc;
2065 }
2066
2067 static u32 bnxt_get_link(struct net_device *dev)
2068 {
2069         struct bnxt *bp = netdev_priv(dev);
2070
2071         /* TODO: handle MF, VF, driver close case */
2072         return bp->link_info.link_up;
2073 }
2074
2075 int bnxt_hwrm_nvm_get_dev_info(struct bnxt *bp,
2076                                struct hwrm_nvm_get_dev_info_output *nvm_dev_info)
2077 {
2078         struct hwrm_nvm_get_dev_info_output *resp = bp->hwrm_cmd_resp_addr;
2079         struct hwrm_nvm_get_dev_info_input req = {0};
2080         int rc;
2081
2082         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_DEV_INFO, -1, -1);
2083         mutex_lock(&bp->hwrm_cmd_lock);
2084         rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2085         if (!rc)
2086                 memcpy(nvm_dev_info, resp, sizeof(*resp));
2087         mutex_unlock(&bp->hwrm_cmd_lock);
2088         return rc;
2089 }
2090
2091 static void bnxt_print_admin_err(struct bnxt *bp)
2092 {
2093         netdev_info(bp->dev, "PF does not have admin privileges to flash or reset the device\n");
2094 }
2095
2096 static int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal,
2097                                 u16 ext, u16 *index, u32 *item_length,
2098                                 u32 *data_length);
2099
2100 static int bnxt_flash_nvram(struct net_device *dev,
2101                             u16 dir_type,
2102                             u16 dir_ordinal,
2103                             u16 dir_ext,
2104                             u16 dir_attr,
2105                             const u8 *data,
2106                             size_t data_len)
2107 {
2108         struct bnxt *bp = netdev_priv(dev);
2109         int rc;
2110         struct hwrm_nvm_write_input req = {0};
2111         dma_addr_t dma_handle;
2112         u8 *kmem;
2113
2114         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_WRITE, -1, -1);
2115
2116         req.dir_type = cpu_to_le16(dir_type);
2117         req.dir_ordinal = cpu_to_le16(dir_ordinal);
2118         req.dir_ext = cpu_to_le16(dir_ext);
2119         req.dir_attr = cpu_to_le16(dir_attr);
2120         req.dir_data_length = cpu_to_le32(data_len);
2121
2122         kmem = dma_alloc_coherent(&bp->pdev->dev, data_len, &dma_handle,
2123                                   GFP_KERNEL);
2124         if (!kmem) {
2125                 netdev_err(dev, "dma_alloc_coherent failure, length = %u\n",
2126                            (unsigned)data_len);
2127                 return -ENOMEM;
2128         }
2129         memcpy(kmem, data, data_len);
2130         req.host_src_addr = cpu_to_le64(dma_handle);
2131
2132         rc = hwrm_send_message(bp, &req, sizeof(req), FLASH_NVRAM_TIMEOUT);
2133         dma_free_coherent(&bp->pdev->dev, data_len, kmem, dma_handle);
2134
2135         if (rc == -EACCES)
2136                 bnxt_print_admin_err(bp);
2137         return rc;
2138 }
2139
2140 static int bnxt_hwrm_firmware_reset(struct net_device *dev, u8 proc_type,
2141                                     u8 self_reset, u8 flags)
2142 {
2143         struct hwrm_fw_reset_input req = {0};
2144         struct bnxt *bp = netdev_priv(dev);
2145         int rc;
2146
2147         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FW_RESET, -1, -1);
2148
2149         req.embedded_proc_type = proc_type;
2150         req.selfrst_status = self_reset;
2151         req.flags = flags;
2152
2153         if (proc_type == FW_RESET_REQ_EMBEDDED_PROC_TYPE_AP) {
2154                 rc = hwrm_send_message_silent(bp, &req, sizeof(req),
2155                                               HWRM_CMD_TIMEOUT);
2156         } else {
2157                 rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2158                 if (rc == -EACCES)
2159                         bnxt_print_admin_err(bp);
2160         }
2161         return rc;
2162 }
2163
2164 static int bnxt_firmware_reset(struct net_device *dev,
2165                                enum bnxt_nvm_directory_type dir_type)
2166 {
2167         u8 self_reset = FW_RESET_REQ_SELFRST_STATUS_SELFRSTNONE;
2168         u8 proc_type, flags = 0;
2169
2170         /* TODO: Address self-reset of APE/KONG/BONO/TANG or ungraceful reset */
2171         /*       (e.g. when firmware isn't already running) */
2172         switch (dir_type) {
2173         case BNX_DIR_TYPE_CHIMP_PATCH:
2174         case BNX_DIR_TYPE_BOOTCODE:
2175         case BNX_DIR_TYPE_BOOTCODE_2:
2176                 proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_BOOT;
2177                 /* Self-reset ChiMP upon next PCIe reset: */
2178                 self_reset = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST;
2179                 break;
2180         case BNX_DIR_TYPE_APE_FW:
2181         case BNX_DIR_TYPE_APE_PATCH:
2182                 proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_MGMT;
2183                 /* Self-reset APE upon next PCIe reset: */
2184                 self_reset = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST;
2185                 break;
2186         case BNX_DIR_TYPE_KONG_FW:
2187         case BNX_DIR_TYPE_KONG_PATCH:
2188                 proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_NETCTRL;
2189                 break;
2190         case BNX_DIR_TYPE_BONO_FW:
2191         case BNX_DIR_TYPE_BONO_PATCH:
2192                 proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_ROCE;
2193                 break;
2194         default:
2195                 return -EINVAL;
2196         }
2197
2198         return bnxt_hwrm_firmware_reset(dev, proc_type, self_reset, flags);
2199 }
2200
2201 static int bnxt_firmware_reset_chip(struct net_device *dev)
2202 {
2203         struct bnxt *bp = netdev_priv(dev);
2204         u8 flags = 0;
2205
2206         if (bp->fw_cap & BNXT_FW_CAP_HOT_RESET)
2207                 flags = FW_RESET_REQ_FLAGS_RESET_GRACEFUL;
2208
2209         return bnxt_hwrm_firmware_reset(dev,
2210                                         FW_RESET_REQ_EMBEDDED_PROC_TYPE_CHIP,
2211                                         FW_RESET_REQ_SELFRST_STATUS_SELFRSTASAP,
2212                                         flags);
2213 }
2214
2215 static int bnxt_firmware_reset_ap(struct net_device *dev)
2216 {
2217         return bnxt_hwrm_firmware_reset(dev, FW_RESET_REQ_EMBEDDED_PROC_TYPE_AP,
2218                                         FW_RESET_REQ_SELFRST_STATUS_SELFRSTNONE,
2219                                         0);
2220 }
2221
2222 static int bnxt_flash_firmware(struct net_device *dev,
2223                                u16 dir_type,
2224                                const u8 *fw_data,
2225                                size_t fw_size)
2226 {
2227         int     rc = 0;
2228         u16     code_type;
2229         u32     stored_crc;
2230         u32     calculated_crc;
2231         struct bnxt_fw_header *header = (struct bnxt_fw_header *)fw_data;
2232
2233         switch (dir_type) {
2234         case BNX_DIR_TYPE_BOOTCODE:
2235         case BNX_DIR_TYPE_BOOTCODE_2:
2236                 code_type = CODE_BOOT;
2237                 break;
2238         case BNX_DIR_TYPE_CHIMP_PATCH:
2239                 code_type = CODE_CHIMP_PATCH;
2240                 break;
2241         case BNX_DIR_TYPE_APE_FW:
2242                 code_type = CODE_MCTP_PASSTHRU;
2243                 break;
2244         case BNX_DIR_TYPE_APE_PATCH:
2245                 code_type = CODE_APE_PATCH;
2246                 break;
2247         case BNX_DIR_TYPE_KONG_FW:
2248                 code_type = CODE_KONG_FW;
2249                 break;
2250         case BNX_DIR_TYPE_KONG_PATCH:
2251                 code_type = CODE_KONG_PATCH;
2252                 break;
2253         case BNX_DIR_TYPE_BONO_FW:
2254                 code_type = CODE_BONO_FW;
2255                 break;
2256         case BNX_DIR_TYPE_BONO_PATCH:
2257                 code_type = CODE_BONO_PATCH;
2258                 break;
2259         default:
2260                 netdev_err(dev, "Unsupported directory entry type: %u\n",
2261                            dir_type);
2262                 return -EINVAL;
2263         }
2264         if (fw_size < sizeof(struct bnxt_fw_header)) {
2265                 netdev_err(dev, "Invalid firmware file size: %u\n",
2266                            (unsigned int)fw_size);
2267                 return -EINVAL;
2268         }
2269         if (header->signature != cpu_to_le32(BNXT_FIRMWARE_BIN_SIGNATURE)) {
2270                 netdev_err(dev, "Invalid firmware signature: %08X\n",
2271                            le32_to_cpu(header->signature));
2272                 return -EINVAL;
2273         }
2274         if (header->code_type != code_type) {
2275                 netdev_err(dev, "Expected firmware type: %d, read: %d\n",
2276                            code_type, header->code_type);
2277                 return -EINVAL;
2278         }
2279         if (header->device != DEVICE_CUMULUS_FAMILY) {
2280                 netdev_err(dev, "Expected firmware device family %d, read: %d\n",
2281                            DEVICE_CUMULUS_FAMILY, header->device);
2282                 return -EINVAL;
2283         }
2284         /* Confirm the CRC32 checksum of the file: */
2285         stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size -
2286                                              sizeof(stored_crc)));
2287         calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc));
2288         if (calculated_crc != stored_crc) {
2289                 netdev_err(dev, "Firmware file CRC32 checksum (%08lX) does not match calculated checksum (%08lX)\n",
2290                            (unsigned long)stored_crc,
2291                            (unsigned long)calculated_crc);
2292                 return -EINVAL;
2293         }
2294         rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
2295                               0, 0, fw_data, fw_size);
2296         if (rc == 0)    /* Firmware update successful */
2297                 rc = bnxt_firmware_reset(dev, dir_type);
2298
2299         return rc;
2300 }
2301
2302 static int bnxt_flash_microcode(struct net_device *dev,
2303                                 u16 dir_type,
2304                                 const u8 *fw_data,
2305                                 size_t fw_size)
2306 {
2307         struct bnxt_ucode_trailer *trailer;
2308         u32 calculated_crc;
2309         u32 stored_crc;
2310         int rc = 0;
2311
2312         if (fw_size < sizeof(struct bnxt_ucode_trailer)) {
2313                 netdev_err(dev, "Invalid microcode file size: %u\n",
2314                            (unsigned int)fw_size);
2315                 return -EINVAL;
2316         }
2317         trailer = (struct bnxt_ucode_trailer *)(fw_data + (fw_size -
2318                                                 sizeof(*trailer)));
2319         if (trailer->sig != cpu_to_le32(BNXT_UCODE_TRAILER_SIGNATURE)) {
2320                 netdev_err(dev, "Invalid microcode trailer signature: %08X\n",
2321                            le32_to_cpu(trailer->sig));
2322                 return -EINVAL;
2323         }
2324         if (le16_to_cpu(trailer->dir_type) != dir_type) {
2325                 netdev_err(dev, "Expected microcode type: %d, read: %d\n",
2326                            dir_type, le16_to_cpu(trailer->dir_type));
2327                 return -EINVAL;
2328         }
2329         if (le16_to_cpu(trailer->trailer_length) <
2330                 sizeof(struct bnxt_ucode_trailer)) {
2331                 netdev_err(dev, "Invalid microcode trailer length: %d\n",
2332                            le16_to_cpu(trailer->trailer_length));
2333                 return -EINVAL;
2334         }
2335
2336         /* Confirm the CRC32 checksum of the file: */
2337         stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size -
2338                                              sizeof(stored_crc)));
2339         calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc));
2340         if (calculated_crc != stored_crc) {
2341                 netdev_err(dev,
2342                            "CRC32 (%08lX) does not match calculated: %08lX\n",
2343                            (unsigned long)stored_crc,
2344                            (unsigned long)calculated_crc);
2345                 return -EINVAL;
2346         }
2347         rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
2348                               0, 0, fw_data, fw_size);
2349
2350         return rc;
2351 }
2352
2353 static bool bnxt_dir_type_is_ape_bin_format(u16 dir_type)
2354 {
2355         switch (dir_type) {
2356         case BNX_DIR_TYPE_CHIMP_PATCH:
2357         case BNX_DIR_TYPE_BOOTCODE:
2358         case BNX_DIR_TYPE_BOOTCODE_2:
2359         case BNX_DIR_TYPE_APE_FW:
2360         case BNX_DIR_TYPE_APE_PATCH:
2361         case BNX_DIR_TYPE_KONG_FW:
2362         case BNX_DIR_TYPE_KONG_PATCH:
2363         case BNX_DIR_TYPE_BONO_FW:
2364         case BNX_DIR_TYPE_BONO_PATCH:
2365                 return true;
2366         }
2367
2368         return false;
2369 }
2370
2371 static bool bnxt_dir_type_is_other_exec_format(u16 dir_type)
2372 {
2373         switch (dir_type) {
2374         case BNX_DIR_TYPE_AVS:
2375         case BNX_DIR_TYPE_EXP_ROM_MBA:
2376         case BNX_DIR_TYPE_PCIE:
2377         case BNX_DIR_TYPE_TSCF_UCODE:
2378         case BNX_DIR_TYPE_EXT_PHY:
2379         case BNX_DIR_TYPE_CCM:
2380         case BNX_DIR_TYPE_ISCSI_BOOT:
2381         case BNX_DIR_TYPE_ISCSI_BOOT_IPV6:
2382         case BNX_DIR_TYPE_ISCSI_BOOT_IPV4N6:
2383                 return true;
2384         }
2385
2386         return false;
2387 }
2388
2389 static bool bnxt_dir_type_is_executable(u16 dir_type)
2390 {
2391         return bnxt_dir_type_is_ape_bin_format(dir_type) ||
2392                 bnxt_dir_type_is_other_exec_format(dir_type);
2393 }
2394
2395 static int bnxt_flash_firmware_from_file(struct net_device *dev,
2396                                          u16 dir_type,
2397                                          const char *filename)
2398 {
2399         const struct firmware  *fw;
2400         int                     rc;
2401
2402         rc = request_firmware(&fw, filename, &dev->dev);
2403         if (rc != 0) {
2404                 netdev_err(dev, "Error %d requesting firmware file: %s\n",
2405                            rc, filename);
2406                 return rc;
2407         }
2408         if (bnxt_dir_type_is_ape_bin_format(dir_type))
2409                 rc = bnxt_flash_firmware(dev, dir_type, fw->data, fw->size);
2410         else if (bnxt_dir_type_is_other_exec_format(dir_type))
2411                 rc = bnxt_flash_microcode(dev, dir_type, fw->data, fw->size);
2412         else
2413                 rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
2414                                       0, 0, fw->data, fw->size);
2415         release_firmware(fw);
2416         return rc;
2417 }
2418
2419 int bnxt_flash_package_from_file(struct net_device *dev, const char *filename,
2420                                  u32 install_type)
2421 {
2422         struct bnxt *bp = netdev_priv(dev);
2423         struct hwrm_nvm_install_update_output *resp = bp->hwrm_cmd_resp_addr;
2424         struct hwrm_nvm_install_update_input install = {0};
2425         const struct firmware *fw;
2426         u32 item_len;
2427         int rc = 0;
2428         u16 index;
2429
2430         bnxt_hwrm_fw_set_time(bp);
2431
2432         rc = bnxt_find_nvram_item(dev, BNX_DIR_TYPE_UPDATE,
2433                                   BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE,
2434                                   &index, &item_len, NULL);
2435         if (rc) {
2436                 netdev_err(dev, "PKG update area not created in nvram\n");
2437                 return rc;
2438         }
2439
2440         rc = request_firmware(&fw, filename, &dev->dev);
2441         if (rc != 0) {
2442                 netdev_err(dev, "PKG error %d requesting file: %s\n",
2443                            rc, filename);
2444                 return rc;
2445         }
2446
2447         if (fw->size > item_len) {
2448                 netdev_err(dev, "PKG insufficient update area in nvram: %lu\n",
2449                            (unsigned long)fw->size);
2450                 rc = -EFBIG;
2451         } else {
2452                 dma_addr_t dma_handle;
2453                 u8 *kmem;
2454                 struct hwrm_nvm_modify_input modify = {0};
2455
2456                 bnxt_hwrm_cmd_hdr_init(bp, &modify, HWRM_NVM_MODIFY, -1, -1);
2457
2458                 modify.dir_idx = cpu_to_le16(index);
2459                 modify.len = cpu_to_le32(fw->size);
2460
2461                 kmem = dma_alloc_coherent(&bp->pdev->dev, fw->size,
2462                                           &dma_handle, GFP_KERNEL);
2463                 if (!kmem) {
2464                         netdev_err(dev,
2465                                    "dma_alloc_coherent failure, length = %u\n",
2466                                    (unsigned int)fw->size);
2467                         rc = -ENOMEM;
2468                 } else {
2469                         memcpy(kmem, fw->data, fw->size);
2470                         modify.host_src_addr = cpu_to_le64(dma_handle);
2471
2472                         rc = hwrm_send_message(bp, &modify, sizeof(modify),
2473                                                FLASH_PACKAGE_TIMEOUT);
2474                         dma_free_coherent(&bp->pdev->dev, fw->size, kmem,
2475                                           dma_handle);
2476                 }
2477         }
2478         release_firmware(fw);
2479         if (rc)
2480                 goto err_exit;
2481
2482         if ((install_type & 0xffff) == 0)
2483                 install_type >>= 16;
2484         bnxt_hwrm_cmd_hdr_init(bp, &install, HWRM_NVM_INSTALL_UPDATE, -1, -1);
2485         install.install_type = cpu_to_le32(install_type);
2486
2487         mutex_lock(&bp->hwrm_cmd_lock);
2488         rc = _hwrm_send_message(bp, &install, sizeof(install),
2489                                 INSTALL_PACKAGE_TIMEOUT);
2490         if (rc) {
2491                 u8 error_code = ((struct hwrm_err_output *)resp)->cmd_err;
2492
2493                 if (resp->error_code && error_code ==
2494                     NVM_INSTALL_UPDATE_CMD_ERR_CODE_FRAG_ERR) {
2495                         install.flags |= cpu_to_le16(
2496                                NVM_INSTALL_UPDATE_REQ_FLAGS_ALLOWED_TO_DEFRAG);
2497                         rc = _hwrm_send_message(bp, &install, sizeof(install),
2498                                                 INSTALL_PACKAGE_TIMEOUT);
2499                 }
2500                 if (rc)
2501                         goto flash_pkg_exit;
2502         }
2503
2504         if (resp->result) {
2505                 netdev_err(dev, "PKG install error = %d, problem_item = %d\n",
2506                            (s8)resp->result, (int)resp->problem_item);
2507                 rc = -ENOPKG;
2508         }
2509 flash_pkg_exit:
2510         mutex_unlock(&bp->hwrm_cmd_lock);
2511 err_exit:
2512         if (rc == -EACCES)
2513                 bnxt_print_admin_err(bp);
2514         return rc;
2515 }
2516
2517 static int bnxt_flash_device(struct net_device *dev,
2518                              struct ethtool_flash *flash)
2519 {
2520         if (!BNXT_PF((struct bnxt *)netdev_priv(dev))) {
2521                 netdev_err(dev, "flashdev not supported from a virtual function\n");
2522                 return -EINVAL;
2523         }
2524
2525         if (flash->region == ETHTOOL_FLASH_ALL_REGIONS ||
2526             flash->region > 0xffff)
2527                 return bnxt_flash_package_from_file(dev, flash->data,
2528                                                     flash->region);
2529
2530         return bnxt_flash_firmware_from_file(dev, flash->region, flash->data);
2531 }
2532
2533 static int nvm_get_dir_info(struct net_device *dev, u32 *entries, u32 *length)
2534 {
2535         struct bnxt *bp = netdev_priv(dev);
2536         int rc;
2537         struct hwrm_nvm_get_dir_info_input req = {0};
2538         struct hwrm_nvm_get_dir_info_output *output = bp->hwrm_cmd_resp_addr;
2539
2540         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_DIR_INFO, -1, -1);
2541
2542         mutex_lock(&bp->hwrm_cmd_lock);
2543         rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2544         if (!rc) {
2545                 *entries = le32_to_cpu(output->entries);
2546                 *length = le32_to_cpu(output->entry_length);
2547         }
2548         mutex_unlock(&bp->hwrm_cmd_lock);
2549         return rc;
2550 }
2551
2552 static int bnxt_get_eeprom_len(struct net_device *dev)
2553 {
2554         struct bnxt *bp = netdev_priv(dev);
2555
2556         if (BNXT_VF(bp))
2557                 return 0;
2558
2559         /* The -1 return value allows the entire 32-bit range of offsets to be
2560          * passed via the ethtool command-line utility.
2561          */
2562         return -1;
2563 }
2564
2565 static int bnxt_get_nvram_directory(struct net_device *dev, u32 len, u8 *data)
2566 {
2567         struct bnxt *bp = netdev_priv(dev);
2568         int rc;
2569         u32 dir_entries;
2570         u32 entry_length;
2571         u8 *buf;
2572         size_t buflen;
2573         dma_addr_t dma_handle;
2574         struct hwrm_nvm_get_dir_entries_input req = {0};
2575
2576         rc = nvm_get_dir_info(dev, &dir_entries, &entry_length);
2577         if (rc != 0)
2578                 return rc;
2579
2580         if (!dir_entries || !entry_length)
2581                 return -EIO;
2582
2583         /* Insert 2 bytes of directory info (count and size of entries) */
2584         if (len < 2)
2585                 return -EINVAL;
2586
2587         *data++ = dir_entries;
2588         *data++ = entry_length;
2589         len -= 2;
2590         memset(data, 0xff, len);
2591
2592         buflen = dir_entries * entry_length;
2593         buf = dma_alloc_coherent(&bp->pdev->dev, buflen, &dma_handle,
2594                                  GFP_KERNEL);
2595         if (!buf) {
2596                 netdev_err(dev, "dma_alloc_coherent failure, length = %u\n",
2597                            (unsigned)buflen);
2598                 return -ENOMEM;
2599         }
2600         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_DIR_ENTRIES, -1, -1);
2601         req.host_dest_addr = cpu_to_le64(dma_handle);
2602         rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2603         if (rc == 0)
2604                 memcpy(data, buf, len > buflen ? buflen : len);
2605         dma_free_coherent(&bp->pdev->dev, buflen, buf, dma_handle);
2606         return rc;
2607 }
2608
2609 static int bnxt_get_nvram_item(struct net_device *dev, u32 index, u32 offset,
2610                                u32 length, u8 *data)
2611 {
2612         struct bnxt *bp = netdev_priv(dev);
2613         int rc;
2614         u8 *buf;
2615         dma_addr_t dma_handle;
2616         struct hwrm_nvm_read_input req = {0};
2617
2618         if (!length)
2619                 return -EINVAL;
2620
2621         buf = dma_alloc_coherent(&bp->pdev->dev, length, &dma_handle,
2622                                  GFP_KERNEL);
2623         if (!buf) {
2624                 netdev_err(dev, "dma_alloc_coherent failure, length = %u\n",
2625                            (unsigned)length);
2626                 return -ENOMEM;
2627         }
2628         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_READ, -1, -1);
2629         req.host_dest_addr = cpu_to_le64(dma_handle);
2630         req.dir_idx = cpu_to_le16(index);
2631         req.offset = cpu_to_le32(offset);
2632         req.len = cpu_to_le32(length);
2633
2634         rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2635         if (rc == 0)
2636                 memcpy(data, buf, length);
2637         dma_free_coherent(&bp->pdev->dev, length, buf, dma_handle);
2638         return rc;
2639 }
2640
2641 static int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal,
2642                                 u16 ext, u16 *index, u32 *item_length,
2643                                 u32 *data_length)
2644 {
2645         struct bnxt *bp = netdev_priv(dev);
2646         int rc;
2647         struct hwrm_nvm_find_dir_entry_input req = {0};
2648         struct hwrm_nvm_find_dir_entry_output *output = bp->hwrm_cmd_resp_addr;
2649
2650         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_FIND_DIR_ENTRY, -1, -1);
2651         req.enables = 0;
2652         req.dir_idx = 0;
2653         req.dir_type = cpu_to_le16(type);
2654         req.dir_ordinal = cpu_to_le16(ordinal);
2655         req.dir_ext = cpu_to_le16(ext);
2656         req.opt_ordinal = NVM_FIND_DIR_ENTRY_REQ_OPT_ORDINAL_EQ;
2657         mutex_lock(&bp->hwrm_cmd_lock);
2658         rc = _hwrm_send_message_silent(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2659         if (rc == 0) {
2660                 if (index)
2661                         *index = le16_to_cpu(output->dir_idx);
2662                 if (item_length)
2663                         *item_length = le32_to_cpu(output->dir_item_length);
2664                 if (data_length)
2665                         *data_length = le32_to_cpu(output->dir_data_length);
2666         }
2667         mutex_unlock(&bp->hwrm_cmd_lock);
2668         return rc;
2669 }
2670
2671 static char *bnxt_parse_pkglog(int desired_field, u8 *data, size_t datalen)
2672 {
2673         char    *retval = NULL;
2674         char    *p;
2675         char    *value;
2676         int     field = 0;
2677
2678         if (datalen < 1)
2679                 return NULL;
2680         /* null-terminate the log data (removing last '\n'): */
2681         data[datalen - 1] = 0;
2682         for (p = data; *p != 0; p++) {
2683                 field = 0;
2684                 retval = NULL;
2685                 while (*p != 0 && *p != '\n') {
2686                         value = p;
2687                         while (*p != 0 && *p != '\t' && *p != '\n')
2688                                 p++;
2689                         if (field == desired_field)
2690                                 retval = value;
2691                         if (*p != '\t')
2692                                 break;
2693                         *p = 0;
2694                         field++;
2695                         p++;
2696                 }
2697                 if (*p == 0)
2698                         break;
2699                 *p = 0;
2700         }
2701         return retval;
2702 }
2703
2704 static void bnxt_get_pkgver(struct net_device *dev)
2705 {
2706         struct bnxt *bp = netdev_priv(dev);
2707         u16 index = 0;
2708         char *pkgver;
2709         u32 pkglen;
2710         u8 *pkgbuf;
2711         int len;
2712
2713         if (bnxt_find_nvram_item(dev, BNX_DIR_TYPE_PKG_LOG,
2714                                  BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE,
2715                                  &index, NULL, &pkglen) != 0)
2716                 return;
2717
2718         pkgbuf = kzalloc(pkglen, GFP_KERNEL);
2719         if (!pkgbuf) {
2720                 dev_err(&bp->pdev->dev, "Unable to allocate memory for pkg version, length = %u\n",
2721                         pkglen);
2722                 return;
2723         }
2724
2725         if (bnxt_get_nvram_item(dev, index, 0, pkglen, pkgbuf))
2726                 goto err;
2727
2728         pkgver = bnxt_parse_pkglog(BNX_PKG_LOG_FIELD_IDX_PKG_VERSION, pkgbuf,
2729                                    pkglen);
2730         if (pkgver && *pkgver != 0 && isdigit(*pkgver)) {
2731                 len = strlen(bp->fw_ver_str);
2732                 snprintf(bp->fw_ver_str + len, FW_VER_STR_LEN - len - 1,
2733                          "/pkg %s", pkgver);
2734         }
2735 err:
2736         kfree(pkgbuf);
2737 }
2738
2739 static int bnxt_get_eeprom(struct net_device *dev,
2740                            struct ethtool_eeprom *eeprom,
2741                            u8 *data)
2742 {
2743         u32 index;
2744         u32 offset;
2745
2746         if (eeprom->offset == 0) /* special offset value to get directory */
2747                 return bnxt_get_nvram_directory(dev, eeprom->len, data);
2748
2749         index = eeprom->offset >> 24;
2750         offset = eeprom->offset & 0xffffff;
2751
2752         if (index == 0) {
2753                 netdev_err(dev, "unsupported index value: %d\n", index);
2754                 return -EINVAL;
2755         }
2756
2757         return bnxt_get_nvram_item(dev, index - 1, offset, eeprom->len, data);
2758 }
2759
2760 static int bnxt_erase_nvram_directory(struct net_device *dev, u8 index)
2761 {
2762         struct bnxt *bp = netdev_priv(dev);
2763         struct hwrm_nvm_erase_dir_entry_input req = {0};
2764
2765         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_ERASE_DIR_ENTRY, -1, -1);
2766         req.dir_idx = cpu_to_le16(index);
2767         return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2768 }
2769
2770 static int bnxt_set_eeprom(struct net_device *dev,
2771                            struct ethtool_eeprom *eeprom,
2772                            u8 *data)
2773 {
2774         struct bnxt *bp = netdev_priv(dev);
2775         u8 index, dir_op;
2776         u16 type, ext, ordinal, attr;
2777
2778         if (!BNXT_PF(bp)) {
2779                 netdev_err(dev, "NVM write not supported from a virtual function\n");
2780                 return -EINVAL;
2781         }
2782
2783         type = eeprom->magic >> 16;
2784
2785         if (type == 0xffff) { /* special value for directory operations */
2786                 index = eeprom->magic & 0xff;
2787                 dir_op = eeprom->magic >> 8;
2788                 if (index == 0)
2789                         return -EINVAL;
2790                 switch (dir_op) {
2791                 case 0x0e: /* erase */
2792                         if (eeprom->offset != ~eeprom->magic)
2793                                 return -EINVAL;
2794                         return bnxt_erase_nvram_directory(dev, index - 1);
2795                 default:
2796                         return -EINVAL;
2797                 }
2798         }
2799
2800         /* Create or re-write an NVM item: */
2801         if (bnxt_dir_type_is_executable(type))
2802                 return -EOPNOTSUPP;
2803         ext = eeprom->magic & 0xffff;
2804         ordinal = eeprom->offset >> 16;
2805         attr = eeprom->offset & 0xffff;
2806
2807         return bnxt_flash_nvram(dev, type, ordinal, ext, attr, data,
2808                                 eeprom->len);
2809 }
2810
2811 static int bnxt_set_eee(struct net_device *dev, struct ethtool_eee *edata)
2812 {
2813         struct bnxt *bp = netdev_priv(dev);
2814         struct ethtool_eee *eee = &bp->eee;
2815         struct bnxt_link_info *link_info = &bp->link_info;
2816         u32 advertising;
2817         int rc = 0;
2818
2819         if (!BNXT_PHY_CFG_ABLE(bp))
2820                 return -EOPNOTSUPP;
2821
2822         if (!(bp->flags & BNXT_FLAG_EEE_CAP))
2823                 return -EOPNOTSUPP;
2824
2825         mutex_lock(&bp->link_lock);
2826         advertising = _bnxt_fw_to_ethtool_adv_spds(link_info->advertising, 0);
2827         if (!edata->eee_enabled)
2828                 goto eee_ok;
2829
2830         if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) {
2831                 netdev_warn(dev, "EEE requires autoneg\n");
2832                 rc = -EINVAL;
2833                 goto eee_exit;
2834         }
2835         if (edata->tx_lpi_enabled) {
2836                 if (bp->lpi_tmr_hi && (edata->tx_lpi_timer > bp->lpi_tmr_hi ||
2837                                        edata->tx_lpi_timer < bp->lpi_tmr_lo)) {
2838                         netdev_warn(dev, "Valid LPI timer range is %d and %d microsecs\n",
2839                                     bp->lpi_tmr_lo, bp->lpi_tmr_hi);
2840                         rc = -EINVAL;
2841                         goto eee_exit;
2842                 } else if (!bp->lpi_tmr_hi) {
2843                         edata->tx_lpi_timer = eee->tx_lpi_timer;
2844                 }
2845         }
2846         if (!edata->advertised) {
2847                 edata->advertised = advertising & eee->supported;
2848         } else if (edata->advertised & ~advertising) {
2849                 netdev_warn(dev, "EEE advertised %x must be a subset of autoneg advertised speeds %x\n",
2850                             edata->advertised, advertising);
2851                 rc = -EINVAL;
2852                 goto eee_exit;
2853         }
2854
2855         eee->advertised = edata->advertised;
2856         eee->tx_lpi_enabled = edata->tx_lpi_enabled;
2857         eee->tx_lpi_timer = edata->tx_lpi_timer;
2858 eee_ok:
2859         eee->eee_enabled = edata->eee_enabled;
2860
2861         if (netif_running(dev))
2862                 rc = bnxt_hwrm_set_link_setting(bp, false, true);
2863
2864 eee_exit:
2865         mutex_unlock(&bp->link_lock);
2866         return rc;
2867 }
2868
2869 static int bnxt_get_eee(struct net_device *dev, struct ethtool_eee *edata)
2870 {
2871         struct bnxt *bp = netdev_priv(dev);
2872
2873         if (!(bp->flags & BNXT_FLAG_EEE_CAP))
2874                 return -EOPNOTSUPP;
2875
2876         *edata = bp->eee;
2877         if (!bp->eee.eee_enabled) {
2878                 /* Preserve tx_lpi_timer so that the last value will be used
2879                  * by default when it is re-enabled.
2880                  */
2881                 edata->advertised = 0;
2882                 edata->tx_lpi_enabled = 0;
2883         }
2884
2885         if (!bp->eee.eee_active)
2886                 edata->lp_advertised = 0;
2887
2888         return 0;
2889 }
2890
2891 static int bnxt_read_sfp_module_eeprom_info(struct bnxt *bp, u16 i2c_addr,
2892                                             u16 page_number, u16 start_addr,
2893                                             u16 data_length, u8 *buf)
2894 {
2895         struct hwrm_port_phy_i2c_read_input req = {0};
2896         struct hwrm_port_phy_i2c_read_output *output = bp->hwrm_cmd_resp_addr;
2897         int rc, byte_offset = 0;
2898
2899         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_I2C_READ, -1, -1);
2900         req.i2c_slave_addr = i2c_addr;
2901         req.page_number = cpu_to_le16(page_number);
2902         req.port_id = cpu_to_le16(bp->pf.port_id);
2903         do {
2904                 u16 xfer_size;
2905
2906                 xfer_size = min_t(u16, data_length, BNXT_MAX_PHY_I2C_RESP_SIZE);
2907                 data_length -= xfer_size;
2908                 req.page_offset = cpu_to_le16(start_addr + byte_offset);
2909                 req.data_length = xfer_size;
2910                 req.enables = cpu_to_le32(start_addr + byte_offset ?
2911                                  PORT_PHY_I2C_READ_REQ_ENABLES_PAGE_OFFSET : 0);
2912                 mutex_lock(&bp->hwrm_cmd_lock);
2913                 rc = _hwrm_send_message(bp, &req, sizeof(req),
2914                                         HWRM_CMD_TIMEOUT);
2915                 if (!rc)
2916                         memcpy(buf + byte_offset, output->data, xfer_size);
2917                 mutex_unlock(&bp->hwrm_cmd_lock);
2918                 byte_offset += xfer_size;
2919         } while (!rc && data_length > 0);
2920
2921         return rc;
2922 }
2923
2924 static int bnxt_get_module_info(struct net_device *dev,
2925                                 struct ethtool_modinfo *modinfo)
2926 {
2927         u8 data[SFF_DIAG_SUPPORT_OFFSET + 1];
2928         struct bnxt *bp = netdev_priv(dev);
2929         int rc;
2930
2931         /* No point in going further if phy status indicates
2932          * module is not inserted or if it is powered down or
2933          * if it is of type 10GBase-T
2934          */
2935         if (bp->link_info.module_status >
2936                 PORT_PHY_QCFG_RESP_MODULE_STATUS_WARNINGMSG)
2937                 return -EOPNOTSUPP;
2938
2939         /* This feature is not supported in older firmware versions */
2940         if (bp->hwrm_spec_code < 0x10202)
2941                 return -EOPNOTSUPP;
2942
2943         rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A0, 0, 0,
2944                                               SFF_DIAG_SUPPORT_OFFSET + 1,
2945                                               data);
2946         if (!rc) {
2947                 u8 module_id = data[0];
2948                 u8 diag_supported = data[SFF_DIAG_SUPPORT_OFFSET];
2949
2950                 switch (module_id) {
2951                 case SFF_MODULE_ID_SFP:
2952                         modinfo->type = ETH_MODULE_SFF_8472;
2953                         modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
2954                         if (!diag_supported)
2955                                 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
2956                         break;
2957                 case SFF_MODULE_ID_QSFP:
2958                 case SFF_MODULE_ID_QSFP_PLUS:
2959                         modinfo->type = ETH_MODULE_SFF_8436;
2960                         modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
2961                         break;
2962                 case SFF_MODULE_ID_QSFP28:
2963                         modinfo->type = ETH_MODULE_SFF_8636;
2964                         modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
2965                         break;
2966                 default:
2967                         rc = -EOPNOTSUPP;
2968                         break;
2969                 }
2970         }
2971         return rc;
2972 }
2973
2974 static int bnxt_get_module_eeprom(struct net_device *dev,
2975                                   struct ethtool_eeprom *eeprom,
2976                                   u8 *data)
2977 {
2978         struct bnxt *bp = netdev_priv(dev);
2979         u16  start = eeprom->offset, length = eeprom->len;
2980         int rc = 0;
2981
2982         memset(data, 0, eeprom->len);
2983
2984         /* Read A0 portion of the EEPROM */
2985         if (start < ETH_MODULE_SFF_8436_LEN) {
2986                 if (start + eeprom->len > ETH_MODULE_SFF_8436_LEN)
2987                         length = ETH_MODULE_SFF_8436_LEN - start;
2988                 rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A0, 0,
2989                                                       start, length, data);
2990                 if (rc)
2991                         return rc;
2992                 start += length;
2993                 data += length;
2994                 length = eeprom->len - length;
2995         }
2996
2997         /* Read A2 portion of the EEPROM */
2998         if (length) {
2999                 start -= ETH_MODULE_SFF_8436_LEN;
3000                 rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A2, 1,
3001                                                       start, length, data);
3002         }
3003         return rc;
3004 }
3005
3006 static int bnxt_nway_reset(struct net_device *dev)
3007 {
3008         int rc = 0;
3009
3010         struct bnxt *bp = netdev_priv(dev);
3011         struct bnxt_link_info *link_info = &bp->link_info;
3012
3013         if (!BNXT_PHY_CFG_ABLE(bp))
3014                 return -EOPNOTSUPP;
3015
3016         if (!(link_info->autoneg & BNXT_AUTONEG_SPEED))
3017                 return -EINVAL;
3018
3019         if (netif_running(dev))
3020                 rc = bnxt_hwrm_set_link_setting(bp, true, false);
3021
3022         return rc;
3023 }
3024
3025 static int bnxt_set_phys_id(struct net_device *dev,
3026                             enum ethtool_phys_id_state state)
3027 {
3028         struct hwrm_port_led_cfg_input req = {0};
3029         struct bnxt *bp = netdev_priv(dev);
3030         struct bnxt_pf_info *pf = &bp->pf;
3031         struct bnxt_led_cfg *led_cfg;
3032         u8 led_state;
3033         __le16 duration;
3034         int i;
3035
3036         if (!bp->num_leds || BNXT_VF(bp))
3037                 return -EOPNOTSUPP;
3038
3039         if (state == ETHTOOL_ID_ACTIVE) {
3040                 led_state = PORT_LED_CFG_REQ_LED0_STATE_BLINKALT;
3041                 duration = cpu_to_le16(500);
3042         } else if (state == ETHTOOL_ID_INACTIVE) {
3043                 led_state = PORT_LED_CFG_REQ_LED1_STATE_DEFAULT;
3044                 duration = cpu_to_le16(0);
3045         } else {
3046                 return -EINVAL;
3047         }
3048         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_LED_CFG, -1, -1);
3049         req.port_id = cpu_to_le16(pf->port_id);
3050         req.num_leds = bp->num_leds;
3051         led_cfg = (struct bnxt_led_cfg *)&req.led0_id;
3052         for (i = 0; i < bp->num_leds; i++, led_cfg++) {
3053                 req.enables |= BNXT_LED_DFLT_ENABLES(i);
3054                 led_cfg->led_id = bp->leds[i].led_id;
3055                 led_cfg->led_state = led_state;
3056                 led_cfg->led_blink_on = duration;
3057                 led_cfg->led_blink_off = duration;
3058                 led_cfg->led_group_id = bp->leds[i].led_group_id;
3059         }
3060         return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
3061 }
3062
3063 static int bnxt_hwrm_selftest_irq(struct bnxt *bp, u16 cmpl_ring)
3064 {
3065         struct hwrm_selftest_irq_input req = {0};
3066
3067         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_SELFTEST_IRQ, cmpl_ring, -1);
3068         return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
3069 }
3070
3071 static int bnxt_test_irq(struct bnxt *bp)
3072 {
3073         int i;
3074
3075         for (i = 0; i < bp->cp_nr_rings; i++) {
3076                 u16 cmpl_ring = bp->grp_info[i].cp_fw_ring_id;
3077                 int rc;
3078
3079                 rc = bnxt_hwrm_selftest_irq(bp, cmpl_ring);
3080                 if (rc)
3081                         return rc;
3082         }
3083         return 0;
3084 }
3085
3086 static int bnxt_hwrm_mac_loopback(struct bnxt *bp, bool enable)
3087 {
3088         struct hwrm_port_mac_cfg_input req = {0};
3089
3090         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_MAC_CFG, -1, -1);
3091
3092         req.enables = cpu_to_le32(PORT_MAC_CFG_REQ_ENABLES_LPBK);
3093         if (enable)
3094                 req.lpbk = PORT_MAC_CFG_REQ_LPBK_LOCAL;
3095         else
3096                 req.lpbk = PORT_MAC_CFG_REQ_LPBK_NONE;
3097         return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
3098 }
3099
3100 static int bnxt_query_force_speeds(struct bnxt *bp, u16 *force_speeds)
3101 {
3102         struct hwrm_port_phy_qcaps_output *resp = bp->hwrm_cmd_resp_addr;
3103         struct hwrm_port_phy_qcaps_input req = {0};
3104         int rc;
3105
3106         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_QCAPS, -1, -1);
3107         mutex_lock(&bp->hwrm_cmd_lock);
3108         rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
3109         if (!rc)
3110                 *force_speeds = le16_to_cpu(resp->supported_speeds_force_mode);
3111
3112         mutex_unlock(&bp->hwrm_cmd_lock);
3113         return rc;
3114 }
3115
3116 static int bnxt_disable_an_for_lpbk(struct bnxt *bp,
3117                                     struct hwrm_port_phy_cfg_input *req)
3118 {
3119         struct bnxt_link_info *link_info = &bp->link_info;
3120         u16 fw_advertising;
3121         u16 fw_speed;
3122         int rc;
3123
3124         if (!link_info->autoneg ||
3125             (bp->test_info->flags & BNXT_TEST_FL_AN_PHY_LPBK))
3126                 return 0;
3127
3128         rc = bnxt_query_force_speeds(bp, &fw_advertising);
3129         if (rc)
3130                 return rc;
3131
3132         fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_1GB;
3133         if (bp->link_info.link_up)
3134                 fw_speed = bp->link_info.link_speed;
3135         else if (fw_advertising & BNXT_LINK_SPEED_MSK_10GB)
3136                 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_10GB;
3137         else if (fw_advertising & BNXT_LINK_SPEED_MSK_25GB)
3138                 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_25GB;
3139         else if (fw_advertising & BNXT_LINK_SPEED_MSK_40GB)
3140                 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_40GB;
3141         else if (fw_advertising & BNXT_LINK_SPEED_MSK_50GB)
3142                 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_50GB;
3143
3144         req->force_link_speed = cpu_to_le16(fw_speed);
3145         req->flags |= cpu_to_le32(PORT_PHY_CFG_REQ_FLAGS_FORCE |
3146                                   PORT_PHY_CFG_REQ_FLAGS_RESET_PHY);
3147         rc = hwrm_send_message(bp, req, sizeof(*req), HWRM_CMD_TIMEOUT);
3148         req->flags = 0;
3149         req->force_link_speed = cpu_to_le16(0);
3150         return rc;
3151 }
3152
3153 static int bnxt_hwrm_phy_loopback(struct bnxt *bp, bool enable, bool ext)
3154 {
3155         struct hwrm_port_phy_cfg_input req = {0};
3156
3157         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_CFG, -1, -1);
3158
3159         if (enable) {
3160                 bnxt_disable_an_for_lpbk(bp, &req);
3161                 if (ext)
3162                         req.lpbk = PORT_PHY_CFG_REQ_LPBK_EXTERNAL;
3163                 else
3164                         req.lpbk = PORT_PHY_CFG_REQ_LPBK_LOCAL;
3165         } else {
3166                 req.lpbk = PORT_PHY_CFG_REQ_LPBK_NONE;
3167         }
3168         req.enables = cpu_to_le32(PORT_PHY_CFG_REQ_ENABLES_LPBK);
3169         return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
3170 }
3171
3172 static int bnxt_rx_loopback(struct bnxt *bp, struct bnxt_cp_ring_info *cpr,
3173                             u32 raw_cons, int pkt_size)
3174 {
3175         struct bnxt_napi *bnapi = cpr->bnapi;
3176         struct bnxt_rx_ring_info *rxr;
3177         struct bnxt_sw_rx_bd *rx_buf;
3178         struct rx_cmp *rxcmp;
3179         u16 cp_cons, cons;
3180         u8 *data;
3181         u32 len;
3182         int i;
3183
3184         rxr = bnapi->rx_ring;
3185         cp_cons = RING_CMP(raw_cons);
3186         rxcmp = (struct rx_cmp *)
3187                 &cpr->cp_desc_ring[CP_RING(cp_cons)][CP_IDX(cp_cons)];
3188         cons = rxcmp->rx_cmp_opaque;
3189         rx_buf = &rxr->rx_buf_ring[cons];
3190         data = rx_buf->data_ptr;
3191         len = le32_to_cpu(rxcmp->rx_cmp_len_flags_type) >> RX_CMP_LEN_SHIFT;
3192         if (len != pkt_size)
3193                 return -EIO;
3194         i = ETH_ALEN;
3195         if (!ether_addr_equal(data + i, bnapi->bp->dev->dev_addr))
3196                 return -EIO;
3197         i += ETH_ALEN;
3198         for (  ; i < pkt_size; i++) {
3199                 if (data[i] != (u8)(i & 0xff))
3200                         return -EIO;
3201         }
3202         return 0;
3203 }
3204
3205 static int bnxt_poll_loopback(struct bnxt *bp, struct bnxt_cp_ring_info *cpr,
3206                               int pkt_size)
3207 {
3208         struct tx_cmp *txcmp;
3209         int rc = -EIO;
3210         u32 raw_cons;
3211         u32 cons;
3212         int i;
3213
3214         raw_cons = cpr->cp_raw_cons;
3215         for (i = 0; i < 200; i++) {
3216                 cons = RING_CMP(raw_cons);
3217                 txcmp = &cpr->cp_desc_ring[CP_RING(cons)][CP_IDX(cons)];
3218
3219                 if (!TX_CMP_VALID(txcmp, raw_cons)) {
3220                         udelay(5);
3221                         continue;
3222                 }
3223
3224                 /* The valid test of the entry must be done first before
3225                  * reading any further.
3226                  */
3227                 dma_rmb();
3228                 if (TX_CMP_TYPE(txcmp) == CMP_TYPE_RX_L2_CMP) {
3229                         rc = bnxt_rx_loopback(bp, cpr, raw_cons, pkt_size);
3230                         raw_cons = NEXT_RAW_CMP(raw_cons);
3231                         raw_cons = NEXT_RAW_CMP(raw_cons);
3232                         break;
3233                 }
3234                 raw_cons = NEXT_RAW_CMP(raw_cons);
3235         }
3236         cpr->cp_raw_cons = raw_cons;
3237         return rc;
3238 }
3239
3240 static int bnxt_run_loopback(struct bnxt *bp)
3241 {
3242         struct bnxt_tx_ring_info *txr = &bp->tx_ring[0];
3243         struct bnxt_rx_ring_info *rxr = &bp->rx_ring[0];
3244         struct bnxt_cp_ring_info *cpr;
3245         int pkt_size, i = 0;
3246         struct sk_buff *skb;
3247         dma_addr_t map;
3248         u8 *data;
3249         int rc;
3250
3251         cpr = &rxr->bnapi->cp_ring;
3252         if (bp->flags & BNXT_FLAG_CHIP_P5)
3253                 cpr = cpr->cp_ring_arr[BNXT_RX_HDL];
3254         pkt_size = min(bp->dev->mtu + ETH_HLEN, bp->rx_copy_thresh);
3255         skb = netdev_alloc_skb(bp->dev, pkt_size);
3256         if (!skb)
3257                 return -ENOMEM;
3258         data = skb_put(skb, pkt_size);
3259         eth_broadcast_addr(data);
3260         i += ETH_ALEN;
3261         ether_addr_copy(&data[i], bp->dev->dev_addr);
3262         i += ETH_ALEN;
3263         for ( ; i < pkt_size; i++)
3264                 data[i] = (u8)(i & 0xff);
3265
3266         map = dma_map_single(&bp->pdev->dev, skb->data, pkt_size,
3267                              PCI_DMA_TODEVICE);
3268         if (dma_mapping_error(&bp->pdev->dev, map)) {
3269                 dev_kfree_skb(skb);
3270                 return -EIO;
3271         }
3272         bnxt_xmit_bd(bp, txr, map, pkt_size);
3273
3274         /* Sync BD data before updating doorbell */
3275         wmb();
3276
3277         bnxt_db_write(bp, &txr->tx_db, txr->tx_prod);
3278         rc = bnxt_poll_loopback(bp, cpr, pkt_size);
3279
3280         dma_unmap_single(&bp->pdev->dev, map, pkt_size, PCI_DMA_TODEVICE);
3281         dev_kfree_skb(skb);
3282         return rc;
3283 }
3284
3285 static int bnxt_run_fw_tests(struct bnxt *bp, u8 test_mask, u8 *test_results)
3286 {
3287         struct hwrm_selftest_exec_output *resp = bp->hwrm_cmd_resp_addr;
3288         struct hwrm_selftest_exec_input req = {0};
3289         int rc;
3290
3291         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_SELFTEST_EXEC, -1, -1);
3292         mutex_lock(&bp->hwrm_cmd_lock);
3293         resp->test_success = 0;
3294         req.flags = test_mask;
3295         rc = _hwrm_send_message(bp, &req, sizeof(req), bp->test_info->timeout);
3296         *test_results = resp->test_success;
3297         mutex_unlock(&bp->hwrm_cmd_lock);
3298         return rc;
3299 }
3300
3301 #define BNXT_DRV_TESTS                  4
3302 #define BNXT_MACLPBK_TEST_IDX           (bp->num_tests - BNXT_DRV_TESTS)
3303 #define BNXT_PHYLPBK_TEST_IDX           (BNXT_MACLPBK_TEST_IDX + 1)
3304 #define BNXT_EXTLPBK_TEST_IDX           (BNXT_MACLPBK_TEST_IDX + 2)
3305 #define BNXT_IRQ_TEST_IDX               (BNXT_MACLPBK_TEST_IDX + 3)
3306
3307 static void bnxt_self_test(struct net_device *dev, struct ethtool_test *etest,
3308                            u64 *buf)
3309 {
3310         struct bnxt *bp = netdev_priv(dev);
3311         bool do_ext_lpbk = false;
3312         bool offline = false;
3313         u8 test_results = 0;
3314         u8 test_mask = 0;
3315         int rc = 0, i;
3316
3317         if (!bp->num_tests || !BNXT_PF(bp))
3318                 return;
3319         memset(buf, 0, sizeof(u64) * bp->num_tests);
3320         if (!netif_running(dev)) {
3321                 etest->flags |= ETH_TEST_FL_FAILED;
3322                 return;
3323         }
3324
3325         if ((etest->flags & ETH_TEST_FL_EXTERNAL_LB) &&
3326             (bp->test_info->flags & BNXT_TEST_FL_EXT_LPBK))
3327                 do_ext_lpbk = true;
3328
3329         if (etest->flags & ETH_TEST_FL_OFFLINE) {
3330                 if (bp->pf.active_vfs || !BNXT_SINGLE_PF(bp)) {
3331                         etest->flags |= ETH_TEST_FL_FAILED;
3332                         netdev_warn(dev, "Offline tests cannot be run with active VFs or on shared PF\n");
3333                         return;
3334                 }
3335                 offline = true;
3336         }
3337
3338         for (i = 0; i < bp->num_tests - BNXT_DRV_TESTS; i++) {
3339                 u8 bit_val = 1 << i;
3340
3341                 if (!(bp->test_info->offline_mask & bit_val))
3342                         test_mask |= bit_val;
3343                 else if (offline)
3344                         test_mask |= bit_val;
3345         }
3346         if (!offline) {
3347                 bnxt_run_fw_tests(bp, test_mask, &test_results);
3348         } else {
3349                 rc = bnxt_close_nic(bp, false, false);
3350                 if (rc)
3351                         return;
3352                 bnxt_run_fw_tests(bp, test_mask, &test_results);
3353
3354                 buf[BNXT_MACLPBK_TEST_IDX] = 1;
3355                 bnxt_hwrm_mac_loopback(bp, true);
3356                 msleep(250);
3357                 rc = bnxt_half_open_nic(bp);
3358                 if (rc) {
3359                         bnxt_hwrm_mac_loopback(bp, false);
3360                         etest->flags |= ETH_TEST_FL_FAILED;
3361                         return;
3362                 }
3363                 if (bnxt_run_loopback(bp))
3364                         etest->flags |= ETH_TEST_FL_FAILED;
3365                 else
3366                         buf[BNXT_MACLPBK_TEST_IDX] = 0;
3367
3368                 bnxt_hwrm_mac_loopback(bp, false);
3369                 bnxt_hwrm_phy_loopback(bp, true, false);
3370                 msleep(1000);
3371                 if (bnxt_run_loopback(bp)) {
3372                         buf[BNXT_PHYLPBK_TEST_IDX] = 1;
3373                         etest->flags |= ETH_TEST_FL_FAILED;
3374                 }
3375                 if (do_ext_lpbk) {
3376                         etest->flags |= ETH_TEST_FL_EXTERNAL_LB_DONE;
3377                         bnxt_hwrm_phy_loopback(bp, true, true);
3378                         msleep(1000);
3379                         if (bnxt_run_loopback(bp)) {
3380                                 buf[BNXT_EXTLPBK_TEST_IDX] = 1;
3381                                 etest->flags |= ETH_TEST_FL_FAILED;
3382                         }
3383                 }
3384                 bnxt_hwrm_phy_loopback(bp, false, false);
3385                 bnxt_half_close_nic(bp);
3386                 rc = bnxt_open_nic(bp, false, true);
3387         }
3388         if (rc || bnxt_test_irq(bp)) {
3389                 buf[BNXT_IRQ_TEST_IDX] = 1;
3390                 etest->flags |= ETH_TEST_FL_FAILED;
3391         }
3392         for (i = 0; i < bp->num_tests - BNXT_DRV_TESTS; i++) {
3393                 u8 bit_val = 1 << i;
3394
3395                 if ((test_mask & bit_val) && !(test_results & bit_val)) {
3396                         buf[i] = 1;
3397                         etest->flags |= ETH_TEST_FL_FAILED;
3398                 }
3399         }
3400 }
3401
3402 static int bnxt_reset(struct net_device *dev, u32 *flags)
3403 {
3404         struct bnxt *bp = netdev_priv(dev);
3405         bool reload = false;
3406         u32 req = *flags;
3407
3408         if (!req)
3409                 return -EINVAL;
3410
3411         if (!BNXT_PF(bp)) {
3412                 netdev_err(dev, "Reset is not supported from a VF\n");
3413                 return -EOPNOTSUPP;
3414         }
3415
3416         if (pci_vfs_assigned(bp->pdev) &&
3417             !(bp->fw_cap & BNXT_FW_CAP_HOT_RESET)) {
3418                 netdev_err(dev,
3419                            "Reset not allowed when VFs are assigned to VMs\n");
3420                 return -EBUSY;
3421         }
3422
3423         if ((req & BNXT_FW_RESET_CHIP) == BNXT_FW_RESET_CHIP) {
3424                 /* This feature is not supported in older firmware versions */
3425                 if (bp->hwrm_spec_code >= 0x10803) {
3426                         if (!bnxt_firmware_reset_chip(dev)) {
3427                                 netdev_info(dev, "Firmware reset request successful.\n");
3428                                 if (!(bp->fw_cap & BNXT_FW_CAP_HOT_RESET))
3429                                         reload = true;
3430                                 *flags &= ~BNXT_FW_RESET_CHIP;
3431                         }
3432                 } else if (req == BNXT_FW_RESET_CHIP) {
3433                         return -EOPNOTSUPP; /* only request, fail hard */
3434                 }
3435         }
3436
3437         if (req & BNXT_FW_RESET_AP) {
3438                 /* This feature is not supported in older firmware versions */
3439                 if (bp->hwrm_spec_code >= 0x10803) {
3440                         if (!bnxt_firmware_reset_ap(dev)) {
3441                                 netdev_info(dev, "Reset application processor successful.\n");
3442                                 reload = true;
3443                                 *flags &= ~BNXT_FW_RESET_AP;
3444                         }
3445                 } else if (req == BNXT_FW_RESET_AP) {
3446                         return -EOPNOTSUPP; /* only request, fail hard */
3447                 }
3448         }
3449
3450         if (reload)
3451                 netdev_info(dev, "Reload driver to complete reset\n");
3452
3453         return 0;
3454 }
3455
3456 static int bnxt_hwrm_dbg_dma_data(struct bnxt *bp, void *msg, int msg_len,
3457                                   struct bnxt_hwrm_dbg_dma_info *info)
3458 {
3459         struct hwrm_dbg_cmn_output *cmn_resp = bp->hwrm_cmd_resp_addr;
3460         struct hwrm_dbg_cmn_input *cmn_req = msg;
3461         __le16 *seq_ptr = msg + info->seq_off;
3462         u16 seq = 0, len, segs_off;
3463         void *resp = cmn_resp;
3464         dma_addr_t dma_handle;
3465         int rc, off = 0;
3466         void *dma_buf;
3467
3468         dma_buf = dma_alloc_coherent(&bp->pdev->dev, info->dma_len, &dma_handle,
3469                                      GFP_KERNEL);
3470         if (!dma_buf)
3471                 return -ENOMEM;
3472
3473         segs_off = offsetof(struct hwrm_dbg_coredump_list_output,
3474                             total_segments);
3475         cmn_req->host_dest_addr = cpu_to_le64(dma_handle);
3476         cmn_req->host_buf_len = cpu_to_le32(info->dma_len);
3477         mutex_lock(&bp->hwrm_cmd_lock);
3478         while (1) {
3479                 *seq_ptr = cpu_to_le16(seq);
3480                 rc = _hwrm_send_message(bp, msg, msg_len,
3481                                         HWRM_COREDUMP_TIMEOUT);
3482                 if (rc)
3483                         break;
3484
3485                 len = le16_to_cpu(*((__le16 *)(resp + info->data_len_off)));
3486                 if (!seq &&
3487                     cmn_req->req_type == cpu_to_le16(HWRM_DBG_COREDUMP_LIST)) {
3488                         info->segs = le16_to_cpu(*((__le16 *)(resp +
3489                                                               segs_off)));
3490                         if (!info->segs) {
3491                                 rc = -EIO;
3492                                 break;
3493                         }
3494
3495                         info->dest_buf_size = info->segs *
3496                                         sizeof(struct coredump_segment_record);
3497                         info->dest_buf = kmalloc(info->dest_buf_size,
3498                                                  GFP_KERNEL);
3499                         if (!info->dest_buf) {
3500                                 rc = -ENOMEM;
3501                                 break;
3502                         }
3503                 }
3504
3505                 if (info->dest_buf) {
3506                         if ((info->seg_start + off + len) <=
3507                             BNXT_COREDUMP_BUF_LEN(info->buf_len)) {
3508                                 memcpy(info->dest_buf + off, dma_buf, len);
3509                         } else {
3510                                 rc = -ENOBUFS;
3511                                 break;
3512                         }
3513                 }
3514
3515                 if (cmn_req->req_type ==
3516                                 cpu_to_le16(HWRM_DBG_COREDUMP_RETRIEVE))
3517                         info->dest_buf_size += len;
3518
3519                 if (!(cmn_resp->flags & HWRM_DBG_CMN_FLAGS_MORE))
3520                         break;
3521
3522                 seq++;
3523                 off += len;
3524         }
3525         mutex_unlock(&bp->hwrm_cmd_lock);
3526         dma_free_coherent(&bp->pdev->dev, info->dma_len, dma_buf, dma_handle);
3527         return rc;
3528 }
3529
3530 static int bnxt_hwrm_dbg_coredump_list(struct bnxt *bp,
3531                                        struct bnxt_coredump *coredump)
3532 {
3533         struct hwrm_dbg_coredump_list_input req = {0};
3534         struct bnxt_hwrm_dbg_dma_info info = {NULL};
3535         int rc;
3536
3537         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_DBG_COREDUMP_LIST, -1, -1);
3538
3539         info.dma_len = COREDUMP_LIST_BUF_LEN;
3540         info.seq_off = offsetof(struct hwrm_dbg_coredump_list_input, seq_no);
3541         info.data_len_off = offsetof(struct hwrm_dbg_coredump_list_output,
3542                                      data_len);
3543
3544         rc = bnxt_hwrm_dbg_dma_data(bp, &req, sizeof(req), &info);
3545         if (!rc) {
3546                 coredump->data = info.dest_buf;
3547                 coredump->data_size = info.dest_buf_size;
3548                 coredump->total_segs = info.segs;
3549         }
3550         return rc;
3551 }
3552
3553 static int bnxt_hwrm_dbg_coredump_initiate(struct bnxt *bp, u16 component_id,
3554                                            u16 segment_id)
3555 {
3556         struct hwrm_dbg_coredump_initiate_input req = {0};
3557
3558         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_DBG_COREDUMP_INITIATE, -1, -1);
3559         req.component_id = cpu_to_le16(component_id);
3560         req.segment_id = cpu_to_le16(segment_id);
3561
3562         return hwrm_send_message(bp, &req, sizeof(req), HWRM_COREDUMP_TIMEOUT);
3563 }
3564
3565 static int bnxt_hwrm_dbg_coredump_retrieve(struct bnxt *bp, u16 component_id,
3566                                            u16 segment_id, u32 *seg_len,
3567                                            void *buf, u32 buf_len, u32 offset)
3568 {
3569         struct hwrm_dbg_coredump_retrieve_input req = {0};
3570         struct bnxt_hwrm_dbg_dma_info info = {NULL};
3571         int rc;
3572
3573         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_DBG_COREDUMP_RETRIEVE, -1, -1);
3574         req.component_id = cpu_to_le16(component_id);
3575         req.segment_id = cpu_to_le16(segment_id);
3576
3577         info.dma_len = COREDUMP_RETRIEVE_BUF_LEN;
3578         info.seq_off = offsetof(struct hwrm_dbg_coredump_retrieve_input,
3579                                 seq_no);
3580         info.data_len_off = offsetof(struct hwrm_dbg_coredump_retrieve_output,
3581                                      data_len);
3582         if (buf) {
3583                 info.dest_buf = buf + offset;
3584                 info.buf_len = buf_len;
3585                 info.seg_start = offset;
3586         }
3587
3588         rc = bnxt_hwrm_dbg_dma_data(bp, &req, sizeof(req), &info);
3589         if (!rc)
3590                 *seg_len = info.dest_buf_size;
3591
3592         return rc;
3593 }
3594
3595 static void
3596 bnxt_fill_coredump_seg_hdr(struct bnxt *bp,
3597                            struct bnxt_coredump_segment_hdr *seg_hdr,
3598                            struct coredump_segment_record *seg_rec, u32 seg_len,
3599                            int status, u32 duration, u32 instance)
3600 {
3601         memset(seg_hdr, 0, sizeof(*seg_hdr));
3602         memcpy(seg_hdr->signature, "sEgM", 4);
3603         if (seg_rec) {
3604                 seg_hdr->component_id = (__force __le32)seg_rec->component_id;
3605                 seg_hdr->segment_id = (__force __le32)seg_rec->segment_id;
3606                 seg_hdr->low_version = seg_rec->version_low;
3607                 seg_hdr->high_version = seg_rec->version_hi;
3608         } else {
3609                 /* For hwrm_ver_get response Component id = 2
3610                  * and Segment id = 0
3611                  */
3612                 seg_hdr->component_id = cpu_to_le32(2);
3613                 seg_hdr->segment_id = 0;
3614         }
3615         seg_hdr->function_id = cpu_to_le16(bp->pdev->devfn);
3616         seg_hdr->length = cpu_to_le32(seg_len);
3617         seg_hdr->status = cpu_to_le32(status);
3618         seg_hdr->duration = cpu_to_le32(duration);
3619         seg_hdr->data_offset = cpu_to_le32(sizeof(*seg_hdr));
3620         seg_hdr->instance = cpu_to_le32(instance);
3621 }
3622
3623 static void
3624 bnxt_fill_coredump_record(struct bnxt *bp, struct bnxt_coredump_record *record,
3625                           time64_t start, s16 start_utc, u16 total_segs,
3626                           int status)
3627 {
3628         time64_t end = ktime_get_real_seconds();
3629         u32 os_ver_major = 0, os_ver_minor = 0;
3630         struct tm tm;
3631
3632         time64_to_tm(start, 0, &tm);
3633         memset(record, 0, sizeof(*record));
3634         memcpy(record->signature, "cOrE", 4);
3635         record->flags = 0;
3636         record->low_version = 0;
3637         record->high_version = 1;
3638         record->asic_state = 0;
3639         strlcpy(record->system_name, utsname()->nodename,
3640                 sizeof(record->system_name));
3641         record->year = cpu_to_le16(tm.tm_year + 1900);
3642         record->month = cpu_to_le16(tm.tm_mon + 1);
3643         record->day = cpu_to_le16(tm.tm_mday);
3644         record->hour = cpu_to_le16(tm.tm_hour);
3645         record->minute = cpu_to_le16(tm.tm_min);
3646         record->second = cpu_to_le16(tm.tm_sec);
3647         record->utc_bias = cpu_to_le16(start_utc);
3648         strcpy(record->commandline, "ethtool -w");
3649         record->total_segments = cpu_to_le32(total_segs);
3650
3651         sscanf(utsname()->release, "%u.%u", &os_ver_major, &os_ver_minor);
3652         record->os_ver_major = cpu_to_le32(os_ver_major);
3653         record->os_ver_minor = cpu_to_le32(os_ver_minor);
3654
3655         strlcpy(record->os_name, utsname()->sysname, 32);
3656         time64_to_tm(end, 0, &tm);
3657         record->end_year = cpu_to_le16(tm.tm_year + 1900);
3658         record->end_month = cpu_to_le16(tm.tm_mon + 1);
3659         record->end_day = cpu_to_le16(tm.tm_mday);
3660         record->end_hour = cpu_to_le16(tm.tm_hour);
3661         record->end_minute = cpu_to_le16(tm.tm_min);
3662         record->end_second = cpu_to_le16(tm.tm_sec);
3663         record->end_utc_bias = cpu_to_le16(sys_tz.tz_minuteswest * 60);
3664         record->asic_id1 = cpu_to_le32(bp->chip_num << 16 |
3665                                        bp->ver_resp.chip_rev << 8 |
3666                                        bp->ver_resp.chip_metal);
3667         record->asic_id2 = 0;
3668         record->coredump_status = cpu_to_le32(status);
3669         record->ioctl_low_version = 0;
3670         record->ioctl_high_version = 0;
3671 }
3672
3673 static int bnxt_get_coredump(struct bnxt *bp, void *buf, u32 *dump_len)
3674 {
3675         u32 ver_get_resp_len = sizeof(struct hwrm_ver_get_output);
3676         u32 offset = 0, seg_hdr_len, seg_record_len, buf_len = 0;
3677         struct coredump_segment_record *seg_record = NULL;
3678         struct bnxt_coredump_segment_hdr seg_hdr;
3679         struct bnxt_coredump coredump = {NULL};
3680         time64_t start_time;
3681         u16 start_utc;
3682         int rc = 0, i;
3683
3684         if (buf)
3685                 buf_len = *dump_len;
3686
3687         start_time = ktime_get_real_seconds();
3688         start_utc = sys_tz.tz_minuteswest * 60;
3689         seg_hdr_len = sizeof(seg_hdr);
3690
3691         /* First segment should be hwrm_ver_get response */
3692         *dump_len = seg_hdr_len + ver_get_resp_len;
3693         if (buf) {
3694                 bnxt_fill_coredump_seg_hdr(bp, &seg_hdr, NULL, ver_get_resp_len,
3695                                            0, 0, 0);
3696                 memcpy(buf + offset, &seg_hdr, seg_hdr_len);
3697                 offset += seg_hdr_len;
3698                 memcpy(buf + offset, &bp->ver_resp, ver_get_resp_len);
3699                 offset += ver_get_resp_len;
3700         }
3701
3702         rc = bnxt_hwrm_dbg_coredump_list(bp, &coredump);
3703         if (rc) {
3704                 netdev_err(bp->dev, "Failed to get coredump segment list\n");
3705                 goto err;
3706         }
3707
3708         *dump_len += seg_hdr_len * coredump.total_segs;
3709
3710         seg_record = (struct coredump_segment_record *)coredump.data;
3711         seg_record_len = sizeof(*seg_record);
3712
3713         for (i = 0; i < coredump.total_segs; i++) {
3714                 u16 comp_id = le16_to_cpu(seg_record->component_id);
3715                 u16 seg_id = le16_to_cpu(seg_record->segment_id);
3716                 u32 duration = 0, seg_len = 0;
3717                 unsigned long start, end;
3718
3719                 if (buf && ((offset + seg_hdr_len) >
3720                             BNXT_COREDUMP_BUF_LEN(buf_len))) {
3721                         rc = -ENOBUFS;
3722                         goto err;
3723                 }
3724
3725                 start = jiffies;
3726
3727                 rc = bnxt_hwrm_dbg_coredump_initiate(bp, comp_id, seg_id);
3728                 if (rc) {
3729                         netdev_err(bp->dev,
3730                                    "Failed to initiate coredump for seg = %d\n",
3731                                    seg_record->segment_id);
3732                         goto next_seg;
3733                 }
3734
3735                 /* Write segment data into the buffer */
3736                 rc = bnxt_hwrm_dbg_coredump_retrieve(bp, comp_id, seg_id,
3737                                                      &seg_len, buf, buf_len,
3738                                                      offset + seg_hdr_len);
3739                 if (rc && rc == -ENOBUFS)
3740                         goto err;
3741                 else if (rc)
3742                         netdev_err(bp->dev,
3743                                    "Failed to retrieve coredump for seg = %d\n",
3744                                    seg_record->segment_id);
3745
3746 next_seg:
3747                 end = jiffies;
3748                 duration = jiffies_to_msecs(end - start);
3749                 bnxt_fill_coredump_seg_hdr(bp, &seg_hdr, seg_record, seg_len,
3750                                            rc, duration, 0);
3751
3752                 if (buf) {
3753                         /* Write segment header into the buffer */
3754                         memcpy(buf + offset, &seg_hdr, seg_hdr_len);
3755                         offset += seg_hdr_len + seg_len;
3756                 }
3757
3758                 *dump_len += seg_len;
3759                 seg_record =
3760                         (struct coredump_segment_record *)((u8 *)seg_record +
3761                                                            seg_record_len);
3762         }
3763
3764 err:
3765         if (buf)
3766                 bnxt_fill_coredump_record(bp, buf + offset, start_time,
3767                                           start_utc, coredump.total_segs + 1,
3768                                           rc);
3769         kfree(coredump.data);
3770         *dump_len += sizeof(struct bnxt_coredump_record);
3771         if (rc == -ENOBUFS)
3772                 netdev_err(bp->dev, "Firmware returned large coredump buffer\n");
3773         return rc;
3774 }
3775
3776 static int bnxt_set_dump(struct net_device *dev, struct ethtool_dump *dump)
3777 {
3778         struct bnxt *bp = netdev_priv(dev);
3779
3780         if (dump->flag > BNXT_DUMP_CRASH) {
3781                 netdev_info(dev, "Supports only Live(0) and Crash(1) dumps.\n");
3782                 return -EINVAL;
3783         }
3784
3785         if (!IS_ENABLED(CONFIG_TEE_BNXT_FW) && dump->flag == BNXT_DUMP_CRASH) {
3786                 netdev_info(dev, "Cannot collect crash dump as TEE_BNXT_FW config option is not enabled.\n");
3787                 return -EOPNOTSUPP;
3788         }
3789
3790         bp->dump_flag = dump->flag;
3791         return 0;
3792 }
3793
3794 static int bnxt_get_dump_flag(struct net_device *dev, struct ethtool_dump *dump)
3795 {
3796         struct bnxt *bp = netdev_priv(dev);
3797
3798         if (bp->hwrm_spec_code < 0x10801)
3799                 return -EOPNOTSUPP;
3800
3801         dump->version = bp->ver_resp.hwrm_fw_maj_8b << 24 |
3802                         bp->ver_resp.hwrm_fw_min_8b << 16 |
3803                         bp->ver_resp.hwrm_fw_bld_8b << 8 |
3804                         bp->ver_resp.hwrm_fw_rsvd_8b;
3805
3806         dump->flag = bp->dump_flag;
3807         if (bp->dump_flag == BNXT_DUMP_CRASH)
3808                 dump->len = BNXT_CRASH_DUMP_LEN;
3809         else
3810                 bnxt_get_coredump(bp, NULL, &dump->len);
3811         return 0;
3812 }
3813
3814 static int bnxt_get_dump_data(struct net_device *dev, struct ethtool_dump *dump,
3815                               void *buf)
3816 {
3817         struct bnxt *bp = netdev_priv(dev);
3818
3819         if (bp->hwrm_spec_code < 0x10801)
3820                 return -EOPNOTSUPP;
3821
3822         memset(buf, 0, dump->len);
3823
3824         dump->flag = bp->dump_flag;
3825         if (dump->flag == BNXT_DUMP_CRASH) {
3826 #ifdef CONFIG_TEE_BNXT_FW
3827                 return tee_bnxt_copy_coredump(buf, 0, dump->len);
3828 #endif
3829         } else {
3830                 return bnxt_get_coredump(bp, buf, &dump->len);
3831         }
3832
3833         return 0;
3834 }
3835
3836 void bnxt_ethtool_init(struct bnxt *bp)
3837 {
3838         struct hwrm_selftest_qlist_output *resp = bp->hwrm_cmd_resp_addr;
3839         struct hwrm_selftest_qlist_input req = {0};
3840         struct bnxt_test_info *test_info;
3841         struct net_device *dev = bp->dev;
3842         int i, rc;
3843
3844         if (!(bp->fw_cap & BNXT_FW_CAP_PKG_VER))
3845                 bnxt_get_pkgver(dev);
3846
3847         bp->num_tests = 0;
3848         if (bp->hwrm_spec_code < 0x10704 || !BNXT_PF(bp))
3849                 return;
3850
3851         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_SELFTEST_QLIST, -1, -1);
3852         mutex_lock(&bp->hwrm_cmd_lock);
3853         rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
3854         if (rc)
3855                 goto ethtool_init_exit;
3856
3857         test_info = bp->test_info;
3858         if (!test_info)
3859                 test_info = kzalloc(sizeof(*bp->test_info), GFP_KERNEL);
3860         if (!test_info)
3861                 goto ethtool_init_exit;
3862
3863         bp->test_info = test_info;
3864         bp->num_tests = resp->num_tests + BNXT_DRV_TESTS;
3865         if (bp->num_tests > BNXT_MAX_TEST)
3866                 bp->num_tests = BNXT_MAX_TEST;
3867
3868         test_info->offline_mask = resp->offline_tests;
3869         test_info->timeout = le16_to_cpu(resp->test_timeout);
3870         if (!test_info->timeout)
3871                 test_info->timeout = HWRM_CMD_TIMEOUT;
3872         for (i = 0; i < bp->num_tests; i++) {
3873                 char *str = test_info->string[i];
3874                 char *fw_str = resp->test0_name + i * 32;
3875
3876                 if (i == BNXT_MACLPBK_TEST_IDX) {
3877                         strcpy(str, "Mac loopback test (offline)");
3878                 } else if (i == BNXT_PHYLPBK_TEST_IDX) {
3879                         strcpy(str, "Phy loopback test (offline)");
3880                 } else if (i == BNXT_EXTLPBK_TEST_IDX) {
3881                         strcpy(str, "Ext loopback test (offline)");
3882                 } else if (i == BNXT_IRQ_TEST_IDX) {
3883                         strcpy(str, "Interrupt_test (offline)");
3884                 } else {
3885                         strlcpy(str, fw_str, ETH_GSTRING_LEN);
3886                         strncat(str, " test", ETH_GSTRING_LEN - strlen(str));
3887                         if (test_info->offline_mask & (1 << i))
3888                                 strncat(str, " (offline)",
3889                                         ETH_GSTRING_LEN - strlen(str));
3890                         else
3891                                 strncat(str, " (online)",
3892                                         ETH_GSTRING_LEN - strlen(str));
3893                 }
3894         }
3895
3896 ethtool_init_exit:
3897         mutex_unlock(&bp->hwrm_cmd_lock);
3898 }
3899
3900 void bnxt_ethtool_free(struct bnxt *bp)
3901 {
3902         kfree(bp->test_info);
3903         bp->test_info = NULL;
3904 }
3905
3906 const struct ethtool_ops bnxt_ethtool_ops = {
3907         .supported_coalesce_params = ETHTOOL_COALESCE_USECS |
3908                                      ETHTOOL_COALESCE_MAX_FRAMES |
3909                                      ETHTOOL_COALESCE_USECS_IRQ |
3910                                      ETHTOOL_COALESCE_MAX_FRAMES_IRQ |
3911                                      ETHTOOL_COALESCE_STATS_BLOCK_USECS |
3912                                      ETHTOOL_COALESCE_USE_ADAPTIVE_RX,
3913         .get_link_ksettings     = bnxt_get_link_ksettings,
3914         .set_link_ksettings     = bnxt_set_link_ksettings,
3915         .get_fecparam           = bnxt_get_fecparam,
3916         .set_fecparam           = bnxt_set_fecparam,
3917         .get_pause_stats        = bnxt_get_pause_stats,
3918         .get_pauseparam         = bnxt_get_pauseparam,
3919         .set_pauseparam         = bnxt_set_pauseparam,
3920         .get_drvinfo            = bnxt_get_drvinfo,
3921         .get_regs_len           = bnxt_get_regs_len,
3922         .get_regs               = bnxt_get_regs,
3923         .get_wol                = bnxt_get_wol,
3924         .set_wol                = bnxt_set_wol,
3925         .get_coalesce           = bnxt_get_coalesce,
3926         .set_coalesce           = bnxt_set_coalesce,
3927         .get_msglevel           = bnxt_get_msglevel,
3928         .set_msglevel           = bnxt_set_msglevel,
3929         .get_sset_count         = bnxt_get_sset_count,
3930         .get_strings            = bnxt_get_strings,
3931         .get_ethtool_stats      = bnxt_get_ethtool_stats,
3932         .set_ringparam          = bnxt_set_ringparam,
3933         .get_ringparam          = bnxt_get_ringparam,
3934         .get_channels           = bnxt_get_channels,
3935         .set_channels           = bnxt_set_channels,
3936         .get_rxnfc              = bnxt_get_rxnfc,
3937         .set_rxnfc              = bnxt_set_rxnfc,
3938         .get_rxfh_indir_size    = bnxt_get_rxfh_indir_size,
3939         .get_rxfh_key_size      = bnxt_get_rxfh_key_size,
3940         .get_rxfh               = bnxt_get_rxfh,
3941         .set_rxfh               = bnxt_set_rxfh,
3942         .flash_device           = bnxt_flash_device,
3943         .get_eeprom_len         = bnxt_get_eeprom_len,
3944         .get_eeprom             = bnxt_get_eeprom,
3945         .set_eeprom             = bnxt_set_eeprom,
3946         .get_link               = bnxt_get_link,
3947         .get_eee                = bnxt_get_eee,
3948         .set_eee                = bnxt_set_eee,
3949         .get_module_info        = bnxt_get_module_info,
3950         .get_module_eeprom      = bnxt_get_module_eeprom,
3951         .nway_reset             = bnxt_nway_reset,
3952         .set_phys_id            = bnxt_set_phys_id,
3953         .self_test              = bnxt_self_test,
3954         .reset                  = bnxt_reset,
3955         .set_dump               = bnxt_set_dump,
3956         .get_dump_flag          = bnxt_get_dump_flag,
3957         .get_dump_data          = bnxt_get_dump_data,
3958 };