1 /* Broadcom NetXtreme-C/E network driver.
3 * Copyright (c) 2017 Broadcom Limited
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation.
10 #include <linux/pci.h>
11 #include <linux/netdevice.h>
15 #include "bnxt_devlink.h"
17 static const struct devlink_ops bnxt_dl_ops = {
18 #ifdef CONFIG_BNXT_SRIOV
19 .eswitch_mode_set = bnxt_dl_eswitch_mode_set,
20 .eswitch_mode_get = bnxt_dl_eswitch_mode_get,
21 #endif /* CONFIG_BNXT_SRIOV */
24 enum bnxt_dl_param_id {
25 BNXT_DEVLINK_PARAM_ID_BASE = DEVLINK_PARAM_GENERIC_ID_MAX,
26 BNXT_DEVLINK_PARAM_ID_GRE_VER_CHECK,
29 static const struct bnxt_dl_nvm_param nvm_params[] = {
30 {DEVLINK_PARAM_GENERIC_ID_ENABLE_SRIOV, NVM_OFF_ENABLE_SRIOV,
31 BNXT_NVM_SHARED_CFG, 1},
32 {DEVLINK_PARAM_GENERIC_ID_IGNORE_ARI, NVM_OFF_IGNORE_ARI,
33 BNXT_NVM_SHARED_CFG, 1},
34 {DEVLINK_PARAM_GENERIC_ID_MSIX_VEC_PER_PF_MAX,
35 NVM_OFF_MSIX_VEC_PER_PF_MAX, BNXT_NVM_SHARED_CFG, 10},
36 {DEVLINK_PARAM_GENERIC_ID_MSIX_VEC_PER_PF_MIN,
37 NVM_OFF_MSIX_VEC_PER_PF_MIN, BNXT_NVM_SHARED_CFG, 7},
38 {BNXT_DEVLINK_PARAM_ID_GRE_VER_CHECK, NVM_OFF_DIS_GRE_VER_CHECK,
39 BNXT_NVM_SHARED_CFG, 1},
42 static int bnxt_hwrm_nvm_req(struct bnxt *bp, u32 param_id, void *msg,
43 int msg_len, union devlink_param_value *val)
45 struct hwrm_nvm_get_variable_input *req = msg;
46 void *data_addr = NULL, *buf = NULL;
47 struct bnxt_dl_nvm_param nvm_param;
48 int bytesize, idx = 0, rc, i;
49 dma_addr_t data_dma_addr;
51 /* Get/Set NVM CFG parameter is supported only on PFs */
55 for (i = 0; i < ARRAY_SIZE(nvm_params); i++) {
56 if (nvm_params[i].id == param_id) {
57 nvm_param = nvm_params[i];
62 if (i == ARRAY_SIZE(nvm_params))
65 if (nvm_param.dir_type == BNXT_NVM_PORT_CFG)
67 else if (nvm_param.dir_type == BNXT_NVM_FUNC_CFG)
68 idx = bp->pf.fw_fid - BNXT_FIRST_PF_FID;
70 bytesize = roundup(nvm_param.num_bits, BITS_PER_BYTE) / BITS_PER_BYTE;
73 if (nvm_param.num_bits == 1)
88 data_addr = dma_alloc_coherent(&bp->pdev->dev, bytesize,
89 &data_dma_addr, GFP_KERNEL);
93 req->dest_data_addr = cpu_to_le64(data_dma_addr);
94 req->data_len = cpu_to_le16(nvm_param.num_bits);
95 req->option_num = cpu_to_le16(nvm_param.offset);
96 req->index_0 = cpu_to_le16(idx);
98 req->dimensions = cpu_to_le16(1);
100 if (req->req_type == cpu_to_le16(HWRM_NVM_SET_VARIABLE))
101 memcpy(data_addr, buf, bytesize);
103 rc = hwrm_send_message(bp, msg, msg_len, HWRM_CMD_TIMEOUT);
104 if (!rc && req->req_type == cpu_to_le16(HWRM_NVM_GET_VARIABLE))
105 memcpy(buf, data_addr, bytesize);
107 dma_free_coherent(&bp->pdev->dev, bytesize, data_addr, data_dma_addr);
108 if (rc == HWRM_ERR_CODE_RESOURCE_ACCESS_DENIED) {
109 netdev_err(bp->dev, "PF does not have admin privileges to modify NVM config\n");
117 static int bnxt_dl_nvm_param_get(struct devlink *dl, u32 id,
118 struct devlink_param_gset_ctx *ctx)
120 struct hwrm_nvm_get_variable_input req = {0};
121 struct bnxt *bp = bnxt_get_bp_from_dl(dl);
124 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_VARIABLE, -1, -1);
125 rc = bnxt_hwrm_nvm_req(bp, id, &req, sizeof(req), &ctx->val);
127 if (id == BNXT_DEVLINK_PARAM_ID_GRE_VER_CHECK)
128 ctx->val.vbool = !ctx->val.vbool;
133 static int bnxt_dl_nvm_param_set(struct devlink *dl, u32 id,
134 struct devlink_param_gset_ctx *ctx)
136 struct hwrm_nvm_set_variable_input req = {0};
137 struct bnxt *bp = bnxt_get_bp_from_dl(dl);
139 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_SET_VARIABLE, -1, -1);
141 if (id == BNXT_DEVLINK_PARAM_ID_GRE_VER_CHECK)
142 ctx->val.vbool = !ctx->val.vbool;
144 return bnxt_hwrm_nvm_req(bp, id, &req, sizeof(req), &ctx->val);
147 static int bnxt_dl_msix_validate(struct devlink *dl, u32 id,
148 union devlink_param_value val,
149 struct netlink_ext_ack *extack)
153 if (id == DEVLINK_PARAM_GENERIC_ID_MSIX_VEC_PER_PF_MAX)
154 max_val = BNXT_MSIX_VEC_MAX;
156 if (id == DEVLINK_PARAM_GENERIC_ID_MSIX_VEC_PER_PF_MIN)
157 max_val = BNXT_MSIX_VEC_MIN_MAX;
159 if (val.vu32 > max_val) {
160 NL_SET_ERR_MSG_MOD(extack, "MSIX value is exceeding the range");
167 static const struct devlink_param bnxt_dl_params[] = {
168 DEVLINK_PARAM_GENERIC(ENABLE_SRIOV,
169 BIT(DEVLINK_PARAM_CMODE_PERMANENT),
170 bnxt_dl_nvm_param_get, bnxt_dl_nvm_param_set,
172 DEVLINK_PARAM_GENERIC(IGNORE_ARI,
173 BIT(DEVLINK_PARAM_CMODE_PERMANENT),
174 bnxt_dl_nvm_param_get, bnxt_dl_nvm_param_set,
176 DEVLINK_PARAM_GENERIC(MSIX_VEC_PER_PF_MAX,
177 BIT(DEVLINK_PARAM_CMODE_PERMANENT),
178 bnxt_dl_nvm_param_get, bnxt_dl_nvm_param_set,
179 bnxt_dl_msix_validate),
180 DEVLINK_PARAM_GENERIC(MSIX_VEC_PER_PF_MIN,
181 BIT(DEVLINK_PARAM_CMODE_PERMANENT),
182 bnxt_dl_nvm_param_get, bnxt_dl_nvm_param_set,
183 bnxt_dl_msix_validate),
184 DEVLINK_PARAM_DRIVER(BNXT_DEVLINK_PARAM_ID_GRE_VER_CHECK,
185 "gre_ver_check", DEVLINK_PARAM_TYPE_BOOL,
186 BIT(DEVLINK_PARAM_CMODE_PERMANENT),
187 bnxt_dl_nvm_param_get, bnxt_dl_nvm_param_set,
191 int bnxt_dl_register(struct bnxt *bp)
196 if (bp->hwrm_spec_code < 0x10600) {
197 netdev_warn(bp->dev, "Firmware does not support NVM params");
201 dl = devlink_alloc(&bnxt_dl_ops, sizeof(struct bnxt_dl));
203 netdev_warn(bp->dev, "devlink_alloc failed");
207 bnxt_link_bp_to_dl(bp, dl);
209 /* Add switchdev eswitch mode setting, if SRIOV supported */
210 if (pci_find_ext_capability(bp->pdev, PCI_EXT_CAP_ID_SRIOV) &&
211 bp->hwrm_spec_code > 0x10803)
212 bp->eswitch_mode = DEVLINK_ESWITCH_MODE_LEGACY;
214 rc = devlink_register(dl, &bp->pdev->dev);
216 netdev_warn(bp->dev, "devlink_register failed. rc=%d", rc);
220 rc = devlink_params_register(dl, bnxt_dl_params,
221 ARRAY_SIZE(bnxt_dl_params));
223 netdev_warn(bp->dev, "devlink_params_register failed. rc=%d",
231 devlink_unregister(dl);
233 bnxt_link_bp_to_dl(bp, NULL);
238 void bnxt_dl_unregister(struct bnxt *bp)
240 struct devlink *dl = bp->dl;
245 devlink_params_unregister(dl, bnxt_dl_params,
246 ARRAY_SIZE(bnxt_dl_params));
247 devlink_unregister(dl);