1 /* bnx2x_sriov.c: QLogic Everest network driver.
3 * Copyright 2009-2013 Broadcom Corporation
4 * Copyright 2014 QLogic Corporation
7 * Unless you and QLogic execute a separate written software license
8 * agreement governing use of this software, this software is licensed to you
9 * under the terms of the GNU General Public License version 2, available
10 * at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL").
12 * Notwithstanding the above, under no circumstances may you combine this
13 * software in any way with any other QLogic software provided under a
14 * license other than the GPL, without QLogic's express prior written
17 * Maintained by: Ariel Elior <ariel.elior@qlogic.com>
18 * Written by: Shmulik Ravid
19 * Ariel Elior <ariel.elior@qlogic.com>
23 #include "bnx2x_init.h"
24 #include "bnx2x_cmn.h"
26 #include <linux/crc32.h>
27 #include <linux/if_vlan.h>
29 static int bnx2x_vf_op_prep(struct bnx2x *bp, int vfidx,
30 struct bnx2x_virtf **vf,
31 struct pf_vf_bulletin_content **bulletin,
34 /* General service functions */
35 static void storm_memset_vf_to_pf(struct bnx2x *bp, u16 abs_fid,
38 REG_WR8(bp, BAR_XSTRORM_INTMEM + XSTORM_VF_TO_PF_OFFSET(abs_fid),
40 REG_WR8(bp, BAR_CSTRORM_INTMEM + CSTORM_VF_TO_PF_OFFSET(abs_fid),
42 REG_WR8(bp, BAR_TSTRORM_INTMEM + TSTORM_VF_TO_PF_OFFSET(abs_fid),
44 REG_WR8(bp, BAR_USTRORM_INTMEM + USTORM_VF_TO_PF_OFFSET(abs_fid),
48 static void storm_memset_func_en(struct bnx2x *bp, u16 abs_fid,
51 REG_WR8(bp, BAR_XSTRORM_INTMEM + XSTORM_FUNC_EN_OFFSET(abs_fid),
53 REG_WR8(bp, BAR_CSTRORM_INTMEM + CSTORM_FUNC_EN_OFFSET(abs_fid),
55 REG_WR8(bp, BAR_TSTRORM_INTMEM + TSTORM_FUNC_EN_OFFSET(abs_fid),
57 REG_WR8(bp, BAR_USTRORM_INTMEM + USTORM_FUNC_EN_OFFSET(abs_fid),
61 int bnx2x_vf_idx_by_abs_fid(struct bnx2x *bp, u16 abs_vfid)
66 if (bnx2x_vf(bp, idx, abs_vfid) == abs_vfid)
72 struct bnx2x_virtf *bnx2x_vf_by_abs_fid(struct bnx2x *bp, u16 abs_vfid)
74 u16 idx = (u16)bnx2x_vf_idx_by_abs_fid(bp, abs_vfid);
75 return (idx < BNX2X_NR_VIRTFN(bp)) ? BP_VF(bp, idx) : NULL;
78 static void bnx2x_vf_igu_ack_sb(struct bnx2x *bp, struct bnx2x_virtf *vf,
79 u8 igu_sb_id, u8 segment, u16 index, u8 op,
82 /* acking a VF sb through the PF - use the GRC */
84 u32 igu_addr_data = IGU_REG_COMMAND_REG_32LSB_DATA;
85 u32 igu_addr_ctl = IGU_REG_COMMAND_REG_CTRL;
86 u32 func_encode = vf->abs_vfid;
87 u32 addr_encode = IGU_CMD_E2_PROD_UPD_BASE + igu_sb_id;
88 struct igu_regular cmd_data = {0};
90 cmd_data.sb_id_and_flags =
91 ((index << IGU_REGULAR_SB_INDEX_SHIFT) |
92 (segment << IGU_REGULAR_SEGMENT_ACCESS_SHIFT) |
93 (update << IGU_REGULAR_BUPDATE_SHIFT) |
94 (op << IGU_REGULAR_ENABLE_INT_SHIFT));
96 ctl = addr_encode << IGU_CTRL_REG_ADDRESS_SHIFT |
97 func_encode << IGU_CTRL_REG_FID_SHIFT |
98 IGU_CTRL_CMD_TYPE_WR << IGU_CTRL_REG_TYPE_SHIFT;
100 DP(NETIF_MSG_HW, "write 0x%08x to IGU(via GRC) addr 0x%x\n",
101 cmd_data.sb_id_and_flags, igu_addr_data);
102 REG_WR(bp, igu_addr_data, cmd_data.sb_id_and_flags);
106 DP(NETIF_MSG_HW, "write 0x%08x to IGU(via GRC) addr 0x%x\n",
108 REG_WR(bp, igu_addr_ctl, ctl);
113 static bool bnx2x_validate_vf_sp_objs(struct bnx2x *bp,
114 struct bnx2x_virtf *vf,
117 if (!bnx2x_leading_vfq(vf, sp_initialized)) {
119 BNX2X_ERR("Slowpath objects not yet initialized!\n");
121 DP(BNX2X_MSG_IOV, "Slowpath objects not yet initialized!\n");
127 /* VFOP operations states */
128 void bnx2x_vfop_qctor_dump_tx(struct bnx2x *bp, struct bnx2x_virtf *vf,
129 struct bnx2x_queue_init_params *init_params,
130 struct bnx2x_queue_setup_params *setup_params,
131 u16 q_idx, u16 sb_idx)
134 "VF[%d] Q_SETUP: txq[%d]-- vfsb=%d, sb-index=%d, hc-rate=%d, flags=0x%lx, traffic-type=%d",
138 init_params->tx.sb_cq_index,
139 init_params->tx.hc_rate,
141 setup_params->txq_params.traffic_type);
144 void bnx2x_vfop_qctor_dump_rx(struct bnx2x *bp, struct bnx2x_virtf *vf,
145 struct bnx2x_queue_init_params *init_params,
146 struct bnx2x_queue_setup_params *setup_params,
147 u16 q_idx, u16 sb_idx)
149 struct bnx2x_rxq_setup_params *rxq_params = &setup_params->rxq_params;
151 DP(BNX2X_MSG_IOV, "VF[%d] Q_SETUP: rxq[%d]-- vfsb=%d, sb-index=%d, hc-rate=%d, mtu=%d, buf-size=%d\n"
152 "sge-size=%d, max_sge_pkt=%d, tpa-agg-size=%d, flags=0x%lx, drop-flags=0x%x, cache-log=%d\n",
156 init_params->rx.sb_cq_index,
157 init_params->rx.hc_rate,
158 setup_params->gen_params.mtu,
160 rxq_params->sge_buf_sz,
161 rxq_params->max_sges_pkt,
162 rxq_params->tpa_agg_sz,
164 rxq_params->drop_flags,
165 rxq_params->cache_line_log);
168 void bnx2x_vfop_qctor_prep(struct bnx2x *bp,
169 struct bnx2x_virtf *vf,
170 struct bnx2x_vf_queue *q,
171 struct bnx2x_vf_queue_construct_params *p,
172 unsigned long q_type)
174 struct bnx2x_queue_init_params *init_p = &p->qstate.params.init;
175 struct bnx2x_queue_setup_params *setup_p = &p->prep_qsetup;
179 /* Enable host coalescing in the transition to INIT state */
180 if (test_bit(BNX2X_Q_FLG_HC, &init_p->rx.flags))
181 __set_bit(BNX2X_Q_FLG_HC_EN, &init_p->rx.flags);
183 if (test_bit(BNX2X_Q_FLG_HC, &init_p->tx.flags))
184 __set_bit(BNX2X_Q_FLG_HC_EN, &init_p->tx.flags);
187 init_p->rx.fw_sb_id = vf_igu_sb(vf, q->sb_idx);
188 init_p->tx.fw_sb_id = vf_igu_sb(vf, q->sb_idx);
191 init_p->cxts[0] = q->cxt;
195 /* Setup-op general parameters */
196 setup_p->gen_params.spcl_id = vf->sp_cl_id;
197 setup_p->gen_params.stat_id = vfq_stat_id(vf, q);
198 setup_p->gen_params.fp_hsi = vf->fp_hsi;
200 /* Setup-op pause params:
201 * Nothing to do, the pause thresholds are set by default to 0 which
202 * effectively turns off the feature for this queue. We don't want
203 * one queue (VF) to interfering with another queue (another VF)
205 if (vf->cfg_flags & VF_CFG_FW_FC)
206 BNX2X_ERR("No support for pause to VFs (abs_vfid: %d)\n",
209 * collect statistics, zero statistics, local-switching, security,
210 * OV for Flex10, RSS and MCAST for leading
212 if (test_bit(BNX2X_Q_FLG_STATS, &setup_p->flags))
213 __set_bit(BNX2X_Q_FLG_ZERO_STATS, &setup_p->flags);
215 /* for VFs, enable tx switching, bd coherency, and mac address
218 __set_bit(BNX2X_Q_FLG_TX_SWITCH, &setup_p->flags);
219 __set_bit(BNX2X_Q_FLG_TX_SEC, &setup_p->flags);
220 __set_bit(BNX2X_Q_FLG_ANTI_SPOOF, &setup_p->flags);
222 /* Setup-op rx parameters */
223 if (test_bit(BNX2X_Q_TYPE_HAS_RX, &q_type)) {
224 struct bnx2x_rxq_setup_params *rxq_p = &setup_p->rxq_params;
226 rxq_p->cl_qzone_id = vfq_qzone_id(vf, q);
227 rxq_p->fw_sb_id = vf_igu_sb(vf, q->sb_idx);
228 rxq_p->rss_engine_id = FW_VF_HANDLE(vf->abs_vfid);
230 if (test_bit(BNX2X_Q_FLG_TPA, &setup_p->flags))
231 rxq_p->max_tpa_queues = BNX2X_VF_MAX_TPA_AGG_QUEUES;
234 /* Setup-op tx parameters */
235 if (test_bit(BNX2X_Q_TYPE_HAS_TX, &q_type)) {
236 setup_p->txq_params.tss_leading_cl_id = vf->leading_rss;
237 setup_p->txq_params.fw_sb_id = vf_igu_sb(vf, q->sb_idx);
241 static int bnx2x_vf_queue_create(struct bnx2x *bp,
242 struct bnx2x_virtf *vf, int qid,
243 struct bnx2x_vf_queue_construct_params *qctor)
245 struct bnx2x_queue_state_params *q_params;
248 DP(BNX2X_MSG_IOV, "vf[%d:%d]\n", vf->abs_vfid, qid);
250 /* Prepare ramrod information */
251 q_params = &qctor->qstate;
252 q_params->q_obj = &bnx2x_vfq(vf, qid, sp_obj);
253 set_bit(RAMROD_COMP_WAIT, &q_params->ramrod_flags);
255 if (bnx2x_get_q_logical_state(bp, q_params->q_obj) ==
256 BNX2X_Q_LOGICAL_STATE_ACTIVE) {
257 DP(BNX2X_MSG_IOV, "queue was already up. Aborting gracefully\n");
261 /* Run Queue 'construction' ramrods */
262 q_params->cmd = BNX2X_Q_CMD_INIT;
263 rc = bnx2x_queue_state_change(bp, q_params);
267 memcpy(&q_params->params.setup, &qctor->prep_qsetup,
268 sizeof(struct bnx2x_queue_setup_params));
269 q_params->cmd = BNX2X_Q_CMD_SETUP;
270 rc = bnx2x_queue_state_change(bp, q_params);
274 /* enable interrupts */
275 bnx2x_vf_igu_ack_sb(bp, vf, vf_igu_sb(vf, bnx2x_vfq(vf, qid, sb_idx)),
276 USTORM_ID, 0, IGU_INT_ENABLE, 0);
281 static int bnx2x_vf_queue_destroy(struct bnx2x *bp, struct bnx2x_virtf *vf,
284 enum bnx2x_queue_cmd cmds[] = {BNX2X_Q_CMD_HALT,
285 BNX2X_Q_CMD_TERMINATE,
286 BNX2X_Q_CMD_CFC_DEL};
287 struct bnx2x_queue_state_params q_params;
290 DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);
292 /* Prepare ramrod information */
293 memset(&q_params, 0, sizeof(struct bnx2x_queue_state_params));
294 q_params.q_obj = &bnx2x_vfq(vf, qid, sp_obj);
295 set_bit(RAMROD_COMP_WAIT, &q_params.ramrod_flags);
297 if (bnx2x_get_q_logical_state(bp, q_params.q_obj) ==
298 BNX2X_Q_LOGICAL_STATE_STOPPED) {
299 DP(BNX2X_MSG_IOV, "queue was already stopped. Aborting gracefully\n");
303 /* Run Queue 'destruction' ramrods */
304 for (i = 0; i < ARRAY_SIZE(cmds); i++) {
305 q_params.cmd = cmds[i];
306 rc = bnx2x_queue_state_change(bp, &q_params);
308 BNX2X_ERR("Failed to run Queue command %d\n", cmds[i]);
314 if (bnx2x_vfq(vf, qid, cxt)) {
315 bnx2x_vfq(vf, qid, cxt)->ustorm_ag_context.cdu_usage = 0;
316 bnx2x_vfq(vf, qid, cxt)->xstorm_ag_context.cdu_reserved = 0;
323 bnx2x_vf_set_igu_info(struct bnx2x *bp, u8 igu_sb_id, u8 abs_vfid)
325 struct bnx2x_virtf *vf = bnx2x_vf_by_abs_fid(bp, abs_vfid);
327 /* the first igu entry belonging to VFs of this PF */
328 if (!BP_VFDB(bp)->first_vf_igu_entry)
329 BP_VFDB(bp)->first_vf_igu_entry = igu_sb_id;
331 /* the first igu entry belonging to this VF */
332 if (!vf_sb_count(vf))
333 vf->igu_base_id = igu_sb_id;
338 BP_VFDB(bp)->vf_sbs_pool++;
341 static inline void bnx2x_vf_vlan_credit(struct bnx2x *bp,
342 struct bnx2x_vlan_mac_obj *obj,
345 struct list_head *pos;
349 read_lock = bnx2x_vlan_mac_h_read_lock(bp, obj);
351 DP(BNX2X_MSG_SP, "Failed to take vlan mac read head; continuing anyway\n");
353 list_for_each(pos, &obj->head)
357 bnx2x_vlan_mac_h_read_unlock(bp, obj);
359 atomic_set(counter, cnt);
362 static int bnx2x_vf_vlan_mac_clear(struct bnx2x *bp, struct bnx2x_virtf *vf,
363 int qid, bool drv_only, bool mac)
365 struct bnx2x_vlan_mac_ramrod_params ramrod;
368 DP(BNX2X_MSG_IOV, "vf[%d] - deleting all %s\n", vf->abs_vfid,
369 mac ? "MACs" : "VLANs");
371 /* Prepare ramrod params */
372 memset(&ramrod, 0, sizeof(struct bnx2x_vlan_mac_ramrod_params));
374 set_bit(BNX2X_ETH_MAC, &ramrod.user_req.vlan_mac_flags);
375 ramrod.vlan_mac_obj = &bnx2x_vfq(vf, qid, mac_obj);
377 set_bit(BNX2X_DONT_CONSUME_CAM_CREDIT,
378 &ramrod.user_req.vlan_mac_flags);
379 ramrod.vlan_mac_obj = &bnx2x_vfq(vf, qid, vlan_obj);
381 ramrod.user_req.cmd = BNX2X_VLAN_MAC_DEL;
383 set_bit(RAMROD_EXEC, &ramrod.ramrod_flags);
385 set_bit(RAMROD_DRV_CLR_ONLY, &ramrod.ramrod_flags);
387 set_bit(RAMROD_COMP_WAIT, &ramrod.ramrod_flags);
390 rc = ramrod.vlan_mac_obj->delete_all(bp,
392 &ramrod.user_req.vlan_mac_flags,
393 &ramrod.ramrod_flags);
395 BNX2X_ERR("Failed to delete all %s\n",
396 mac ? "MACs" : "VLANs");
400 /* Clear the vlan counters */
402 atomic_set(&bnx2x_vfq(vf, qid, vlan_count), 0);
407 static int bnx2x_vf_mac_vlan_config(struct bnx2x *bp,
408 struct bnx2x_virtf *vf, int qid,
409 struct bnx2x_vf_mac_vlan_filter *filter,
412 struct bnx2x_vlan_mac_ramrod_params ramrod;
415 DP(BNX2X_MSG_IOV, "vf[%d] - %s a %s filter\n",
416 vf->abs_vfid, filter->add ? "Adding" : "Deleting",
417 filter->type == BNX2X_VF_FILTER_MAC ? "MAC" : "VLAN");
419 /* Prepare ramrod params */
420 memset(&ramrod, 0, sizeof(struct bnx2x_vlan_mac_ramrod_params));
421 if (filter->type == BNX2X_VF_FILTER_VLAN) {
422 set_bit(BNX2X_DONT_CONSUME_CAM_CREDIT,
423 &ramrod.user_req.vlan_mac_flags);
424 ramrod.vlan_mac_obj = &bnx2x_vfq(vf, qid, vlan_obj);
425 ramrod.user_req.u.vlan.vlan = filter->vid;
427 set_bit(BNX2X_ETH_MAC, &ramrod.user_req.vlan_mac_flags);
428 ramrod.vlan_mac_obj = &bnx2x_vfq(vf, qid, mac_obj);
429 memcpy(&ramrod.user_req.u.mac.mac, filter->mac, ETH_ALEN);
431 ramrod.user_req.cmd = filter->add ? BNX2X_VLAN_MAC_ADD :
434 /* Verify there are available vlan credits */
435 if (filter->add && filter->type == BNX2X_VF_FILTER_VLAN &&
436 (atomic_read(&bnx2x_vfq(vf, qid, vlan_count)) >=
437 vf_vlan_rules_cnt(vf))) {
438 BNX2X_ERR("No credits for vlan [%d >= %d]\n",
439 atomic_read(&bnx2x_vfq(vf, qid, vlan_count)),
440 vf_vlan_rules_cnt(vf));
444 set_bit(RAMROD_EXEC, &ramrod.ramrod_flags);
446 set_bit(RAMROD_DRV_CLR_ONLY, &ramrod.ramrod_flags);
448 set_bit(RAMROD_COMP_WAIT, &ramrod.ramrod_flags);
450 /* Add/Remove the filter */
451 rc = bnx2x_config_vlan_mac(bp, &ramrod);
452 if (rc && rc != -EEXIST) {
453 BNX2X_ERR("Failed to %s %s\n",
454 filter->add ? "add" : "delete",
455 filter->type == BNX2X_VF_FILTER_MAC ? "MAC" :
460 /* Update the vlan counters */
461 if (filter->type == BNX2X_VF_FILTER_VLAN)
462 bnx2x_vf_vlan_credit(bp, ramrod.vlan_mac_obj,
463 &bnx2x_vfq(vf, qid, vlan_count));
468 int bnx2x_vf_mac_vlan_config_list(struct bnx2x *bp, struct bnx2x_virtf *vf,
469 struct bnx2x_vf_mac_vlan_filters *filters,
470 int qid, bool drv_only)
474 DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);
476 if (!bnx2x_validate_vf_sp_objs(bp, vf, true))
479 /* Prepare ramrod params */
480 for (i = 0; i < filters->count; i++) {
481 rc = bnx2x_vf_mac_vlan_config(bp, vf, qid,
482 &filters->filters[i], drv_only);
487 /* Rollback if needed */
488 if (i != filters->count) {
489 BNX2X_ERR("Managed only %d/%d filters - rolling back\n",
490 i, filters->count + 1);
492 filters->filters[i].add = !filters->filters[i].add;
493 bnx2x_vf_mac_vlan_config(bp, vf, qid,
494 &filters->filters[i],
499 /* It's our responsibility to free the filters */
505 int bnx2x_vf_queue_setup(struct bnx2x *bp, struct bnx2x_virtf *vf, int qid,
506 struct bnx2x_vf_queue_construct_params *qctor)
510 DP(BNX2X_MSG_IOV, "vf[%d:%d]\n", vf->abs_vfid, qid);
512 rc = bnx2x_vf_queue_create(bp, vf, qid, qctor);
516 /* Configure vlan0 for leading queue */
518 struct bnx2x_vf_mac_vlan_filter filter;
520 memset(&filter, 0, sizeof(struct bnx2x_vf_mac_vlan_filter));
521 filter.type = BNX2X_VF_FILTER_VLAN;
524 rc = bnx2x_vf_mac_vlan_config(bp, vf, qid, &filter, false);
529 /* Schedule the configuration of any pending vlan filters */
530 vf->cfg_flags |= VF_CFG_VLAN;
531 bnx2x_schedule_sp_rtnl(bp, BNX2X_SP_RTNL_HYPERVISOR_VLAN,
535 BNX2X_ERR("QSETUP[%d:%d] error: rc %d\n", vf->abs_vfid, qid, rc);
539 static int bnx2x_vf_queue_flr(struct bnx2x *bp, struct bnx2x_virtf *vf,
544 DP(BNX2X_MSG_IOV, "vf[%d:%d]\n", vf->abs_vfid, qid);
546 /* If needed, clean the filtering data base */
547 if ((qid == LEADING_IDX) &&
548 bnx2x_validate_vf_sp_objs(bp, vf, false)) {
549 rc = bnx2x_vf_vlan_mac_clear(bp, vf, qid, true, false);
552 rc = bnx2x_vf_vlan_mac_clear(bp, vf, qid, true, true);
557 /* Terminate queue */
558 if (bnx2x_vfq(vf, qid, sp_obj).state != BNX2X_Q_STATE_RESET) {
559 struct bnx2x_queue_state_params qstate;
561 memset(&qstate, 0, sizeof(struct bnx2x_queue_state_params));
562 qstate.q_obj = &bnx2x_vfq(vf, qid, sp_obj);
563 qstate.q_obj->state = BNX2X_Q_STATE_STOPPED;
564 qstate.cmd = BNX2X_Q_CMD_TERMINATE;
565 set_bit(RAMROD_COMP_WAIT, &qstate.ramrod_flags);
566 rc = bnx2x_queue_state_change(bp, &qstate);
573 BNX2X_ERR("vf[%d:%d] error: rc %d\n", vf->abs_vfid, qid, rc);
577 int bnx2x_vf_mcast(struct bnx2x *bp, struct bnx2x_virtf *vf,
578 bnx2x_mac_addr_t *mcasts, int mc_num, bool drv_only)
580 struct bnx2x_mcast_list_elem *mc = NULL;
581 struct bnx2x_mcast_ramrod_params mcast;
584 DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);
586 /* Prepare Multicast command */
587 memset(&mcast, 0, sizeof(struct bnx2x_mcast_ramrod_params));
588 mcast.mcast_obj = &vf->mcast_obj;
590 set_bit(RAMROD_DRV_CLR_ONLY, &mcast.ramrod_flags);
592 set_bit(RAMROD_COMP_WAIT, &mcast.ramrod_flags);
594 mc = kzalloc(mc_num * sizeof(struct bnx2x_mcast_list_elem),
597 BNX2X_ERR("Cannot Configure multicasts due to lack of memory\n");
602 /* clear existing mcasts */
603 mcast.mcast_list_len = vf->mcast_list_len;
604 vf->mcast_list_len = mc_num;
605 rc = bnx2x_config_mcast(bp, &mcast, BNX2X_MCAST_CMD_DEL);
607 BNX2X_ERR("Failed to remove multicasts\n");
612 /* update mcast list on the ramrod params */
614 INIT_LIST_HEAD(&mcast.mcast_list);
615 for (i = 0; i < mc_num; i++) {
616 mc[i].mac = mcasts[i];
617 list_add_tail(&mc[i].link,
622 mcast.mcast_list_len = mc_num;
623 rc = bnx2x_config_mcast(bp, &mcast, BNX2X_MCAST_CMD_ADD);
625 BNX2X_ERR("Faled to add multicasts\n");
632 static void bnx2x_vf_prep_rx_mode(struct bnx2x *bp, u8 qid,
633 struct bnx2x_rx_mode_ramrod_params *ramrod,
634 struct bnx2x_virtf *vf,
635 unsigned long accept_flags)
637 struct bnx2x_vf_queue *vfq = vfq_get(vf, qid);
639 memset(ramrod, 0, sizeof(*ramrod));
640 ramrod->cid = vfq->cid;
641 ramrod->cl_id = vfq_cl_id(vf, vfq);
642 ramrod->rx_mode_obj = &bp->rx_mode_obj;
643 ramrod->func_id = FW_VF_HANDLE(vf->abs_vfid);
644 ramrod->rx_accept_flags = accept_flags;
645 ramrod->tx_accept_flags = accept_flags;
646 ramrod->pstate = &vf->filter_state;
647 ramrod->state = BNX2X_FILTER_RX_MODE_PENDING;
649 set_bit(BNX2X_FILTER_RX_MODE_PENDING, &vf->filter_state);
650 set_bit(RAMROD_RX, &ramrod->ramrod_flags);
651 set_bit(RAMROD_TX, &ramrod->ramrod_flags);
653 ramrod->rdata = bnx2x_vf_sp(bp, vf, rx_mode_rdata.e2);
654 ramrod->rdata_mapping = bnx2x_vf_sp_map(bp, vf, rx_mode_rdata.e2);
657 int bnx2x_vf_rxmode(struct bnx2x *bp, struct bnx2x_virtf *vf,
658 int qid, unsigned long accept_flags)
660 struct bnx2x_rx_mode_ramrod_params ramrod;
662 DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);
664 bnx2x_vf_prep_rx_mode(bp, qid, &ramrod, vf, accept_flags);
665 set_bit(RAMROD_COMP_WAIT, &ramrod.ramrod_flags);
666 vfq_get(vf, qid)->accept_flags = ramrod.rx_accept_flags;
667 return bnx2x_config_rx_mode(bp, &ramrod);
670 int bnx2x_vf_queue_teardown(struct bnx2x *bp, struct bnx2x_virtf *vf, int qid)
674 DP(BNX2X_MSG_IOV, "vf[%d:%d]\n", vf->abs_vfid, qid);
676 /* Remove all classification configuration for leading queue */
677 if (qid == LEADING_IDX) {
678 rc = bnx2x_vf_rxmode(bp, vf, qid, 0);
682 /* Remove filtering if feasible */
683 if (bnx2x_validate_vf_sp_objs(bp, vf, true)) {
684 rc = bnx2x_vf_vlan_mac_clear(bp, vf, qid,
688 rc = bnx2x_vf_vlan_mac_clear(bp, vf, qid,
692 rc = bnx2x_vf_mcast(bp, vf, NULL, 0, false);
699 rc = bnx2x_vf_queue_destroy(bp, vf, qid);
704 BNX2X_ERR("vf[%d:%d] error: rc %d\n",
705 vf->abs_vfid, qid, rc);
709 /* VF enable primitives
710 * when pretend is required the caller is responsible
711 * for calling pretend prior to calling these routines
714 /* internal vf enable - until vf is enabled internally all transactions
715 * are blocked. This routine should always be called last with pretend.
717 static void bnx2x_vf_enable_internal(struct bnx2x *bp, u8 enable)
719 REG_WR(bp, PGLUE_B_REG_INTERNAL_VFID_ENABLE, enable ? 1 : 0);
722 /* clears vf error in all semi blocks */
723 static void bnx2x_vf_semi_clear_err(struct bnx2x *bp, u8 abs_vfid)
725 REG_WR(bp, TSEM_REG_VFPF_ERR_NUM, abs_vfid);
726 REG_WR(bp, USEM_REG_VFPF_ERR_NUM, abs_vfid);
727 REG_WR(bp, CSEM_REG_VFPF_ERR_NUM, abs_vfid);
728 REG_WR(bp, XSEM_REG_VFPF_ERR_NUM, abs_vfid);
731 static void bnx2x_vf_pglue_clear_err(struct bnx2x *bp, u8 abs_vfid)
733 u32 was_err_group = (2 * BP_PATH(bp) + abs_vfid) >> 5;
736 switch (was_err_group) {
738 was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_31_0_CLR;
741 was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_63_32_CLR;
744 was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_95_64_CLR;
747 was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_127_96_CLR;
750 REG_WR(bp, was_err_reg, 1 << (abs_vfid & 0x1f));
753 static void bnx2x_vf_igu_reset(struct bnx2x *bp, struct bnx2x_virtf *vf)
758 /* Set VF masks and configuration - pretend */
759 bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid));
761 REG_WR(bp, IGU_REG_SB_INT_BEFORE_MASK_LSB, 0);
762 REG_WR(bp, IGU_REG_SB_INT_BEFORE_MASK_MSB, 0);
763 REG_WR(bp, IGU_REG_SB_MASK_LSB, 0);
764 REG_WR(bp, IGU_REG_SB_MASK_MSB, 0);
765 REG_WR(bp, IGU_REG_PBA_STATUS_LSB, 0);
766 REG_WR(bp, IGU_REG_PBA_STATUS_MSB, 0);
768 val = REG_RD(bp, IGU_REG_VF_CONFIGURATION);
769 val |= (IGU_VF_CONF_FUNC_EN | IGU_VF_CONF_MSI_MSIX_EN);
770 if (vf->cfg_flags & VF_CFG_INT_SIMD)
771 val |= IGU_VF_CONF_SINGLE_ISR_EN;
772 val &= ~IGU_VF_CONF_PARENT_MASK;
773 val |= (BP_ABS_FUNC(bp) >> 1) << IGU_VF_CONF_PARENT_SHIFT;
774 REG_WR(bp, IGU_REG_VF_CONFIGURATION, val);
777 "value in IGU_REG_VF_CONFIGURATION of vf %d after write is 0x%08x\n",
780 bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
782 /* iterate over all queues, clear sb consumer */
783 for (i = 0; i < vf_sb_count(vf); i++) {
784 u8 igu_sb_id = vf_igu_sb(vf, i);
786 /* zero prod memory */
787 REG_WR(bp, IGU_REG_PROD_CONS_MEMORY + igu_sb_id * 4, 0);
789 /* clear sb state machine */
790 bnx2x_igu_clear_sb_gen(bp, vf->abs_vfid, igu_sb_id,
793 /* disable + update */
794 bnx2x_vf_igu_ack_sb(bp, vf, igu_sb_id, USTORM_ID, 0,
799 void bnx2x_vf_enable_access(struct bnx2x *bp, u8 abs_vfid)
801 /* set the VF-PF association in the FW */
802 storm_memset_vf_to_pf(bp, FW_VF_HANDLE(abs_vfid), BP_FUNC(bp));
803 storm_memset_func_en(bp, FW_VF_HANDLE(abs_vfid), 1);
806 bnx2x_vf_semi_clear_err(bp, abs_vfid);
807 bnx2x_vf_pglue_clear_err(bp, abs_vfid);
809 /* internal vf-enable - pretend */
810 bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, abs_vfid));
811 DP(BNX2X_MSG_IOV, "enabling internal access for vf %x\n", abs_vfid);
812 bnx2x_vf_enable_internal(bp, true);
813 bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
816 static void bnx2x_vf_enable_traffic(struct bnx2x *bp, struct bnx2x_virtf *vf)
818 /* Reset vf in IGU interrupts are still disabled */
819 bnx2x_vf_igu_reset(bp, vf);
821 /* pretend to enable the vf with the PBF */
822 bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid));
823 REG_WR(bp, PBF_REG_DISABLE_VF, 0);
824 bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
827 static u8 bnx2x_vf_is_pcie_pending(struct bnx2x *bp, u8 abs_vfid)
830 struct bnx2x_virtf *vf = bnx2x_vf_by_abs_fid(bp, abs_vfid);
835 dev = pci_get_bus_and_slot(vf->bus, vf->devfn);
837 return bnx2x_is_pcie_pending(dev);
841 int bnx2x_vf_flr_clnup_epilog(struct bnx2x *bp, u8 abs_vfid)
843 /* Verify no pending pci transactions */
844 if (bnx2x_vf_is_pcie_pending(bp, abs_vfid))
845 BNX2X_ERR("PCIE Transactions still pending\n");
850 static void bnx2x_iov_re_set_vlan_filters(struct bnx2x *bp,
851 struct bnx2x_virtf *vf,
854 int num = vf_vlan_rules_cnt(vf);
855 int diff = new - num;
858 DP(BNX2X_MSG_IOV, "vf[%d] - %d vlan filter credits [previously %d]\n",
859 vf->abs_vfid, new, num);
862 rc = bp->vlans_pool.get(&bp->vlans_pool, diff);
864 rc = bp->vlans_pool.put(&bp->vlans_pool, -diff);
867 vf_vlan_rules_cnt(vf) = new;
869 DP(BNX2X_MSG_IOV, "vf[%d] - Failed to configure vlan filter credits change\n",
873 /* must be called after the number of PF queues and the number of VFs are
877 bnx2x_iov_static_resc(struct bnx2x *bp, struct bnx2x_virtf *vf)
879 struct vf_pf_resc_request *resc = &vf->alloc_resc;
882 /* will be set only during VF-ACQUIRE */
886 /* no credit calculations for macs (just yet) */
887 resc->num_mac_filters = 1;
889 /* divvy up vlan rules */
890 bnx2x_iov_re_set_vlan_filters(bp, vf, 0);
891 vlan_count = bp->vlans_pool.check(&bp->vlans_pool);
892 vlan_count = 1 << ilog2(vlan_count);
893 bnx2x_iov_re_set_vlan_filters(bp, vf,
894 vlan_count / BNX2X_NR_VIRTFN(bp));
896 /* no real limitation */
897 resc->num_mc_filters = 0;
899 /* num_sbs already set */
900 resc->num_sbs = vf->sb_count;
904 static void bnx2x_vf_free_resc(struct bnx2x *bp, struct bnx2x_virtf *vf)
906 /* reset the state variables */
907 bnx2x_iov_static_resc(bp, vf);
911 static void bnx2x_vf_flr_clnup_hw(struct bnx2x *bp, struct bnx2x_virtf *vf)
913 u32 poll_cnt = bnx2x_flr_clnup_poll_count(bp);
915 /* DQ usage counter */
916 bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid));
917 bnx2x_flr_clnup_poll_hw_counter(bp, DORQ_REG_VF_USAGE_CNT,
918 "DQ VF usage counter timed out",
920 bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
922 /* FW cleanup command - poll for the results */
923 if (bnx2x_send_final_clnup(bp, (u8)FW_VF_HANDLE(vf->abs_vfid),
925 BNX2X_ERR("VF[%d] Final cleanup timed-out\n", vf->abs_vfid);
927 /* verify TX hw is flushed */
928 bnx2x_tx_hw_flushed(bp, poll_cnt);
931 static void bnx2x_vf_flr(struct bnx2x *bp, struct bnx2x_virtf *vf)
935 DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);
937 /* the cleanup operations are valid if and only if the VF
938 * was first acquired.
940 for (i = 0; i < vf_rxq_count(vf); i++) {
941 rc = bnx2x_vf_queue_flr(bp, vf, i);
946 /* remove multicasts */
947 bnx2x_vf_mcast(bp, vf, NULL, 0, true);
949 /* dispatch final cleanup and wait for HW queues to flush */
950 bnx2x_vf_flr_clnup_hw(bp, vf);
952 /* release VF resources */
953 bnx2x_vf_free_resc(bp, vf);
955 /* re-open the mailbox */
956 bnx2x_vf_enable_mbx(bp, vf->abs_vfid);
959 BNX2X_ERR("vf[%d:%d] failed flr: rc %d\n",
960 vf->abs_vfid, i, rc);
963 static void bnx2x_vf_flr_clnup(struct bnx2x *bp)
965 struct bnx2x_virtf *vf;
968 for (i = 0; i < BNX2X_NR_VIRTFN(bp); i++) {
969 /* VF should be RESET & in FLR cleanup states */
970 if (bnx2x_vf(bp, i, state) != VF_RESET ||
971 !bnx2x_vf(bp, i, flr_clnup_stage))
974 DP(BNX2X_MSG_IOV, "next vf to cleanup: %d. Num of vfs: %d\n",
975 i, BNX2X_NR_VIRTFN(bp));
979 /* lock the vf pf channel */
980 bnx2x_lock_vf_pf_channel(bp, vf, CHANNEL_TLV_FLR);
982 /* invoke the VF FLR SM */
983 bnx2x_vf_flr(bp, vf);
985 /* mark the VF to be ACKED and continue */
986 vf->flr_clnup_stage = false;
987 bnx2x_unlock_vf_pf_channel(bp, vf, CHANNEL_TLV_FLR);
990 /* Acknowledge the handled VFs.
991 * we are acknowledge all the vfs which an flr was requested for, even
992 * if amongst them there are such that we never opened, since the mcp
993 * will interrupt us immediately again if we only ack some of the bits,
994 * resulting in an endless loop. This can happen for example in KVM
995 * where an 'all ones' flr request is sometimes given by hyper visor
997 DP(BNX2X_MSG_MCP, "DRV_STATUS_VF_DISABLED ACK for vfs 0x%x 0x%x\n",
998 bp->vfdb->flrd_vfs[0], bp->vfdb->flrd_vfs[1]);
999 for (i = 0; i < FLRD_VFS_DWORDS; i++)
1000 SHMEM2_WR(bp, drv_ack_vf_disabled[BP_FW_MB_IDX(bp)][i],
1001 bp->vfdb->flrd_vfs[i]);
1003 bnx2x_fw_command(bp, DRV_MSG_CODE_VF_DISABLED_DONE, 0);
1005 /* clear the acked bits - better yet if the MCP implemented
1006 * write to clear semantics
1008 for (i = 0; i < FLRD_VFS_DWORDS; i++)
1009 SHMEM2_WR(bp, drv_ack_vf_disabled[BP_FW_MB_IDX(bp)][i], 0);
1012 void bnx2x_vf_handle_flr_event(struct bnx2x *bp)
1016 /* Read FLR'd VFs */
1017 for (i = 0; i < FLRD_VFS_DWORDS; i++)
1018 bp->vfdb->flrd_vfs[i] = SHMEM2_RD(bp, mcp_vf_disabled[i]);
1021 "DRV_STATUS_VF_DISABLED received for vfs 0x%x 0x%x\n",
1022 bp->vfdb->flrd_vfs[0], bp->vfdb->flrd_vfs[1]);
1024 for_each_vf(bp, i) {
1025 struct bnx2x_virtf *vf = BP_VF(bp, i);
1028 if (vf->abs_vfid < 32)
1029 reset = bp->vfdb->flrd_vfs[0] & (1 << vf->abs_vfid);
1031 reset = bp->vfdb->flrd_vfs[1] &
1032 (1 << (vf->abs_vfid - 32));
1035 /* set as reset and ready for cleanup */
1036 vf->state = VF_RESET;
1037 vf->flr_clnup_stage = true;
1040 "Initiating Final cleanup for VF %d\n",
1045 /* do the FLR cleanup for all marked VFs*/
1046 bnx2x_vf_flr_clnup(bp);
1049 /* IOV global initialization routines */
1050 void bnx2x_iov_init_dq(struct bnx2x *bp)
1055 /* Set the DQ such that the CID reflect the abs_vfid */
1056 REG_WR(bp, DORQ_REG_VF_NORM_VF_BASE, 0);
1057 REG_WR(bp, DORQ_REG_MAX_RVFID_SIZE, ilog2(BNX2X_MAX_NUM_OF_VFS));
1059 /* Set VFs starting CID. If its > 0 the preceding CIDs are belong to
1062 REG_WR(bp, DORQ_REG_VF_NORM_CID_BASE, BNX2X_FIRST_VF_CID);
1064 /* The VF window size is the log2 of the max number of CIDs per VF */
1065 REG_WR(bp, DORQ_REG_VF_NORM_CID_WND_SIZE, BNX2X_VF_CID_WND);
1067 /* The VF doorbell size 0 - *B, 4 - 128B. We set it here to match
1068 * the Pf doorbell size although the 2 are independent.
1070 REG_WR(bp, DORQ_REG_VF_NORM_CID_OFST, 3);
1072 /* No security checks for now -
1073 * configure single rule (out of 16) mask = 0x1, value = 0x0,
1074 * CID range 0 - 0x1ffff
1076 REG_WR(bp, DORQ_REG_VF_TYPE_MASK_0, 1);
1077 REG_WR(bp, DORQ_REG_VF_TYPE_VALUE_0, 0);
1078 REG_WR(bp, DORQ_REG_VF_TYPE_MIN_MCID_0, 0);
1079 REG_WR(bp, DORQ_REG_VF_TYPE_MAX_MCID_0, 0x1ffff);
1081 /* set the VF doorbell threshold. This threshold represents the amount
1082 * of doorbells allowed in the main DORQ fifo for a specific VF.
1084 REG_WR(bp, DORQ_REG_VF_USAGE_CT_LIMIT, 64);
1087 void bnx2x_iov_init_dmae(struct bnx2x *bp)
1089 if (pci_find_ext_capability(bp->pdev, PCI_EXT_CAP_ID_SRIOV))
1090 REG_WR(bp, DMAE_REG_BACKWARD_COMP_EN, 0);
1093 static int bnx2x_vf_bus(struct bnx2x *bp, int vfid)
1095 struct pci_dev *dev = bp->pdev;
1096 struct bnx2x_sriov *iov = &bp->vfdb->sriov;
1098 return dev->bus->number + ((dev->devfn + iov->offset +
1099 iov->stride * vfid) >> 8);
1102 static int bnx2x_vf_devfn(struct bnx2x *bp, int vfid)
1104 struct pci_dev *dev = bp->pdev;
1105 struct bnx2x_sriov *iov = &bp->vfdb->sriov;
1107 return (dev->devfn + iov->offset + iov->stride * vfid) & 0xff;
1110 static void bnx2x_vf_set_bars(struct bnx2x *bp, struct bnx2x_virtf *vf)
1113 struct pci_dev *dev = bp->pdev;
1114 struct bnx2x_sriov *iov = &bp->vfdb->sriov;
1116 for (i = 0, n = 0; i < PCI_SRIOV_NUM_BARS; i += 2, n++) {
1117 u64 start = pci_resource_start(dev, PCI_IOV_RESOURCES + i);
1118 u32 size = pci_resource_len(dev, PCI_IOV_RESOURCES + i);
1121 vf->bars[n].bar = start + size * vf->abs_vfid;
1122 vf->bars[n].size = size;
1126 static int bnx2x_ari_enabled(struct pci_dev *dev)
1128 return dev->bus->self && dev->bus->self->ari_enabled;
1132 bnx2x_get_vf_igu_cam_info(struct bnx2x *bp)
1136 u8 fid, current_pf = 0;
1138 /* IGU in normal mode - read CAM */
1139 for (sb_id = 0; sb_id < IGU_REG_MAPPING_MEMORY_SIZE; sb_id++) {
1140 val = REG_RD(bp, IGU_REG_MAPPING_MEMORY + sb_id * 4);
1141 if (!(val & IGU_REG_MAPPING_MEMORY_VALID))
1143 fid = GET_FIELD((val), IGU_REG_MAPPING_MEMORY_FID);
1144 if (fid & IGU_FID_ENCODE_IS_PF)
1145 current_pf = fid & IGU_FID_PF_NUM_MASK;
1146 else if (current_pf == BP_FUNC(bp))
1147 bnx2x_vf_set_igu_info(bp, sb_id,
1148 (fid & IGU_FID_VF_NUM_MASK));
1149 DP(BNX2X_MSG_IOV, "%s[%d], igu_sb_id=%d, msix=%d\n",
1150 ((fid & IGU_FID_ENCODE_IS_PF) ? "PF" : "VF"),
1151 ((fid & IGU_FID_ENCODE_IS_PF) ? (fid & IGU_FID_PF_NUM_MASK) :
1152 (fid & IGU_FID_VF_NUM_MASK)), sb_id,
1153 GET_FIELD((val), IGU_REG_MAPPING_MEMORY_VECTOR));
1155 DP(BNX2X_MSG_IOV, "vf_sbs_pool is %d\n", BP_VFDB(bp)->vf_sbs_pool);
1156 return BP_VFDB(bp)->vf_sbs_pool;
1159 static void __bnx2x_iov_free_vfdb(struct bnx2x *bp)
1162 kfree(bp->vfdb->vfqs);
1163 kfree(bp->vfdb->vfs);
1169 static int bnx2x_sriov_pci_cfg_info(struct bnx2x *bp, struct bnx2x_sriov *iov)
1172 struct pci_dev *dev = bp->pdev;
1174 pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);
1176 BNX2X_ERR("failed to find SRIOV capability in device\n");
1181 DP(BNX2X_MSG_IOV, "sriov ext pos %d\n", pos);
1182 pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &iov->ctrl);
1183 pci_read_config_word(dev, pos + PCI_SRIOV_TOTAL_VF, &iov->total);
1184 pci_read_config_word(dev, pos + PCI_SRIOV_INITIAL_VF, &iov->initial);
1185 pci_read_config_word(dev, pos + PCI_SRIOV_VF_OFFSET, &iov->offset);
1186 pci_read_config_word(dev, pos + PCI_SRIOV_VF_STRIDE, &iov->stride);
1187 pci_read_config_dword(dev, pos + PCI_SRIOV_SUP_PGSIZE, &iov->pgsz);
1188 pci_read_config_dword(dev, pos + PCI_SRIOV_CAP, &iov->cap);
1189 pci_read_config_byte(dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link);
1194 static int bnx2x_sriov_info(struct bnx2x *bp, struct bnx2x_sriov *iov)
1198 /* read the SRIOV capability structure
1199 * The fields can be read via configuration read or
1200 * directly from the device (starting at offset PCICFG_OFFSET)
1202 if (bnx2x_sriov_pci_cfg_info(bp, iov))
1205 /* get the number of SRIOV bars */
1208 /* read the first_vfid */
1209 val = REG_RD(bp, PCICFG_OFFSET + GRC_CONFIG_REG_PF_INIT_VF);
1210 iov->first_vf_in_pf = ((val & GRC_CR_PF_INIT_VF_PF_FIRST_VF_NUM_MASK)
1211 * 8) - (BNX2X_MAX_NUM_OF_VFS * BP_PATH(bp));
1214 "IOV info[%d]: first vf %d, nres %d, cap 0x%x, ctrl 0x%x, total %d, initial %d, num vfs %d, offset %d, stride %d, page size 0x%x\n",
1216 iov->first_vf_in_pf, iov->nres, iov->cap, iov->ctrl, iov->total,
1217 iov->initial, iov->nr_virtfn, iov->offset, iov->stride, iov->pgsz);
1222 /* must be called after PF bars are mapped */
1223 int bnx2x_iov_init_one(struct bnx2x *bp, int int_mode_param,
1227 struct bnx2x_sriov *iov;
1228 struct pci_dev *dev = bp->pdev;
1236 /* verify sriov capability is present in configuration space */
1237 if (!pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV))
1240 /* verify chip revision */
1241 if (CHIP_IS_E1x(bp))
1244 /* check if SRIOV support is turned off */
1248 /* SRIOV assumes that num of PF CIDs < BNX2X_FIRST_VF_CID */
1249 if (BNX2X_L2_MAX_CID(bp) >= BNX2X_FIRST_VF_CID) {
1250 BNX2X_ERR("PF cids %d are overspilling into vf space (starts at %d). Abort SRIOV\n",
1251 BNX2X_L2_MAX_CID(bp), BNX2X_FIRST_VF_CID);
1255 /* SRIOV can be enabled only with MSIX */
1256 if (int_mode_param == BNX2X_INT_MODE_MSI ||
1257 int_mode_param == BNX2X_INT_MODE_INTX) {
1258 BNX2X_ERR("Forced MSI/INTx mode is incompatible with SRIOV\n");
1263 /* verify ari is enabled */
1264 if (!bnx2x_ari_enabled(bp->pdev)) {
1265 BNX2X_ERR("ARI not supported (check pci bridge ARI forwarding), SRIOV can not be enabled\n");
1269 /* verify igu is in normal mode */
1270 if (CHIP_INT_MODE_IS_BC(bp)) {
1271 BNX2X_ERR("IGU not normal mode, SRIOV can not be enabled\n");
1275 /* allocate the vfs database */
1276 bp->vfdb = kzalloc(sizeof(*(bp->vfdb)), GFP_KERNEL);
1278 BNX2X_ERR("failed to allocate vf database\n");
1283 /* get the sriov info - Linux already collected all the pertinent
1284 * information, however the sriov structure is for the private use
1285 * of the pci module. Also we want this information regardless
1286 * of the hyper-visor.
1288 iov = &(bp->vfdb->sriov);
1289 err = bnx2x_sriov_info(bp, iov);
1293 /* SR-IOV capability was enabled but there are no VFs*/
1294 if (iov->total == 0)
1297 iov->nr_virtfn = min_t(u16, iov->total, num_vfs_param);
1299 DP(BNX2X_MSG_IOV, "num_vfs_param was %d, nr_virtfn was %d\n",
1300 num_vfs_param, iov->nr_virtfn);
1302 /* allocate the vf array */
1303 bp->vfdb->vfs = kzalloc(sizeof(struct bnx2x_virtf) *
1304 BNX2X_NR_VIRTFN(bp), GFP_KERNEL);
1305 if (!bp->vfdb->vfs) {
1306 BNX2X_ERR("failed to allocate vf array\n");
1311 /* Initial VF init - index and abs_vfid - nr_virtfn must be set */
1312 for_each_vf(bp, i) {
1313 bnx2x_vf(bp, i, index) = i;
1314 bnx2x_vf(bp, i, abs_vfid) = iov->first_vf_in_pf + i;
1315 bnx2x_vf(bp, i, state) = VF_FREE;
1316 mutex_init(&bnx2x_vf(bp, i, op_mutex));
1317 bnx2x_vf(bp, i, op_current) = CHANNEL_TLV_NONE;
1320 /* re-read the IGU CAM for VFs - index and abs_vfid must be set */
1321 if (!bnx2x_get_vf_igu_cam_info(bp)) {
1322 BNX2X_ERR("No entries in IGU CAM for vfs\n");
1327 /* allocate the queue arrays for all VFs */
1328 bp->vfdb->vfqs = kzalloc(
1329 BNX2X_MAX_NUM_VF_QUEUES * sizeof(struct bnx2x_vf_queue),
1332 if (!bp->vfdb->vfqs) {
1333 BNX2X_ERR("failed to allocate vf queue array\n");
1338 /* Prepare the VFs event synchronization mechanism */
1339 mutex_init(&bp->vfdb->event_mutex);
1341 mutex_init(&bp->vfdb->bulletin_mutex);
1345 DP(BNX2X_MSG_IOV, "Failed err=%d\n", err);
1346 __bnx2x_iov_free_vfdb(bp);
1350 void bnx2x_iov_remove_one(struct bnx2x *bp)
1354 /* if SRIOV is not enabled there's nothing to do */
1358 bnx2x_disable_sriov(bp);
1360 /* disable access to all VFs */
1361 for (vf_idx = 0; vf_idx < bp->vfdb->sriov.total; vf_idx++) {
1362 bnx2x_pretend_func(bp,
1364 bp->vfdb->sriov.first_vf_in_pf +
1366 DP(BNX2X_MSG_IOV, "disabling internal access for vf %d\n",
1367 bp->vfdb->sriov.first_vf_in_pf + vf_idx);
1368 bnx2x_vf_enable_internal(bp, 0);
1369 bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
1372 /* free vf database */
1373 __bnx2x_iov_free_vfdb(bp);
1376 void bnx2x_iov_free_mem(struct bnx2x *bp)
1383 /* free vfs hw contexts */
1384 for (i = 0; i < BNX2X_VF_CIDS/ILT_PAGE_CIDS; i++) {
1385 struct hw_dma *cxt = &bp->vfdb->context[i];
1386 BNX2X_PCI_FREE(cxt->addr, cxt->mapping, cxt->size);
1389 BNX2X_PCI_FREE(BP_VFDB(bp)->sp_dma.addr,
1390 BP_VFDB(bp)->sp_dma.mapping,
1391 BP_VFDB(bp)->sp_dma.size);
1393 BNX2X_PCI_FREE(BP_VF_MBX_DMA(bp)->addr,
1394 BP_VF_MBX_DMA(bp)->mapping,
1395 BP_VF_MBX_DMA(bp)->size);
1397 BNX2X_PCI_FREE(BP_VF_BULLETIN_DMA(bp)->addr,
1398 BP_VF_BULLETIN_DMA(bp)->mapping,
1399 BP_VF_BULLETIN_DMA(bp)->size);
1402 int bnx2x_iov_alloc_mem(struct bnx2x *bp)
1410 /* allocate vfs hw contexts */
1411 tot_size = (BP_VFDB(bp)->sriov.first_vf_in_pf + BNX2X_NR_VIRTFN(bp)) *
1412 BNX2X_CIDS_PER_VF * sizeof(union cdu_context);
1414 for (i = 0; i < BNX2X_VF_CIDS/ILT_PAGE_CIDS; i++) {
1415 struct hw_dma *cxt = BP_VF_CXT_PAGE(bp, i);
1416 cxt->size = min_t(size_t, tot_size, CDU_ILT_PAGE_SZ);
1419 cxt->addr = BNX2X_PCI_ALLOC(&cxt->mapping, cxt->size);
1426 tot_size -= cxt->size;
1429 /* allocate vfs ramrods dma memory - client_init and set_mac */
1430 tot_size = BNX2X_NR_VIRTFN(bp) * sizeof(struct bnx2x_vf_sp);
1431 BP_VFDB(bp)->sp_dma.addr = BNX2X_PCI_ALLOC(&BP_VFDB(bp)->sp_dma.mapping,
1433 if (!BP_VFDB(bp)->sp_dma.addr)
1435 BP_VFDB(bp)->sp_dma.size = tot_size;
1437 /* allocate mailboxes */
1438 tot_size = BNX2X_NR_VIRTFN(bp) * MBX_MSG_ALIGNED_SIZE;
1439 BP_VF_MBX_DMA(bp)->addr = BNX2X_PCI_ALLOC(&BP_VF_MBX_DMA(bp)->mapping,
1441 if (!BP_VF_MBX_DMA(bp)->addr)
1444 BP_VF_MBX_DMA(bp)->size = tot_size;
1446 /* allocate local bulletin boards */
1447 tot_size = BNX2X_NR_VIRTFN(bp) * BULLETIN_CONTENT_SIZE;
1448 BP_VF_BULLETIN_DMA(bp)->addr = BNX2X_PCI_ALLOC(&BP_VF_BULLETIN_DMA(bp)->mapping,
1450 if (!BP_VF_BULLETIN_DMA(bp)->addr)
1453 BP_VF_BULLETIN_DMA(bp)->size = tot_size;
1461 static void bnx2x_vfq_init(struct bnx2x *bp, struct bnx2x_virtf *vf,
1462 struct bnx2x_vf_queue *q)
1464 u8 cl_id = vfq_cl_id(vf, q);
1465 u8 func_id = FW_VF_HANDLE(vf->abs_vfid);
1466 unsigned long q_type = 0;
1468 set_bit(BNX2X_Q_TYPE_HAS_TX, &q_type);
1469 set_bit(BNX2X_Q_TYPE_HAS_RX, &q_type);
1471 /* Queue State object */
1472 bnx2x_init_queue_obj(bp, &q->sp_obj,
1473 cl_id, &q->cid, 1, func_id,
1474 bnx2x_vf_sp(bp, vf, q_data),
1475 bnx2x_vf_sp_map(bp, vf, q_data),
1478 /* sp indication is set only when vlan/mac/etc. are initialized */
1479 q->sp_initialized = false;
1482 "initialized vf %d's queue object. func id set to %d. cid set to 0x%x\n",
1483 vf->abs_vfid, q->sp_obj.func_id, q->cid);
1486 static int bnx2x_max_speed_cap(struct bnx2x *bp)
1488 u32 supported = bp->port.supported[bnx2x_get_link_cfg_idx(bp)];
1491 (SUPPORTED_20000baseMLD2_Full | SUPPORTED_20000baseKR2_Full))
1494 return 10000; /* assume lowest supported speed is 10G */
1497 int bnx2x_iov_link_update_vf(struct bnx2x *bp, int idx)
1499 struct bnx2x_link_report_data *state = &bp->last_reported_link;
1500 struct pf_vf_bulletin_content *bulletin;
1501 struct bnx2x_virtf *vf;
1505 /* sanity and init */
1506 rc = bnx2x_vf_op_prep(bp, idx, &vf, &bulletin, false);
1510 mutex_lock(&bp->vfdb->bulletin_mutex);
1512 if (vf->link_cfg == IFLA_VF_LINK_STATE_AUTO) {
1513 bulletin->valid_bitmap |= 1 << LINK_VALID;
1515 bulletin->link_speed = state->line_speed;
1516 bulletin->link_flags = 0;
1517 if (test_bit(BNX2X_LINK_REPORT_LINK_DOWN,
1518 &state->link_report_flags))
1519 bulletin->link_flags |= VFPF_LINK_REPORT_LINK_DOWN;
1520 if (test_bit(BNX2X_LINK_REPORT_FD,
1521 &state->link_report_flags))
1522 bulletin->link_flags |= VFPF_LINK_REPORT_FULL_DUPLEX;
1523 if (test_bit(BNX2X_LINK_REPORT_RX_FC_ON,
1524 &state->link_report_flags))
1525 bulletin->link_flags |= VFPF_LINK_REPORT_RX_FC_ON;
1526 if (test_bit(BNX2X_LINK_REPORT_TX_FC_ON,
1527 &state->link_report_flags))
1528 bulletin->link_flags |= VFPF_LINK_REPORT_TX_FC_ON;
1529 } else if (vf->link_cfg == IFLA_VF_LINK_STATE_DISABLE &&
1530 !(bulletin->link_flags & VFPF_LINK_REPORT_LINK_DOWN)) {
1531 bulletin->valid_bitmap |= 1 << LINK_VALID;
1532 bulletin->link_flags |= VFPF_LINK_REPORT_LINK_DOWN;
1533 } else if (vf->link_cfg == IFLA_VF_LINK_STATE_ENABLE &&
1534 (bulletin->link_flags & VFPF_LINK_REPORT_LINK_DOWN)) {
1535 bulletin->valid_bitmap |= 1 << LINK_VALID;
1536 bulletin->link_speed = bnx2x_max_speed_cap(bp);
1537 bulletin->link_flags &= ~VFPF_LINK_REPORT_LINK_DOWN;
1543 DP(NETIF_MSG_LINK | BNX2X_MSG_IOV,
1544 "vf %d mode %u speed %d flags %x\n", idx,
1545 vf->link_cfg, bulletin->link_speed, bulletin->link_flags);
1547 /* Post update on VF's bulletin board */
1548 rc = bnx2x_post_vf_bulletin(bp, idx);
1550 BNX2X_ERR("failed to update VF[%d] bulletin\n", idx);
1556 mutex_unlock(&bp->vfdb->bulletin_mutex);
1560 int bnx2x_set_vf_link_state(struct net_device *dev, int idx, int link_state)
1562 struct bnx2x *bp = netdev_priv(dev);
1563 struct bnx2x_virtf *vf = BP_VF(bp, idx);
1568 if (vf->link_cfg == link_state)
1569 return 0; /* nothing todo */
1571 vf->link_cfg = link_state;
1573 return bnx2x_iov_link_update_vf(bp, idx);
1576 void bnx2x_iov_link_update(struct bnx2x *bp)
1583 for_each_vf(bp, vfid)
1584 bnx2x_iov_link_update_vf(bp, vfid);
1587 /* called by bnx2x_nic_load */
1588 int bnx2x_iov_nic_init(struct bnx2x *bp)
1592 if (!IS_SRIOV(bp)) {
1593 DP(BNX2X_MSG_IOV, "vfdb was not allocated\n");
1597 DP(BNX2X_MSG_IOV, "num of vfs: %d\n", (bp)->vfdb->sriov.nr_virtfn);
1599 /* let FLR complete ... */
1602 /* initialize vf database */
1603 for_each_vf(bp, vfid) {
1604 struct bnx2x_virtf *vf = BP_VF(bp, vfid);
1606 int base_vf_cid = (BP_VFDB(bp)->sriov.first_vf_in_pf + vfid) *
1609 union cdu_context *base_cxt = (union cdu_context *)
1610 BP_VF_CXT_PAGE(bp, base_vf_cid/ILT_PAGE_CIDS)->addr +
1611 (base_vf_cid & (ILT_PAGE_CIDS-1));
1614 "VF[%d] Max IGU SBs: %d, base vf cid 0x%x, base cid 0x%x, base cxt %p\n",
1615 vf->abs_vfid, vf_sb_count(vf), base_vf_cid,
1616 BNX2X_FIRST_VF_CID + base_vf_cid, base_cxt);
1618 /* init statically provisioned resources */
1619 bnx2x_iov_static_resc(bp, vf);
1621 /* queues are initialized during VF-ACQUIRE */
1622 vf->filter_state = 0;
1623 vf->sp_cl_id = bnx2x_fp(bp, 0, cl_id);
1625 /* init mcast object - This object will be re-initialized
1626 * during VF-ACQUIRE with the proper cl_id and cid.
1627 * It needs to be initialized here so that it can be safely
1628 * handled by a subsequent FLR flow.
1630 vf->mcast_list_len = 0;
1631 bnx2x_init_mcast_obj(bp, &vf->mcast_obj, 0xFF,
1633 bnx2x_vf_sp(bp, vf, mcast_rdata),
1634 bnx2x_vf_sp_map(bp, vf, mcast_rdata),
1635 BNX2X_FILTER_MCAST_PENDING,
1637 BNX2X_OBJ_TYPE_RX_TX);
1639 /* set the mailbox message addresses */
1640 BP_VF_MBX(bp, vfid)->msg = (struct bnx2x_vf_mbx_msg *)
1641 (((u8 *)BP_VF_MBX_DMA(bp)->addr) + vfid *
1642 MBX_MSG_ALIGNED_SIZE);
1644 BP_VF_MBX(bp, vfid)->msg_mapping = BP_VF_MBX_DMA(bp)->mapping +
1645 vfid * MBX_MSG_ALIGNED_SIZE;
1647 /* Enable vf mailbox */
1648 bnx2x_vf_enable_mbx(bp, vf->abs_vfid);
1652 for_each_vf(bp, vfid) {
1653 struct bnx2x_virtf *vf = BP_VF(bp, vfid);
1655 /* fill in the BDF and bars */
1656 vf->bus = bnx2x_vf_bus(bp, vfid);
1657 vf->devfn = bnx2x_vf_devfn(bp, vfid);
1658 bnx2x_vf_set_bars(bp, vf);
1661 "VF info[%d]: bus 0x%x, devfn 0x%x, bar0 [0x%x, %d], bar1 [0x%x, %d], bar2 [0x%x, %d]\n",
1662 vf->abs_vfid, vf->bus, vf->devfn,
1663 (unsigned)vf->bars[0].bar, vf->bars[0].size,
1664 (unsigned)vf->bars[1].bar, vf->bars[1].size,
1665 (unsigned)vf->bars[2].bar, vf->bars[2].size);
1671 /* called by bnx2x_chip_cleanup */
1672 int bnx2x_iov_chip_cleanup(struct bnx2x *bp)
1679 /* release all the VFs */
1681 bnx2x_vf_release(bp, BP_VF(bp, i));
1686 /* called by bnx2x_init_hw_func, returns the next ilt line */
1687 int bnx2x_iov_init_ilt(struct bnx2x *bp, u16 line)
1690 struct bnx2x_ilt *ilt = BP_ILT(bp);
1695 /* set vfs ilt lines */
1696 for (i = 0; i < BNX2X_VF_CIDS/ILT_PAGE_CIDS; i++) {
1697 struct hw_dma *hw_cxt = BP_VF_CXT_PAGE(bp, i);
1699 ilt->lines[line+i].page = hw_cxt->addr;
1700 ilt->lines[line+i].page_mapping = hw_cxt->mapping;
1701 ilt->lines[line+i].size = hw_cxt->size; /* doesn't matter */
1706 static u8 bnx2x_iov_is_vf_cid(struct bnx2x *bp, u16 cid)
1708 return ((cid >= BNX2X_FIRST_VF_CID) &&
1709 ((cid - BNX2X_FIRST_VF_CID) < BNX2X_VF_CIDS));
1713 void bnx2x_vf_handle_classification_eqe(struct bnx2x *bp,
1714 struct bnx2x_vf_queue *vfq,
1715 union event_ring_elem *elem)
1717 unsigned long ramrod_flags = 0;
1720 /* Always push next commands out, don't wait here */
1721 set_bit(RAMROD_CONT, &ramrod_flags);
1723 switch (elem->message.data.eth_event.echo >> BNX2X_SWCID_SHIFT) {
1724 case BNX2X_FILTER_MAC_PENDING:
1725 rc = vfq->mac_obj.complete(bp, &vfq->mac_obj, elem,
1728 case BNX2X_FILTER_VLAN_PENDING:
1729 rc = vfq->vlan_obj.complete(bp, &vfq->vlan_obj, elem,
1733 BNX2X_ERR("Unsupported classification command: %d\n",
1734 elem->message.data.eth_event.echo);
1738 BNX2X_ERR("Failed to schedule new commands: %d\n", rc);
1740 DP(BNX2X_MSG_IOV, "Scheduled next pending commands...\n");
1744 void bnx2x_vf_handle_mcast_eqe(struct bnx2x *bp,
1745 struct bnx2x_virtf *vf)
1747 struct bnx2x_mcast_ramrod_params rparam = {NULL};
1750 rparam.mcast_obj = &vf->mcast_obj;
1751 vf->mcast_obj.raw.clear_pending(&vf->mcast_obj.raw);
1753 /* If there are pending mcast commands - send them */
1754 if (vf->mcast_obj.check_pending(&vf->mcast_obj)) {
1755 rc = bnx2x_config_mcast(bp, &rparam, BNX2X_MCAST_CMD_CONT);
1757 BNX2X_ERR("Failed to send pending mcast commands: %d\n",
1763 void bnx2x_vf_handle_filters_eqe(struct bnx2x *bp,
1764 struct bnx2x_virtf *vf)
1766 smp_mb__before_atomic();
1767 clear_bit(BNX2X_FILTER_RX_MODE_PENDING, &vf->filter_state);
1768 smp_mb__after_atomic();
1771 static void bnx2x_vf_handle_rss_update_eqe(struct bnx2x *bp,
1772 struct bnx2x_virtf *vf)
1774 vf->rss_conf_obj.raw.clear_pending(&vf->rss_conf_obj.raw);
1777 int bnx2x_iov_eq_sp_event(struct bnx2x *bp, union event_ring_elem *elem)
1779 struct bnx2x_virtf *vf;
1780 int qidx = 0, abs_vfid;
1787 /* first get the cid - the only events we handle here are cfc-delete
1788 * and set-mac completion
1790 opcode = elem->message.opcode;
1793 case EVENT_RING_OPCODE_CFC_DEL:
1794 cid = SW_CID((__force __le32)
1795 elem->message.data.cfc_del_event.cid);
1796 DP(BNX2X_MSG_IOV, "checking cfc-del comp cid=%d\n", cid);
1798 case EVENT_RING_OPCODE_CLASSIFICATION_RULES:
1799 case EVENT_RING_OPCODE_MULTICAST_RULES:
1800 case EVENT_RING_OPCODE_FILTERS_RULES:
1801 case EVENT_RING_OPCODE_RSS_UPDATE_RULES:
1802 cid = (elem->message.data.eth_event.echo &
1804 DP(BNX2X_MSG_IOV, "checking filtering comp cid=%d\n", cid);
1806 case EVENT_RING_OPCODE_VF_FLR:
1807 abs_vfid = elem->message.data.vf_flr_event.vf_id;
1808 DP(BNX2X_MSG_IOV, "Got VF FLR notification abs_vfid=%d\n",
1811 case EVENT_RING_OPCODE_MALICIOUS_VF:
1812 abs_vfid = elem->message.data.malicious_vf_event.vf_id;
1813 BNX2X_ERR("Got VF MALICIOUS notification abs_vfid=%d err_id=0x%x\n",
1815 elem->message.data.malicious_vf_event.err_id);
1821 /* check if the cid is the VF range */
1822 if (!bnx2x_iov_is_vf_cid(bp, cid)) {
1823 DP(BNX2X_MSG_IOV, "cid is outside vf range: %d\n", cid);
1827 /* extract vf and rxq index from vf_cid - relies on the following:
1828 * 1. vfid on cid reflects the true abs_vfid
1829 * 2. The max number of VFs (per path) is 64
1831 qidx = cid & ((1 << BNX2X_VF_CID_WND)-1);
1832 abs_vfid = (cid >> BNX2X_VF_CID_WND) & (BNX2X_MAX_NUM_OF_VFS-1);
1834 vf = bnx2x_vf_by_abs_fid(bp, abs_vfid);
1837 BNX2X_ERR("EQ completion for unknown VF, cid %d, abs_vfid %d\n",
1843 case EVENT_RING_OPCODE_CFC_DEL:
1844 DP(BNX2X_MSG_IOV, "got VF [%d:%d] cfc delete ramrod\n",
1845 vf->abs_vfid, qidx);
1846 vfq_get(vf, qidx)->sp_obj.complete_cmd(bp,
1849 BNX2X_Q_CMD_CFC_DEL);
1851 case EVENT_RING_OPCODE_CLASSIFICATION_RULES:
1852 DP(BNX2X_MSG_IOV, "got VF [%d:%d] set mac/vlan ramrod\n",
1853 vf->abs_vfid, qidx);
1854 bnx2x_vf_handle_classification_eqe(bp, vfq_get(vf, qidx), elem);
1856 case EVENT_RING_OPCODE_MULTICAST_RULES:
1857 DP(BNX2X_MSG_IOV, "got VF [%d:%d] set mcast ramrod\n",
1858 vf->abs_vfid, qidx);
1859 bnx2x_vf_handle_mcast_eqe(bp, vf);
1861 case EVENT_RING_OPCODE_FILTERS_RULES:
1862 DP(BNX2X_MSG_IOV, "got VF [%d:%d] set rx-mode ramrod\n",
1863 vf->abs_vfid, qidx);
1864 bnx2x_vf_handle_filters_eqe(bp, vf);
1866 case EVENT_RING_OPCODE_RSS_UPDATE_RULES:
1867 DP(BNX2X_MSG_IOV, "got VF [%d:%d] RSS update ramrod\n",
1868 vf->abs_vfid, qidx);
1869 bnx2x_vf_handle_rss_update_eqe(bp, vf);
1870 case EVENT_RING_OPCODE_VF_FLR:
1871 case EVENT_RING_OPCODE_MALICIOUS_VF:
1872 /* Do nothing for now */
1879 static struct bnx2x_virtf *bnx2x_vf_by_cid(struct bnx2x *bp, int vf_cid)
1881 /* extract the vf from vf_cid - relies on the following:
1882 * 1. vfid on cid reflects the true abs_vfid
1883 * 2. The max number of VFs (per path) is 64
1885 int abs_vfid = (vf_cid >> BNX2X_VF_CID_WND) & (BNX2X_MAX_NUM_OF_VFS-1);
1886 return bnx2x_vf_by_abs_fid(bp, abs_vfid);
1889 void bnx2x_iov_set_queue_sp_obj(struct bnx2x *bp, int vf_cid,
1890 struct bnx2x_queue_sp_obj **q_obj)
1892 struct bnx2x_virtf *vf;
1897 vf = bnx2x_vf_by_cid(bp, vf_cid);
1900 /* extract queue index from vf_cid - relies on the following:
1901 * 1. vfid on cid reflects the true abs_vfid
1902 * 2. The max number of VFs (per path) is 64
1904 int q_index = vf_cid & ((1 << BNX2X_VF_CID_WND)-1);
1905 *q_obj = &bnx2x_vfq(vf, q_index, sp_obj);
1907 BNX2X_ERR("No vf matching cid %d\n", vf_cid);
1911 void bnx2x_iov_adjust_stats_req(struct bnx2x *bp)
1914 int first_queue_query_index, num_queues_req;
1915 dma_addr_t cur_data_offset;
1916 struct stats_query_entry *cur_query_entry;
1918 bool is_fcoe = false;
1926 /* fcoe adds one global request and one queue request */
1927 num_queues_req = BNX2X_NUM_ETH_QUEUES(bp) + is_fcoe;
1928 first_queue_query_index = BNX2X_FIRST_QUEUE_QUERY_IDX -
1931 DP_AND((BNX2X_MSG_IOV | BNX2X_MSG_STATS),
1932 "BNX2X_NUM_ETH_QUEUES %d, is_fcoe %d, first_queue_query_index %d => determined the last non virtual statistics query index is %d. Will add queries on top of that\n",
1933 BNX2X_NUM_ETH_QUEUES(bp), is_fcoe, first_queue_query_index,
1934 first_queue_query_index + num_queues_req);
1936 cur_data_offset = bp->fw_stats_data_mapping +
1937 offsetof(struct bnx2x_fw_stats_data, queue_stats) +
1938 num_queues_req * sizeof(struct per_queue_stats);
1940 cur_query_entry = &bp->fw_stats_req->
1941 query[first_queue_query_index + num_queues_req];
1943 for_each_vf(bp, i) {
1945 struct bnx2x_virtf *vf = BP_VF(bp, i);
1947 if (vf->state != VF_ENABLED) {
1948 DP_AND((BNX2X_MSG_IOV | BNX2X_MSG_STATS),
1949 "vf %d not enabled so no stats for it\n",
1954 DP(BNX2X_MSG_IOV, "add addresses for vf %d\n", vf->abs_vfid);
1955 for_each_vfq(vf, j) {
1956 struct bnx2x_vf_queue *rxq = vfq_get(vf, j);
1958 dma_addr_t q_stats_addr =
1959 vf->fw_stat_map + j * vf->stats_stride;
1961 /* collect stats fro active queues only */
1962 if (bnx2x_get_q_logical_state(bp, &rxq->sp_obj) ==
1963 BNX2X_Q_LOGICAL_STATE_STOPPED)
1966 /* create stats query entry for this queue */
1967 cur_query_entry->kind = STATS_TYPE_QUEUE;
1968 cur_query_entry->index = vfq_stat_id(vf, rxq);
1969 cur_query_entry->funcID =
1970 cpu_to_le16(FW_VF_HANDLE(vf->abs_vfid));
1971 cur_query_entry->address.hi =
1972 cpu_to_le32(U64_HI(q_stats_addr));
1973 cur_query_entry->address.lo =
1974 cpu_to_le32(U64_LO(q_stats_addr));
1976 "added address %x %x for vf %d queue %d client %d\n",
1977 cur_query_entry->address.hi,
1978 cur_query_entry->address.lo, cur_query_entry->funcID,
1979 j, cur_query_entry->index);
1981 cur_data_offset += sizeof(struct per_queue_stats);
1984 /* all stats are coalesced to the leading queue */
1985 if (vf->cfg_flags & VF_CFG_STATS_COALESCE)
1989 bp->fw_stats_req->hdr.cmd_num = bp->fw_stats_num + stats_count;
1992 /* VF API helpers */
1993 static void bnx2x_vf_qtbl_set_q(struct bnx2x *bp, u8 abs_vfid, u8 qid,
1996 u32 reg = PXP_REG_HST_ZONE_PERMISSION_TABLE + qid * 4;
1997 u32 val = enable ? (abs_vfid | (1 << 6)) : 0;
1999 REG_WR(bp, reg, val);
2002 static void bnx2x_vf_clr_qtbl(struct bnx2x *bp, struct bnx2x_virtf *vf)
2007 bnx2x_vf_qtbl_set_q(bp, vf->abs_vfid,
2008 vfq_qzone_id(vf, vfq_get(vf, i)), false);
2011 static void bnx2x_vf_igu_disable(struct bnx2x *bp, struct bnx2x_virtf *vf)
2015 /* clear the VF configuration - pretend */
2016 bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid));
2017 val = REG_RD(bp, IGU_REG_VF_CONFIGURATION);
2018 val &= ~(IGU_VF_CONF_MSI_MSIX_EN | IGU_VF_CONF_SINGLE_ISR_EN |
2019 IGU_VF_CONF_FUNC_EN | IGU_VF_CONF_PARENT_MASK);
2020 REG_WR(bp, IGU_REG_VF_CONFIGURATION, val);
2021 bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
2024 u8 bnx2x_vf_max_queue_cnt(struct bnx2x *bp, struct bnx2x_virtf *vf)
2026 return min_t(u8, min_t(u8, vf_sb_count(vf), BNX2X_CIDS_PER_VF),
2027 BNX2X_VF_MAX_QUEUES);
2031 int bnx2x_vf_chk_avail_resc(struct bnx2x *bp, struct bnx2x_virtf *vf,
2032 struct vf_pf_resc_request *req_resc)
2034 u8 rxq_cnt = vf_rxq_count(vf) ? : bnx2x_vf_max_queue_cnt(bp, vf);
2035 u8 txq_cnt = vf_txq_count(vf) ? : bnx2x_vf_max_queue_cnt(bp, vf);
2037 /* Save a vlan filter for the Hypervisor */
2038 return ((req_resc->num_rxqs <= rxq_cnt) &&
2039 (req_resc->num_txqs <= txq_cnt) &&
2040 (req_resc->num_sbs <= vf_sb_count(vf)) &&
2041 (req_resc->num_mac_filters <= vf_mac_rules_cnt(vf)) &&
2042 (req_resc->num_vlan_filters <= vf_vlan_rules_visible_cnt(vf)));
2046 int bnx2x_vf_acquire(struct bnx2x *bp, struct bnx2x_virtf *vf,
2047 struct vf_pf_resc_request *resc)
2049 int base_vf_cid = (BP_VFDB(bp)->sriov.first_vf_in_pf + vf->index) *
2052 union cdu_context *base_cxt = (union cdu_context *)
2053 BP_VF_CXT_PAGE(bp, base_vf_cid/ILT_PAGE_CIDS)->addr +
2054 (base_vf_cid & (ILT_PAGE_CIDS-1));
2057 /* if state is 'acquired' the VF was not released or FLR'd, in
2058 * this case the returned resources match the acquired already
2059 * acquired resources. Verify that the requested numbers do
2060 * not exceed the already acquired numbers.
2062 if (vf->state == VF_ACQUIRED) {
2063 DP(BNX2X_MSG_IOV, "VF[%d] Trying to re-acquire resources (VF was not released or FLR'd)\n",
2066 if (!bnx2x_vf_chk_avail_resc(bp, vf, resc)) {
2067 BNX2X_ERR("VF[%d] When re-acquiring resources, requested numbers must be <= then previously acquired numbers\n",
2074 /* Otherwise vf state must be 'free' or 'reset' */
2075 if (vf->state != VF_FREE && vf->state != VF_RESET) {
2076 BNX2X_ERR("VF[%d] Can not acquire a VF with state %d\n",
2077 vf->abs_vfid, vf->state);
2081 /* static allocation:
2082 * the global maximum number are fixed per VF. Fail the request if
2083 * requested number exceed these globals
2085 if (!bnx2x_vf_chk_avail_resc(bp, vf, resc)) {
2087 "cannot fulfill vf resource request. Placing maximal available values in response\n");
2088 /* set the max resource in the vf */
2092 /* Set resources counters - 0 request means max available */
2093 vf_sb_count(vf) = resc->num_sbs;
2094 vf_rxq_count(vf) = resc->num_rxqs ? : bnx2x_vf_max_queue_cnt(bp, vf);
2095 vf_txq_count(vf) = resc->num_txqs ? : bnx2x_vf_max_queue_cnt(bp, vf);
2096 if (resc->num_mac_filters)
2097 vf_mac_rules_cnt(vf) = resc->num_mac_filters;
2098 /* Add an additional vlan filter credit for the hypervisor */
2099 bnx2x_iov_re_set_vlan_filters(bp, vf, resc->num_vlan_filters + 1);
2102 "Fulfilling vf request: sb count %d, tx_count %d, rx_count %d, mac_rules_count %d, vlan_rules_count %d\n",
2103 vf_sb_count(vf), vf_rxq_count(vf),
2104 vf_txq_count(vf), vf_mac_rules_cnt(vf),
2105 vf_vlan_rules_visible_cnt(vf));
2107 /* Initialize the queues */
2109 DP(BNX2X_MSG_IOV, "vf->vfqs was not allocated\n");
2113 for_each_vfq(vf, i) {
2114 struct bnx2x_vf_queue *q = vfq_get(vf, i);
2117 BNX2X_ERR("q number %d was not allocated\n", i);
2122 q->cxt = &((base_cxt + i)->eth);
2123 q->cid = BNX2X_FIRST_VF_CID + base_vf_cid + i;
2125 DP(BNX2X_MSG_IOV, "VFQ[%d:%d]: index %d, cid 0x%x, cxt %p\n",
2126 vf->abs_vfid, i, q->index, q->cid, q->cxt);
2128 /* init SP objects */
2129 bnx2x_vfq_init(bp, vf, q);
2131 vf->state = VF_ACQUIRED;
2135 int bnx2x_vf_init(struct bnx2x *bp, struct bnx2x_virtf *vf, dma_addr_t *sb_map)
2137 struct bnx2x_func_init_params func_init = {0};
2141 /* the sb resources are initialized at this point, do the
2142 * FW/HW initializations
2144 for_each_vf_sb(vf, i)
2145 bnx2x_init_sb(bp, (dma_addr_t)sb_map[i], vf->abs_vfid, true,
2146 vf_igu_sb(vf, i), vf_igu_sb(vf, i));
2149 if (vf->state != VF_ACQUIRED) {
2150 DP(BNX2X_MSG_IOV, "VF[%d] is not in VF_ACQUIRED, but %d\n",
2151 vf->abs_vfid, vf->state);
2155 /* let FLR complete ... */
2158 /* FLR cleanup epilogue */
2159 if (bnx2x_vf_flr_clnup_epilog(bp, vf->abs_vfid))
2162 /* reset IGU VF statistics: MSIX */
2163 REG_WR(bp, IGU_REG_STATISTIC_NUM_MESSAGE_SENT + vf->abs_vfid * 4 , 0);
2166 if (vf->cfg_flags & VF_CFG_STATS)
2167 flags |= (FUNC_FLG_STATS | FUNC_FLG_SPQ);
2169 if (vf->cfg_flags & VF_CFG_TPA)
2170 flags |= FUNC_FLG_TPA;
2172 if (is_vf_multi(vf))
2173 flags |= FUNC_FLG_RSS;
2175 /* function setup */
2176 func_init.func_flgs = flags;
2177 func_init.pf_id = BP_FUNC(bp);
2178 func_init.func_id = FW_VF_HANDLE(vf->abs_vfid);
2179 func_init.fw_stat_map = vf->fw_stat_map;
2180 func_init.spq_map = vf->spq_map;
2181 func_init.spq_prod = 0;
2182 bnx2x_func_init(bp, &func_init);
2185 bnx2x_vf_enable_access(bp, vf->abs_vfid);
2186 bnx2x_vf_enable_traffic(bp, vf);
2188 /* queue protection table */
2190 bnx2x_vf_qtbl_set_q(bp, vf->abs_vfid,
2191 vfq_qzone_id(vf, vfq_get(vf, i)), true);
2193 vf->state = VF_ENABLED;
2195 /* update vf bulletin board */
2196 bnx2x_post_vf_bulletin(bp, vf->index);
2201 struct set_vf_state_cookie {
2202 struct bnx2x_virtf *vf;
2206 static void bnx2x_set_vf_state(void *cookie)
2208 struct set_vf_state_cookie *p = (struct set_vf_state_cookie *)cookie;
2210 p->vf->state = p->state;
2213 int bnx2x_vf_close(struct bnx2x *bp, struct bnx2x_virtf *vf)
2217 DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);
2219 /* Close all queues */
2220 for (i = 0; i < vf_rxq_count(vf); i++) {
2221 rc = bnx2x_vf_queue_teardown(bp, vf, i);
2226 /* disable the interrupts */
2227 DP(BNX2X_MSG_IOV, "disabling igu\n");
2228 bnx2x_vf_igu_disable(bp, vf);
2230 /* disable the VF */
2231 DP(BNX2X_MSG_IOV, "clearing qtbl\n");
2232 bnx2x_vf_clr_qtbl(bp, vf);
2234 /* need to make sure there are no outstanding stats ramrods which may
2235 * cause the device to access the VF's stats buffer which it will free
2236 * as soon as we return from the close flow.
2239 struct set_vf_state_cookie cookie;
2242 cookie.state = VF_ACQUIRED;
2243 rc = bnx2x_stats_safe_exec(bp, bnx2x_set_vf_state, &cookie);
2248 DP(BNX2X_MSG_IOV, "set state to acquired\n");
2252 BNX2X_ERR("vf[%d] CLOSE error: rc %d\n", vf->abs_vfid, rc);
2256 /* VF release can be called either: 1. The VF was acquired but
2257 * not enabled 2. the vf was enabled or in the process of being
2260 int bnx2x_vf_free(struct bnx2x *bp, struct bnx2x_virtf *vf)
2264 DP(BNX2X_MSG_IOV, "VF[%d] STATE: %s\n", vf->abs_vfid,
2265 vf->state == VF_FREE ? "Free" :
2266 vf->state == VF_ACQUIRED ? "Acquired" :
2267 vf->state == VF_ENABLED ? "Enabled" :
2268 vf->state == VF_RESET ? "Reset" :
2271 switch (vf->state) {
2273 rc = bnx2x_vf_close(bp, vf);
2276 /* Fallthrough to release resources */
2278 DP(BNX2X_MSG_IOV, "about to free resources\n");
2279 bnx2x_vf_free_resc(bp, vf);
2289 BNX2X_ERR("VF[%d] RELEASE error: rc %d\n", vf->abs_vfid, rc);
2293 int bnx2x_vf_rss_update(struct bnx2x *bp, struct bnx2x_virtf *vf,
2294 struct bnx2x_config_rss_params *rss)
2296 DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);
2297 set_bit(RAMROD_COMP_WAIT, &rss->ramrod_flags);
2298 return bnx2x_config_rss(bp, rss);
2301 int bnx2x_vf_tpa_update(struct bnx2x *bp, struct bnx2x_virtf *vf,
2302 struct vfpf_tpa_tlv *tlv,
2303 struct bnx2x_queue_update_tpa_params *params)
2305 aligned_u64 *sge_addr = tlv->tpa_client_info.sge_addr;
2306 struct bnx2x_queue_state_params qstate;
2309 DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);
2311 /* Set ramrod params */
2312 memset(&qstate, 0, sizeof(struct bnx2x_queue_state_params));
2313 memcpy(&qstate.params.update_tpa, params,
2314 sizeof(struct bnx2x_queue_update_tpa_params));
2315 qstate.cmd = BNX2X_Q_CMD_UPDATE_TPA;
2316 set_bit(RAMROD_COMP_WAIT, &qstate.ramrod_flags);
2318 for (qid = 0; qid < vf_rxq_count(vf); qid++) {
2319 qstate.q_obj = &bnx2x_vfq(vf, qid, sp_obj);
2320 qstate.params.update_tpa.sge_map = sge_addr[qid];
2321 DP(BNX2X_MSG_IOV, "sge_addr[%d:%d] %08x:%08x\n",
2322 vf->abs_vfid, qid, U64_HI(sge_addr[qid]),
2323 U64_LO(sge_addr[qid]));
2324 rc = bnx2x_queue_state_change(bp, &qstate);
2326 BNX2X_ERR("Failed to configure sge_addr %08x:%08x for [%d:%d]\n",
2327 U64_HI(sge_addr[qid]), U64_LO(sge_addr[qid]),
2336 /* VF release ~ VF close + VF release-resources
2337 * Release is the ultimate SW shutdown and is called whenever an
2338 * irrecoverable error is encountered.
2340 int bnx2x_vf_release(struct bnx2x *bp, struct bnx2x_virtf *vf)
2344 DP(BNX2X_MSG_IOV, "PF releasing vf %d\n", vf->abs_vfid);
2345 bnx2x_lock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_RELEASE_VF);
2347 rc = bnx2x_vf_free(bp, vf);
2350 "VF[%d] Failed to allocate resources for release op- rc=%d\n",
2352 bnx2x_unlock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_RELEASE_VF);
2356 void bnx2x_lock_vf_pf_channel(struct bnx2x *bp, struct bnx2x_virtf *vf,
2357 enum channel_tlvs tlv)
2359 /* we don't lock the channel for unsupported tlvs */
2360 if (!bnx2x_tlv_supported(tlv)) {
2361 BNX2X_ERR("attempting to lock with unsupported tlv. Aborting\n");
2365 /* lock the channel */
2366 mutex_lock(&vf->op_mutex);
2368 /* record the locking op */
2369 vf->op_current = tlv;
2372 DP(BNX2X_MSG_IOV, "VF[%d]: vf pf channel locked by %d\n",
2376 void bnx2x_unlock_vf_pf_channel(struct bnx2x *bp, struct bnx2x_virtf *vf,
2377 enum channel_tlvs expected_tlv)
2379 enum channel_tlvs current_tlv;
2382 BNX2X_ERR("VF was %p\n", vf);
2386 current_tlv = vf->op_current;
2388 /* we don't unlock the channel for unsupported tlvs */
2389 if (!bnx2x_tlv_supported(expected_tlv))
2392 WARN(expected_tlv != vf->op_current,
2393 "lock mismatch: expected %d found %d", expected_tlv,
2396 /* record the locking op */
2397 vf->op_current = CHANNEL_TLV_NONE;
2399 /* lock the channel */
2400 mutex_unlock(&vf->op_mutex);
2402 /* log the unlock */
2403 DP(BNX2X_MSG_IOV, "VF[%d]: vf pf channel unlocked by %d\n",
2404 vf->abs_vfid, current_tlv);
2407 static int bnx2x_set_pf_tx_switching(struct bnx2x *bp, bool enable)
2409 struct bnx2x_queue_state_params q_params;
2413 /* Verify changes are needed and record current Tx switching state */
2414 prev_flags = bp->flags;
2416 bp->flags |= TX_SWITCHING;
2418 bp->flags &= ~TX_SWITCHING;
2419 if (prev_flags == bp->flags)
2422 /* Verify state enables the sending of queue ramrods */
2423 if ((bp->state != BNX2X_STATE_OPEN) ||
2424 (bnx2x_get_q_logical_state(bp,
2425 &bnx2x_sp_obj(bp, &bp->fp[0]).q_obj) !=
2426 BNX2X_Q_LOGICAL_STATE_ACTIVE))
2429 /* send q. update ramrod to configure Tx switching */
2430 memset(&q_params, 0, sizeof(q_params));
2431 __set_bit(RAMROD_COMP_WAIT, &q_params.ramrod_flags);
2432 q_params.cmd = BNX2X_Q_CMD_UPDATE;
2433 __set_bit(BNX2X_Q_UPDATE_TX_SWITCHING_CHNG,
2434 &q_params.params.update.update_flags);
2436 __set_bit(BNX2X_Q_UPDATE_TX_SWITCHING,
2437 &q_params.params.update.update_flags);
2439 __clear_bit(BNX2X_Q_UPDATE_TX_SWITCHING,
2440 &q_params.params.update.update_flags);
2442 /* send the ramrod on all the queues of the PF */
2443 for_each_eth_queue(bp, i) {
2444 struct bnx2x_fastpath *fp = &bp->fp[i];
2446 /* Set the appropriate Queue object */
2447 q_params.q_obj = &bnx2x_sp_obj(bp, fp).q_obj;
2449 /* Update the Queue state */
2450 rc = bnx2x_queue_state_change(bp, &q_params);
2452 BNX2X_ERR("Failed to configure Tx switching\n");
2457 DP(BNX2X_MSG_IOV, "%s Tx Switching\n", enable ? "Enabled" : "Disabled");
2461 int bnx2x_sriov_configure(struct pci_dev *dev, int num_vfs_param)
2463 struct bnx2x *bp = netdev_priv(pci_get_drvdata(dev));
2465 if (!IS_SRIOV(bp)) {
2466 BNX2X_ERR("failed to configure SR-IOV since vfdb was not allocated. Check dmesg for errors in probe stage\n");
2470 DP(BNX2X_MSG_IOV, "bnx2x_sriov_configure called with %d, BNX2X_NR_VIRTFN(bp) was %d\n",
2471 num_vfs_param, BNX2X_NR_VIRTFN(bp));
2473 /* HW channel is only operational when PF is up */
2474 if (bp->state != BNX2X_STATE_OPEN) {
2475 BNX2X_ERR("VF num configuration via sysfs not supported while PF is down\n");
2479 /* we are always bound by the total_vfs in the configuration space */
2480 if (num_vfs_param > BNX2X_NR_VIRTFN(bp)) {
2481 BNX2X_ERR("truncating requested number of VFs (%d) down to maximum allowed (%d)\n",
2482 num_vfs_param, BNX2X_NR_VIRTFN(bp));
2483 num_vfs_param = BNX2X_NR_VIRTFN(bp);
2486 bp->requested_nr_virtfn = num_vfs_param;
2487 if (num_vfs_param == 0) {
2488 bnx2x_set_pf_tx_switching(bp, false);
2489 bnx2x_disable_sriov(bp);
2492 return bnx2x_enable_sriov(bp);
2496 #define IGU_ENTRY_SIZE 4
2498 int bnx2x_enable_sriov(struct bnx2x *bp)
2500 int rc = 0, req_vfs = bp->requested_nr_virtfn;
2501 int vf_idx, sb_idx, vfq_idx, qcount, first_vf;
2502 u32 igu_entry, address;
2508 first_vf = bp->vfdb->sriov.first_vf_in_pf;
2510 /* statically distribute vf sb pool between VFs */
2511 num_vf_queues = min_t(u16, BNX2X_VF_MAX_QUEUES,
2512 BP_VFDB(bp)->vf_sbs_pool / req_vfs);
2514 /* zero previous values learned from igu cam */
2515 for (vf_idx = 0; vf_idx < req_vfs; vf_idx++) {
2516 struct bnx2x_virtf *vf = BP_VF(bp, vf_idx);
2519 vf_sb_count(BP_VF(bp, vf_idx)) = 0;
2521 bp->vfdb->vf_sbs_pool = 0;
2523 /* prepare IGU cam */
2524 sb_idx = BP_VFDB(bp)->first_vf_igu_entry;
2525 address = IGU_REG_MAPPING_MEMORY + sb_idx * IGU_ENTRY_SIZE;
2526 for (vf_idx = first_vf; vf_idx < first_vf + req_vfs; vf_idx++) {
2527 for (vfq_idx = 0; vfq_idx < num_vf_queues; vfq_idx++) {
2528 igu_entry = vf_idx << IGU_REG_MAPPING_MEMORY_FID_SHIFT |
2529 vfq_idx << IGU_REG_MAPPING_MEMORY_VECTOR_SHIFT |
2530 IGU_REG_MAPPING_MEMORY_VALID;
2531 DP(BNX2X_MSG_IOV, "assigning sb %d to vf %d\n",
2533 REG_WR(bp, address, igu_entry);
2535 address += IGU_ENTRY_SIZE;
2539 /* Reinitialize vf database according to igu cam */
2540 bnx2x_get_vf_igu_cam_info(bp);
2542 DP(BNX2X_MSG_IOV, "vf_sbs_pool %d, num_vf_queues %d\n",
2543 BP_VFDB(bp)->vf_sbs_pool, num_vf_queues);
2546 for_each_vf(bp, vf_idx) {
2547 struct bnx2x_virtf *vf = BP_VF(bp, vf_idx);
2549 /* set local queue arrays */
2550 vf->vfqs = &bp->vfdb->vfqs[qcount];
2551 qcount += vf_sb_count(vf);
2552 bnx2x_iov_static_resc(bp, vf);
2555 /* prepare msix vectors in VF configuration space - the value in the
2556 * PCI configuration space should be the index of the last entry,
2557 * namely one less than the actual size of the table
2559 for (vf_idx = first_vf; vf_idx < first_vf + req_vfs; vf_idx++) {
2560 bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf_idx));
2561 REG_WR(bp, PCICFG_OFFSET + GRC_CONFIG_REG_VF_MSIX_CONTROL,
2563 DP(BNX2X_MSG_IOV, "set msix vec num in VF %d cfg space to %d\n",
2564 vf_idx, num_vf_queues - 1);
2566 bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
2568 /* enable sriov. This will probe all the VFs, and consequentially cause
2569 * the "acquire" messages to appear on the VF PF channel.
2571 DP(BNX2X_MSG_IOV, "about to call enable sriov\n");
2572 bnx2x_disable_sriov(bp);
2574 rc = bnx2x_set_pf_tx_switching(bp, true);
2578 rc = pci_enable_sriov(bp->pdev, req_vfs);
2580 BNX2X_ERR("pci_enable_sriov failed with %d\n", rc);
2583 DP(BNX2X_MSG_IOV, "sriov enabled (%d vfs)\n", req_vfs);
2587 void bnx2x_pf_set_vfs_vlan(struct bnx2x *bp)
2590 struct pf_vf_bulletin_content *bulletin;
2592 DP(BNX2X_MSG_IOV, "configuring vlan for VFs from sp-task\n");
2593 for_each_vf(bp, vfidx) {
2594 bulletin = BP_VF_BULLETIN(bp, vfidx);
2595 if (BP_VF(bp, vfidx)->cfg_flags & VF_CFG_VLAN)
2596 bnx2x_set_vf_vlan(bp->dev, vfidx, bulletin->vlan, 0);
2600 void bnx2x_disable_sriov(struct bnx2x *bp)
2602 if (pci_vfs_assigned(bp->pdev)) {
2604 "Unloading driver while VFs are assigned - VFs will not be deallocated\n");
2608 pci_disable_sriov(bp->pdev);
2611 static int bnx2x_vf_op_prep(struct bnx2x *bp, int vfidx,
2612 struct bnx2x_virtf **vf,
2613 struct pf_vf_bulletin_content **bulletin,
2616 if (bp->state != BNX2X_STATE_OPEN) {
2617 BNX2X_ERR("PF is down - can't utilize iov-related functionality\n");
2621 if (!IS_SRIOV(bp)) {
2622 BNX2X_ERR("sriov is disabled - can't utilize iov-related functionality\n");
2626 if (vfidx >= BNX2X_NR_VIRTFN(bp)) {
2627 BNX2X_ERR("VF is uninitialized - can't utilize iov-related functionality. vfidx was %d BNX2X_NR_VIRTFN was %d\n",
2628 vfidx, BNX2X_NR_VIRTFN(bp));
2633 *vf = BP_VF(bp, vfidx);
2634 *bulletin = BP_VF_BULLETIN(bp, vfidx);
2637 BNX2X_ERR("Unable to get VF structure for vfidx %d\n", vfidx);
2641 if (test_queue && !(*vf)->vfqs) {
2642 BNX2X_ERR("vfqs struct is null. Was this invoked before dynamically enabling SR-IOV? vfidx was %d\n",
2648 BNX2X_ERR("Bulletin Board struct is null for vfidx %d\n",
2656 int bnx2x_get_vf_config(struct net_device *dev, int vfidx,
2657 struct ifla_vf_info *ivi)
2659 struct bnx2x *bp = netdev_priv(dev);
2660 struct bnx2x_virtf *vf = NULL;
2661 struct pf_vf_bulletin_content *bulletin = NULL;
2662 struct bnx2x_vlan_mac_obj *mac_obj;
2663 struct bnx2x_vlan_mac_obj *vlan_obj;
2666 /* sanity and init */
2667 rc = bnx2x_vf_op_prep(bp, vfidx, &vf, &bulletin, true);
2671 mac_obj = &bnx2x_leading_vfq(vf, mac_obj);
2672 vlan_obj = &bnx2x_leading_vfq(vf, vlan_obj);
2673 if (!mac_obj || !vlan_obj) {
2674 BNX2X_ERR("VF partially initialized\n");
2680 ivi->max_tx_rate = 10000; /* always 10G. TBA take from link struct */
2681 ivi->min_tx_rate = 0;
2682 ivi->spoofchk = 1; /*always enabled */
2683 if (vf->state == VF_ENABLED) {
2684 /* mac and vlan are in vlan_mac objects */
2685 if (bnx2x_validate_vf_sp_objs(bp, vf, false)) {
2686 mac_obj->get_n_elements(bp, mac_obj, 1, (u8 *)&ivi->mac,
2688 vlan_obj->get_n_elements(bp, vlan_obj, 1,
2689 (u8 *)&ivi->vlan, 0,
2693 mutex_lock(&bp->vfdb->bulletin_mutex);
2695 if (bulletin->valid_bitmap & (1 << MAC_ADDR_VALID))
2696 /* mac configured by ndo so its in bulletin board */
2697 memcpy(&ivi->mac, bulletin->mac, ETH_ALEN);
2699 /* function has not been loaded yet. Show mac as 0s */
2700 eth_zero_addr(ivi->mac);
2703 if (bulletin->valid_bitmap & (1 << VLAN_VALID))
2704 /* vlan configured by ndo so its in bulletin board */
2705 memcpy(&ivi->vlan, &bulletin->vlan, VLAN_HLEN);
2707 /* function has not been loaded yet. Show vlans as 0s */
2708 memset(&ivi->vlan, 0, VLAN_HLEN);
2710 mutex_unlock(&bp->vfdb->bulletin_mutex);
2716 /* New mac for VF. Consider these cases:
2717 * 1. VF hasn't been acquired yet - save the mac in local bulletin board and
2718 * supply at acquire.
2719 * 2. VF has already been acquired but has not yet initialized - store in local
2720 * bulletin board. mac will be posted on VF bulletin board after VF init. VF
2721 * will configure this mac when it is ready.
2722 * 3. VF has already initialized but has not yet setup a queue - post the new
2723 * mac on VF's bulletin board right now. VF will configure this mac when it
2725 * 4. VF has already set a queue - delete any macs already configured for this
2726 * queue and manually config the new mac.
2727 * In any event, once this function has been called refuse any attempts by the
2728 * VF to configure any mac for itself except for this mac. In case of a race
2729 * where the VF fails to see the new post on its bulletin board before sending a
2730 * mac configuration request, the PF will simply fail the request and VF can try
2731 * again after consulting its bulletin board.
2733 int bnx2x_set_vf_mac(struct net_device *dev, int vfidx, u8 *mac)
2735 struct bnx2x *bp = netdev_priv(dev);
2736 int rc, q_logical_state;
2737 struct bnx2x_virtf *vf = NULL;
2738 struct pf_vf_bulletin_content *bulletin = NULL;
2740 if (!is_valid_ether_addr(mac)) {
2741 BNX2X_ERR("mac address invalid\n");
2745 /* sanity and init */
2746 rc = bnx2x_vf_op_prep(bp, vfidx, &vf, &bulletin, true);
2750 mutex_lock(&bp->vfdb->bulletin_mutex);
2752 /* update PF's copy of the VF's bulletin. Will no longer accept mac
2753 * configuration requests from vf unless match this mac
2755 bulletin->valid_bitmap |= 1 << MAC_ADDR_VALID;
2756 memcpy(bulletin->mac, mac, ETH_ALEN);
2758 /* Post update on VF's bulletin board */
2759 rc = bnx2x_post_vf_bulletin(bp, vfidx);
2761 /* release lock before checking return code */
2762 mutex_unlock(&bp->vfdb->bulletin_mutex);
2765 BNX2X_ERR("failed to update VF[%d] bulletin\n", vfidx);
2770 bnx2x_get_q_logical_state(bp, &bnx2x_leading_vfq(vf, sp_obj));
2771 if (vf->state == VF_ENABLED &&
2772 q_logical_state == BNX2X_Q_LOGICAL_STATE_ACTIVE) {
2773 /* configure the mac in device on this vf's queue */
2774 unsigned long ramrod_flags = 0;
2775 struct bnx2x_vlan_mac_obj *mac_obj;
2777 /* User should be able to see failure reason in system logs */
2778 if (!bnx2x_validate_vf_sp_objs(bp, vf, true))
2781 /* must lock vfpf channel to protect against vf flows */
2782 bnx2x_lock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_SET_MAC);
2784 /* remove existing eth macs */
2785 mac_obj = &bnx2x_leading_vfq(vf, mac_obj);
2786 rc = bnx2x_del_all_macs(bp, mac_obj, BNX2X_ETH_MAC, true);
2788 BNX2X_ERR("failed to delete eth macs\n");
2793 /* remove existing uc list macs */
2794 rc = bnx2x_del_all_macs(bp, mac_obj, BNX2X_UC_LIST_MAC, true);
2796 BNX2X_ERR("failed to delete uc_list macs\n");
2801 /* configure the new mac to device */
2802 __set_bit(RAMROD_COMP_WAIT, &ramrod_flags);
2803 bnx2x_set_mac_one(bp, (u8 *)&bulletin->mac, mac_obj, true,
2804 BNX2X_ETH_MAC, &ramrod_flags);
2807 bnx2x_unlock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_SET_MAC);
2813 int bnx2x_set_vf_vlan(struct net_device *dev, int vfidx, u16 vlan, u8 qos)
2815 struct bnx2x_queue_state_params q_params = {NULL};
2816 struct bnx2x_vlan_mac_ramrod_params ramrod_param;
2817 struct bnx2x_queue_update_params *update_params;
2818 struct pf_vf_bulletin_content *bulletin = NULL;
2819 struct bnx2x_rx_mode_ramrod_params rx_ramrod;
2820 struct bnx2x *bp = netdev_priv(dev);
2821 struct bnx2x_vlan_mac_obj *vlan_obj;
2822 unsigned long vlan_mac_flags = 0;
2823 unsigned long ramrod_flags = 0;
2824 struct bnx2x_virtf *vf = NULL;
2825 unsigned long accept_flags;
2829 BNX2X_ERR("illegal vlan value %d\n", vlan);
2833 DP(BNX2X_MSG_IOV, "configuring VF %d with VLAN %d qos %d\n",
2836 /* sanity and init */
2837 rc = bnx2x_vf_op_prep(bp, vfidx, &vf, &bulletin, true);
2841 /* update PF's copy of the VF's bulletin. No point in posting the vlan
2842 * to the VF since it doesn't have anything to do with it. But it useful
2843 * to store it here in case the VF is not up yet and we can only
2844 * configure the vlan later when it does. Treat vlan id 0 as remove the
2847 mutex_lock(&bp->vfdb->bulletin_mutex);
2850 bulletin->valid_bitmap |= 1 << VLAN_VALID;
2852 bulletin->valid_bitmap &= ~(1 << VLAN_VALID);
2853 bulletin->vlan = vlan;
2855 mutex_unlock(&bp->vfdb->bulletin_mutex);
2857 /* is vf initialized and queue set up? */
2858 if (vf->state != VF_ENABLED ||
2859 bnx2x_get_q_logical_state(bp, &bnx2x_leading_vfq(vf, sp_obj)) !=
2860 BNX2X_Q_LOGICAL_STATE_ACTIVE)
2863 /* User should be able to see error in system logs */
2864 if (!bnx2x_validate_vf_sp_objs(bp, vf, true))
2867 /* must lock vfpf channel to protect against vf flows */
2868 bnx2x_lock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_SET_VLAN);
2870 /* remove existing vlans */
2871 __set_bit(RAMROD_COMP_WAIT, &ramrod_flags);
2872 vlan_obj = &bnx2x_leading_vfq(vf, vlan_obj);
2873 rc = vlan_obj->delete_all(bp, vlan_obj, &vlan_mac_flags,
2876 BNX2X_ERR("failed to delete vlans\n");
2881 /* need to remove/add the VF's accept_any_vlan bit */
2882 accept_flags = bnx2x_leading_vfq(vf, accept_flags);
2884 clear_bit(BNX2X_ACCEPT_ANY_VLAN, &accept_flags);
2886 set_bit(BNX2X_ACCEPT_ANY_VLAN, &accept_flags);
2888 bnx2x_vf_prep_rx_mode(bp, LEADING_IDX, &rx_ramrod, vf,
2890 bnx2x_leading_vfq(vf, accept_flags) = accept_flags;
2891 bnx2x_config_rx_mode(bp, &rx_ramrod);
2893 /* configure the new vlan to device */
2894 memset(&ramrod_param, 0, sizeof(ramrod_param));
2895 __set_bit(RAMROD_COMP_WAIT, &ramrod_flags);
2896 ramrod_param.vlan_mac_obj = vlan_obj;
2897 ramrod_param.ramrod_flags = ramrod_flags;
2898 set_bit(BNX2X_DONT_CONSUME_CAM_CREDIT,
2899 &ramrod_param.user_req.vlan_mac_flags);
2900 ramrod_param.user_req.u.vlan.vlan = vlan;
2901 ramrod_param.user_req.cmd = BNX2X_VLAN_MAC_ADD;
2902 rc = bnx2x_config_vlan_mac(bp, &ramrod_param);
2904 BNX2X_ERR("failed to configure vlan\n");
2909 /* send queue update ramrod to configure default vlan and silent
2912 __set_bit(RAMROD_COMP_WAIT, &q_params.ramrod_flags);
2913 q_params.cmd = BNX2X_Q_CMD_UPDATE;
2914 q_params.q_obj = &bnx2x_leading_vfq(vf, sp_obj);
2915 update_params = &q_params.params.update;
2916 __set_bit(BNX2X_Q_UPDATE_DEF_VLAN_EN_CHNG,
2917 &update_params->update_flags);
2918 __set_bit(BNX2X_Q_UPDATE_SILENT_VLAN_REM_CHNG,
2919 &update_params->update_flags);
2921 /* if vlan is 0 then we want to leave the VF traffic
2922 * untagged, and leave the incoming traffic untouched
2923 * (i.e. do not remove any vlan tags).
2925 __clear_bit(BNX2X_Q_UPDATE_DEF_VLAN_EN,
2926 &update_params->update_flags);
2927 __clear_bit(BNX2X_Q_UPDATE_SILENT_VLAN_REM,
2928 &update_params->update_flags);
2930 /* configure default vlan to vf queue and set silent
2931 * vlan removal (the vf remains unaware of this vlan).
2933 __set_bit(BNX2X_Q_UPDATE_DEF_VLAN_EN,
2934 &update_params->update_flags);
2935 __set_bit(BNX2X_Q_UPDATE_SILENT_VLAN_REM,
2936 &update_params->update_flags);
2937 update_params->def_vlan = vlan;
2938 update_params->silent_removal_value =
2939 vlan & VLAN_VID_MASK;
2940 update_params->silent_removal_mask = VLAN_VID_MASK;
2943 /* Update the Queue state */
2944 rc = bnx2x_queue_state_change(bp, &q_params);
2946 BNX2X_ERR("Failed to configure default VLAN\n");
2951 /* clear the flag indicating that this VF needs its vlan
2952 * (will only be set if the HV configured the Vlan before vf was
2953 * up and we were called because the VF came up later
2956 vf->cfg_flags &= ~VF_CFG_VLAN;
2957 bnx2x_unlock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_SET_VLAN);
2962 /* crc is the first field in the bulletin board. Compute the crc over the
2963 * entire bulletin board excluding the crc field itself. Use the length field
2964 * as the Bulletin Board was posted by a PF with possibly a different version
2965 * from the vf which will sample it. Therefore, the length is computed by the
2966 * PF and then used blindly by the VF.
2968 u32 bnx2x_crc_vf_bulletin(struct pf_vf_bulletin_content *bulletin)
2970 return crc32(BULLETIN_CRC_SEED,
2971 ((u8 *)bulletin) + sizeof(bulletin->crc),
2972 bulletin->length - sizeof(bulletin->crc));
2975 /* Check for new posts on the bulletin board */
2976 enum sample_bulletin_result bnx2x_sample_bulletin(struct bnx2x *bp)
2978 struct pf_vf_bulletin_content *bulletin;
2981 /* sampling structure in mid post may result with corrupted data
2982 * validate crc to ensure coherency.
2984 for (attempts = 0; attempts < BULLETIN_ATTEMPTS; attempts++) {
2987 /* sample the bulletin board */
2988 memcpy(&bp->shadow_bulletin, bp->pf2vf_bulletin,
2989 sizeof(union pf_vf_bulletin));
2991 crc = bnx2x_crc_vf_bulletin(&bp->shadow_bulletin.content);
2993 if (bp->shadow_bulletin.content.crc == crc)
2996 BNX2X_ERR("bad crc on bulletin board. Contained %x computed %x\n",
2997 bp->shadow_bulletin.content.crc, crc);
3000 if (attempts >= BULLETIN_ATTEMPTS) {
3001 BNX2X_ERR("pf to vf bulletin board crc was wrong %d consecutive times. Aborting\n",
3003 return PFVF_BULLETIN_CRC_ERR;
3005 bulletin = &bp->shadow_bulletin.content;
3007 /* bulletin board hasn't changed since last sample */
3008 if (bp->old_bulletin.version == bulletin->version)
3009 return PFVF_BULLETIN_UNCHANGED;
3011 /* the mac address in bulletin board is valid and is new */
3012 if (bulletin->valid_bitmap & 1 << MAC_ADDR_VALID &&
3013 !ether_addr_equal(bulletin->mac, bp->old_bulletin.mac)) {
3014 /* update new mac to net device */
3015 memcpy(bp->dev->dev_addr, bulletin->mac, ETH_ALEN);
3018 if (bulletin->valid_bitmap & (1 << LINK_VALID)) {
3019 DP(BNX2X_MSG_IOV, "link update speed %d flags %x\n",
3020 bulletin->link_speed, bulletin->link_flags);
3022 bp->vf_link_vars.line_speed = bulletin->link_speed;
3023 bp->vf_link_vars.link_report_flags = 0;
3025 if (bulletin->link_flags & VFPF_LINK_REPORT_LINK_DOWN)
3026 __set_bit(BNX2X_LINK_REPORT_LINK_DOWN,
3027 &bp->vf_link_vars.link_report_flags);
3029 if (bulletin->link_flags & VFPF_LINK_REPORT_FULL_DUPLEX)
3030 __set_bit(BNX2X_LINK_REPORT_FD,
3031 &bp->vf_link_vars.link_report_flags);
3032 /* Rx Flow Control is ON */
3033 if (bulletin->link_flags & VFPF_LINK_REPORT_RX_FC_ON)
3034 __set_bit(BNX2X_LINK_REPORT_RX_FC_ON,
3035 &bp->vf_link_vars.link_report_flags);
3036 /* Tx Flow Control is ON */
3037 if (bulletin->link_flags & VFPF_LINK_REPORT_TX_FC_ON)
3038 __set_bit(BNX2X_LINK_REPORT_TX_FC_ON,
3039 &bp->vf_link_vars.link_report_flags);
3040 __bnx2x_link_report(bp);
3043 /* copy new bulletin board to bp */
3044 memcpy(&bp->old_bulletin, bulletin,
3045 sizeof(struct pf_vf_bulletin_content));
3047 return PFVF_BULLETIN_UPDATED;
3050 void bnx2x_timer_sriov(struct bnx2x *bp)
3052 bnx2x_sample_bulletin(bp);
3054 /* if channel is down we need to self destruct */
3055 if (bp->old_bulletin.valid_bitmap & 1 << CHANNEL_DOWN)
3056 bnx2x_schedule_sp_rtnl(bp, BNX2X_SP_RTNL_VFPF_CHANNEL_DOWN,
3060 void __iomem *bnx2x_vf_doorbells(struct bnx2x *bp)
3062 /* vf doorbells are embedded within the regview */
3063 return bp->regview + PXP_VF_ADDR_DB_START;
3066 void bnx2x_vf_pci_dealloc(struct bnx2x *bp)
3068 BNX2X_PCI_FREE(bp->vf2pf_mbox, bp->vf2pf_mbox_mapping,
3069 sizeof(struct bnx2x_vf_mbx_msg));
3070 BNX2X_PCI_FREE(bp->vf2pf_mbox, bp->pf2vf_bulletin_mapping,
3071 sizeof(union pf_vf_bulletin));
3074 int bnx2x_vf_pci_alloc(struct bnx2x *bp)
3076 mutex_init(&bp->vf2pf_mutex);
3078 /* allocate vf2pf mailbox for vf to pf channel */
3079 bp->vf2pf_mbox = BNX2X_PCI_ALLOC(&bp->vf2pf_mbox_mapping,
3080 sizeof(struct bnx2x_vf_mbx_msg));
3081 if (!bp->vf2pf_mbox)
3084 /* allocate pf 2 vf bulletin board */
3085 bp->pf2vf_bulletin = BNX2X_PCI_ALLOC(&bp->pf2vf_bulletin_mapping,
3086 sizeof(union pf_vf_bulletin));
3087 if (!bp->pf2vf_bulletin)
3090 bnx2x_vf_bulletin_finalize(&bp->pf2vf_bulletin->content, true);
3095 bnx2x_vf_pci_dealloc(bp);
3099 void bnx2x_iov_channel_down(struct bnx2x *bp)
3102 struct pf_vf_bulletin_content *bulletin;
3107 for_each_vf(bp, vf_idx) {
3108 /* locate this VFs bulletin board and update the channel down
3111 bulletin = BP_VF_BULLETIN(bp, vf_idx);
3112 bulletin->valid_bitmap |= 1 << CHANNEL_DOWN;
3114 /* update vf bulletin board */
3115 bnx2x_post_vf_bulletin(bp, vf_idx);
3119 void bnx2x_iov_task(struct work_struct *work)
3121 struct bnx2x *bp = container_of(work, struct bnx2x, iov_task.work);
3123 if (!netif_running(bp->dev))
3126 if (test_and_clear_bit(BNX2X_IOV_HANDLE_FLR,
3127 &bp->iov_task_state))
3128 bnx2x_vf_handle_flr_event(bp);
3130 if (test_and_clear_bit(BNX2X_IOV_HANDLE_VF_MSG,
3131 &bp->iov_task_state))
3135 void bnx2x_schedule_iov_task(struct bnx2x *bp, enum bnx2x_iov_flag flag)
3137 smp_mb__before_atomic();
3138 set_bit(flag, &bp->iov_task_state);
3139 smp_mb__after_atomic();
3140 DP(BNX2X_MSG_IOV, "Scheduling iov task [Flag: %d]\n", flag);
3141 queue_delayed_work(bnx2x_iov_wq, &bp->iov_task, 0);