drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c

   1 /* bnx2x_cmn.c: QLogic Everest network driver.
   2  *
   3  * Copyright (c) 2007-2013 Broadcom Corporation
   4  * Copyright (c) 2014 QLogic Corporation
   5  * All rights reserved
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation.
  10  *
  11  * Maintained by: Ariel Elior <ariel.elior@qlogic.com>
  12  * Written by: Eliezer Tamir
  13  * Based on code from Michael Chan's bnx2 driver
  14  * UDP CSUM errata workaround by Arik Gendelman
  15  * Slowpath and fastpath rework by Vladislav Zolotarov
  16  * Statistics and Link management by Yitchak Gertner
  17  *
  18  */
  19
  20 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  21
  22 #include <linux/etherdevice.h>
  23 #include <linux/if_vlan.h>
  24 #include <linux/interrupt.h>
  25 #include <linux/ip.h>
  26 #include <linux/crash_dump.h>
  27 #include <net/tcp.h>
  28 #include <net/ipv6.h>
  29 #include <net/ip6_checksum.h>
  30 #include <linux/prefetch.h>
  31 #include "bnx2x_cmn.h"
  32 #include "bnx2x_init.h"
  33 #include "bnx2x_sp.h"
  34
  35 static void bnx2x_free_fp_mem_cnic(struct bnx2x *bp);
  36 static int bnx2x_alloc_fp_mem_cnic(struct bnx2x *bp);
  37 static int bnx2x_alloc_fp_mem(struct bnx2x *bp);
  38 static int bnx2x_poll(struct napi_struct *napi, int budget);
  39
  40 static void bnx2x_add_all_napi_cnic(struct bnx2x *bp)
  41 {
  42         int i;
  43
  44         /* Add NAPI objects */
  45         for_each_rx_queue_cnic(bp, i) {
  46                 netif_napi_add(bp->dev, &bnx2x_fp(bp, i, napi),
  47                                bnx2x_poll, NAPI_POLL_WEIGHT);
  48         }
  49 }
  50
  51 static void bnx2x_add_all_napi(struct bnx2x *bp)
  52 {
  53         int i;
  54
  55         /* Add NAPI objects */
  56         for_each_eth_queue(bp, i) {
  57                 netif_napi_add(bp->dev, &bnx2x_fp(bp, i, napi),
  58                                bnx2x_poll, NAPI_POLL_WEIGHT);
  59         }
  60 }
  61
  62 static int bnx2x_calc_num_queues(struct bnx2x *bp)
  63 {
  64         int nq = bnx2x_num_queues ? : netif_get_num_default_rss_queues();
  65
  66         /* Reduce memory usage in kdump environment by using only one queue */
  67         if (is_kdump_kernel())
  68                 nq = 1;
  69
  70         nq = clamp(nq, 1, BNX2X_MAX_QUEUES(bp));
  71         return nq;
  72 }
  73
  74 /**
  75  * bnx2x_move_fp - move content of the fastpath structure.
  76  *
  77  * @bp:         driver handle
  78  * @from:       source FP index
  79  * @to:         destination FP index
  80  *
  81  * Makes sure the contents of the bp->fp[to].napi is kept
  82  * intact. This is done by first copying the napi struct from
  83  * the target to the source, and then mem copying the entire
  84  * source onto the target. Update txdata pointers and related
  85  * content.
  86  */
  87 static inline void bnx2x_move_fp(struct bnx2x *bp, int from, int to)
  88 {
  89         struct bnx2x_fastpath *from_fp = &bp->fp[from];
  90         struct bnx2x_fastpath *to_fp = &bp->fp[to];
  91         struct bnx2x_sp_objs *from_sp_objs = &bp->sp_objs[from];
  92         struct bnx2x_sp_objs *to_sp_objs = &bp->sp_objs[to];
  93         struct bnx2x_fp_stats *from_fp_stats = &bp->fp_stats[from];
  94         struct bnx2x_fp_stats *to_fp_stats = &bp->fp_stats[to];
  95         int old_max_eth_txqs, new_max_eth_txqs;
  96         int old_txdata_index = 0, new_txdata_index = 0;
  97         struct bnx2x_agg_info *old_tpa_info = to_fp->tpa_info;
  98
  99         /* Copy the NAPI object as it has been already initialized */
 100         from_fp->napi = to_fp->napi;
 101
 102         /* Move bnx2x_fastpath contents */
 103         memcpy(to_fp, from_fp, sizeof(*to_fp));
 104         to_fp->index = to;
 105
 106         /* Retain the tpa_info of the original `to' version as we don't want
 107          * 2 FPs to contain the same tpa_info pointer.
 108          */
 109         to_fp->tpa_info = old_tpa_info;
 110
 111         /* move sp_objs contents as well, as their indices match fp ones */
 112         memcpy(to_sp_objs, from_sp_objs, sizeof(*to_sp_objs));
 113
 114         /* move fp_stats contents as well, as their indices match fp ones */
 115         memcpy(to_fp_stats, from_fp_stats, sizeof(*to_fp_stats));
 116
 117         /* Update txdata pointers in fp and move txdata content accordingly:
 118          * Each fp consumes 'max_cos' txdata structures, so the index should be
 119          * decremented by max_cos x delta.
 120          */
 121
 122         old_max_eth_txqs = BNX2X_NUM_ETH_QUEUES(bp) * (bp)->max_cos;
 123         new_max_eth_txqs = (BNX2X_NUM_ETH_QUEUES(bp) - from + to) *
 124                                 (bp)->max_cos;
 125         if (from == FCOE_IDX(bp)) {
 126                 old_txdata_index = old_max_eth_txqs + FCOE_TXQ_IDX_OFFSET;
 127                 new_txdata_index = new_max_eth_txqs + FCOE_TXQ_IDX_OFFSET;
 128         }
 129
 130         memcpy(&bp->bnx2x_txq[new_txdata_index],
 131                &bp->bnx2x_txq[old_txdata_index],
 132                sizeof(struct bnx2x_fp_txdata));
 133         to_fp->txdata_ptr[0] = &bp->bnx2x_txq[new_txdata_index];
 134 }
 135
 136 /**
 137  * bnx2x_fill_fw_str - Fill buffer with FW version string.
 138  *
 139  * @bp:        driver handle
 140  * @buf:       character buffer to fill with the fw name
 141  * @buf_len:   length of the above buffer
 142  *
 143  */
 144 void bnx2x_fill_fw_str(struct bnx2x *bp, char *buf, size_t buf_len)
 145 {
 146         if (IS_PF(bp)) {
 147                 u8 phy_fw_ver[PHY_FW_VER_LEN];
 148
 149                 phy_fw_ver[0] = '\0';
 150                 bnx2x_get_ext_phy_fw_version(&bp->link_params,
 151                                              phy_fw_ver, PHY_FW_VER_LEN);
 152                 strlcpy(buf, bp->fw_ver, buf_len);
 153                 snprintf(buf + strlen(bp->fw_ver), 32 - strlen(bp->fw_ver),
 154                          "bc %d.%d.%d%s%s",
 155                          (bp->common.bc_ver & 0xff0000) >> 16,
 156                          (bp->common.bc_ver & 0xff00) >> 8,
 157                          (bp->common.bc_ver & 0xff),
 158                          ((phy_fw_ver[0] != '\0') ? " phy " : ""), phy_fw_ver);
 159         } else {
 160                 bnx2x_vf_fill_fw_str(bp, buf, buf_len);
 161         }
 162 }
 163
 164 /**
 165  * bnx2x_shrink_eth_fp - guarantees fastpath structures stay intact
 166  *
 167  * @bp: driver handle
 168  * @delta:      number of eth queues which were not allocated
 169  */
 170 static void bnx2x_shrink_eth_fp(struct bnx2x *bp, int delta)
 171 {
 172         int i, cos, old_eth_num = BNX2X_NUM_ETH_QUEUES(bp);
 173
 174         /* Queue pointer cannot be re-set on an fp-basis, as moving pointer
 175          * backward along the array could cause memory to be overridden
 176          */
 177         for (cos = 1; cos < bp->max_cos; cos++) {
 178                 for (i = 0; i < old_eth_num - delta; i++) {
 179                         struct bnx2x_fastpath *fp = &bp->fp[i];
 180                         int new_idx = cos * (old_eth_num - delta) + i;
 181
 182                         memcpy(&bp->bnx2x_txq[new_idx], fp->txdata_ptr[cos],
 183                                sizeof(struct bnx2x_fp_txdata));
 184                         fp->txdata_ptr[cos] = &bp->bnx2x_txq[new_idx];
 185                 }
 186         }
 187 }
 188
 189 int bnx2x_load_count[2][3] = { {0} }; /* per-path: 0-common, 1-port0, 2-port1 */
 190
 191 /* free skb in the packet ring at pos idx
 192  * return idx of last bd freed
 193  */
 194 static u16 bnx2x_free_tx_pkt(struct bnx2x *bp, struct bnx2x_fp_txdata *txdata,
 195                              u16 idx, unsigned int *pkts_compl,
 196                              unsigned int *bytes_compl)
 197 {
 198         struct sw_tx_bd *tx_buf = &txdata->tx_buf_ring[idx];
 199         struct eth_tx_start_bd *tx_start_bd;
 200         struct eth_tx_bd *tx_data_bd;
 201         struct sk_buff *skb = tx_buf->skb;
 202         u16 bd_idx = TX_BD(tx_buf->first_bd), new_cons;
 203         int nbd;
 204         u16 split_bd_len = 0;
 205
 206         /* prefetch skb end pointer to speedup dev_kfree_skb() */
 207         prefetch(&skb->end);
 208
 209         DP(NETIF_MSG_TX_DONE, "fp[%d]: pkt_idx %d  buff @(%p)->skb %p\n",
 210            txdata->txq_index, idx, tx_buf, skb);
 211
 212         tx_start_bd = &txdata->tx_desc_ring[bd_idx].start_bd;
 213
 214         nbd = le16_to_cpu(tx_start_bd->nbd) - 1;
 215 #ifdef BNX2X_STOP_ON_ERROR
 216         if ((nbd - 1) > (MAX_SKB_FRAGS + 2)) {
 217                 BNX2X_ERR("BAD nbd!\n");
 218                 bnx2x_panic();
 219         }
 220 #endif
 221         new_cons = nbd + tx_buf->first_bd;
 222
 223         /* Get the next bd */
 224         bd_idx = TX_BD(NEXT_TX_IDX(bd_idx));
 225
 226         /* Skip a parse bd... */
 227         --nbd;
 228         bd_idx = TX_BD(NEXT_TX_IDX(bd_idx));
 229
 230         if (tx_buf->flags & BNX2X_HAS_SECOND_PBD) {
 231                 /* Skip second parse bd... */
 232                 --nbd;
 233                 bd_idx = TX_BD(NEXT_TX_IDX(bd_idx));
 234         }
 235
 236         /* TSO headers+data bds share a common mapping. See bnx2x_tx_split() */
 237         if (tx_buf->flags & BNX2X_TSO_SPLIT_BD) {
 238                 tx_data_bd = &txdata->tx_desc_ring[bd_idx].reg_bd;
 239                 split_bd_len = BD_UNMAP_LEN(tx_data_bd);
 240                 --nbd;
 241                 bd_idx = TX_BD(NEXT_TX_IDX(bd_idx));
 242         }
 243
 244         /* unmap first bd */
 245         dma_unmap_single(&bp->pdev->dev, BD_UNMAP_ADDR(tx_start_bd),
 246                          BD_UNMAP_LEN(tx_start_bd) + split_bd_len,
 247                          DMA_TO_DEVICE);
 248
 249         /* now free frags */
 250         while (nbd > 0) {
 251
 252                 tx_data_bd = &txdata->tx_desc_ring[bd_idx].reg_bd;
 253                 dma_unmap_page(&bp->pdev->dev, BD_UNMAP_ADDR(tx_data_bd),
 254                                BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
 255                 if (--nbd)
 256                         bd_idx = TX_BD(NEXT_TX_IDX(bd_idx));
 257         }
 258
 259         /* release skb */
 260         WARN_ON(!skb);
 261         if (likely(skb)) {
 262                 (*pkts_compl)++;
 263                 (*bytes_compl) += skb->len;
 264                 dev_kfree_skb_any(skb);
 265         }
 266
 267         tx_buf->first_bd = 0;
 268         tx_buf->skb = NULL;
 269
 270         return new_cons;
 271 }
 272
 273 int bnx2x_tx_int(struct bnx2x *bp, struct bnx2x_fp_txdata *txdata)
 274 {
 275         struct netdev_queue *txq;
 276         u16 hw_cons, sw_cons, bd_cons = txdata->tx_bd_cons;
 277         unsigned int pkts_compl = 0, bytes_compl = 0;
 278
 279 #ifdef BNX2X_STOP_ON_ERROR
 280         if (unlikely(bp->panic))
 281                 return -1;
 282 #endif
 283
 284         txq = netdev_get_tx_queue(bp->dev, txdata->txq_index);
 285         hw_cons = le16_to_cpu(*txdata->tx_cons_sb);
 286         sw_cons = txdata->tx_pkt_cons;
 287
 288         while (sw_cons != hw_cons) {
 289                 u16 pkt_cons;
 290
 291                 pkt_cons = TX_BD(sw_cons);
 292
 293                 DP(NETIF_MSG_TX_DONE,
 294                    "queue[%d]: hw_cons %u  sw_cons %u  pkt_cons %u\n",
 295                    txdata->txq_index, hw_cons, sw_cons, pkt_cons);
 296
 297                 bd_cons = bnx2x_free_tx_pkt(bp, txdata, pkt_cons,
 298                                             &pkts_compl, &bytes_compl);
 299
 300                 sw_cons++;
 301         }
 302
 303         netdev_tx_completed_queue(txq, pkts_compl, bytes_compl);
 304
 305         txdata->tx_pkt_cons = sw_cons;
 306         txdata->tx_bd_cons = bd_cons;
 307
 308         /* Need to make the tx_bd_cons update visible to start_xmit()
 309          * before checking for netif_tx_queue_stopped().  Without the
 310          * memory barrier, there is a small possibility that
 311          * start_xmit() will miss it and cause the queue to be stopped
 312          * forever.
 313          * On the other hand we need an rmb() here to ensure the proper
 314          * ordering of bit testing in the following
 315          * netif_tx_queue_stopped(txq) call.
 316          */
 317         smp_mb();
 318
 319         if (unlikely(netif_tx_queue_stopped(txq))) {
 320                 /* Taking tx_lock() is needed to prevent re-enabling the queue
 321                  * while it's empty. This could have happen if rx_action() gets
 322                  * suspended in bnx2x_tx_int() after the condition before
 323                  * netif_tx_wake_queue(), while tx_action (bnx2x_start_xmit()):
 324                  *
 325                  * stops the queue->sees fresh tx_bd_cons->releases the queue->
 326                  * sends some packets consuming the whole queue again->
 327                  * stops the queue
 328                  */
 329
 330                 __netif_tx_lock(txq, smp_processor_id());
 331
 332                 if ((netif_tx_queue_stopped(txq)) &&
 333                     (bp->state == BNX2X_STATE_OPEN) &&
 334                     (bnx2x_tx_avail(bp, txdata) >= MAX_DESC_PER_TX_PKT))
 335                         netif_tx_wake_queue(txq);
 336
 337                 __netif_tx_unlock(txq);
 338         }
 339         return 0;
 340 }
 341
 342 static inline void bnx2x_update_last_max_sge(struct bnx2x_fastpath *fp,
 343                                              u16 idx)
 344 {
 345         u16 last_max = fp->last_max_sge;
 346
 347         if (SUB_S16(idx, last_max) > 0)
 348                 fp->last_max_sge = idx;
 349 }
 350
 351 static inline void bnx2x_update_sge_prod(struct bnx2x_fastpath *fp,
 352                                          u16 sge_len,
 353                                          struct eth_end_agg_rx_cqe *cqe)
 354 {
 355         struct bnx2x *bp = fp->bp;
 356         u16 last_max, last_elem, first_elem;
 357         u16 delta = 0;
 358         u16 i;
 359
 360         if (!sge_len)
 361                 return;
 362
 363         /* First mark all used pages */
 364         for (i = 0; i < sge_len; i++)
 365                 BIT_VEC64_CLEAR_BIT(fp->sge_mask,
 366                         RX_SGE(le16_to_cpu(cqe->sgl_or_raw_data.sgl[i])));
 367
 368         DP(NETIF_MSG_RX_STATUS, "fp_cqe->sgl[%d] = %d\n",
 369            sge_len - 1, le16_to_cpu(cqe->sgl_or_raw_data.sgl[sge_len - 1]));
 370
 371         /* Here we assume that the last SGE index is the biggest */
 372         prefetch((void *)(fp->sge_mask));
 373         bnx2x_update_last_max_sge(fp,
 374                 le16_to_cpu(cqe->sgl_or_raw_data.sgl[sge_len - 1]));
 375
 376         last_max = RX_SGE(fp->last_max_sge);
 377         last_elem = last_max >> BIT_VEC64_ELEM_SHIFT;
 378         first_elem = RX_SGE(fp->rx_sge_prod) >> BIT_VEC64_ELEM_SHIFT;
 379
 380         /* If ring is not full */
 381         if (last_elem + 1 != first_elem)
 382                 last_elem++;
 383
 384         /* Now update the prod */
 385         for (i = first_elem; i != last_elem; i = NEXT_SGE_MASK_ELEM(i)) {
 386                 if (likely(fp->sge_mask[i]))
 387                         break;
 388
 389                 fp->sge_mask[i] = BIT_VEC64_ELEM_ONE_MASK;
 390                 delta += BIT_VEC64_ELEM_SZ;
 391         }
 392
 393         if (delta > 0) {
 394                 fp->rx_sge_prod += delta;
 395                 /* clear page-end entries */
 396                 bnx2x_clear_sge_mask_next_elems(fp);
 397         }
 398
 399         DP(NETIF_MSG_RX_STATUS,
 400            "fp->last_max_sge = %d  fp->rx_sge_prod = %d\n",
 401            fp->last_max_sge, fp->rx_sge_prod);
 402 }
 403
 404 /* Get Toeplitz hash value in the skb using the value from the
 405  * CQE (calculated by HW).
 406  */
 407 static u32 bnx2x_get_rxhash(const struct bnx2x *bp,
 408                             const struct eth_fast_path_rx_cqe *cqe,
 409                             enum pkt_hash_types *rxhash_type)
 410 {
 411         /* Get Toeplitz hash from CQE */
 412         if ((bp->dev->features & NETIF_F_RXHASH) &&
 413             (cqe->status_flags & ETH_FAST_PATH_RX_CQE_RSS_HASH_FLG)) {
 414                 enum eth_rss_hash_type htype;
 415
 416                 htype = cqe->status_flags & ETH_FAST_PATH_RX_CQE_RSS_HASH_TYPE;
 417                 *rxhash_type = ((htype == TCP_IPV4_HASH_TYPE) ||
 418                                 (htype == TCP_IPV6_HASH_TYPE)) ?
 419                                PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3;
 420
 421                 return le32_to_cpu(cqe->rss_hash_result);
 422         }
 423         *rxhash_type = PKT_HASH_TYPE_NONE;
 424         return 0;
 425 }
 426
 427 static void bnx2x_tpa_start(struct bnx2x_fastpath *fp, u16 queue,
 428                             u16 cons, u16 prod,
 429                             struct eth_fast_path_rx_cqe *cqe)
 430 {
 431         struct bnx2x *bp = fp->bp;
 432         struct sw_rx_bd *cons_rx_buf = &fp->rx_buf_ring[cons];
 433         struct sw_rx_bd *prod_rx_buf = &fp->rx_buf_ring[prod];
 434         struct eth_rx_bd *prod_bd = &fp->rx_desc_ring[prod];
 435         dma_addr_t mapping;
 436         struct bnx2x_agg_info *tpa_info = &fp->tpa_info[queue];
 437         struct sw_rx_bd *first_buf = &tpa_info->first_buf;
 438
 439         /* print error if current state != stop */
 440         if (tpa_info->tpa_state != BNX2X_TPA_STOP)
 441                 BNX2X_ERR("start of bin not in stop [%d]\n", queue);
 442
 443         /* Try to map an empty data buffer from the aggregation info  */
 444         mapping = dma_map_single(&bp->pdev->dev,
 445                                  first_buf->data + NET_SKB_PAD,
 446                                  fp->rx_buf_size, DMA_FROM_DEVICE);
 447         /*
 448          *  ...if it fails - move the skb from the consumer to the producer
 449          *  and set the current aggregation state as ERROR to drop it
 450          *  when TPA_STOP arrives.
 451          */
 452
 453         if (unlikely(dma_mapping_error(&bp->pdev->dev, mapping))) {
 454                 /* Move the BD from the consumer to the producer */
 455                 bnx2x_reuse_rx_data(fp, cons, prod);
 456                 tpa_info->tpa_state = BNX2X_TPA_ERROR;
 457                 return;
 458         }
 459
 460         /* move empty data from pool to prod */
 461         prod_rx_buf->data = first_buf->data;
 462         dma_unmap_addr_set(prod_rx_buf, mapping, mapping);
 463         /* point prod_bd to new data */
 464         prod_bd->addr_hi = cpu_to_le32(U64_HI(mapping));
 465         prod_bd->addr_lo = cpu_to_le32(U64_LO(mapping));
 466
 467         /* move partial skb from cons to pool (don't unmap yet) */
 468         *first_buf = *cons_rx_buf;
 469
 470         /* mark bin state as START */
 471         tpa_info->parsing_flags =
 472                 le16_to_cpu(cqe->pars_flags.flags);
 473         tpa_info->vlan_tag = le16_to_cpu(cqe->vlan_tag);
 474         tpa_info->tpa_state = BNX2X_TPA_START;
 475         tpa_info->len_on_bd = le16_to_cpu(cqe->len_on_bd);
 476         tpa_info->placement_offset = cqe->placement_offset;
 477         tpa_info->rxhash = bnx2x_get_rxhash(bp, cqe, &tpa_info->rxhash_type);
 478         if (fp->mode == TPA_MODE_GRO) {
 479                 u16 gro_size = le16_to_cpu(cqe->pkt_len_or_gro_seg_len);
 480                 tpa_info->full_page = SGE_PAGES / gro_size * gro_size;
 481                 tpa_info->gro_size = gro_size;
 482         }
 483
 484 #ifdef BNX2X_STOP_ON_ERROR
 485         fp->tpa_queue_used |= (1 << queue);
 486         DP(NETIF_MSG_RX_STATUS, "fp->tpa_queue_used = 0x%llx\n",
 487            fp->tpa_queue_used);
 488 #endif
 489 }
 490
 491 /* Timestamp option length allowed for TPA aggregation:
 492  *
 493  *              nop nop kind length echo val
 494  */
 495 #define TPA_TSTAMP_OPT_LEN      12
 496 /**
 497  * bnx2x_set_gro_params - compute GRO values
 498  *
 499  * @skb:                packet skb
 500  * @parsing_flags:      parsing flags from the START CQE
 501  * @len_on_bd:          total length of the first packet for the
 502  *                      aggregation.
 503  * @pkt_len:            length of all segments
 504  *
 505  * Approximate value of the MSS for this aggregation calculated using
 506  * the first packet of it.
 507  * Compute number of aggregated segments, and gso_type.
 508  */
 509 static void bnx2x_set_gro_params(struct sk_buff *skb, u16 parsing_flags,
 510                                  u16 len_on_bd, unsigned int pkt_len,
 511                                  u16 num_of_coalesced_segs)
 512 {
 513         /* TPA aggregation won't have either IP options or TCP options
 514          * other than timestamp or IPv6 extension headers.
 515          */
 516         u16 hdrs_len = ETH_HLEN + sizeof(struct tcphdr);
 517
 518         if (GET_FLAG(parsing_flags, PARSING_FLAGS_OVER_ETHERNET_PROTOCOL) ==
 519             PRS_FLAG_OVERETH_IPV6) {
 520                 hdrs_len += sizeof(struct ipv6hdr);
 521                 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV6;
 522         } else {
 523                 hdrs_len += sizeof(struct iphdr);
 524                 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
 525         }
 526
 527         /* Check if there was a TCP timestamp, if there is it's will
 528          * always be 12 bytes length: nop nop kind length echo val.
 529          *
 530          * Otherwise FW would close the aggregation.
 531          */
 532         if (parsing_flags & PARSING_FLAGS_TIME_STAMP_EXIST_FLAG)
 533                 hdrs_len += TPA_TSTAMP_OPT_LEN;
 534
 535         skb_shinfo(skb)->gso_size = len_on_bd - hdrs_len;
 536
 537         /* tcp_gro_complete() will copy NAPI_GRO_CB(skb)->count
 538          * to skb_shinfo(skb)->gso_segs
 539          */
 540         NAPI_GRO_CB(skb)->count = num_of_coalesced_segs;
 541 }
 542
 543 static int bnx2x_alloc_rx_sge(struct bnx2x *bp, struct bnx2x_fastpath *fp,
 544                               u16 index, gfp_t gfp_mask)
 545 {
 546         struct sw_rx_page *sw_buf = &fp->rx_page_ring[index];
 547         struct eth_rx_sge *sge = &fp->rx_sge_ring[index];
 548         struct bnx2x_alloc_pool *pool = &fp->page_pool;
 549         dma_addr_t mapping;
 550
 551         if (!pool->page) {
 552                 pool->page = alloc_pages(gfp_mask, PAGES_PER_SGE_SHIFT);
 553                 if (unlikely(!pool->page))
 554                         return -ENOMEM;
 555
 556                 pool->offset = 0;
 557         }
 558
 559         mapping = dma_map_page(&bp->pdev->dev, pool->page,
 560                                pool->offset, SGE_PAGE_SIZE, DMA_FROM_DEVICE);
 561         if (unlikely(dma_mapping_error(&bp->pdev->dev, mapping))) {
 562                 BNX2X_ERR("Can't map sge\n");
 563                 return -ENOMEM;
 564         }
 565
 566         sw_buf->page = pool->page;
 567         sw_buf->offset = pool->offset;
 568
 569         dma_unmap_addr_set(sw_buf, mapping, mapping);
 570
 571         sge->addr_hi = cpu_to_le32(U64_HI(mapping));
 572         sge->addr_lo = cpu_to_le32(U64_LO(mapping));
 573
 574         pool->offset += SGE_PAGE_SIZE;
 575         if (PAGE_SIZE - pool->offset >= SGE_PAGE_SIZE)
 576                 get_page(pool->page);
 577         else
 578                 pool->page = NULL;
 579         return 0;
 580 }
 581
 582 static int bnx2x_fill_frag_skb(struct bnx2x *bp, struct bnx2x_fastpath *fp,
 583                                struct bnx2x_agg_info *tpa_info,
 584                                u16 pages,
 585                                struct sk_buff *skb,
 586                                struct eth_end_agg_rx_cqe *cqe,
 587                                u16 cqe_idx)
 588 {
 589         struct sw_rx_page *rx_pg, old_rx_pg;
 590         u32 i, frag_len, frag_size;
 591         int err, j, frag_id = 0;
 592         u16 len_on_bd = tpa_info->len_on_bd;
 593         u16 full_page = 0, gro_size = 0;
 594
 595         frag_size = le16_to_cpu(cqe->pkt_len) - len_on_bd;
 596
 597         if (fp->mode == TPA_MODE_GRO) {
 598                 gro_size = tpa_info->gro_size;
 599                 full_page = tpa_info->full_page;
 600         }
 601
 602         /* This is needed in order to enable forwarding support */
 603         if (frag_size)
 604                 bnx2x_set_gro_params(skb, tpa_info->parsing_flags, len_on_bd,
 605                                      le16_to_cpu(cqe->pkt_len),
 606                                      le16_to_cpu(cqe->num_of_coalesced_segs));
 607
 608 #ifdef BNX2X_STOP_ON_ERROR
 609         if (pages > min_t(u32, 8, MAX_SKB_FRAGS) * SGE_PAGES) {
 610                 BNX2X_ERR("SGL length is too long: %d. CQE index is %d\n",
 611                           pages, cqe_idx);
 612                 BNX2X_ERR("cqe->pkt_len = %d\n", cqe->pkt_len);
 613                 bnx2x_panic();
 614                 return -EINVAL;
 615         }
 616 #endif
 617
 618         /* Run through the SGL and compose the fragmented skb */
 619         for (i = 0, j = 0; i < pages; i += PAGES_PER_SGE, j++) {
 620                 u16 sge_idx = RX_SGE(le16_to_cpu(cqe->sgl_or_raw_data.sgl[j]));
 621
 622                 /* FW gives the indices of the SGE as if the ring is an array
 623                    (meaning that "next" element will consume 2 indices) */
 624                 if (fp->mode == TPA_MODE_GRO)
 625                         frag_len = min_t(u32, frag_size, (u32)full_page);
 626                 else /* LRO */
 627                         frag_len = min_t(u32, frag_size, (u32)SGE_PAGES);
 628
 629                 rx_pg = &fp->rx_page_ring[sge_idx];
 630                 old_rx_pg = *rx_pg;
 631
 632                 /* If we fail to allocate a substitute page, we simply stop
 633                    where we are and drop the whole packet */
 634                 err = bnx2x_alloc_rx_sge(bp, fp, sge_idx, GFP_ATOMIC);
 635                 if (unlikely(err)) {
 636                         bnx2x_fp_qstats(bp, fp)->rx_skb_alloc_failed++;
 637                         return err;
 638                 }
 639
 640                 dma_unmap_page(&bp->pdev->dev,
 641                                dma_unmap_addr(&old_rx_pg, mapping),
 642                                SGE_PAGE_SIZE, DMA_FROM_DEVICE);
 643                 /* Add one frag and update the appropriate fields in the skb */
 644                 if (fp->mode == TPA_MODE_LRO)
 645                         skb_fill_page_desc(skb, j, old_rx_pg.page,
 646                                            old_rx_pg.offset, frag_len);
 647                 else { /* GRO */
 648                         int rem;
 649                         int offset = 0;
 650                         for (rem = frag_len; rem > 0; rem -= gro_size) {
 651                                 int len = rem > gro_size ? gro_size : rem;
 652                                 skb_fill_page_desc(skb, frag_id++,
 653                                                    old_rx_pg.page,
 654                                                    old_rx_pg.offset + offset,
 655                                                    len);
 656                                 if (offset)
 657                                         get_page(old_rx_pg.page);
 658                                 offset += len;
 659                         }
 660                 }
 661
 662                 skb->data_len += frag_len;
 663                 skb->truesize += SGE_PAGES;
 664                 skb->len += frag_len;
 665
 666                 frag_size -= frag_len;
 667         }
 668
 669         return 0;
 670 }
 671
 672 static void bnx2x_frag_free(const struct bnx2x_fastpath *fp, void *data)
 673 {
 674         if (fp->rx_frag_size)
 675                 skb_free_frag(data);
 676         else
 677                 kfree(data);
 678 }
 679
 680 static void *bnx2x_frag_alloc(const struct bnx2x_fastpath *fp, gfp_t gfp_mask)
 681 {
 682         if (fp->rx_frag_size) {
 683                 /* GFP_KERNEL allocations are used only during initialization */
 684                 if (unlikely(gfpflags_allow_blocking(gfp_mask)))
 685                         return (void *)__get_free_page(gfp_mask);
 686
 687                 return netdev_alloc_frag(fp->rx_frag_size);
 688         }
 689
 690         return kmalloc(fp->rx_buf_size + NET_SKB_PAD, gfp_mask);
 691 }
 692
 693 #ifdef CONFIG_INET
 694 static void bnx2x_gro_ip_csum(struct bnx2x *bp, struct sk_buff *skb)
 695 {
 696         const struct iphdr *iph = ip_hdr(skb);
 697         struct tcphdr *th;
 698
 699         skb_set_transport_header(skb, sizeof(struct iphdr));
 700         th = tcp_hdr(skb);
 701
 702         th->check = ~tcp_v4_check(skb->len - skb_transport_offset(skb),
 703                                   iph->saddr, iph->daddr, 0);
 704 }
 705
 706 static void bnx2x_gro_ipv6_csum(struct bnx2x *bp, struct sk_buff *skb)
 707 {
 708         struct ipv6hdr *iph = ipv6_hdr(skb);
 709         struct tcphdr *th;
 710
 711         skb_set_transport_header(skb, sizeof(struct ipv6hdr));
 712         th = tcp_hdr(skb);
 713
 714         th->check = ~tcp_v6_check(skb->len - skb_transport_offset(skb),
 715                                   &iph->saddr, &iph->daddr, 0);
 716 }
 717
 718 static void bnx2x_gro_csum(struct bnx2x *bp, struct sk_buff *skb,
 719                             void (*gro_func)(struct bnx2x*, struct sk_buff*))
 720 {
 721         skb_reset_network_header(skb);
 722         gro_func(bp, skb);
 723         tcp_gro_complete(skb);
 724 }
 725 #endif
 726
 727 static void bnx2x_gro_receive(struct bnx2x *bp, struct bnx2x_fastpath *fp,
 728                                struct sk_buff *skb)
 729 {
 730 #ifdef CONFIG_INET
 731         if (skb_shinfo(skb)->gso_size) {
 732                 switch (be16_to_cpu(skb->protocol)) {
 733                 case ETH_P_IP:
 734                         bnx2x_gro_csum(bp, skb, bnx2x_gro_ip_csum);
 735                         break;
 736                 case ETH_P_IPV6:
 737                         bnx2x_gro_csum(bp, skb, bnx2x_gro_ipv6_csum);
 738                         break;
 739                 default:
 740                         netdev_WARN_ONCE(bp->dev,
 741                                          "Error: FW GRO supports only IPv4/IPv6, not 0x%04x\n",
 742                                          be16_to_cpu(skb->protocol));
 743                 }
 744         }
 745 #endif
 746         skb_record_rx_queue(skb, fp->rx_queue);
 747         napi_gro_receive(&fp->napi, skb);
 748 }
 749
 750 static void bnx2x_tpa_stop(struct bnx2x *bp, struct bnx2x_fastpath *fp,
 751                            struct bnx2x_agg_info *tpa_info,
 752                            u16 pages,
 753                            struct eth_end_agg_rx_cqe *cqe,
 754                            u16 cqe_idx)
 755 {
 756         struct sw_rx_bd *rx_buf = &tpa_info->first_buf;
 757         u8 pad = tpa_info->placement_offset;
 758         u16 len = tpa_info->len_on_bd;
 759         struct sk_buff *skb = NULL;
 760         u8 *new_data, *data = rx_buf->data;
 761         u8 old_tpa_state = tpa_info->tpa_state;
 762
 763         tpa_info->tpa_state = BNX2X_TPA_STOP;
 764
 765         /* If we there was an error during the handling of the TPA_START -
 766          * drop this aggregation.
 767          */
 768         if (old_tpa_state == BNX2X_TPA_ERROR)
 769                 goto drop;
 770
 771         /* Try to allocate the new data */
 772         new_data = bnx2x_frag_alloc(fp, GFP_ATOMIC);
 773         /* Unmap skb in the pool anyway, as we are going to change
 774            pool entry status to BNX2X_TPA_STOP even if new skb allocation
 775            fails. */
 776         dma_unmap_single(&bp->pdev->dev, dma_unmap_addr(rx_buf, mapping),
 777                          fp->rx_buf_size, DMA_FROM_DEVICE);
 778         if (likely(new_data))
 779                 skb = build_skb(data, fp->rx_frag_size);
 780
 781         if (likely(skb)) {
 782 #ifdef BNX2X_STOP_ON_ERROR
 783                 if (pad + len > fp->rx_buf_size) {
 784                         BNX2X_ERR("skb_put is about to fail...  pad %d  len %d  rx_buf_size %d\n",
 785                                   pad, len, fp->rx_buf_size);
 786                         bnx2x_panic();
 787                         return;
 788                 }
 789 #endif
 790
 791                 skb_reserve(skb, pad + NET_SKB_PAD);
 792                 skb_put(skb, len);
 793                 skb_set_hash(skb, tpa_info->rxhash, tpa_info->rxhash_type);
 794
 795                 skb->protocol = eth_type_trans(skb, bp->dev);
 796                 skb->ip_summed = CHECKSUM_UNNECESSARY;
 797
 798                 if (!bnx2x_fill_frag_skb(bp, fp, tpa_info, pages,
 799                                          skb, cqe, cqe_idx)) {
 800                         if (tpa_info->parsing_flags & PARSING_FLAGS_VLAN)
 801                                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), tpa_info->vlan_tag);
 802                         bnx2x_gro_receive(bp, fp, skb);
 803                 } else {
 804                         DP(NETIF_MSG_RX_STATUS,
 805                            "Failed to allocate new pages - dropping packet!\n");
 806                         dev_kfree_skb_any(skb);
 807                 }
 808
 809                 /* put new data in bin */
 810                 rx_buf->data = new_data;
 811
 812                 return;
 813         }
 814         if (new_data)
 815                 bnx2x_frag_free(fp, new_data);
 816 drop:
 817         /* drop the packet and keep the buffer in the bin */
 818         DP(NETIF_MSG_RX_STATUS,
 819            "Failed to allocate or map a new skb - dropping packet!\n");
 820         bnx2x_fp_stats(bp, fp)->eth_q_stats.rx_skb_alloc_failed++;
 821 }
 822
 823 static int bnx2x_alloc_rx_data(struct bnx2x *bp, struct bnx2x_fastpath *fp,
 824                                u16 index, gfp_t gfp_mask)
 825 {
 826         u8 *data;
 827         struct sw_rx_bd *rx_buf = &fp->rx_buf_ring[index];
 828         struct eth_rx_bd *rx_bd = &fp->rx_desc_ring[index];
 829         dma_addr_t mapping;
 830
 831         data = bnx2x_frag_alloc(fp, gfp_mask);
 832         if (unlikely(data == NULL))
 833                 return -ENOMEM;
 834
 835         mapping = dma_map_single(&bp->pdev->dev, data + NET_SKB_PAD,
 836                                  fp->rx_buf_size,
 837                                  DMA_FROM_DEVICE);
 838         if (unlikely(dma_mapping_error(&bp->pdev->dev, mapping))) {
 839                 bnx2x_frag_free(fp, data);
 840                 BNX2X_ERR("Can't map rx data\n");
 841                 return -ENOMEM;
 842         }
 843
 844         rx_buf->data = data;
 845         dma_unmap_addr_set(rx_buf, mapping, mapping);
 846
 847         rx_bd->addr_hi = cpu_to_le32(U64_HI(mapping));
 848         rx_bd->addr_lo = cpu_to_le32(U64_LO(mapping));
 849
 850         return 0;
 851 }
 852
 853 static
 854 void bnx2x_csum_validate(struct sk_buff *skb, union eth_rx_cqe *cqe,
 855                                  struct bnx2x_fastpath *fp,
 856                                  struct bnx2x_eth_q_stats *qstats)
 857 {
 858         /* Do nothing if no L4 csum validation was done.
 859          * We do not check whether IP csum was validated. For IPv4 we assume
 860          * that if the card got as far as validating the L4 csum, it also
 861          * validated the IP csum. IPv6 has no IP csum.
 862          */
 863         if (cqe->fast_path_cqe.status_flags &
 864             ETH_FAST_PATH_RX_CQE_L4_XSUM_NO_VALIDATION_FLG)
 865                 return;
 866
 867         /* If L4 validation was done, check if an error was found. */
 868
 869         if (cqe->fast_path_cqe.type_error_flags &
 870             (ETH_FAST_PATH_RX_CQE_IP_BAD_XSUM_FLG |
 871              ETH_FAST_PATH_RX_CQE_L4_BAD_XSUM_FLG))
 872                 qstats->hw_csum_err++;
 873         else
 874                 skb->ip_summed = CHECKSUM_UNNECESSARY;
 875 }
 876
 877 static int bnx2x_rx_int(struct bnx2x_fastpath *fp, int budget)
 878 {
 879         struct bnx2x *bp = fp->bp;
 880         u16 bd_cons, bd_prod, bd_prod_fw, comp_ring_cons;
 881         u16 sw_comp_cons, sw_comp_prod;
 882         int rx_pkt = 0;
 883         union eth_rx_cqe *cqe;
 884         struct eth_fast_path_rx_cqe *cqe_fp;
 885
 886 #ifdef BNX2X_STOP_ON_ERROR
 887         if (unlikely(bp->panic))
 888                 return 0;
 889 #endif
 890         if (budget <= 0)
 891                 return rx_pkt;
 892
 893         bd_cons = fp->rx_bd_cons;
 894         bd_prod = fp->rx_bd_prod;
 895         bd_prod_fw = bd_prod;
 896         sw_comp_cons = fp->rx_comp_cons;
 897         sw_comp_prod = fp->rx_comp_prod;
 898
 899         comp_ring_cons = RCQ_BD(sw_comp_cons);
 900         cqe = &fp->rx_comp_ring[comp_ring_cons];
 901         cqe_fp = &cqe->fast_path_cqe;
 902
 903         DP(NETIF_MSG_RX_STATUS,
 904            "queue[%d]: sw_comp_cons %u\n", fp->index, sw_comp_cons);
 905
 906         while (BNX2X_IS_CQE_COMPLETED(cqe_fp)) {
 907                 struct sw_rx_bd *rx_buf = NULL;
 908                 struct sk_buff *skb;
 909                 u8 cqe_fp_flags;
 910                 enum eth_rx_cqe_type cqe_fp_type;
 911                 u16 len, pad, queue;
 912                 u8 *data;
 913                 u32 rxhash;
 914                 enum pkt_hash_types rxhash_type;
 915
 916 #ifdef BNX2X_STOP_ON_ERROR
 917                 if (unlikely(bp->panic))
 918                         return 0;
 919 #endif
 920
 921                 bd_prod = RX_BD(bd_prod);
 922                 bd_cons = RX_BD(bd_cons);
 923
 924                 /* A rmb() is required to ensure that the CQE is not read
 925                  * before it is written by the adapter DMA.  PCI ordering
 926                  * rules will make sure the other fields are written before
 927                  * the marker at the end of struct eth_fast_path_rx_cqe
 928                  * but without rmb() a weakly ordered processor can process
 929                  * stale data.  Without the barrier TPA state-machine might
 930                  * enter inconsistent state and kernel stack might be
 931                  * provided with incorrect packet description - these lead
 932                  * to various kernel crashed.
 933                  */
 934                 rmb();
 935
 936                 cqe_fp_flags = cqe_fp->type_error_flags;
 937                 cqe_fp_type = cqe_fp_flags & ETH_FAST_PATH_RX_CQE_TYPE;
 938
 939                 DP(NETIF_MSG_RX_STATUS,
 940                    "CQE type %x  err %x  status %x  queue %x  vlan %x  len %u\n",
 941                    CQE_TYPE(cqe_fp_flags),
 942                    cqe_fp_flags, cqe_fp->status_flags,
 943                    le32_to_cpu(cqe_fp->rss_hash_result),
 944                    le16_to_cpu(cqe_fp->vlan_tag),
 945                    le16_to_cpu(cqe_fp->pkt_len_or_gro_seg_len));
 946
 947                 /* is this a slowpath msg? */
 948                 if (unlikely(CQE_TYPE_SLOW(cqe_fp_type))) {
 949                         bnx2x_sp_event(fp, cqe);
 950                         goto next_cqe;
 951                 }
 952
 953                 rx_buf = &fp->rx_buf_ring[bd_cons];
 954                 data = rx_buf->data;
 955
 956                 if (!CQE_TYPE_FAST(cqe_fp_type)) {
 957                         struct bnx2x_agg_info *tpa_info;
 958                         u16 frag_size, pages;
 959 #ifdef BNX2X_STOP_ON_ERROR
 960                         /* sanity check */
 961                         if (fp->mode == TPA_MODE_DISABLED &&
 962                             (CQE_TYPE_START(cqe_fp_type) ||
 963                              CQE_TYPE_STOP(cqe_fp_type)))
 964                                 BNX2X_ERR("START/STOP packet while TPA disabled, type %x\n",
 965                                           CQE_TYPE(cqe_fp_type));
 966 #endif
 967
 968                         if (CQE_TYPE_START(cqe_fp_type)) {
 969                                 u16 queue = cqe_fp->queue_index;
 970                                 DP(NETIF_MSG_RX_STATUS,
 971                                    "calling tpa_start on queue %d\n",
 972                                    queue);
 973
 974                                 bnx2x_tpa_start(fp, queue,
 975                                                 bd_cons, bd_prod,
 976                                                 cqe_fp);
 977
 978                                 goto next_rx;
 979                         }
 980                         queue = cqe->end_agg_cqe.queue_index;
 981                         tpa_info = &fp->tpa_info[queue];
 982                         DP(NETIF_MSG_RX_STATUS,
 983                            "calling tpa_stop on queue %d\n",
 984                            queue);
 985
 986                         frag_size = le16_to_cpu(cqe->end_agg_cqe.pkt_len) -
 987                                     tpa_info->len_on_bd;
 988
 989                         if (fp->mode == TPA_MODE_GRO)
 990                                 pages = (frag_size + tpa_info->full_page - 1) /
 991                                          tpa_info->full_page;
 992                         else
 993                                 pages = SGE_PAGE_ALIGN(frag_size) >>
 994                                         SGE_PAGE_SHIFT;
 995
 996                         bnx2x_tpa_stop(bp, fp, tpa_info, pages,
 997                                        &cqe->end_agg_cqe, comp_ring_cons);
 998 #ifdef BNX2X_STOP_ON_ERROR
 999                         if (bp->panic)
1000                                 return 0;
1001 #endif
1002
1003                         bnx2x_update_sge_prod(fp, pages, &cqe->end_agg_cqe);
1004                         goto next_cqe;
1005                 }
1006                 /* non TPA */
1007                 len = le16_to_cpu(cqe_fp->pkt_len_or_gro_seg_len);
1008                 pad = cqe_fp->placement_offset;
1009                 dma_sync_single_for_cpu(&bp->pdev->dev,
1010                                         dma_unmap_addr(rx_buf, mapping),
1011                                         pad + RX_COPY_THRESH,
1012                                         DMA_FROM_DEVICE);
1013                 pad += NET_SKB_PAD;
1014                 prefetch(data + pad); /* speedup eth_type_trans() */
1015                 /* is this an error packet? */
1016                 if (unlikely(cqe_fp_flags & ETH_RX_ERROR_FALGS)) {
1017                         DP(NETIF_MSG_RX_ERR | NETIF_MSG_RX_STATUS,
1018                            "ERROR  flags %x  rx packet %u\n",
1019                            cqe_fp_flags, sw_comp_cons);
1020                         bnx2x_fp_qstats(bp, fp)->rx_err_discard_pkt++;
1021                         goto reuse_rx;
1022                 }
1023
1024                 /* Since we don't have a jumbo ring
1025                  * copy small packets if mtu > 1500
1026                  */
1027                 if ((bp->dev->mtu > ETH_MAX_PACKET_SIZE) &&
1028                     (len <= RX_COPY_THRESH)) {
1029                         skb = napi_alloc_skb(&fp->napi, len);
1030                         if (skb == NULL) {
1031                                 DP(NETIF_MSG_RX_ERR | NETIF_MSG_RX_STATUS,
1032                                    "ERROR  packet dropped because of alloc failure\n");
1033                                 bnx2x_fp_qstats(bp, fp)->rx_skb_alloc_failed++;
1034                                 goto reuse_rx;
1035                         }
1036                         memcpy(skb->data, data + pad, len);
1037                         bnx2x_reuse_rx_data(fp, bd_cons, bd_prod);
1038                 } else {
1039                         if (likely(bnx2x_alloc_rx_data(bp, fp, bd_prod,
1040                                                        GFP_ATOMIC) == 0)) {
1041                                 dma_unmap_single(&bp->pdev->dev,
1042                                                  dma_unmap_addr(rx_buf, mapping),
1043                                                  fp->rx_buf_size,
1044                                                  DMA_FROM_DEVICE);
1045                                 skb = build_skb(data, fp->rx_frag_size);
1046                                 if (unlikely(!skb)) {
1047                                         bnx2x_frag_free(fp, data);
1048                                         bnx2x_fp_qstats(bp, fp)->
1049                                                         rx_skb_alloc_failed++;
1050                                         goto next_rx;
1051                                 }
1052                                 skb_reserve(skb, pad);
1053                         } else {
1054                                 DP(NETIF_MSG_RX_ERR | NETIF_MSG_RX_STATUS,
1055                                    "ERROR  packet dropped because of alloc failure\n");
1056                                 bnx2x_fp_qstats(bp, fp)->rx_skb_alloc_failed++;
1057 reuse_rx:
1058                                 bnx2x_reuse_rx_data(fp, bd_cons, bd_prod);
1059                                 goto next_rx;
1060                         }
1061                 }
1062
1063                 skb_put(skb, len);
1064                 skb->protocol = eth_type_trans(skb, bp->dev);
1065
1066                 /* Set Toeplitz hash for a none-LRO skb */
1067                 rxhash = bnx2x_get_rxhash(bp, cqe_fp, &rxhash_type);
1068                 skb_set_hash(skb, rxhash, rxhash_type);
1069
1070                 skb_checksum_none_assert(skb);
1071
1072                 if (bp->dev->features & NETIF_F_RXCSUM)
1073                         bnx2x_csum_validate(skb, cqe, fp,
1074                                             bnx2x_fp_qstats(bp, fp));
1075
1076                 skb_record_rx_queue(skb, fp->rx_queue);
1077
1078                 /* Check if this packet was timestamped */
1079                 if (unlikely(cqe->fast_path_cqe.type_error_flags &
1080                              (1 << ETH_FAST_PATH_RX_CQE_PTP_PKT_SHIFT)))
1081                         bnx2x_set_rx_ts(bp, skb);
1082
1083                 if (le16_to_cpu(cqe_fp->pars_flags.flags) &
1084                     PARSING_FLAGS_VLAN)
1085                         __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
1086                                                le16_to_cpu(cqe_fp->vlan_tag));
1087
1088                 napi_gro_receive(&fp->napi, skb);
1089 next_rx:
1090                 rx_buf->data = NULL;
1091
1092                 bd_cons = NEXT_RX_IDX(bd_cons);
1093                 bd_prod = NEXT_RX_IDX(bd_prod);
1094                 bd_prod_fw = NEXT_RX_IDX(bd_prod_fw);
1095                 rx_pkt++;
1096 next_cqe:
1097                 sw_comp_prod = NEXT_RCQ_IDX(sw_comp_prod);
1098                 sw_comp_cons = NEXT_RCQ_IDX(sw_comp_cons);
1099
1100                 /* mark CQE as free */
1101                 BNX2X_SEED_CQE(cqe_fp);
1102
1103                 if (rx_pkt == budget)
1104                         break;
1105
1106                 comp_ring_cons = RCQ_BD(sw_comp_cons);
1107                 cqe = &fp->rx_comp_ring[comp_ring_cons];
1108                 cqe_fp = &cqe->fast_path_cqe;
1109         } /* while */
1110
1111         fp->rx_bd_cons = bd_cons;
1112         fp->rx_bd_prod = bd_prod_fw;
1113         fp->rx_comp_cons = sw_comp_cons;
1114         fp->rx_comp_prod = sw_comp_prod;
1115
1116         /* Update producers */
1117         bnx2x_update_rx_prod(bp, fp, bd_prod_fw, sw_comp_prod,
1118                              fp->rx_sge_prod);
1119
1120         return rx_pkt;
1121 }
1122
1123 static irqreturn_t bnx2x_msix_fp_int(int irq, void *fp_cookie)
1124 {
1125         struct bnx2x_fastpath *fp = fp_cookie;
1126         struct bnx2x *bp = fp->bp;
1127         u8 cos;
1128
1129         DP(NETIF_MSG_INTR,
1130            "got an MSI-X interrupt on IDX:SB [fp %d fw_sd %d igusb %d]\n",
1131            fp->index, fp->fw_sb_id, fp->igu_sb_id);
1132
1133         bnx2x_ack_sb(bp, fp->igu_sb_id, USTORM_ID, 0, IGU_INT_DISABLE, 0);
1134
1135 #ifdef BNX2X_STOP_ON_ERROR
1136         if (unlikely(bp->panic))
1137                 return IRQ_HANDLED;
1138 #endif
1139
1140         /* Handle Rx and Tx according to MSI-X vector */
1141         for_each_cos_in_tx_queue(fp, cos)
1142                 prefetch(fp->txdata_ptr[cos]->tx_cons_sb);
1143
1144         prefetch(&fp->sb_running_index[SM_RX_ID]);
1145         napi_schedule_irqoff(&bnx2x_fp(bp, fp->index, napi));
1146
1147         return IRQ_HANDLED;
1148 }
1149
1150 /* HW Lock for shared dual port PHYs */
1151 void bnx2x_acquire_phy_lock(struct bnx2x *bp)
1152 {
1153         mutex_lock(&bp->port.phy_mutex);
1154
1155         bnx2x_acquire_hw_lock(bp, HW_LOCK_RESOURCE_MDIO);
1156 }
1157
1158 void bnx2x_release_phy_lock(struct bnx2x *bp)
1159 {
1160         bnx2x_release_hw_lock(bp, HW_LOCK_RESOURCE_MDIO);
1161
1162         mutex_unlock(&bp->port.phy_mutex);
1163 }
1164
1165 /* calculates MF speed according to current linespeed and MF configuration */
1166 u16 bnx2x_get_mf_speed(struct bnx2x *bp)
1167 {
1168         u16 line_speed = bp->link_vars.line_speed;
1169         if (IS_MF(bp)) {
1170                 u16 maxCfg = bnx2x_extract_max_cfg(bp,
1171                                                    bp->mf_config[BP_VN(bp)]);
1172
1173                 /* Calculate the current MAX line speed limit for the MF
1174                  * devices
1175                  */
1176                 if (IS_MF_PERCENT_BW(bp))
1177                         line_speed = (line_speed * maxCfg) / 100;
1178                 else { /* SD mode */
1179                         u16 vn_max_rate = maxCfg * 100;
1180
1181                         if (vn_max_rate < line_speed)
1182                                 line_speed = vn_max_rate;
1183                 }
1184         }
1185
1186         return line_speed;
1187 }
1188
1189 /**
1190  * bnx2x_fill_report_data - fill link report data to report
1191  *
1192  * @bp:         driver handle
1193  * @data:       link state to update
1194  *
1195  * It uses a none-atomic bit operations because is called under the mutex.
1196  */
1197 static void bnx2x_fill_report_data(struct bnx2x *bp,
1198                                    struct bnx2x_link_report_data *data)
1199 {
1200         memset(data, 0, sizeof(*data));
1201
1202         if (IS_PF(bp)) {
1203                 /* Fill the report data: effective line speed */
1204                 data->line_speed = bnx2x_get_mf_speed(bp);
1205
1206                 /* Link is down */
1207                 if (!bp->link_vars.link_up || (bp->flags & MF_FUNC_DIS))
1208                         __set_bit(BNX2X_LINK_REPORT_LINK_DOWN,
1209                                   &data->link_report_flags);
1210
1211                 if (!BNX2X_NUM_ETH_QUEUES(bp))
1212                         __set_bit(BNX2X_LINK_REPORT_LINK_DOWN,
1213                                   &data->link_report_flags);
1214
1215                 /* Full DUPLEX */
1216                 if (bp->link_vars.duplex == DUPLEX_FULL)
1217                         __set_bit(BNX2X_LINK_REPORT_FD,
1218                                   &data->link_report_flags);
1219
1220                 /* Rx Flow Control is ON */
1221                 if (bp->link_vars.flow_ctrl & BNX2X_FLOW_CTRL_RX)
1222                         __set_bit(BNX2X_LINK_REPORT_RX_FC_ON,
1223                                   &data->link_report_flags);
1224
1225                 /* Tx Flow Control is ON */
1226                 if (bp->link_vars.flow_ctrl & BNX2X_FLOW_CTRL_TX)
1227                         __set_bit(BNX2X_LINK_REPORT_TX_FC_ON,
1228                                   &data->link_report_flags);
1229         } else { /* VF */
1230                 *data = bp->vf_link_vars;
1231         }
1232 }
1233
1234 /**
1235  * bnx2x_link_report - report link status to OS.
1236  *
1237  * @bp:         driver handle
1238  *
1239  * Calls the __bnx2x_link_report() under the same locking scheme
1240  * as a link/PHY state managing code to ensure a consistent link
1241  * reporting.
1242  */
1243
1244 void bnx2x_link_report(struct bnx2x *bp)
1245 {
1246         bnx2x_acquire_phy_lock(bp);
1247         __bnx2x_link_report(bp);
1248         bnx2x_release_phy_lock(bp);
1249 }
1250
1251 /**
1252  * __bnx2x_link_report - report link status to OS.
1253  *
1254  * @bp:         driver handle
1255  *
1256  * None atomic implementation.
1257  * Should be called under the phy_lock.
1258  */
1259 void __bnx2x_link_report(struct bnx2x *bp)
1260 {
1261         struct bnx2x_link_report_data cur_data;
1262
1263         if (bp->force_link_down) {
1264                 bp->link_vars.link_up = 0;
1265                 return;
1266         }
1267
1268         /* reread mf_cfg */
1269         if (IS_PF(bp) && !CHIP_IS_E1(bp))
1270                 bnx2x_read_mf_cfg(bp);
1271
1272         /* Read the current link report info */
1273         bnx2x_fill_report_data(bp, &cur_data);
1274
1275         /* Don't report link down or exactly the same link status twice */
1276         if (!memcmp(&cur_data, &bp->last_reported_link, sizeof(cur_data)) ||
1277             (test_bit(BNX2X_LINK_REPORT_LINK_DOWN,
1278                       &bp->last_reported_link.link_report_flags) &&
1279              test_bit(BNX2X_LINK_REPORT_LINK_DOWN,
1280                       &cur_data.link_report_flags)))
1281                 return;
1282
1283         bp->link_cnt++;
1284
1285         /* We are going to report a new link parameters now -
1286          * remember the current data for the next time.
1287          */
1288         memcpy(&bp->last_reported_link, &cur_data, sizeof(cur_data));
1289
1290         /* propagate status to VFs */
1291         if (IS_PF(bp))
1292                 bnx2x_iov_link_update(bp);
1293
1294         if (test_bit(BNX2X_LINK_REPORT_LINK_DOWN,
1295                      &cur_data.link_report_flags)) {
1296                 netif_carrier_off(bp->dev);
1297                 netdev_err(bp->dev, "NIC Link is Down\n");
1298                 return;
1299         } else {
1300                 const char *duplex;
1301                 const char *flow;
1302
1303                 netif_carrier_on(bp->dev);
1304
1305                 if (test_and_clear_bit(BNX2X_LINK_REPORT_FD,
1306                                        &cur_data.link_report_flags))
1307                         duplex = "full";
1308                 else
1309                         duplex = "half";
1310
1311                 /* Handle the FC at the end so that only these flags would be
1312                  * possibly set. This way we may easily check if there is no FC
1313                  * enabled.
1314                  */
1315                 if (cur_data.link_report_flags) {
1316                         if (test_bit(BNX2X_LINK_REPORT_RX_FC_ON,
1317                                      &cur_data.link_report_flags)) {
1318                                 if (test_bit(BNX2X_LINK_REPORT_TX_FC_ON,
1319                                      &cur_data.link_report_flags))
1320                                         flow = "ON - receive & transmit";
1321                                 else
1322                                         flow = "ON - receive";
1323                         } else {
1324                                 flow = "ON - transmit";
1325                         }
1326                 } else {
1327                         flow = "none";
1328                 }
1329                 netdev_info(bp->dev, "NIC Link is Up, %d Mbps %s duplex, Flow control: %s\n",
1330                             cur_data.line_speed, duplex, flow);
1331         }
1332 }
1333
1334 static void bnx2x_set_next_page_sgl(struct bnx2x_fastpath *fp)
1335 {
1336         int i;
1337
1338         for (i = 1; i <= NUM_RX_SGE_PAGES; i++) {
1339                 struct eth_rx_sge *sge;
1340
1341                 sge = &fp->rx_sge_ring[RX_SGE_CNT * i - 2];
1342                 sge->addr_hi =
1343                         cpu_to_le32(U64_HI(fp->rx_sge_mapping +
1344                         BCM_PAGE_SIZE*(i % NUM_RX_SGE_PAGES)));
1345
1346                 sge->addr_lo =
1347                         cpu_to_le32(U64_LO(fp->rx_sge_mapping +
1348                         BCM_PAGE_SIZE*(i % NUM_RX_SGE_PAGES)));
1349         }
1350 }
1351
1352 static void bnx2x_free_tpa_pool(struct bnx2x *bp,
1353                                 struct bnx2x_fastpath *fp, int last)
1354 {
1355         int i;
1356
1357         for (i = 0; i < last; i++) {
1358                 struct bnx2x_agg_info *tpa_info = &fp->tpa_info[i];
1359                 struct sw_rx_bd *first_buf = &tpa_info->first_buf;
1360                 u8 *data = first_buf->data;
1361
1362                 if (data == NULL) {
1363                         DP(NETIF_MSG_IFDOWN, "tpa bin %d empty on free\n", i);
1364                         continue;
1365                 }
1366                 if (tpa_info->tpa_state == BNX2X_TPA_START)
1367                         dma_unmap_single(&bp->pdev->dev,
1368                                          dma_unmap_addr(first_buf, mapping),
1369                                          fp->rx_buf_size, DMA_FROM_DEVICE);
1370                 bnx2x_frag_free(fp, data);
1371                 first_buf->data = NULL;
1372         }
1373 }
1374
1375 void bnx2x_init_rx_rings_cnic(struct bnx2x *bp)
1376 {
1377         int j;
1378
1379         for_each_rx_queue_cnic(bp, j) {
1380                 struct bnx2x_fastpath *fp = &bp->fp[j];
1381
1382                 fp->rx_bd_cons = 0;
1383
1384                 /* Activate BD ring */
1385                 /* Warning!
1386                  * this will generate an interrupt (to the TSTORM)
1387                  * must only be done after chip is initialized
1388                  */
1389                 bnx2x_update_rx_prod(bp, fp, fp->rx_bd_prod, fp->rx_comp_prod,
1390                                      fp->rx_sge_prod);
1391         }
1392 }
1393
1394 void bnx2x_init_rx_rings(struct bnx2x *bp)
1395 {
1396         int func = BP_FUNC(bp);
1397         u16 ring_prod;
1398         int i, j;
1399
1400         /* Allocate TPA resources */
1401         for_each_eth_queue(bp, j) {
1402                 struct bnx2x_fastpath *fp = &bp->fp[j];
1403
1404                 DP(NETIF_MSG_IFUP,
1405                    "mtu %d  rx_buf_size %d\n", bp->dev->mtu, fp->rx_buf_size);
1406
1407                 if (fp->mode != TPA_MODE_DISABLED) {
1408                         /* Fill the per-aggregation pool */
1409                         for (i = 0; i < MAX_AGG_QS(bp); i++) {
1410                                 struct bnx2x_agg_info *tpa_info =
1411                                         &fp->tpa_info[i];
1412                                 struct sw_rx_bd *first_buf =
1413                                         &tpa_info->first_buf;
1414
1415                                 first_buf->data =
1416                                         bnx2x_frag_alloc(fp, GFP_KERNEL);
1417                                 if (!first_buf->data) {
1418                                         BNX2X_ERR("Failed to allocate TPA skb pool for queue[%d] - disabling TPA on this queue!\n",
1419                                                   j);
1420                                         bnx2x_free_tpa_pool(bp, fp, i);
1421                                         fp->mode = TPA_MODE_DISABLED;
1422                                         break;
1423                                 }
1424                                 dma_unmap_addr_set(first_buf, mapping, 0);
1425                                 tpa_info->tpa_state = BNX2X_TPA_STOP;
1426                         }
1427
1428                         /* "next page" elements initialization */
1429                         bnx2x_set_next_page_sgl(fp);
1430
1431                         /* set SGEs bit mask */
1432                         bnx2x_init_sge_ring_bit_mask(fp);
1433
1434                         /* Allocate SGEs and initialize the ring elements */
1435                         for (i = 0, ring_prod = 0;
1436                              i < MAX_RX_SGE_CNT*NUM_RX_SGE_PAGES; i++) {
1437
1438                                 if (bnx2x_alloc_rx_sge(bp, fp, ring_prod,
1439                                                        GFP_KERNEL) < 0) {
1440                                         BNX2X_ERR("was only able to allocate %d rx sges\n",
1441                                                   i);
1442                                         BNX2X_ERR("disabling TPA for queue[%d]\n",
1443                                                   j);
1444                                         /* Cleanup already allocated elements */
1445                                         bnx2x_free_rx_sge_range(bp, fp,
1446                                                                 ring_prod);
1447                                         bnx2x_free_tpa_pool(bp, fp,
1448                                                             MAX_AGG_QS(bp));
1449                                         fp->mode = TPA_MODE_DISABLED;
1450                                         ring_prod = 0;
1451                                         break;
1452                                 }
1453                                 ring_prod = NEXT_SGE_IDX(ring_prod);
1454                         }
1455
1456                         fp->rx_sge_prod = ring_prod;
1457                 }
1458         }
1459
1460         for_each_eth_queue(bp, j) {
1461                 struct bnx2x_fastpath *fp = &bp->fp[j];
1462
1463                 fp->rx_bd_cons = 0;
1464
1465                 /* Activate BD ring */
1466                 /* Warning!
1467                  * this will generate an interrupt (to the TSTORM)
1468                  * must only be done after chip is initialized
1469                  */
1470                 bnx2x_update_rx_prod(bp, fp, fp->rx_bd_prod, fp->rx_comp_prod,
1471                                      fp->rx_sge_prod);
1472
1473                 if (j != 0)
1474                         continue;
1475
1476                 if (CHIP_IS_E1(bp)) {
1477                         REG_WR(bp, BAR_USTRORM_INTMEM +
1478                                USTORM_MEM_WORKAROUND_ADDRESS_OFFSET(func),
1479                                U64_LO(fp->rx_comp_mapping));
1480                         REG_WR(bp, BAR_USTRORM_INTMEM +
1481                                USTORM_MEM_WORKAROUND_ADDRESS_OFFSET(func) + 4,
1482                                U64_HI(fp->rx_comp_mapping));
1483                 }
1484         }
1485 }
1486
1487 static void bnx2x_free_tx_skbs_queue(struct bnx2x_fastpath *fp)
1488 {
1489         u8 cos;
1490         struct bnx2x *bp = fp->bp;
1491
1492         for_each_cos_in_tx_queue(fp, cos) {
1493                 struct bnx2x_fp_txdata *txdata = fp->txdata_ptr[cos];
1494                 unsigned pkts_compl = 0, bytes_compl = 0;
1495
1496                 u16 sw_prod = txdata->tx_pkt_prod;
1497                 u16 sw_cons = txdata->tx_pkt_cons;
1498
1499                 while (sw_cons != sw_prod) {
1500                         bnx2x_free_tx_pkt(bp, txdata, TX_BD(sw_cons),
1501                                           &pkts_compl, &bytes_compl);
1502                         sw_cons++;
1503                 }
1504
1505                 netdev_tx_reset_queue(
1506                         netdev_get_tx_queue(bp->dev,
1507                                             txdata->txq_index));
1508         }
1509 }
1510
1511 static void bnx2x_free_tx_skbs_cnic(struct bnx2x *bp)
1512 {
1513         int i;
1514
1515         for_each_tx_queue_cnic(bp, i) {
1516                 bnx2x_free_tx_skbs_queue(&bp->fp[i]);
1517         }
1518 }
1519
1520 static void bnx2x_free_tx_skbs(struct bnx2x *bp)
1521 {
1522         int i;
1523
1524         for_each_eth_queue(bp, i) {
1525                 bnx2x_free_tx_skbs_queue(&bp->fp[i]);
1526         }
1527 }
1528
1529 static void bnx2x_free_rx_bds(struct bnx2x_fastpath *fp)
1530 {
1531         struct bnx2x *bp = fp->bp;
1532         int i;
1533
1534         /* ring wasn't allocated */
1535         if (fp->rx_buf_ring == NULL)
1536                 return;
1537
1538         for (i = 0; i < NUM_RX_BD; i++) {
1539                 struct sw_rx_bd *rx_buf = &fp->rx_buf_ring[i];
1540                 u8 *data = rx_buf->data;
1541
1542                 if (data == NULL)
1543                         continue;
1544                 dma_unmap_single(&bp->pdev->dev,
1545                                  dma_unmap_addr(rx_buf, mapping),
1546                                  fp->rx_buf_size, DMA_FROM_DEVICE);
1547
1548                 rx_buf->data = NULL;
1549                 bnx2x_frag_free(fp, data);
1550         }
1551 }
1552
1553 static void bnx2x_free_rx_skbs_cnic(struct bnx2x *bp)
1554 {
1555         int j;
1556
1557         for_each_rx_queue_cnic(bp, j) {
1558                 bnx2x_free_rx_bds(&bp->fp[j]);
1559         }
1560 }
1561
1562 static void bnx2x_free_rx_skbs(struct bnx2x *bp)
1563 {
1564         int j;
1565
1566         for_each_eth_queue(bp, j) {
1567                 struct bnx2x_fastpath *fp = &bp->fp[j];
1568
1569                 bnx2x_free_rx_bds(fp);
1570
1571                 if (fp->mode != TPA_MODE_DISABLED)
1572                         bnx2x_free_tpa_pool(bp, fp, MAX_AGG_QS(bp));
1573         }
1574 }
1575
1576 static void bnx2x_free_skbs_cnic(struct bnx2x *bp)
1577 {
1578         bnx2x_free_tx_skbs_cnic(bp);
1579         bnx2x_free_rx_skbs_cnic(bp);
1580 }
1581
1582 void bnx2x_free_skbs(struct bnx2x *bp)
1583 {
1584         bnx2x_free_tx_skbs(bp);
1585         bnx2x_free_rx_skbs(bp);
1586 }
1587
1588 void bnx2x_update_max_mf_config(struct bnx2x *bp, u32 value)
1589 {
1590         /* load old values */
1591         u32 mf_cfg = bp->mf_config[BP_VN(bp)];
1592
1593         if (value != bnx2x_extract_max_cfg(bp, mf_cfg)) {
1594                 /* leave all but MAX value */
1595                 mf_cfg &= ~FUNC_MF_CFG_MAX_BW_MASK;
1596
1597                 /* set new MAX value */
1598                 mf_cfg |= (value << FUNC_MF_CFG_MAX_BW_SHIFT)
1599                                 & FUNC_MF_CFG_MAX_BW_MASK;
1600
1601                 bnx2x_fw_command(bp, DRV_MSG_CODE_SET_MF_BW, mf_cfg);
1602         }
1603 }
1604
1605 /**
1606  * bnx2x_free_msix_irqs - free previously requested MSI-X IRQ vectors
1607  *
1608  * @bp:         driver handle
1609  * @nvecs:      number of vectors to be released
1610  */
1611 static void bnx2x_free_msix_irqs(struct bnx2x *bp, int nvecs)
1612 {
1613         int i, offset = 0;
1614
1615         if (nvecs == offset)
1616                 return;
1617
1618         /* VFs don't have a default SB */
1619         if (IS_PF(bp)) {
1620                 free_irq(bp->msix_table[offset].vector, bp->dev);
1621                 DP(NETIF_MSG_IFDOWN, "released sp irq (%d)\n",
1622                    bp->msix_table[offset].vector);
1623                 offset++;
1624         }
1625
1626         if (CNIC_SUPPORT(bp)) {
1627                 if (nvecs == offset)
1628                         return;
1629                 offset++;
1630         }
1631
1632         for_each_eth_queue(bp, i) {
1633                 if (nvecs == offset)
1634                         return;
1635                 DP(NETIF_MSG_IFDOWN, "about to release fp #%d->%d irq\n",
1636                    i, bp->msix_table[offset].vector);
1637
1638                 free_irq(bp->msix_table[offset++].vector, &bp->fp[i]);
1639         }
1640 }
1641
1642 void bnx2x_free_irq(struct bnx2x *bp)
1643 {
1644         if (bp->flags & USING_MSIX_FLAG &&
1645             !(bp->flags & USING_SINGLE_MSIX_FLAG)) {
1646                 int nvecs = BNX2X_NUM_ETH_QUEUES(bp) + CNIC_SUPPORT(bp);
1647
1648                 /* vfs don't have a default status block */
1649                 if (IS_PF(bp))
1650                         nvecs++;
1651
1652                 bnx2x_free_msix_irqs(bp, nvecs);
1653         } else {
1654                 free_irq(bp->dev->irq, bp->dev);
1655         }
1656 }
1657
1658 int bnx2x_enable_msix(struct bnx2x *bp)
1659 {
1660         int msix_vec = 0, i, rc;
1661
1662         /* VFs don't have a default status block */
1663         if (IS_PF(bp)) {
1664                 bp->msix_table[msix_vec].entry = msix_vec;
1665                 BNX2X_DEV_INFO("msix_table[0].entry = %d (slowpath)\n",
1666                                bp->msix_table[0].entry);
1667                 msix_vec++;
1668         }
1669
1670         /* Cnic requires an msix vector for itself */
1671         if (CNIC_SUPPORT(bp)) {
1672                 bp->msix_table[msix_vec].entry = msix_vec;
1673                 BNX2X_DEV_INFO("msix_table[%d].entry = %d (CNIC)\n",
1674                                msix_vec, bp->msix_table[msix_vec].entry);
1675                 msix_vec++;
1676         }
1677
1678         /* We need separate vectors for ETH queues only (not FCoE) */
1679         for_each_eth_queue(bp, i) {
1680                 bp->msix_table[msix_vec].entry = msix_vec;
1681                 BNX2X_DEV_INFO("msix_table[%d].entry = %d (fastpath #%u)\n",
1682                                msix_vec, msix_vec, i);
1683                 msix_vec++;
1684         }
1685
1686         DP(BNX2X_MSG_SP, "about to request enable msix with %d vectors\n",
1687            msix_vec);
1688
1689         rc = pci_enable_msix_range(bp->pdev, &bp->msix_table[0],
1690                                    BNX2X_MIN_MSIX_VEC_CNT(bp), msix_vec);
1691         /*
1692          * reconfigure number of tx/rx queues according to available
1693          * MSI-X vectors
1694          */
1695         if (rc == -ENOSPC) {
1696                 /* Get by with single vector */
1697                 rc = pci_enable_msix_range(bp->pdev, &bp->msix_table[0], 1, 1);
1698                 if (rc < 0) {
1699                         BNX2X_DEV_INFO("Single MSI-X is not attainable rc %d\n",
1700                                        rc);
1701                         goto no_msix;
1702                 }
1703
1704                 BNX2X_DEV_INFO("Using single MSI-X vector\n");
1705                 bp->flags |= USING_SINGLE_MSIX_FLAG;
1706
1707                 BNX2X_DEV_INFO("set number of queues to 1\n");
1708                 bp->num_ethernet_queues = 1;
1709                 bp->num_queues = bp->num_ethernet_queues + bp->num_cnic_queues;
1710         } else if (rc < 0) {
1711                 BNX2X_DEV_INFO("MSI-X is not attainable rc %d\n", rc);
1712                 goto no_msix;
1713         } else if (rc < msix_vec) {
1714                 /* how less vectors we will have? */
1715                 int diff = msix_vec - rc;
1716
1717                 BNX2X_DEV_INFO("Trying to use less MSI-X vectors: %d\n", rc);
1718
1719                 /*
1720                  * decrease number of queues by number of unallocated entries
1721                  */
1722                 bp->num_ethernet_queues -= diff;
1723                 bp->num_queues = bp->num_ethernet_queues + bp->num_cnic_queues;
1724
1725                 BNX2X_DEV_INFO("New queue configuration set: %d\n",
1726                                bp->num_queues);
1727         }
1728
1729         bp->flags |= USING_MSIX_FLAG;
1730
1731         return 0;
1732
1733 no_msix:
1734         /* fall to INTx if not enough memory */
1735         if (rc == -ENOMEM)
1736                 bp->flags |= DISABLE_MSI_FLAG;
1737
1738         return rc;
1739 }
1740
1741 static int bnx2x_req_msix_irqs(struct bnx2x *bp)
1742 {
1743         int i, rc, offset = 0;
1744
1745         /* no default status block for vf */
1746         if (IS_PF(bp)) {
1747                 rc = request_irq(bp->msix_table[offset++].vector,
1748                                  bnx2x_msix_sp_int, 0,
1749                                  bp->dev->name, bp->dev);
1750                 if (rc) {
1751                         BNX2X_ERR("request sp irq failed\n");
1752                         return -EBUSY;
1753                 }
1754         }
1755
1756         if (CNIC_SUPPORT(bp))
1757                 offset++;
1758
1759         for_each_eth_queue(bp, i) {
1760                 struct bnx2x_fastpath *fp = &bp->fp[i];
1761                 snprintf(fp->name, sizeof(fp->name), "%s-fp-%d",
1762                          bp->dev->name, i);
1763
1764                 rc = request_irq(bp->msix_table[offset].vector,
1765                                  bnx2x_msix_fp_int, 0, fp->name, fp);
1766                 if (rc) {
1767                         BNX2X_ERR("request fp #%d irq (%d) failed  rc %d\n", i,
1768                               bp->msix_table[offset].vector, rc);
1769                         bnx2x_free_msix_irqs(bp, offset);
1770                         return -EBUSY;
1771                 }
1772
1773                 offset++;
1774         }
1775
1776         i = BNX2X_NUM_ETH_QUEUES(bp);
1777         if (IS_PF(bp)) {
1778                 offset = 1 + CNIC_SUPPORT(bp);
1779                 netdev_info(bp->dev,
1780                             "using MSI-X  IRQs: sp %d  fp[%d] %d ... fp[%d] %d\n",
1781                             bp->msix_table[0].vector,
1782                             0, bp->msix_table[offset].vector,
1783                             i - 1, bp->msix_table[offset + i - 1].vector);
1784         } else {
1785                 offset = CNIC_SUPPORT(bp);
1786                 netdev_info(bp->dev,
1787                             "using MSI-X  IRQs: fp[%d] %d ... fp[%d] %d\n",
1788                             0, bp->msix_table[offset].vector,
1789                             i - 1, bp->msix_table[offset + i - 1].vector);
1790         }
1791         return 0;
1792 }
1793
1794 int bnx2x_enable_msi(struct bnx2x *bp)
1795 {
1796         int rc;
1797
1798         rc = pci_enable_msi(bp->pdev);
1799         if (rc) {
1800                 BNX2X_DEV_INFO("MSI is not attainable\n");
1801                 return -1;
1802         }
1803         bp->flags |= USING_MSI_FLAG;
1804
1805         return 0;
1806 }
1807
1808 static int bnx2x_req_irq(struct bnx2x *bp)
1809 {
1810         unsigned long flags;
1811         unsigned int irq;
1812
1813         if (bp->flags & (USING_MSI_FLAG | USING_MSIX_FLAG))
1814                 flags = 0;
1815         else
1816                 flags = IRQF_SHARED;
1817
1818         if (bp->flags & USING_MSIX_FLAG)
1819                 irq = bp->msix_table[0].vector;
1820         else
1821                 irq = bp->pdev->irq;
1822
1823         return request_irq(irq, bnx2x_interrupt, flags, bp->dev->name, bp->dev);
1824 }
1825
1826 static int bnx2x_setup_irqs(struct bnx2x *bp)
1827 {
1828         int rc = 0;
1829         if (bp->flags & USING_MSIX_FLAG &&
1830             !(bp->flags & USING_SINGLE_MSIX_FLAG)) {
1831                 rc = bnx2x_req_msix_irqs(bp);
1832                 if (rc)
1833                         return rc;
1834         } else {
1835                 rc = bnx2x_req_irq(bp);
1836                 if (rc) {
1837                         BNX2X_ERR("IRQ request failed  rc %d, aborting\n", rc);
1838                         return rc;
1839                 }
1840                 if (bp->flags & USING_MSI_FLAG) {
1841                         bp->dev->irq = bp->pdev->irq;
1842                         netdev_info(bp->dev, "using MSI IRQ %d\n",
1843                                     bp->dev->irq);
1844                 }
1845                 if (bp->flags & USING_MSIX_FLAG) {
1846                         bp->dev->irq = bp->msix_table[0].vector;
1847                         netdev_info(bp->dev, "using MSIX IRQ %d\n",
1848                                     bp->dev->irq);
1849                 }
1850         }
1851
1852         return 0;
1853 }
1854
1855 static void bnx2x_napi_enable_cnic(struct bnx2x *bp)
1856 {
1857         int i;
1858
1859         for_each_rx_queue_cnic(bp, i) {
1860                 napi_enable(&bnx2x_fp(bp, i, napi));
1861         }
1862 }
1863
1864 static void bnx2x_napi_enable(struct bnx2x *bp)
1865 {
1866         int i;
1867
1868         for_each_eth_queue(bp, i) {
1869                 napi_enable(&bnx2x_fp(bp, i, napi));
1870         }
1871 }
1872
1873 static void bnx2x_napi_disable_cnic(struct bnx2x *bp)
1874 {
1875         int i;
1876
1877         for_each_rx_queue_cnic(bp, i) {
1878                 napi_disable(&bnx2x_fp(bp, i, napi));
1879         }
1880 }
1881
1882 static void bnx2x_napi_disable(struct bnx2x *bp)
1883 {
1884         int i;
1885
1886         for_each_eth_queue(bp, i) {
1887                 napi_disable(&bnx2x_fp(bp, i, napi));
1888         }
1889 }
1890
1891 void bnx2x_netif_start(struct bnx2x *bp)
1892 {
1893         if (netif_running(bp->dev)) {
1894                 bnx2x_napi_enable(bp);
1895                 if (CNIC_LOADED(bp))
1896                         bnx2x_napi_enable_cnic(bp);
1897                 bnx2x_int_enable(bp);
1898                 if (bp->state == BNX2X_STATE_OPEN)
1899                         netif_tx_wake_all_queues(bp->dev);
1900         }
1901 }
1902
1903 void bnx2x_netif_stop(struct bnx2x *bp, int disable_hw)
1904 {
1905         bnx2x_int_disable_sync(bp, disable_hw);
1906         bnx2x_napi_disable(bp);
1907         if (CNIC_LOADED(bp))
1908                 bnx2x_napi_disable_cnic(bp);
1909 }
1910
1911 u16 bnx2x_select_queue(struct net_device *dev, struct sk_buff *skb,
1912                        struct net_device *sb_dev,
1913                        select_queue_fallback_t fallback)
1914 {
1915         struct bnx2x *bp = netdev_priv(dev);
1916
1917         if (CNIC_LOADED(bp) && !NO_FCOE(bp)) {
1918                 struct ethhdr *hdr = (struct ethhdr *)skb->data;
1919                 u16 ether_type = ntohs(hdr->h_proto);
1920
1921                 /* Skip VLAN tag if present */
1922                 if (ether_type == ETH_P_8021Q) {
1923                         struct vlan_ethhdr *vhdr =
1924                                 (struct vlan_ethhdr *)skb->data;
1925
1926                         ether_type = ntohs(vhdr->h_vlan_encapsulated_proto);
1927                 }
1928
1929                 /* If ethertype is FCoE or FIP - use FCoE ring */
1930                 if ((ether_type == ETH_P_FCOE) || (ether_type == ETH_P_FIP))
1931                         return bnx2x_fcoe_tx(bp, txq_index);
1932         }
1933
1934         /* select a non-FCoE queue */
1935         return fallback(dev, skb, NULL) %
1936                (BNX2X_NUM_ETH_QUEUES(bp) * bp->max_cos);
1937 }
1938
1939 void bnx2x_set_num_queues(struct bnx2x *bp)
1940 {
1941         /* RSS queues */
1942         bp->num_ethernet_queues = bnx2x_calc_num_queues(bp);
1943
1944         /* override in STORAGE SD modes */
1945         if (IS_MF_STORAGE_ONLY(bp))
1946                 bp->num_ethernet_queues = 1;
1947
1948         /* Add special queues */
1949         bp->num_cnic_queues = CNIC_SUPPORT(bp); /* For FCOE */
1950         bp->num_queues = bp->num_ethernet_queues + bp->num_cnic_queues;
1951
1952         BNX2X_DEV_INFO("set number of queues to %d\n", bp->num_queues);
1953 }
1954
1955 /**
1956  * bnx2x_set_real_num_queues - configure netdev->real_num_[tx,rx]_queues
1957  *
1958  * @bp:         Driver handle
1959  *
1960  * We currently support for at most 16 Tx queues for each CoS thus we will
1961  * allocate a multiple of 16 for ETH L2 rings according to the value of the
1962  * bp->max_cos.
1963  *
1964  * If there is an FCoE L2 queue the appropriate Tx queue will have the next
1965  * index after all ETH L2 indices.
1966  *
1967  * If the actual number of Tx queues (for each CoS) is less than 16 then there
1968  * will be the holes at the end of each group of 16 ETh L2 indices (0..15,
1969  * 16..31,...) with indices that are not coupled with any real Tx queue.
1970  *
1971  * The proper configuration of skb->queue_mapping is handled by
1972  * bnx2x_select_queue() and __skb_tx_hash().
1973  *
1974  * bnx2x_setup_tc() takes care of the proper TC mappings so that __skb_tx_hash()
1975  * will return a proper Tx index if TC is enabled (netdev->num_tc > 0).
1976  */
1977 static int bnx2x_set_real_num_queues(struct bnx2x *bp, int include_cnic)
1978 {
1979         int rc, tx, rx;
1980
1981         tx = BNX2X_NUM_ETH_QUEUES(bp) * bp->max_cos;
1982         rx = BNX2X_NUM_ETH_QUEUES(bp);
1983
1984 /* account for fcoe queue */
1985         if (include_cnic && !NO_FCOE(bp)) {
1986                 rx++;
1987                 tx++;
1988         }
1989
1990         rc = netif_set_real_num_tx_queues(bp->dev, tx);
1991         if (rc) {
1992                 BNX2X_ERR("Failed to set real number of Tx queues: %d\n", rc);
1993                 return rc;
1994         }
1995         rc = netif_set_real_num_rx_queues(bp->dev, rx);
1996         if (rc) {
1997                 BNX2X_ERR("Failed to set real number of Rx queues: %d\n", rc);
1998                 return rc;
1999         }
2000
2001         DP(NETIF_MSG_IFUP, "Setting real num queues to (tx, rx) (%d, %d)\n",
2002                           tx, rx);
2003
2004         return rc;
2005 }
2006
2007 static void bnx2x_set_rx_buf_size(struct bnx2x *bp)
2008 {
2009         int i;
2010
2011         for_each_queue(bp, i) {
2012                 struct bnx2x_fastpath *fp = &bp->fp[i];
2013                 u32 mtu;
2014
2015                 /* Always use a mini-jumbo MTU for the FCoE L2 ring */
2016                 if (IS_FCOE_IDX(i))
2017                         /*
2018                          * Although there are no IP frames expected to arrive to
2019                          * this ring we still want to add an
2020                          * IP_HEADER_ALIGNMENT_PADDING to prevent a buffer
2021                          * overrun attack.
2022                          */
2023                         mtu = BNX2X_FCOE_MINI_JUMBO_MTU;
2024                 else
2025                         mtu = bp->dev->mtu;
2026                 fp->rx_buf_size = BNX2X_FW_RX_ALIGN_START +
2027                                   IP_HEADER_ALIGNMENT_PADDING +
2028                                   ETH_OVERHEAD +
2029                                   mtu +
2030                                   BNX2X_FW_RX_ALIGN_END;
2031                 fp->rx_buf_size = SKB_DATA_ALIGN(fp->rx_buf_size);
2032                 /* Note : rx_buf_size doesn't take into account NET_SKB_PAD */
2033                 if (fp->rx_buf_size + NET_SKB_PAD <= PAGE_SIZE)
2034                         fp->rx_frag_size = fp->rx_buf_size + NET_SKB_PAD;
2035                 else
2036                         fp->rx_frag_size = 0;
2037         }
2038 }
2039
2040 static int bnx2x_init_rss(struct bnx2x *bp)
2041 {
2042         int i;
2043         u8 num_eth_queues = BNX2X_NUM_ETH_QUEUES(bp);
2044
2045         /* Prepare the initial contents for the indirection table if RSS is
2046          * enabled
2047          */
2048         for (i = 0; i < sizeof(bp->rss_conf_obj.ind_table); i++)
2049                 bp->rss_conf_obj.ind_table[i] =
2050                         bp->fp->cl_id +
2051                         ethtool_rxfh_indir_default(i, num_eth_queues);
2052
2053         /*
2054          * For 57710 and 57711 SEARCHER configuration (rss_keys) is
2055          * per-port, so if explicit configuration is needed , do it only
2056          * for a PMF.
2057          *
2058          * For 57712 and newer on the other hand it's a per-function
2059          * configuration.
2060          */
2061         return bnx2x_config_rss_eth(bp, bp->port.pmf || !CHIP_IS_E1x(bp));
2062 }
2063
2064 int bnx2x_rss(struct bnx2x *bp, struct bnx2x_rss_config_obj *rss_obj,
2065               bool config_hash, bool enable)
2066 {
2067         struct bnx2x_config_rss_params params = {NULL};
2068
2069         /* Although RSS is meaningless when there is a single HW queue we
2070          * still need it enabled in order to have HW Rx hash generated.
2071          *
2072          * if (!is_eth_multi(bp))
2073          *      bp->multi_mode = ETH_RSS_MODE_DISABLED;
2074          */
2075
2076         params.rss_obj = rss_obj;
2077
2078         __set_bit(RAMROD_COMP_WAIT, &params.ramrod_flags);
2079
2080         if (enable) {
2081                 __set_bit(BNX2X_RSS_MODE_REGULAR, &params.rss_flags);
2082
2083                 /* RSS configuration */
2084                 __set_bit(BNX2X_RSS_IPV4, &params.rss_flags);
2085                 __set_bit(BNX2X_RSS_IPV4_TCP, &params.rss_flags);
2086                 __set_bit(BNX2X_RSS_IPV6, &params.rss_flags);
2087                 __set_bit(BNX2X_RSS_IPV6_TCP, &params.rss_flags);
2088                 if (rss_obj->udp_rss_v4)
2089                         __set_bit(BNX2X_RSS_IPV4_UDP, &params.rss_flags);
2090                 if (rss_obj->udp_rss_v6)
2091                         __set_bit(BNX2X_RSS_IPV6_UDP, &params.rss_flags);
2092
2093                 if (!CHIP_IS_E1x(bp)) {
2094                         /* valid only for TUNN_MODE_VXLAN tunnel mode */
2095                         __set_bit(BNX2X_RSS_IPV4_VXLAN, &params.rss_flags);
2096                         __set_bit(BNX2X_RSS_IPV6_VXLAN, &params.rss_flags);
2097
2098                         /* valid only for TUNN_MODE_GRE tunnel mode */
2099                         __set_bit(BNX2X_RSS_TUNN_INNER_HDRS, &params.rss_flags);
2100                 }
2101         } else {
2102                 __set_bit(BNX2X_RSS_MODE_DISABLED, &params.rss_flags);
2103         }
2104
2105         /* Hash bits */
2106         params.rss_result_mask = MULTI_MASK;
2107
2108         memcpy(params.ind_table, rss_obj->ind_table, sizeof(params.ind_table));
2109
2110         if (config_hash) {
2111                 /* RSS keys */
2112                 netdev_rss_key_fill(params.rss_key, T_ETH_RSS_KEY * 4);
2113                 __set_bit(BNX2X_RSS_SET_SRCH, &params.rss_flags);
2114         }
2115
2116         if (IS_PF(bp))
2117                 return bnx2x_config_rss(bp, &params);
2118         else
2119                 return bnx2x_vfpf_config_rss(bp, &params);
2120 }
2121
2122 static int bnx2x_init_hw(struct bnx2x *bp, u32 load_code)
2123 {
2124         struct bnx2x_func_state_params func_params = {NULL};
2125
2126         /* Prepare parameters for function state transitions */
2127         __set_bit(RAMROD_COMP_WAIT, &func_params.ramrod_flags);
2128
2129         func_params.f_obj = &bp->func_obj;
2130         func_params.cmd = BNX2X_F_CMD_HW_INIT;
2131
2132         func_params.params.hw_init.load_phase = load_code;
2133
2134         return bnx2x_func_state_change(bp, &func_params);
2135 }
2136
2137 /*
2138  * Cleans the object that have internal lists without sending
2139  * ramrods. Should be run when interrupts are disabled.
2140  */
2141 void bnx2x_squeeze_objects(struct bnx2x *bp)
2142 {
2143         int rc;
2144         unsigned long ramrod_flags = 0, vlan_mac_flags = 0;
2145         struct bnx2x_mcast_ramrod_params rparam = {NULL};
2146         struct bnx2x_vlan_mac_obj *mac_obj = &bp->sp_objs->mac_obj;
2147
2148         /***************** Cleanup MACs' object first *************************/
2149
2150         /* Wait for completion of requested */
2151         __set_bit(RAMROD_COMP_WAIT, &ramrod_flags);
2152         /* Perform a dry cleanup */
2153         __set_bit(RAMROD_DRV_CLR_ONLY, &ramrod_flags);
2154
2155         /* Clean ETH primary MAC */
2156         __set_bit(BNX2X_ETH_MAC, &vlan_mac_flags);
2157         rc = mac_obj->delete_all(bp, &bp->sp_objs->mac_obj, &vlan_mac_flags,
2158                                  &ramrod_flags);
2159         if (rc != 0)
2160                 BNX2X_ERR("Failed to clean ETH MACs: %d\n", rc);
2161
2162         /* Cleanup UC list */
2163         vlan_mac_flags = 0;
2164         __set_bit(BNX2X_UC_LIST_MAC, &vlan_mac_flags);
2165         rc = mac_obj->delete_all(bp, mac_obj, &vlan_mac_flags,
2166                                  &ramrod_flags);
2167         if (rc != 0)
2168                 BNX2X_ERR("Failed to clean UC list MACs: %d\n", rc);
2169
2170         /***************** Now clean mcast object *****************************/
2171         rparam.mcast_obj = &bp->mcast_obj;
2172         __set_bit(RAMROD_DRV_CLR_ONLY, &rparam.ramrod_flags);
2173
2174         /* Add a DEL command... - Since we're doing a driver cleanup only,
2175          * we take a lock surrounding both the initial send and the CONTs,
2176          * as we don't want a true completion to disrupt us in the middle.
2177          */
2178         netif_addr_lock_bh(bp->dev);
2179         rc = bnx2x_config_mcast(bp, &rparam, BNX2X_MCAST_CMD_DEL);
2180         if (rc < 0)
2181                 BNX2X_ERR("Failed to add a new DEL command to a multi-cast object: %d\n",
2182                           rc);
2183
2184         /* ...and wait until all pending commands are cleared */
2185         rc = bnx2x_config_mcast(bp, &rparam, BNX2X_MCAST_CMD_CONT);
2186         while (rc != 0) {
2187                 if (rc < 0) {
2188                         BNX2X_ERR("Failed to clean multi-cast object: %d\n",
2189                                   rc);
2190                         netif_addr_unlock_bh(bp->dev);
2191                         return;
2192                 }
2193
2194                 rc = bnx2x_config_mcast(bp, &rparam, BNX2X_MCAST_CMD_CONT);
2195         }
2196         netif_addr_unlock_bh(bp->dev);
2197 }
2198
2199 #ifndef BNX2X_STOP_ON_ERROR
2200 #define LOAD_ERROR_EXIT(bp, label) \
2201         do { \
2202                 (bp)->state = BNX2X_STATE_ERROR; \
2203                 goto label; \
2204         } while (0)
2205
2206 #define LOAD_ERROR_EXIT_CNIC(bp, label) \
2207         do { \
2208                 bp->cnic_loaded = false; \
2209                 goto label; \
2210         } while (0)
2211 #else /*BNX2X_STOP_ON_ERROR*/
2212 #define LOAD_ERROR_EXIT(bp, label) \
2213         do { \
2214                 (bp)->state = BNX2X_STATE_ERROR; \
2215                 (bp)->panic = 1; \
2216                 return -EBUSY; \
2217         } while (0)
2218 #define LOAD_ERROR_EXIT_CNIC(bp, label) \
2219         do { \
2220                 bp->cnic_loaded = false; \
2221                 (bp)->panic = 1; \
2222                 return -EBUSY; \
2223         } while (0)
2224 #endif /*BNX2X_STOP_ON_ERROR*/
2225
2226 static void bnx2x_free_fw_stats_mem(struct bnx2x *bp)
2227 {
2228         BNX2X_PCI_FREE(bp->fw_stats, bp->fw_stats_mapping,
2229                        bp->fw_stats_data_sz + bp->fw_stats_req_sz);
2230         return;
2231 }
2232
2233 static int bnx2x_alloc_fw_stats_mem(struct bnx2x *bp)
2234 {
2235         int num_groups, vf_headroom = 0;
2236         int is_fcoe_stats = NO_FCOE(bp) ? 0 : 1;
2237
2238         /* number of queues for statistics is number of eth queues + FCoE */
2239         u8 num_queue_stats = BNX2X_NUM_ETH_QUEUES(bp) + is_fcoe_stats;
2240
2241         /* Total number of FW statistics requests =
2242          * 1 for port stats + 1 for PF stats + potential 2 for FCoE (fcoe proper
2243          * and fcoe l2 queue) stats + num of queues (which includes another 1
2244          * for fcoe l2 queue if applicable)
2245          */
2246         bp->fw_stats_num = 2 + is_fcoe_stats + num_queue_stats;
2247
2248         /* vf stats appear in the request list, but their data is allocated by
2249          * the VFs themselves. We don't include them in the bp->fw_stats_num as
2250          * it is used to determine where to place the vf stats queries in the
2251          * request struct
2252          */
2253         if (IS_SRIOV(bp))
2254                 vf_headroom = bnx2x_vf_headroom(bp);
2255
2256         /* Request is built from stats_query_header and an array of
2257          * stats_query_cmd_group each of which contains
2258          * STATS_QUERY_CMD_COUNT rules. The real number or requests is
2259          * configured in the stats_query_header.
2260          */
2261         num_groups =
2262                 (((bp->fw_stats_num + vf_headroom) / STATS_QUERY_CMD_COUNT) +
2263                  (((bp->fw_stats_num + vf_headroom) % STATS_QUERY_CMD_COUNT) ?
2264                  1 : 0));
2265
2266         DP(BNX2X_MSG_SP, "stats fw_stats_num %d, vf headroom %d, num_groups %d\n",
2267            bp->fw_stats_num, vf_headroom, num_groups);
2268         bp->fw_stats_req_sz = sizeof(struct stats_query_header) +
2269                 num_groups * sizeof(struct stats_query_cmd_group);
2270
2271         /* Data for statistics requests + stats_counter
2272          * stats_counter holds per-STORM counters that are incremented
2273          * when STORM has finished with the current request.
2274          * memory for FCoE offloaded statistics are counted anyway,
2275          * even if they will not be sent.
2276          * VF stats are not accounted for here as the data of VF stats is stored
2277          * in memory allocated by the VF, not here.
2278          */
2279         bp->fw_stats_data_sz = sizeof(struct per_port_stats) +
2280                 sizeof(struct per_pf_stats) +
2281                 sizeof(struct fcoe_statistics_params) +
2282                 sizeof(struct per_queue_stats) * num_queue_stats +
2283                 sizeof(struct stats_counter);
2284
2285         bp->fw_stats = BNX2X_PCI_ALLOC(&bp->fw_stats_mapping,
2286                                        bp->fw_stats_data_sz + bp->fw_stats_req_sz);
2287         if (!bp->fw_stats)
2288                 goto alloc_mem_err;
2289
2290         /* Set shortcuts */
2291         bp->fw_stats_req = (struct bnx2x_fw_stats_req *)bp->fw_stats;
2292         bp->fw_stats_req_mapping = bp->fw_stats_mapping;
2293         bp->fw_stats_data = (struct bnx2x_fw_stats_data *)
2294                 ((u8 *)bp->fw_stats + bp->fw_stats_req_sz);
2295         bp->fw_stats_data_mapping = bp->fw_stats_mapping +
2296                 bp->fw_stats_req_sz;
2297
2298         DP(BNX2X_MSG_SP, "statistics request base address set to %x %x\n",
2299            U64_HI(bp->fw_stats_req_mapping),
2300            U64_LO(bp->fw_stats_req_mapping));
2301         DP(BNX2X_MSG_SP, "statistics data base address set to %x %x\n",
2302            U64_HI(bp->fw_stats_data_mapping),
2303            U64_LO(bp->fw_stats_data_mapping));
2304         return 0;
2305
2306 alloc_mem_err:
2307         bnx2x_free_fw_stats_mem(bp);
2308         BNX2X_ERR("Can't allocate FW stats memory\n");
2309         return -ENOMEM;
2310 }
2311
2312 /* send load request to mcp and analyze response */
2313 static int bnx2x_nic_load_request(struct bnx2x *bp, u32 *load_code)
2314 {
2315         u32 param;
2316
2317         /* init fw_seq */
2318         bp->fw_seq =
2319                 (SHMEM_RD(bp, func_mb[BP_FW_MB_IDX(bp)].drv_mb_header) &
2320                  DRV_MSG_SEQ_NUMBER_MASK);
2321         BNX2X_DEV_INFO("fw_seq 0x%08x\n", bp->fw_seq);
2322
2323         /* Get current FW pulse sequence */
2324         bp->fw_drv_pulse_wr_seq =
2325                 (SHMEM_RD(bp, func_mb[BP_FW_MB_IDX(bp)].drv_pulse_mb) &
2326                  DRV_PULSE_SEQ_MASK);
2327         BNX2X_DEV_INFO("drv_pulse 0x%x\n", bp->fw_drv_pulse_wr_seq);
2328
2329         param = DRV_MSG_CODE_LOAD_REQ_WITH_LFA;
2330
2331         if (IS_MF_SD(bp) && bnx2x_port_after_undi(bp))
2332                 param |= DRV_MSG_CODE_LOAD_REQ_FORCE_LFA;
2333
2334         /* load request */
2335         (*load_code) = bnx2x_fw_command(bp, DRV_MSG_CODE_LOAD_REQ, param);
2336
2337         /* if mcp fails to respond we must abort */
2338         if (!(*load_code)) {
2339                 BNX2X_ERR("MCP response failure, aborting\n");
2340                 return -EBUSY;
2341         }
2342
2343         /* If mcp refused (e.g. other port is in diagnostic mode) we
2344          * must abort
2345          */
2346         if ((*load_code) == FW_MSG_CODE_DRV_LOAD_REFUSED) {
2347                 BNX2X_ERR("MCP refused load request, aborting\n");
2348                 return -EBUSY;
2349         }
2350         return 0;
2351 }
2352
2353 /* check whether another PF has already loaded FW to chip. In
2354  * virtualized environments a pf from another VM may have already
2355  * initialized the device including loading FW
2356  */
2357 int bnx2x_compare_fw_ver(struct bnx2x *bp, u32 load_code, bool print_err)
2358 {
2359         /* is another pf loaded on this engine? */
2360         if (load_code != FW_MSG_CODE_DRV_LOAD_COMMON_CHIP &&
2361             load_code != FW_MSG_CODE_DRV_LOAD_COMMON) {
2362                 /* build my FW version dword */
2363                 u32 my_fw = (BCM_5710_FW_MAJOR_VERSION) +
2364                         (BCM_5710_FW_MINOR_VERSION << 8) +
2365                         (BCM_5710_FW_REVISION_VERSION << 16) +
2366                         (BCM_5710_FW_ENGINEERING_VERSION << 24);
2367
2368                 /* read loaded FW from chip */
2369                 u32 loaded_fw = REG_RD(bp, XSEM_REG_PRAM);
2370
2371                 DP(BNX2X_MSG_SP, "loaded fw %x, my fw %x\n",
2372                    loaded_fw, my_fw);
2373
2374                 /* abort nic load if version mismatch */
2375                 if (my_fw != loaded_fw) {
2376                         if (print_err)
2377                                 BNX2X_ERR("bnx2x with FW %x was already loaded which mismatches my %x FW. Aborting\n",
2378                                           loaded_fw, my_fw);
2379                         else
2380                                 BNX2X_DEV_INFO("bnx2x with FW %x was already loaded which mismatches my %x FW, possibly due to MF UNDI\n",
2381                                                loaded_fw, my_fw);
2382                         return -EBUSY;
2383                 }
2384         }
2385         return 0;
2386 }
2387
2388 /* returns the "mcp load_code" according to global load_count array */
2389 static int bnx2x_nic_load_no_mcp(struct bnx2x *bp, int port)
2390 {
2391         int path = BP_PATH(bp);
2392
2393         DP(NETIF_MSG_IFUP, "NO MCP - load counts[%d]      %d, %d, %d\n",
2394            path, bnx2x_load_count[path][0], bnx2x_load_count[path][1],
2395            bnx2x_load_count[path][2]);
2396         bnx2x_load_count[path][0]++;
2397         bnx2x_load_count[path][1 + port]++;
2398         DP(NETIF_MSG_IFUP, "NO MCP - new load counts[%d]  %d, %d, %d\n",
2399            path, bnx2x_load_count[path][0], bnx2x_load_count[path][1],
2400            bnx2x_load_count[path][2]);
2401         if (bnx2x_load_count[path][0] == 1)
2402                 return FW_MSG_CODE_DRV_LOAD_COMMON;
2403         else if (bnx2x_load_count[path][1 + port] == 1)
2404                 return FW_MSG_CODE_DRV_LOAD_PORT;
2405         else
2406                 return FW_MSG_CODE_DRV_LOAD_FUNCTION;
2407 }
2408
2409 /* mark PMF if applicable */
2410 static void bnx2x_nic_load_pmf(struct bnx2x *bp, u32 load_code)
2411 {
2412         if ((load_code == FW_MSG_CODE_DRV_LOAD_COMMON) ||
2413             (load_code == FW_MSG_CODE_DRV_LOAD_COMMON_CHIP) ||
2414             (load_code == FW_MSG_CODE_DRV_LOAD_PORT)) {
2415                 bp->port.pmf = 1;
2416                 /* We need the barrier to ensure the ordering between the
2417                  * writing to bp->port.pmf here and reading it from the
2418                  * bnx2x_periodic_task().
2419                  */
2420                 smp_mb();
2421         } else {
2422                 bp->port.pmf = 0;
2423         }
2424
2425         DP(NETIF_MSG_LINK, "pmf %d\n", bp->port.pmf);
2426 }
2427
2428 static void bnx2x_nic_load_afex_dcc(struct bnx2x *bp, int load_code)
2429 {
2430         if (((load_code == FW_MSG_CODE_DRV_LOAD_COMMON) ||
2431              (load_code == FW_MSG_CODE_DRV_LOAD_COMMON_CHIP)) &&
2432             (bp->common.shmem2_base)) {
2433                 if (SHMEM2_HAS(bp, dcc_support))
2434                         SHMEM2_WR(bp, dcc_support,
2435                                   (SHMEM_DCC_SUPPORT_DISABLE_ENABLE_PF_TLV |
2436                                    SHMEM_DCC_SUPPORT_BANDWIDTH_ALLOCATION_TLV));
2437                 if (SHMEM2_HAS(bp, afex_driver_support))
2438                         SHMEM2_WR(bp, afex_driver_support,
2439                                   SHMEM_AFEX_SUPPORTED_VERSION_ONE);
2440         }
2441
2442         /* Set AFEX default VLAN tag to an invalid value */
2443         bp->afex_def_vlan_tag = -1;
2444 }
2445
2446 /**
2447  * bnx2x_bz_fp - zero content of the fastpath structure.
2448  *
2449  * @bp:         driver handle
2450  * @index:      fastpath index to be zeroed
2451  *
2452  * Makes sure the contents of the bp->fp[index].napi is kept
2453  * intact.
2454  */
2455 static void bnx2x_bz_fp(struct bnx2x *bp, int index)
2456 {
2457         struct bnx2x_fastpath *fp = &bp->fp[index];
2458         int cos;
2459         struct napi_struct orig_napi = fp->napi;
2460         struct bnx2x_agg_info *orig_tpa_info = fp->tpa_info;
2461
2462         /* bzero bnx2x_fastpath contents */
2463         if (fp->tpa_info)
2464                 memset(fp->tpa_info, 0, ETH_MAX_AGGREGATION_QUEUES_E1H_E2 *
2465                        sizeof(struct bnx2x_agg_info));
2466         memset(fp, 0, sizeof(*fp));
2467
2468         /* Restore the NAPI object as it has been already initialized */
2469         fp->napi = orig_napi;
2470         fp->tpa_info = orig_tpa_info;
2471         fp->bp = bp;
2472         fp->index = index;
2473         if (IS_ETH_FP(fp))
2474                 fp->max_cos = bp->max_cos;
2475         else
2476                 /* Special queues support only one CoS */
2477                 fp->max_cos = 1;
2478
2479         /* Init txdata pointers */
2480         if (IS_FCOE_FP(fp))
2481                 fp->txdata_ptr[0] = &bp->bnx2x_txq[FCOE_TXQ_IDX(bp)];
2482         if (IS_ETH_FP(fp))
2483                 for_each_cos_in_tx_queue(fp, cos)
2484                         fp->txdata_ptr[cos] = &bp->bnx2x_txq[cos *
2485                                 BNX2X_NUM_ETH_QUEUES(bp) + index];
2486
2487         /* set the tpa flag for each queue. The tpa flag determines the queue
2488          * minimal size so it must be set prior to queue memory allocation
2489          */
2490         if (bp->dev->features & NETIF_F_LRO)
2491                 fp->mode = TPA_MODE_LRO;
2492         else if (bp->dev->features & NETIF_F_GRO_HW)
2493                 fp->mode = TPA_MODE_GRO;
2494         else
2495                 fp->mode = TPA_MODE_DISABLED;
2496
2497         /* We don't want TPA if it's disabled in bp
2498          * or if this is an FCoE L2 ring.
2499          */
2500         if (bp->disable_tpa || IS_FCOE_FP(fp))
2501                 fp->mode = TPA_MODE_DISABLED;
2502 }
2503
2504 void bnx2x_set_os_driver_state(struct bnx2x *bp, u32 state)
2505 {
2506         u32 cur;
2507
2508         if (!IS_MF_BD(bp) || !SHMEM2_HAS(bp, os_driver_state) || IS_VF(bp))
2509                 return;
2510
2511         cur = SHMEM2_RD(bp, os_driver_state[BP_FW_MB_IDX(bp)]);
2512         DP(NETIF_MSG_IFUP, "Driver state %08x-->%08x\n",
2513            cur, state);
2514
2515         SHMEM2_WR(bp, os_driver_state[BP_FW_MB_IDX(bp)], state);
2516 }
2517
2518 int bnx2x_load_cnic(struct bnx2x *bp)
2519 {
2520         int i, rc, port = BP_PORT(bp);
2521
2522         DP(NETIF_MSG_IFUP, "Starting CNIC-related load\n");
2523
2524         mutex_init(&bp->cnic_mutex);
2525
2526         if (IS_PF(bp)) {
2527                 rc = bnx2x_alloc_mem_cnic(bp);
2528                 if (rc) {
2529                         BNX2X_ERR("Unable to allocate bp memory for cnic\n");
2530                         LOAD_ERROR_EXIT_CNIC(bp, load_error_cnic0);
2531                 }
2532         }
2533
2534         rc = bnx2x_alloc_fp_mem_cnic(bp);
2535         if (rc) {
2536                 BNX2X_ERR("Unable to allocate memory for cnic fps\n");
2537                 LOAD_ERROR_EXIT_CNIC(bp, load_error_cnic0);
2538         }
2539
2540         /* Update the number of queues with the cnic queues */
2541         rc = bnx2x_set_real_num_queues(bp, 1);
2542         if (rc) {
2543                 BNX2X_ERR("Unable to set real_num_queues including cnic\n");
2544                 LOAD_ERROR_EXIT_CNIC(bp, load_error_cnic0);
2545         }
2546
2547         /* Add all CNIC NAPI objects */
2548         bnx2x_add_all_napi_cnic(bp);
2549         DP(NETIF_MSG_IFUP, "cnic napi added\n");
2550         bnx2x_napi_enable_cnic(bp);
2551
2552         rc = bnx2x_init_hw_func_cnic(bp);
2553         if (rc)
2554                 LOAD_ERROR_EXIT_CNIC(bp, load_error_cnic1);
2555
2556         bnx2x_nic_init_cnic(bp);
2557
2558         if (IS_PF(bp)) {
2559                 /* Enable Timer scan */
2560                 REG_WR(bp, TM_REG_EN_LINEAR0_TIMER + port*4, 1);
2561
2562                 /* setup cnic queues */
2563                 for_each_cnic_queue(bp, i) {
2564                         rc = bnx2x_setup_queue(bp, &bp->fp[i], 0);
2565                         if (rc) {
2566                                 BNX2X_ERR("Queue setup failed\n");
2567                                 LOAD_ERROR_EXIT(bp, load_error_cnic2);
2568                         }
2569                 }
2570         }
2571
2572         /* Initialize Rx filter. */
2573         bnx2x_set_rx_mode_inner(bp);
2574
2575         /* re-read iscsi info */
2576         bnx2x_get_iscsi_info(bp);
2577         bnx2x_setup_cnic_irq_info(bp);
2578         bnx2x_setup_cnic_info(bp);
2579         bp->cnic_loaded = true;
2580         if (bp->state == BNX2X_STATE_OPEN)
2581                 bnx2x_cnic_notify(bp, CNIC_CTL_START_CMD);
2582
2583         DP(NETIF_MSG_IFUP, "Ending successfully CNIC-related load\n");
2584
2585         return 0;
2586
2587 #ifndef BNX2X_STOP_ON_ERROR
2588 load_error_cnic2:
2589         /* Disable Timer scan */
2590         REG_WR(bp, TM_REG_EN_LINEAR0_TIMER + port*4, 0);
2591
2592 load_error_cnic1:
2593         bnx2x_napi_disable_cnic(bp);
2594         /* Update the number of queues without the cnic queues */
2595         if (bnx2x_set_real_num_queues(bp, 0))
2596                 BNX2X_ERR("Unable to set real_num_queues not including cnic\n");
2597 load_error_cnic0:
2598         BNX2X_ERR("CNIC-related load failed\n");
2599         bnx2x_free_fp_mem_cnic(bp);
2600         bnx2x_free_mem_cnic(bp);
2601         return rc;
2602 #endif /* ! BNX2X_STOP_ON_ERROR */
2603 }
2604
2605 /* must be called with rtnl_lock */
2606 int bnx2x_nic_load(struct bnx2x *bp, int load_mode)
2607 {
2608         int port = BP_PORT(bp);
2609         int i, rc = 0, load_code = 0;
2610
2611         DP(NETIF_MSG_IFUP, "Starting NIC load\n");
2612         DP(NETIF_MSG_IFUP,
2613            "CNIC is %s\n", CNIC_ENABLED(bp) ? "enabled" : "disabled");
2614
2615 #ifdef BNX2X_STOP_ON_ERROR
2616         if (unlikely(bp->panic)) {
2617                 BNX2X_ERR("Can't load NIC when there is panic\n");
2618                 return -EPERM;
2619         }
2620 #endif
2621
2622         bp->state = BNX2X_STATE_OPENING_WAIT4_LOAD;
2623
2624         /* zero the structure w/o any lock, before SP handler is initialized */
2625         memset(&bp->last_reported_link, 0, sizeof(bp->last_reported_link));
2626         __set_bit(BNX2X_LINK_REPORT_LINK_DOWN,
2627                 &bp->last_reported_link.link_report_flags);
2628
2629         if (IS_PF(bp))
2630                 /* must be called before memory allocation and HW init */
2631                 bnx2x_ilt_set_info(bp);
2632
2633         /*
2634          * Zero fastpath structures preserving invariants like napi, which are
2635          * allocated only once, fp index, max_cos, bp pointer.
2636          * Also set fp->mode and txdata_ptr.
2637          */
2638         DP(NETIF_MSG_IFUP, "num queues: %d", bp->num_queues);
2639         for_each_queue(bp, i)
2640                 bnx2x_bz_fp(bp, i);
2641         memset(bp->bnx2x_txq, 0, (BNX2X_MAX_RSS_COUNT(bp) * BNX2X_MULTI_TX_COS +
2642                                   bp->num_cnic_queues) *
2643                                   sizeof(struct bnx2x_fp_txdata));
2644
2645         bp->fcoe_init = false;
2646
2647         /* Set the receive queues buffer size */
2648         bnx2x_set_rx_buf_size(bp);
2649
2650         if (IS_PF(bp)) {
2651                 rc = bnx2x_alloc_mem(bp);
2652                 if (rc) {
2653                         BNX2X_ERR("Unable to allocate bp memory\n");
2654                         return rc;
2655                 }
2656         }
2657
2658         /* need to be done after alloc mem, since it's self adjusting to amount
2659          * of memory available for RSS queues
2660          */
2661         rc = bnx2x_alloc_fp_mem(bp);
2662         if (rc) {
2663                 BNX2X_ERR("Unable to allocate memory for fps\n");
2664                 LOAD_ERROR_EXIT(bp, load_error0);
2665         }
2666
2667         /* Allocated memory for FW statistics  */
2668         if (bnx2x_alloc_fw_stats_mem(bp))
2669                 LOAD_ERROR_EXIT(bp, load_error0);
2670
2671         /* request pf to initialize status blocks */
2672         if (IS_VF(bp)) {
2673                 rc = bnx2x_vfpf_init(bp);
2674                 if (rc)
2675                         LOAD_ERROR_EXIT(bp, load_error0);
2676         }
2677
2678         /* As long as bnx2x_alloc_mem() may possibly update
2679          * bp->num_queues, bnx2x_set_real_num_queues() should always
2680          * come after it. At this stage cnic queues are not counted.
2681          */
2682         rc = bnx2x_set_real_num_queues(bp, 0);
2683         if (rc) {
2684                 BNX2X_ERR("Unable to set real_num_queues\n");
2685                 LOAD_ERROR_EXIT(bp, load_error0);
2686         }
2687
2688         /* configure multi cos mappings in kernel.
2689          * this configuration may be overridden by a multi class queue
2690          * discipline or by a dcbx negotiation result.
2691          */
2692         bnx2x_setup_tc(bp->dev, bp->max_cos);
2693
2694         /* Add all NAPI objects */
2695         bnx2x_add_all_napi(bp);
2696         DP(NETIF_MSG_IFUP, "napi added\n");
2697         bnx2x_napi_enable(bp);
2698
2699         if (IS_PF(bp)) {
2700                 /* set pf load just before approaching the MCP */
2701                 bnx2x_set_pf_load(bp);
2702
2703                 /* if mcp exists send load request and analyze response */
2704                 if (!BP_NOMCP(bp)) {
2705                         /* attempt to load pf */
2706                         rc = bnx2x_nic_load_request(bp, &load_code);
2707                         if (rc)
2708                                 LOAD_ERROR_EXIT(bp, load_error1);
2709
2710                         /* what did mcp say? */
2711                         rc = bnx2x_compare_fw_ver(bp, load_code, true);
2712                         if (rc) {
2713                                 bnx2x_fw_command(bp, DRV_MSG_CODE_LOAD_DONE, 0);
2714                                 LOAD_ERROR_EXIT(bp, load_error2);
2715                         }
2716                 } else {
2717                         load_code = bnx2x_nic_load_no_mcp(bp, port);
2718                 }
2719
2720                 /* mark pmf if applicable */
2721                 bnx2x_nic_load_pmf(bp, load_code);
2722
2723                 /* Init Function state controlling object */
2724                 bnx2x__init_func_obj(bp);
2725
2726                 /* Initialize HW */
2727                 rc = bnx2x_init_hw(bp, load_code);
2728                 if (rc) {
2729                         BNX2X_ERR("HW init failed, aborting\n");
2730                         bnx2x_fw_command(bp, DRV_MSG_CODE_LOAD_DONE, 0);
2731                         LOAD_ERROR_EXIT(bp, load_error2);
2732                 }
2733         }
2734
2735         bnx2x_pre_irq_nic_init(bp);
2736
2737         /* Connect to IRQs */
2738         rc = bnx2x_setup_irqs(bp);
2739         if (rc) {
2740                 BNX2X_ERR("setup irqs failed\n");
2741                 if (IS_PF(bp))
2742                         bnx2x_fw_command(bp, DRV_MSG_CODE_LOAD_DONE, 0);
2743                 LOAD_ERROR_EXIT(bp, load_error2);
2744         }
2745
2746         /* Init per-function objects */
2747         if (IS_PF(bp)) {
2748                 /* Setup NIC internals and enable interrupts */
2749                 bnx2x_post_irq_nic_init(bp, load_code);
2750
2751                 bnx2x_init_bp_objs(bp);
2752                 bnx2x_iov_nic_init(bp);
2753
2754                 /* Set AFEX default VLAN tag to an invalid value */
2755                 bp->afex_def_vlan_tag = -1;
2756                 bnx2x_nic_load_afex_dcc(bp, load_code);
2757                 bp->state = BNX2X_STATE_OPENING_WAIT4_PORT;
2758                 rc = bnx2x_func_start(bp);
2759                 if (rc) {
2760                         BNX2X_ERR("Function start failed!\n");
2761                         bnx2x_fw_command(bp, DRV_MSG_CODE_LOAD_DONE, 0);
2762
2763                         LOAD_ERROR_EXIT(bp, load_error3);
2764                 }
2765
2766                 /* Send LOAD_DONE command to MCP */
2767                 if (!BP_NOMCP(bp)) {
2768                         load_code = bnx2x_fw_command(bp,
2769                                                      DRV_MSG_CODE_LOAD_DONE, 0);
2770                         if (!load_code) {
2771                                 BNX2X_ERR("MCP response failure, aborting\n");
2772                                 rc = -EBUSY;
2773                                 LOAD_ERROR_EXIT(bp, load_error3);
2774                         }
2775                 }
2776
2777                 /* initialize FW coalescing state machines in RAM */
2778                 bnx2x_update_coalesce(bp);
2779         }
2780
2781         /* setup the leading queue */
2782         rc = bnx2x_setup_leading(bp);
2783         if (rc) {
2784                 BNX2X_ERR("Setup leading failed!\n");
2785                 LOAD_ERROR_EXIT(bp, load_error3);
2786         }
2787
2788         /* set up the rest of the queues */
2789         for_each_nondefault_eth_queue(bp, i) {
2790                 if (IS_PF(bp))
2791                         rc = bnx2x_setup_queue(bp, &bp->fp[i], false);
2792                 else /* VF */
2793                         rc = bnx2x_vfpf_setup_q(bp, &bp->fp[i], false);
2794                 if (rc) {
2795                         BNX2X_ERR("Queue %d setup failed\n", i);
2796                         LOAD_ERROR_EXIT(bp, load_error3);
2797                 }
2798         }
2799
2800         /* setup rss */
2801         rc = bnx2x_init_rss(bp);
2802         if (rc) {
2803                 BNX2X_ERR("PF RSS init failed\n");
2804                 LOAD_ERROR_EXIT(bp, load_error3);
2805         }
2806
2807         /* Now when Clients are configured we are ready to work */
2808         bp->state = BNX2X_STATE_OPEN;
2809
2810         /* Configure a ucast MAC */
2811         if (IS_PF(bp))
2812                 rc = bnx2x_set_eth_mac(bp, true);
2813         else /* vf */
2814                 rc = bnx2x_vfpf_config_mac(bp, bp->dev->dev_addr, bp->fp->index,
2815                                            true);
2816         if (rc) {
2817                 BNX2X_ERR("Setting Ethernet MAC failed\n");
2818                 LOAD_ERROR_EXIT(bp, load_error3);
2819         }
2820
2821         if (IS_PF(bp) && bp->pending_max) {
2822                 bnx2x_update_max_mf_config(bp, bp->pending_max);
2823                 bp->pending_max = 0;
2824         }
2825
2826         bp->force_link_down = false;
2827         if (bp->port.pmf) {
2828                 rc = bnx2x_initial_phy_init(bp, load_mode);
2829                 if (rc)
2830                         LOAD_ERROR_EXIT(bp, load_error3);
2831         }
2832         bp->link_params.feature_config_flags &= ~FEATURE_CONFIG_BOOT_FROM_SAN;
2833
2834         /* Start fast path */
2835
2836         /* Re-configure vlan filters */
2837         rc = bnx2x_vlan_reconfigure_vid(bp);
2838         if (rc)
2839                 LOAD_ERROR_EXIT(bp, load_error3);
2840
2841         /* Initialize Rx filter. */
2842         bnx2x_set_rx_mode_inner(bp);
2843
2844         if (bp->flags & PTP_SUPPORTED) {
2845                 bnx2x_init_ptp(bp);
2846                 bnx2x_configure_ptp_filters(bp);
2847         }
2848         /* Start Tx */
2849         switch (load_mode) {
2850         case LOAD_NORMAL:
2851                 /* Tx queue should be only re-enabled */
2852                 netif_tx_wake_all_queues(bp->dev);
2853                 break;
2854
2855         case LOAD_OPEN:
2856                 netif_tx_start_all_queues(bp->dev);
2857                 smp_mb__after_atomic();
2858                 break;
2859
2860         case LOAD_DIAG:
2861         case LOAD_LOOPBACK_EXT:
2862                 bp->state = BNX2X_STATE_DIAG;
2863                 break;
2864
2865         default:
2866                 break;
2867         }
2868
2869         if (bp->port.pmf)
2870                 bnx2x_update_drv_flags(bp, 1 << DRV_FLAGS_PORT_MASK, 0);
2871         else
2872                 bnx2x__link_status_update(bp);
2873
2874         /* start the timer */
2875         mod_timer(&bp->timer, jiffies + bp->current_interval);
2876
2877         if (CNIC_ENABLED(bp))
2878                 bnx2x_load_cnic(bp);
2879
2880         if (IS_PF(bp))
2881                 bnx2x_schedule_sp_rtnl(bp, BNX2X_SP_RTNL_GET_DRV_VERSION, 0);
2882
2883         if (IS_PF(bp) && SHMEM2_HAS(bp, drv_capabilities_flag)) {
2884                 /* mark driver is loaded in shmem2 */
2885                 u32 val;
2886                 val = SHMEM2_RD(bp, drv_capabilities_flag[BP_FW_MB_IDX(bp)]);
2887                 val &= ~DRV_FLAGS_MTU_MASK;
2888                 val |= (bp->dev->mtu << DRV_FLAGS_MTU_SHIFT);
2889                 SHMEM2_WR(bp, drv_capabilities_flag[BP_FW_MB_IDX(bp)],
2890                           val | DRV_FLAGS_CAPABILITIES_LOADED_SUPPORTED |
2891                           DRV_FLAGS_CAPABILITIES_LOADED_L2);
2892         }
2893
2894         /* Wait for all pending SP commands to complete */
2895         if (IS_PF(bp) && !bnx2x_wait_sp_comp(bp, ~0x0UL)) {
2896                 BNX2X_ERR("Timeout waiting for SP elements to complete\n");
2897                 bnx2x_nic_unload(bp, UNLOAD_CLOSE, false);
2898                 return -EBUSY;
2899         }
2900
2901         /* Update driver data for On-Chip MFW dump. */
2902         if (IS_PF(bp))
2903                 bnx2x_update_mfw_dump(bp);
2904
2905         /* If PMF - send ADMIN DCBX msg to MFW to initiate DCBX FSM */
2906         if (bp->port.pmf && (bp->state != BNX2X_STATE_DIAG))
2907                 bnx2x_dcbx_init(bp, false);
2908
2909         if (!IS_MF_SD_STORAGE_PERSONALITY_ONLY(bp))
2910                 bnx2x_set_os_driver_state(bp, OS_DRIVER_STATE_ACTIVE);
2911
2912         DP(NETIF_MSG_IFUP, "Ending successfully NIC load\n");
2913
2914         return 0;
2915
2916 #ifndef BNX2X_STOP_ON_ERROR
2917 load_error3:
2918         if (IS_PF(bp)) {
2919                 bnx2x_int_disable_sync(bp, 1);
2920
2921                 /* Clean queueable objects */
2922                 bnx2x_squeeze_objects(bp);
2923         }
2924
2925         /* Free SKBs, SGEs, TPA pool and driver internals */
2926         bnx2x_free_skbs(bp);
2927         for_each_rx_queue(bp, i)
2928                 bnx2x_free_rx_sge_range(bp, bp->fp + i, NUM_RX_SGE);
2929
2930         /* Release IRQs */
2931         bnx2x_free_irq(bp);
2932 load_error2:
2933         if (IS_PF(bp) && !BP_NOMCP(bp)) {
2934                 bnx2x_fw_command(bp, DRV_MSG_CODE_UNLOAD_REQ_WOL_MCP, 0);
2935                 bnx2x_fw_command(bp, DRV_MSG_CODE_UNLOAD_DONE, 0);
2936         }
2937
2938         bp->port.pmf = 0;
2939 load_error1:
2940         bnx2x_napi_disable(bp);
2941         bnx2x_del_all_napi(bp);
2942
2943         /* clear pf_load status, as it was already set */
2944         if (IS_PF(bp))
2945                 bnx2x_clear_pf_load(bp);
2946 load_error0:
2947         bnx2x_free_fw_stats_mem(bp);
2948         bnx2x_free_fp_mem(bp);
2949         bnx2x_free_mem(bp);
2950
2951         return rc;
2952 #endif /* ! BNX2X_STOP_ON_ERROR */
2953 }
2954
2955 int bnx2x_drain_tx_queues(struct bnx2x *bp)
2956 {
2957         u8 rc = 0, cos, i;
2958
2959         /* Wait until tx fastpath tasks complete */
2960         for_each_tx_queue(bp, i) {
2961                 struct bnx2x_fastpath *fp = &bp->fp[i];
2962
2963                 for_each_cos_in_tx_queue(fp, cos)
2964                         rc = bnx2x_clean_tx_queue(bp, fp->txdata_ptr[cos]);
2965                 if (rc)
2966                         return rc;
2967         }
2968         return 0;
2969 }
2970
2971 /* must be called with rtnl_lock */
2972 int bnx2x_nic_unload(struct bnx2x *bp, int unload_mode, bool keep_link)
2973 {
2974         int i;
2975         bool global = false;
2976
2977         DP(NETIF_MSG_IFUP, "Starting NIC unload\n");
2978
2979         if (!IS_MF_SD_STORAGE_PERSONALITY_ONLY(bp))
2980                 bnx2x_set_os_driver_state(bp, OS_DRIVER_STATE_DISABLED);
2981
2982         /* mark driver is unloaded in shmem2 */
2983         if (IS_PF(bp) && SHMEM2_HAS(bp, drv_capabilities_flag)) {
2984                 u32 val;
2985                 val = SHMEM2_RD(bp, drv_capabilities_flag[BP_FW_MB_IDX(bp)]);
2986                 SHMEM2_WR(bp, drv_capabilities_flag[BP_FW_MB_IDX(bp)],
2987                           val & ~DRV_FLAGS_CAPABILITIES_LOADED_L2);
2988         }
2989
2990         if (IS_PF(bp) && bp->recovery_state != BNX2X_RECOVERY_DONE &&
2991             (bp->state == BNX2X_STATE_CLOSED ||
2992              bp->state == BNX2X_STATE_ERROR)) {
2993                 /* We can get here if the driver has been unloaded
2994                  * during parity error recovery and is either waiting for a
2995                  * leader to complete or for other functions to unload and
2996                  * then ifdown has been issued. In this case we want to
2997                  * unload and let other functions to complete a recovery
2998                  * process.
2999                  */
3000                 bp->recovery_state = BNX2X_RECOVERY_DONE;
3001                 bp->is_leader = 0;
3002                 bnx2x_release_leader_lock(bp);
3003                 smp_mb();
3004
3005                 DP(NETIF_MSG_IFDOWN, "Releasing a leadership...\n");
3006                 BNX2X_ERR("Can't unload in closed or error state\n");
3007                 return -EINVAL;
3008         }
3009
3010         /* Nothing to do during unload if previous bnx2x_nic_load()
3011          * have not completed successfully - all resources are released.
3012          *
3013          * we can get here only after unsuccessful ndo_* callback, during which
3014          * dev->IFF_UP flag is still on.
3015          */
3016         if (bp->state == BNX2X_STATE_CLOSED || bp->state == BNX2X_STATE_ERROR)
3017                 return 0;
3018
3019         /* It's important to set the bp->state to the value different from
3020          * BNX2X_STATE_OPEN and only then stop the Tx. Otherwise bnx2x_tx_int()
3021          * may restart the Tx from the NAPI context (see bnx2x_tx_int()).
3022          */
3023         bp->state = BNX2X_STATE_CLOSING_WAIT4_HALT;
3024         smp_mb();
3025
3026         /* indicate to VFs that the PF is going down */
3027         bnx2x_iov_channel_down(bp);
3028
3029         if (CNIC_LOADED(bp))
3030                 bnx2x_cnic_notify(bp, CNIC_CTL_STOP_CMD);
3031
3032         /* Stop Tx */
3033         bnx2x_tx_disable(bp);
3034         netdev_reset_tc(bp->dev);
3035
3036         bp->rx_mode = BNX2X_RX_MODE_NONE;
3037
3038         del_timer_sync(&bp->timer);
3039
3040         if (IS_PF(bp) && !BP_NOMCP(bp)) {
3041                 /* Set ALWAYS_ALIVE bit in shmem */
3042                 bp->fw_drv_pulse_wr_seq |= DRV_PULSE_ALWAYS_ALIVE;
3043                 bnx2x_drv_pulse(bp);
3044                 bnx2x_stats_handle(bp, STATS_EVENT_STOP);
3045                 bnx2x_save_statistics(bp);
3046         }
3047
3048         /* wait till consumers catch up with producers in all queues.
3049          * If we're recovering, FW can't write to host so no reason
3050          * to wait for the queues to complete all Tx.
3051          */
3052         if (unload_mode != UNLOAD_RECOVERY)
3053                 bnx2x_drain_tx_queues(bp);
3054
3055         /* if VF indicate to PF this function is going down (PF will delete sp
3056          * elements and clear initializations
3057          */
3058         if (IS_VF(bp))
3059                 bnx2x_vfpf_close_vf(bp);
3060         else if (unload_mode != UNLOAD_RECOVERY)
3061                 /* if this is a normal/close unload need to clean up chip*/
3062                 bnx2x_chip_cleanup(bp, unload_mode, keep_link);
3063         else {
3064                 /* Send the UNLOAD_REQUEST to the MCP */
3065                 bnx2x_send_unload_req(bp, unload_mode);
3066
3067                 /* Prevent transactions to host from the functions on the
3068                  * engine that doesn't reset global blocks in case of global
3069                  * attention once global blocks are reset and gates are opened
3070                  * (the engine which leader will perform the recovery
3071                  * last).
3072                  */
3073                 if (!CHIP_IS_E1x(bp))
3074                         bnx2x_pf_disable(bp);
3075
3076                 /* Disable HW interrupts, NAPI */
3077                 bnx2x_netif_stop(bp, 1);
3078                 /* Delete all NAPI objects */
3079                 bnx2x_del_all_napi(bp);
3080                 if (CNIC_LOADED(bp))
3081                         bnx2x_del_all_napi_cnic(bp);
3082                 /* Release IRQs */
3083                 bnx2x_free_irq(bp);
3084
3085                 /* Report UNLOAD_DONE to MCP */
3086                 bnx2x_send_unload_done(bp, false);
3087         }
3088
3089         /*
3090          * At this stage no more interrupts will arrive so we may safely clean
3091          * the queueable objects here in case they failed to get cleaned so far.
3092          */
3093         if (IS_PF(bp))
3094                 bnx2x_squeeze_objects(bp);
3095
3096         /* There should be no more pending SP commands at this stage */
3097         bp->sp_state = 0;
3098
3099         bp->port.pmf = 0;
3100
3101         /* clear pending work in rtnl task */
3102         bp->sp_rtnl_state = 0;
3103         smp_mb();
3104
3105         /* Free SKBs, SGEs, TPA pool and driver internals */
3106         bnx2x_free_skbs(bp);
3107         if (CNIC_LOADED(bp))
3108                 bnx2x_free_skbs_cnic(bp);
3109         for_each_rx_queue(bp, i)
3110                 bnx2x_free_rx_sge_range(bp, bp->fp + i, NUM_RX_SGE);
3111
3112         bnx2x_free_fp_mem(bp);
3113         if (CNIC_LOADED(bp))
3114                 bnx2x_free_fp_mem_cnic(bp);
3115
3116         if (IS_PF(bp)) {
3117                 if (CNIC_LOADED(bp))
3118                         bnx2x_free_mem_cnic(bp);
3119         }
3120         bnx2x_free_mem(bp);
3121
3122         bp->state = BNX2X_STATE_CLOSED;
3123         bp->cnic_loaded = false;
3124
3125         /* Clear driver version indication in shmem */
3126         if (IS_PF(bp) && !BP_NOMCP(bp))
3127                 bnx2x_update_mng_version(bp);
3128
3129         /* Check if there are pending parity attentions. If there are - set
3130          * RECOVERY_IN_PROGRESS.
3131          */
3132         if (IS_PF(bp) && bnx2x_chk_parity_attn(bp, &global, false)) {
3133                 bnx2x_set_reset_in_progress(bp);
3134
3135                 /* Set RESET_IS_GLOBAL if needed */
3136                 if (global)
3137                         bnx2x_set_reset_global(bp);
3138         }
3139
3140         /* The last driver must disable a "close the gate" if there is no
3141          * parity attention or "process kill" pending.
3142          */
3143         if (IS_PF(bp) &&
3144             !bnx2x_clear_pf_load(bp) &&
3145             bnx2x_reset_is_done(bp, BP_PATH(bp)))
3146                 bnx2x_disable_close_the_gate(bp);
3147
3148         DP(NETIF_MSG_IFUP, "Ending NIC unload\n");
3149
3150         return 0;
3151 }
3152
3153 int bnx2x_set_power_state(struct bnx2x *bp, pci_power_t state)
3154 {
3155         u16 pmcsr;
3156
3157         /* If there is no power capability, silently succeed */
3158         if (!bp->pdev->pm_cap) {
3159                 BNX2X_DEV_INFO("No power capability. Breaking.\n");
3160                 return 0;
3161         }
3162
3163         pci_read_config_word(bp->pdev, bp->pdev->pm_cap + PCI_PM_CTRL, &pmcsr);
3164
3165         switch (state) {
3166         case PCI_D0:
3167                 pci_write_config_word(bp->pdev, bp->pdev->pm_cap + PCI_PM_CTRL,
3168                                       ((pmcsr & ~PCI_PM_CTRL_STATE_MASK) |
3169                                        PCI_PM_CTRL_PME_STATUS));
3170
3171                 if (pmcsr & PCI_PM_CTRL_STATE_MASK)
3172                         /* delay required during transition out of D3hot */
3173                         msleep(20);
3174                 break;
3175
3176         case PCI_D3hot:
3177                 /* If there are other clients above don't
3178                    shut down the power */
3179                 if (atomic_read(&bp->pdev->enable_cnt) != 1)
3180                         return 0;
3181                 /* Don't shut down the power for emulation and FPGA */
3182                 if (CHIP_REV_IS_SLOW(bp))
3183                         return 0;
3184
3185                 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
3186                 pmcsr |= 3;
3187
3188                 if (bp->wol)
3189                         pmcsr |= PCI_PM_CTRL_PME_ENABLE;
3190
3191                 pci_write_config_word(bp->pdev, bp->pdev->pm_cap + PCI_PM_CTRL,
3192                                       pmcsr);
3193
3194                 /* No more memory access after this point until
3195                 * device is brought back to D0.
3196                 */
3197                 break;
3198
3199         default:
3200                 dev_err(&bp->pdev->dev, "Can't support state = %d\n", state);
3201                 return -EINVAL;
3202         }
3203         return 0;
3204 }
3205
3206 /*
3207  * net_device service functions
3208  */
3209 static int bnx2x_poll(struct napi_struct *napi, int budget)
3210 {
3211         struct bnx2x_fastpath *fp = container_of(napi, struct bnx2x_fastpath,
3212                                                  napi);
3213         struct bnx2x *bp = fp->bp;
3214         int rx_work_done;
3215         u8 cos;
3216
3217 #ifdef BNX2X_STOP_ON_ERROR
3218         if (unlikely(bp->panic)) {
3219                 napi_complete(napi);
3220                 return 0;
3221         }
3222 #endif
3223         for_each_cos_in_tx_queue(fp, cos)
3224                 if (bnx2x_tx_queue_has_work(fp->txdata_ptr[cos]))
3225                         bnx2x_tx_int(bp, fp->txdata_ptr[cos]);
3226
3227         rx_work_done = (bnx2x_has_rx_work(fp)) ? bnx2x_rx_int(fp, budget) : 0;
3228
3229         if (rx_work_done < budget) {
3230                 /* No need to update SB for FCoE L2 ring as long as
3231                  * it's connected to the default SB and the SB
3232                  * has been updated when NAPI was scheduled.
3233                  */
3234                 if (IS_FCOE_FP(fp)) {
3235                         napi_complete_done(napi, rx_work_done);
3236                 } else {
3237                         bnx2x_update_fpsb_idx(fp);
3238                         /* bnx2x_has_rx_work() reads the status block,
3239                          * thus we need to ensure that status block indices
3240                          * have been actually read (bnx2x_update_fpsb_idx)
3241                          * prior to this check (bnx2x_has_rx_work) so that
3242                          * we won't write the "newer" value of the status block
3243                          * to IGU (if there was a DMA right after
3244                          * bnx2x_has_rx_work and if there is no rmb, the memory
3245                          * reading (bnx2x_update_fpsb_idx) may be postponed
3246                          * to right before bnx2x_ack_sb). In this case there
3247                          * will never be another interrupt until there is
3248                          * another update of the status block, while there
3249                          * is still unhandled work.
3250                          */
3251                         rmb();
3252
3253                         if (!(bnx2x_has_rx_work(fp) || bnx2x_has_tx_work(fp))) {
3254                                 if (napi_complete_done(napi, rx_work_done)) {
3255                                         /* Re-enable interrupts */
3256                                         DP(NETIF_MSG_RX_STATUS,
3257                                            "Update index to %d\n", fp->fp_hc_idx);
3258                                         bnx2x_ack_sb(bp, fp->igu_sb_id, USTORM_ID,
3259                                                      le16_to_cpu(fp->fp_hc_idx),
3260                                                      IGU_INT_ENABLE, 1);
3261                                 }
3262                         } else {
3263                                 rx_work_done = budget;
3264                         }
3265                 }
3266         }
3267
3268         return rx_work_done;
3269 }
3270
3271 /* we split the first BD into headers and data BDs
3272  * to ease the pain of our fellow microcode engineers
3273  * we use one mapping for both BDs
3274  */
3275 static u16 bnx2x_tx_split(struct bnx2x *bp,
3276                           struct bnx2x_fp_txdata *txdata,
3277                           struct sw_tx_bd *tx_buf,
3278                           struct eth_tx_start_bd **tx_bd, u16 hlen,
3279                           u16 bd_prod)
3280 {
3281         struct eth_tx_start_bd *h_tx_bd = *tx_bd;
3282         struct eth_tx_bd *d_tx_bd;
3283         dma_addr_t mapping;
3284         int old_len = le16_to_cpu(h_tx_bd->nbytes);
3285
3286         /* first fix first BD */
3287         h_tx_bd->nbytes = cpu_to_le16(hlen);
3288
3289         DP(NETIF_MSG_TX_QUEUED, "TSO split header size is %d (%x:%x)\n",
3290            h_tx_bd->nbytes, h_tx_bd->addr_hi, h_tx_bd->addr_lo);
3291
3292         /* now get a new data BD
3293          * (after the pbd) and fill it */
3294         bd_prod = TX_BD(NEXT_TX_IDX(bd_prod));
3295         d_tx_bd = &txdata->tx_desc_ring[bd_prod].reg_bd;
3296
3297         mapping = HILO_U64(le32_to_cpu(h_tx_bd->addr_hi),
3298                            le32_to_cpu(h_tx_bd->addr_lo)) + hlen;
3299
3300         d_tx_bd->addr_hi = cpu_to_le32(U64_HI(mapping));
3301         d_tx_bd->addr_lo = cpu_to_le32(U64_LO(mapping));
3302         d_tx_bd->nbytes = cpu_to_le16(old_len - hlen);
3303
3304         /* this marks the BD as one that has no individual mapping */
3305         tx_buf->flags |= BNX2X_TSO_SPLIT_BD;
3306
3307         DP(NETIF_MSG_TX_QUEUED,
3308            "TSO split data size is %d (%x:%x)\n",
3309            d_tx_bd->nbytes, d_tx_bd->addr_hi, d_tx_bd->addr_lo);
3310
3311         /* update tx_bd */
3312         *tx_bd = (struct eth_tx_start_bd *)d_tx_bd;
3313
3314         return bd_prod;
3315 }
3316
3317 #define bswab32(b32) ((__force __le32) swab32((__force __u32) (b32)))
3318 #define bswab16(b16) ((__force __le16) swab16((__force __u16) (b16)))
3319 static __le16 bnx2x_csum_fix(unsigned char *t_header, u16 csum, s8 fix)
3320 {
3321         __sum16 tsum = (__force __sum16) csum;
3322
3323         if (fix > 0)
3324                 tsum = ~csum_fold(csum_sub((__force __wsum) csum,
3325                                   csum_partial(t_header - fix, fix, 0)));
3326
3327         else if (fix < 0)
3328                 tsum = ~csum_fold(csum_add((__force __wsum) csum,
3329                                   csum_partial(t_header, -fix, 0)));
3330
3331         return bswab16(tsum);
3332 }
3333
3334 static u32 bnx2x_xmit_type(struct bnx2x *bp, struct sk_buff *skb)
3335 {
3336         u32 rc;
3337         __u8 prot = 0;
3338         __be16 protocol;
3339
3340         if (skb->ip_summed != CHECKSUM_PARTIAL)
3341                 return XMIT_PLAIN;
3342
3343         protocol = vlan_get_protocol(skb);
3344         if (protocol == htons(ETH_P_IPV6)) {
3345                 rc = XMIT_CSUM_V6;
3346                 prot = ipv6_hdr(skb)->nexthdr;
3347         } else {
3348                 rc = XMIT_CSUM_V4;
3349                 prot = ip_hdr(skb)->protocol;
3350         }
3351
3352         if (!CHIP_IS_E1x(bp) && skb->encapsulation) {
3353                 if (inner_ip_hdr(skb)->version == 6) {
3354                         rc |= XMIT_CSUM_ENC_V6;
3355                         if (inner_ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
3356                                 rc |= XMIT_CSUM_TCP;
3357                 } else {
3358                         rc |= XMIT_CSUM_ENC_V4;
3359                         if (inner_ip_hdr(skb)->protocol == IPPROTO_TCP)
3360                                 rc |= XMIT_CSUM_TCP;
3361                 }
3362         }
3363         if (prot == IPPROTO_TCP)
3364                 rc |= XMIT_CSUM_TCP;
3365
3366         if (skb_is_gso(skb)) {
3367                 if (skb_is_gso_v6(skb)) {
3368                         rc |= (XMIT_GSO_V6 | XMIT_CSUM_TCP);
3369                         if (rc & XMIT_CSUM_ENC)
3370                                 rc |= XMIT_GSO_ENC_V6;
3371                 } else {
3372                         rc |= (XMIT_GSO_V4 | XMIT_CSUM_TCP);
3373                         if (rc & XMIT_CSUM_ENC)
3374                                 rc |= XMIT_GSO_ENC_V4;
3375                 }
3376         }
3377
3378         return rc;
3379 }
3380
3381 /* VXLAN: 4 = 1 (for linear data BD) + 3 (2 for PBD and last BD) */
3382 #define BNX2X_NUM_VXLAN_TSO_WIN_SUB_BDS         4
3383
3384 /* Regular: 3 = 1 (for linear data BD) + 2 (for PBD and last BD) */
3385 #define BNX2X_NUM_TSO_WIN_SUB_BDS               3
3386
3387 #if (MAX_SKB_FRAGS >= MAX_FETCH_BD - BDS_PER_TX_PKT)
3388 /* check if packet requires linearization (packet is too fragmented)
3389    no need to check fragmentation if page size > 8K (there will be no
3390    violation to FW restrictions) */
3391 static int bnx2x_pkt_req_lin(struct bnx2x *bp, struct sk_buff *skb,
3392                              u32 xmit_type)
3393 {
3394         int first_bd_sz = 0, num_tso_win_sub = BNX2X_NUM_TSO_WIN_SUB_BDS;
3395         int to_copy = 0, hlen = 0;
3396
3397         if (xmit_type & XMIT_GSO_ENC)
3398                 num_tso_win_sub = BNX2X_NUM_VXLAN_TSO_WIN_SUB_BDS;
3399
3400         if (skb_shinfo(skb)->nr_frags >= (MAX_FETCH_BD - num_tso_win_sub)) {
3401                 if (xmit_type & XMIT_GSO) {
3402                         unsigned short lso_mss = skb_shinfo(skb)->gso_size;
3403                         int wnd_size = MAX_FETCH_BD - num_tso_win_sub;
3404                         /* Number of windows to check */
3405                         int num_wnds = skb_shinfo(skb)->nr_frags - wnd_size;
3406                         int wnd_idx = 0;
3407                         int frag_idx = 0;
3408                         u32 wnd_sum = 0;
3409
3410                         /* Headers length */
3411                         if (xmit_type & XMIT_GSO_ENC)
3412                                 hlen = (int)(skb_inner_transport_header(skb) -
3413                                              skb->data) +
3414                                              inner_tcp_hdrlen(skb);
3415                         else
3416                                 hlen = (int)(skb_transport_header(skb) -
3417                                              skb->data) + tcp_hdrlen(skb);
3418
3419                         /* Amount of data (w/o headers) on linear part of SKB*/
3420                         first_bd_sz = skb_headlen(skb) - hlen;
3421
3422                         wnd_sum  = first_bd_sz;
3423
3424                         /* Calculate the first sum - it's special */
3425                         for (frag_idx = 0; frag_idx < wnd_size - 1; frag_idx++)
3426                                 wnd_sum +=
3427                                         skb_frag_size(&skb_shinfo(skb)->frags[frag_idx]);
3428
3429                         /* If there was data on linear skb data - check it */
3430                         if (first_bd_sz > 0) {
3431                                 if (unlikely(wnd_sum < lso_mss)) {
3432                                         to_copy = 1;
3433                                         goto exit_lbl;
3434                                 }
3435
3436                                 wnd_sum -= first_bd_sz;
3437                         }
3438
3439                         /* Others are easier: run through the frag list and
3440                            check all windows */
3441                         for (wnd_idx = 0; wnd_idx <= num_wnds; wnd_idx++) {
3442                                 wnd_sum +=
3443                           skb_frag_size(&skb_shinfo(skb)->frags[wnd_idx + wnd_size - 1]);
3444
3445                                 if (unlikely(wnd_sum < lso_mss)) {
3446                                         to_copy = 1;
3447                                         break;
3448                                 }
3449                                 wnd_sum -=
3450                                         skb_frag_size(&skb_shinfo(skb)->frags[wnd_idx]);
3451                         }
3452                 } else {
3453                         /* in non-LSO too fragmented packet should always
3454                            be linearized */
3455                         to_copy = 1;
3456                 }
3457         }
3458
3459 exit_lbl:
3460         if (unlikely(to_copy))
3461                 DP(NETIF_MSG_TX_QUEUED,
3462                    "Linearization IS REQUIRED for %s packet. num_frags %d  hlen %d  first_bd_sz %d\n",
3463                    (xmit_type & XMIT_GSO) ? "LSO" : "non-LSO",
3464                    skb_shinfo(skb)->nr_frags, hlen, first_bd_sz);
3465
3466         return to_copy;
3467 }
3468 #endif
3469
3470 /**
3471  * bnx2x_set_pbd_gso - update PBD in GSO case.
3472  *
3473  * @skb:        packet skb
3474  * @pbd:        parse BD
3475  * @xmit_type:  xmit flags
3476  */
3477 static void bnx2x_set_pbd_gso(struct sk_buff *skb,
3478                               struct eth_tx_parse_bd_e1x *pbd,
3479                               u32 xmit_type)
3480 {
3481         pbd->lso_mss = cpu_to_le16(skb_shinfo(skb)->gso_size);
3482         pbd->tcp_send_seq = bswab32(tcp_hdr(skb)->seq);
3483         pbd->tcp_flags = pbd_tcp_flags(tcp_hdr(skb));
3484
3485         if (xmit_type & XMIT_GSO_V4) {
3486                 pbd->ip_id = bswab16(ip_hdr(skb)->id);
3487                 pbd->tcp_pseudo_csum =
3488                         bswab16(~csum_tcpudp_magic(ip_hdr(skb)->saddr,
3489                                                    ip_hdr(skb)->daddr,
3490                                                    0, IPPROTO_TCP, 0));
3491         } else {
3492                 pbd->tcp_pseudo_csum =
3493                         bswab16(~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
3494                                                  &ipv6_hdr(skb)->daddr,
3495                                                  0, IPPROTO_TCP, 0));
3496         }
3497
3498         pbd->global_data |=
3499                 cpu_to_le16(ETH_TX_PARSE_BD_E1X_PSEUDO_CS_WITHOUT_LEN);
3500 }
3501
3502 /**
3503  * bnx2x_set_pbd_csum_enc - update PBD with checksum and return header length
3504  *
3505  * @bp:                 driver handle
3506  * @skb:                packet skb
3507  * @parsing_data:       data to be updated
3508  * @xmit_type:          xmit flags
3509  *
3510  * 57712/578xx related, when skb has encapsulation
3511  */
3512 static u8 bnx2x_set_pbd_csum_enc(struct bnx2x *bp, struct sk_buff *skb,
3513                                  u32 *parsing_data, u32 xmit_type)
3514 {
3515         *parsing_data |=
3516                 ((((u8 *)skb_inner_transport_header(skb) - skb->data) >> 1) <<
3517                 ETH_TX_PARSE_BD_E2_L4_HDR_START_OFFSET_W_SHIFT) &
3518                 ETH_TX_PARSE_BD_E2_L4_HDR_START_OFFSET_W;
3519
3520         if (xmit_type & XMIT_CSUM_TCP) {
3521                 *parsing_data |= ((inner_tcp_hdrlen(skb) / 4) <<
3522                         ETH_TX_PARSE_BD_E2_TCP_HDR_LENGTH_DW_SHIFT) &
3523                         ETH_TX_PARSE_BD_E2_TCP_HDR_LENGTH_DW;
3524
3525                 return skb_inner_transport_header(skb) +
3526                         inner_tcp_hdrlen(skb) - skb->data;
3527         }
3528
3529         /* We support checksum offload for TCP and UDP only.
3530          * No need to pass the UDP header length - it's a constant.
3531          */
3532         return skb_inner_transport_header(skb) +
3533                 sizeof(struct udphdr) - skb->data;
3534 }
3535
3536 /**
3537  * bnx2x_set_pbd_csum_e2 - update PBD with checksum and return header length
3538  *
3539  * @bp:                 driver handle
3540  * @skb:                packet skb
3541  * @parsing_data:       data to be updated
3542  * @xmit_type:          xmit flags
3543  *
3544  * 57712/578xx related
3545  */
3546 static u8 bnx2x_set_pbd_csum_e2(struct bnx2x *bp, struct sk_buff *skb,
3547                                 u32 *parsing_data, u32 xmit_type)
3548 {
3549         *parsing_data |=
3550                 ((((u8 *)skb_transport_header(skb) - skb->data) >> 1) <<
3551                 ETH_TX_PARSE_BD_E2_L4_HDR_START_OFFSET_W_SHIFT) &
3552                 ETH_TX_PARSE_BD_E2_L4_HDR_START_OFFSET_W;
3553
3554         if (xmit_type & XMIT_CSUM_TCP) {
3555                 *parsing_data |= ((tcp_hdrlen(skb) / 4) <<
3556                         ETH_TX_PARSE_BD_E2_TCP_HDR_LENGTH_DW_SHIFT) &
3557                         ETH_TX_PARSE_BD_E2_TCP_HDR_LENGTH_DW;
3558
3559                 return skb_transport_header(skb) + tcp_hdrlen(skb) - skb->data;
3560         }
3561         /* We support checksum offload for TCP and UDP only.
3562          * No need to pass the UDP header length - it's a constant.
3563          */
3564         return skb_transport_header(skb) + sizeof(struct udphdr) - skb->data;
3565 }
3566
3567 /* set FW indication according to inner or outer protocols if tunneled */
3568 static void bnx2x_set_sbd_csum(struct bnx2x *bp, struct sk_buff *skb,
3569                                struct eth_tx_start_bd *tx_start_bd,
3570                                u32 xmit_type)
3571 {
3572         tx_start_bd->bd_flags.as_bitfield |= ETH_TX_BD_FLAGS_L4_CSUM;
3573
3574         if (xmit_type & (XMIT_CSUM_ENC_V6 | XMIT_CSUM_V6))
3575                 tx_start_bd->bd_flags.as_bitfield |= ETH_TX_BD_FLAGS_IPV6;
3576
3577         if (!(xmit_type & XMIT_CSUM_TCP))
3578                 tx_start_bd->bd_flags.as_bitfield |= ETH_TX_BD_FLAGS_IS_UDP;
3579 }
3580
3581 /**
3582  * bnx2x_set_pbd_csum - update PBD with checksum and return header length
3583  *
3584  * @bp:         driver handle
3585  * @skb:        packet skb
3586  * @pbd:        parse BD to be updated
3587  * @xmit_type:  xmit flags
3588  */
3589 static u8 bnx2x_set_pbd_csum(struct bnx2x *bp, struct sk_buff *skb,
3590                              struct eth_tx_parse_bd_e1x *pbd,
3591                              u32 xmit_type)
3592 {
3593         u8 hlen = (skb_network_header(skb) - skb->data) >> 1;
3594
3595         /* for now NS flag is not used in Linux */
3596         pbd->global_data =
3597                 cpu_to_le16(hlen |
3598                             ((skb->protocol == cpu_to_be16(ETH_P_8021Q)) <<
3599                              ETH_TX_PARSE_BD_E1X_LLC_SNAP_EN_SHIFT));
3600
3601         pbd->ip_hlen_w = (skb_transport_header(skb) -
3602                         skb_network_header(skb)) >> 1;
3603
3604         hlen += pbd->ip_hlen_w;
3605
3606         /* We support checksum offload for TCP and UDP only */
3607         if (xmit_type & XMIT_CSUM_TCP)
3608                 hlen += tcp_hdrlen(skb) / 2;
3609         else
3610                 hlen += sizeof(struct udphdr) / 2;
3611
3612         pbd->total_hlen_w = cpu_to_le16(hlen);
3613         hlen = hlen*2;
3614
3615         if (xmit_type & XMIT_CSUM_TCP) {
3616                 pbd->tcp_pseudo_csum = bswab16(tcp_hdr(skb)->check);
3617
3618         } else {
3619                 s8 fix = SKB_CS_OFF(skb); /* signed! */
3620
3621                 DP(NETIF_MSG_TX_QUEUED,
3622                    "hlen %d  fix %d  csum before fix %x\n",
3623                    le16_to_cpu(pbd->total_hlen_w), fix, SKB_CS(skb));
3624
3625                 /* HW bug: fixup the CSUM */
3626                 pbd->tcp_pseudo_csum =
3627                         bnx2x_csum_fix(skb_transport_header(skb),
3628                                        SKB_CS(skb), fix);
3629
3630                 DP(NETIF_MSG_TX_QUEUED, "csum after fix %x\n",
3631                    pbd->tcp_pseudo_csum);
3632         }
3633
3634         return hlen;
3635 }
3636
3637 static void bnx2x_update_pbds_gso_enc(struct sk_buff *skb,
3638                                       struct eth_tx_parse_bd_e2 *pbd_e2,
3639                                       struct eth_tx_parse_2nd_bd *pbd2,
3640                                       u16 *global_data,
3641                                       u32 xmit_type)
3642 {
3643         u16 hlen_w = 0;
3644         u8 outerip_off, outerip_len = 0;
3645
3646         /* from outer IP to transport */
3647         hlen_w = (skb_inner_transport_header(skb) -
3648                   skb_network_header(skb)) >> 1;
3649
3650         /* transport len */
3651         hlen_w += inner_tcp_hdrlen(skb) >> 1;
3652
3653         pbd2->fw_ip_hdr_to_payload_w = hlen_w;
3654
3655         /* outer IP header info */
3656         if (xmit_type & XMIT_CSUM_V4) {
3657                 struct iphdr *iph = ip_hdr(skb);
3658                 u32 csum = (__force u32)(~iph->check) -
3659                            (__force u32)iph->tot_len -
3660                            (__force u32)iph->frag_off;
3661
3662                 outerip_len = iph->ihl << 1;
3663
3664                 pbd2->fw_ip_csum_wo_len_flags_frag =
3665                         bswab16(csum_fold((__force __wsum)csum));
3666         } else {
3667                 pbd2->fw_ip_hdr_to_payload_w =
3668                         hlen_w - ((sizeof(struct ipv6hdr)) >> 1);
3669                 pbd_e2->data.tunnel_data.flags |=
3670                         ETH_TUNNEL_DATA_IPV6_OUTER;
3671         }
3672
3673         pbd2->tcp_send_seq = bswab32(inner_tcp_hdr(skb)->seq);
3674
3675         pbd2->tcp_flags = pbd_tcp_flags(inner_tcp_hdr(skb));
3676
3677         /* inner IP header info */
3678         if (xmit_type & XMIT_CSUM_ENC_V4) {
3679                 pbd2->hw_ip_id = bswab16(inner_ip_hdr(skb)->id);
3680
3681                 pbd_e2->data.tunnel_data.pseudo_csum =
3682                         bswab16(~csum_tcpudp_magic(
3683                                         inner_ip_hdr(skb)->saddr,
3684                                         inner_ip_hdr(skb)->daddr,
3685                                         0, IPPROTO_TCP, 0));
3686         } else {
3687                 pbd_e2->data.tunnel_data.pseudo_csum =
3688                         bswab16(~csum_ipv6_magic(
3689                                         &inner_ipv6_hdr(skb)->saddr,
3690                                         &inner_ipv6_hdr(skb)->daddr,
3691                                         0, IPPROTO_TCP, 0));
3692         }
3693
3694         outerip_off = (skb_network_header(skb) - skb->data) >> 1;
3695
3696         *global_data |=
3697                 outerip_off |
3698                 (outerip_len <<
3699                         ETH_TX_PARSE_2ND_BD_IP_HDR_LEN_OUTER_W_SHIFT) |
3700                 ((skb->protocol == cpu_to_be16(ETH_P_8021Q)) <<
3701                         ETH_TX_PARSE_2ND_BD_LLC_SNAP_EN_SHIFT);
3702
3703         if (ip_hdr(skb)->protocol == IPPROTO_UDP) {
3704                 SET_FLAG(*global_data, ETH_TX_PARSE_2ND_BD_TUNNEL_UDP_EXIST, 1);
3705                 pbd2->tunnel_udp_hdr_start_w = skb_transport_offset(skb) >> 1;
3706         }
3707 }
3708
3709 static inline void bnx2x_set_ipv6_ext_e2(struct sk_buff *skb, u32 *parsing_data,
3710                                          u32 xmit_type)
3711 {
3712         struct ipv6hdr *ipv6;
3713
3714         if (!(xmit_type & (XMIT_GSO_ENC_V6 | XMIT_GSO_V6)))
3715                 return;
3716
3717         if (xmit_type & XMIT_GSO_ENC_V6)
3718                 ipv6 = inner_ipv6_hdr(skb);
3719         else /* XMIT_GSO_V6 */
3720                 ipv6 = ipv6_hdr(skb);
3721
3722         if (ipv6->nexthdr == NEXTHDR_IPV6)
3723                 *parsing_data |= ETH_TX_PARSE_BD_E2_IPV6_WITH_EXT_HDR;
3724 }
3725
3726 /* called with netif_tx_lock
3727  * bnx2x_tx_int() runs without netif_tx_lock unless it needs to call
3728  * netif_wake_queue()
3729  */
3730 netdev_tx_t bnx2x_start_xmit(struct sk_buff *skb, struct net_device *dev)
3731 {
3732         struct bnx2x *bp = netdev_priv(dev);
3733
3734         struct netdev_queue *txq;
3735         struct bnx2x_fp_txdata *txdata;
3736         struct sw_tx_bd *tx_buf;
3737         struct eth_tx_start_bd *tx_start_bd, *first_bd;
3738         struct eth_tx_bd *tx_data_bd, *total_pkt_bd = NULL;
3739         struct eth_tx_parse_bd_e1x *pbd_e1x = NULL;
3740         struct eth_tx_parse_bd_e2 *pbd_e2 = NULL;
3741         struct eth_tx_parse_2nd_bd *pbd2 = NULL;
3742         u32 pbd_e2_parsing_data = 0;
3743         u16 pkt_prod, bd_prod;
3744         int nbd, txq_index;
3745         dma_addr_t mapping;
3746         u32 xmit_type = bnx2x_xmit_type(bp, skb);
3747         int i;
3748         u8 hlen = 0;
3749         __le16 pkt_size = 0;
3750         struct ethhdr *eth;
3751         u8 mac_type = UNICAST_ADDRESS;
3752
3753 #ifdef BNX2X_STOP_ON_ERROR
3754         if (unlikely(bp->panic))
3755                 return NETDEV_TX_BUSY;
3756 #endif
3757
3758         txq_index = skb_get_queue_mapping(skb);
3759         txq = netdev_get_tx_queue(dev, txq_index);
3760
3761         BUG_ON(txq_index >= MAX_ETH_TXQ_IDX(bp) + (CNIC_LOADED(bp) ? 1 : 0));
3762
3763         txdata = &bp->bnx2x_txq[txq_index];
3764
3765         /* enable this debug print to view the transmission queue being used
3766         DP(NETIF_MSG_TX_QUEUED, "indices: txq %d, fp %d, txdata %d\n",
3767            txq_index, fp_index, txdata_index); */
3768
3769         /* enable this debug print to view the transmission details
3770         DP(NETIF_MSG_TX_QUEUED,
3771            "transmitting packet cid %d fp index %d txdata_index %d tx_data ptr %p fp pointer %p\n",
3772            txdata->cid, fp_index, txdata_index, txdata, fp); */
3773
3774         if (unlikely(bnx2x_tx_avail(bp, txdata) <
3775                         skb_shinfo(skb)->nr_frags +
3776                         BDS_PER_TX_PKT +
3777                         NEXT_CNT_PER_TX_PKT(MAX_BDS_PER_TX_PKT))) {
3778                 /* Handle special storage cases separately */
3779                 if (txdata->tx_ring_size == 0) {
3780                         struct bnx2x_eth_q_stats *q_stats =
3781                                 bnx2x_fp_qstats(bp, txdata->parent_fp);
3782                         q_stats->driver_filtered_tx_pkt++;
3783                         dev_kfree_skb(skb);
3784                         return NETDEV_TX_OK;
3785                 }
3786                 bnx2x_fp_qstats(bp, txdata->parent_fp)->driver_xoff++;
3787                 netif_tx_stop_queue(txq);
3788                 BNX2X_ERR("BUG! Tx ring full when queue awake!\n");
3789
3790                 return NETDEV_TX_BUSY;
3791         }
3792
3793         DP(NETIF_MSG_TX_QUEUED,
3794            "queue[%d]: SKB: summed %x  protocol %x protocol(%x,%x) gso type %x  xmit_type %x len %d\n",
3795            txq_index, skb->ip_summed, skb->protocol, ipv6_hdr(skb)->nexthdr,
3796            ip_hdr(skb)->protocol, skb_shinfo(skb)->gso_type, xmit_type,
3797            skb->len);
3798
3799         eth = (struct ethhdr *)skb->data;
3800
3801         /* set flag according to packet type (UNICAST_ADDRESS is default)*/
3802         if (unlikely(is_multicast_ether_addr(eth->h_dest))) {
3803                 if (is_broadcast_ether_addr(eth->h_dest))
3804                         mac_type = BROADCAST_ADDRESS;
3805                 else
3806                         mac_type = MULTICAST_ADDRESS;
3807         }
3808
3809 #if (MAX_SKB_FRAGS >= MAX_FETCH_BD - BDS_PER_TX_PKT)
3810         /* First, check if we need to linearize the skb (due to FW
3811            restrictions). No need to check fragmentation if page size > 8K
3812            (there will be no violation to FW restrictions) */
3813         if (bnx2x_pkt_req_lin(bp, skb, xmit_type)) {
3814                 /* Statistics of linearization */
3815                 bp->lin_cnt++;
3816                 if (skb_linearize(skb) != 0) {
3817                         DP(NETIF_MSG_TX_QUEUED,
3818                            "SKB linearization failed - silently dropping this SKB\n");
3819                         dev_kfree_skb_any(skb);
3820                         return NETDEV_TX_OK;
3821                 }
3822         }
3823 #endif
3824         /* Map skb linear data for DMA */
3825         mapping = dma_map_single(&bp->pdev->dev, skb->data,
3826                                  skb_headlen(skb), DMA_TO_DEVICE);
3827         if (unlikely(dma_mapping_error(&bp->pdev->dev, mapping))) {
3828                 DP(NETIF_MSG_TX_QUEUED,
3829                    "SKB mapping failed - silently dropping this SKB\n");
3830                 dev_kfree_skb_any(skb);
3831                 return NETDEV_TX_OK;
3832         }
3833         /*
3834         Please read carefully. First we use one BD which we mark as start,
3835         then we have a parsing info BD (used for TSO or xsum),
3836         and only then we have the rest of the TSO BDs.
3837         (don't forget to mark the last one as last,
3838         and to unmap only AFTER you write to the BD ...)
3839         And above all, all pdb sizes are in words - NOT DWORDS!
3840         */
3841
3842         /* get current pkt produced now - advance it just before sending packet
3843          * since mapping of pages may fail and cause packet to be dropped
3844          */
3845         pkt_prod = txdata->tx_pkt_prod;
3846         bd_prod = TX_BD(txdata->tx_bd_prod);
3847
3848         /* get a tx_buf and first BD
3849          * tx_start_bd may be changed during SPLIT,
3850          * but first_bd will always stay first
3851          */
3852         tx_buf = &txdata->tx_buf_ring[TX_BD(pkt_prod)];
3853         tx_start_bd = &txdata->tx_desc_ring[bd_prod].start_bd;
3854         first_bd = tx_start_bd;
3855
3856         tx_start_bd->bd_flags.as_bitfield = ETH_TX_BD_FLAGS_START_BD;
3857
3858         if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {
3859                 if (!(bp->flags & TX_TIMESTAMPING_EN)) {
3860                         BNX2X_ERR("Tx timestamping was not enabled, this packet will not be timestamped\n");
3861                 } else if (bp->ptp_tx_skb) {
3862                         BNX2X_ERR("The device supports only a single outstanding packet to timestamp, this packet will not be timestamped\n");
3863                 } else {
3864                         skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
3865                         /* schedule check for Tx timestamp */
3866                         bp->ptp_tx_skb = skb_get(skb);
3867                         bp->ptp_tx_start = jiffies;
3868                         schedule_work(&bp->ptp_task);
3869                 }
3870         }
3871
3872         /* header nbd: indirectly zero other flags! */
3873         tx_start_bd->general_data = 1 << ETH_TX_START_BD_HDR_NBDS_SHIFT;
3874
3875         /* remember the first BD of the packet */
3876         tx_buf->first_bd = txdata->tx_bd_prod;
3877         tx_buf->skb = skb;
3878         tx_buf->flags = 0;
3879
3880         DP(NETIF_MSG_TX_QUEUED,
3881            "sending pkt %u @%p  next_idx %u  bd %u @%p\n",
3882            pkt_prod, tx_buf, txdata->tx_pkt_prod, bd_prod, tx_start_bd);
3883
3884         if (skb_vlan_tag_present(skb)) {
3885                 tx_start_bd->vlan_or_ethertype =
3886                     cpu_to_le16(skb_vlan_tag_get(skb));
3887                 tx_start_bd->bd_flags.as_bitfield |=
3888                     (X_ETH_OUTBAND_VLAN << ETH_TX_BD_FLAGS_VLAN_MODE_SHIFT);
3889         } else {
3890                 /* when transmitting in a vf, start bd must hold the ethertype
3891                  * for fw to enforce it
3892                  */
3893                 u16 vlan_tci = 0;
3894 #ifndef BNX2X_STOP_ON_ERROR
3895                 if (IS_VF(bp)) {
3896 #endif
3897                         /* Still need to consider inband vlan for enforced */
3898                         if (__vlan_get_tag(skb, &vlan_tci)) {
3899                                 tx_start_bd->vlan_or_ethertype =
3900                                         cpu_to_le16(ntohs(eth->h_proto));
3901                         } else {
3902                                 tx_start_bd->bd_flags.as_bitfield |=
3903                                         (X_ETH_INBAND_VLAN <<
3904                                          ETH_TX_BD_FLAGS_VLAN_MODE_SHIFT);
3905                                 tx_start_bd->vlan_or_ethertype =
3906                                         cpu_to_le16(vlan_tci);
3907                         }
3908 #ifndef BNX2X_STOP_ON_ERROR
3909                 } else {
3910                         /* used by FW for packet accounting */
3911                         tx_start_bd->vlan_or_ethertype = cpu_to_le16(pkt_prod);
3912                 }
3913 #endif
3914         }
3915
3916         nbd = 2; /* start_bd + pbd + frags (updated when pages are mapped) */
3917
3918         /* turn on parsing and get a BD */
3919         bd_prod = TX_BD(NEXT_TX_IDX(bd_prod));
3920
3921         if (xmit_type & XMIT_CSUM)
3922                 bnx2x_set_sbd_csum(bp, skb, tx_start_bd, xmit_type);
3923
3924         if (!CHIP_IS_E1x(bp)) {
3925                 pbd_e2 = &txdata->tx_desc_ring[bd_prod].parse_bd_e2;
3926                 memset(pbd_e2, 0, sizeof(struct eth_tx_parse_bd_e2));
3927
3928                 if (xmit_type & XMIT_CSUM_ENC) {
3929                         u16 global_data = 0;
3930
3931                         /* Set PBD in enc checksum offload case */
3932                         hlen = bnx2x_set_pbd_csum_enc(bp, skb,
3933                                                       &pbd_e2_parsing_data,
3934                                                       xmit_type);
3935
3936                         /* turn on 2nd parsing and get a BD */
3937                         bd_prod = TX_BD(NEXT_TX_IDX(bd_prod));
3938
3939                         pbd2 = &txdata->tx_desc_ring[bd_prod].parse_2nd_bd;
3940
3941                         memset(pbd2, 0, sizeof(*pbd2));
3942
3943                         pbd_e2->data.tunnel_data.ip_hdr_start_inner_w =
3944                                 (skb_inner_network_header(skb) -
3945                                  skb->data) >> 1;
3946
3947                         if (xmit_type & XMIT_GSO_ENC)
3948                                 bnx2x_update_pbds_gso_enc(skb, pbd_e2, pbd2,
3949                                                           &global_data,
3950                                                           xmit_type);
3951
3952                         pbd2->global_data = cpu_to_le16(global_data);
3953
3954                         /* add addition parse BD indication to start BD */
3955                         SET_FLAG(tx_start_bd->general_data,
3956                                  ETH_TX_START_BD_PARSE_NBDS, 1);
3957                         /* set encapsulation flag in start BD */
3958                         SET_FLAG(tx_start_bd->general_data,
3959                                  ETH_TX_START_BD_TUNNEL_EXIST, 1);
3960
3961                         tx_buf->flags |= BNX2X_HAS_SECOND_PBD;
3962
3963                         nbd++;
3964                 } else if (xmit_type & XMIT_CSUM) {
3965                         /* Set PBD in checksum offload case w/o encapsulation */
3966                         hlen = bnx2x_set_pbd_csum_e2(bp, skb,
3967                                                      &pbd_e2_parsing_data,
3968                                                      xmit_type);
3969                 }
3970
3971                 bnx2x_set_ipv6_ext_e2(skb, &pbd_e2_parsing_data, xmit_type);
3972                 /* Add the macs to the parsing BD if this is a vf or if
3973                  * Tx Switching is enabled.
3974                  */
3975                 if (IS_VF(bp)) {
3976                         /* override GRE parameters in BD */
3977                         bnx2x_set_fw_mac_addr(&pbd_e2->data.mac_addr.src_hi,
3978                                               &pbd_e2->data.mac_addr.src_mid,
3979                                               &pbd_e2->data.mac_addr.src_lo,
3980                                               eth->h_source);
3981
3982                         bnx2x_set_fw_mac_addr(&pbd_e2->data.mac_addr.dst_hi,
3983                                               &pbd_e2->data.mac_addr.dst_mid,
3984                                               &pbd_e2->data.mac_addr.dst_lo,
3985                                               eth->h_dest);
3986                 } else {
3987                         if (bp->flags & TX_SWITCHING)
3988                                 bnx2x_set_fw_mac_addr(
3989                                                 &pbd_e2->data.mac_addr.dst_hi,
3990                                                 &pbd_e2->data.mac_addr.dst_mid,
3991                                                 &pbd_e2->data.mac_addr.dst_lo,
3992                                                 eth->h_dest);
3993 #ifdef BNX2X_STOP_ON_ERROR
3994                         /* Enforce security is always set in Stop on Error -
3995                          * source mac should be present in the parsing BD
3996                          */
3997                         bnx2x_set_fw_mac_addr(&pbd_e2->data.mac_addr.src_hi,
3998                                               &pbd_e2->data.mac_addr.src_mid,
3999                                               &pbd_e2->data.mac_addr.src_lo,
4000                                               eth->h_source);
4001 #endif
4002                 }
4003
4004                 SET_FLAG(pbd_e2_parsing_data,
4005                          ETH_TX_PARSE_BD_E2_ETH_ADDR_TYPE, mac_type);
4006         } else {
4007                 u16 global_data = 0;
4008                 pbd_e1x = &txdata->tx_desc_ring[bd_prod].parse_bd_e1x;
4009                 memset(pbd_e1x, 0, sizeof(struct eth_tx_parse_bd_e1x));
4010                 /* Set PBD in checksum offload case */
4011                 if (xmit_type & XMIT_CSUM)
4012                         hlen = bnx2x_set_pbd_csum(bp, skb, pbd_e1x, xmit_type);
4013
4014                 SET_FLAG(global_data,
4015                          ETH_TX_PARSE_BD_E1X_ETH_ADDR_TYPE, mac_type);
4016                 pbd_e1x->global_data |= cpu_to_le16(global_data);
4017         }
4018
4019         /* Setup the data pointer of the first BD of the packet */
4020         tx_start_bd->addr_hi = cpu_to_le32(U64_HI(mapping));
4021         tx_start_bd->addr_lo = cpu_to_le32(U64_LO(mapping));
4022         tx_start_bd->nbytes = cpu_to_le16(skb_headlen(skb));
4023         pkt_size = tx_start_bd->nbytes;
4024
4025         DP(NETIF_MSG_TX_QUEUED,
4026            "first bd @%p  addr (%x:%x)  nbytes %d  flags %x  vlan %x\n",
4027            tx_start_bd, tx_start_bd->addr_hi, tx_start_bd->addr_lo,
4028            le16_to_cpu(tx_start_bd->nbytes),
4029            tx_start_bd->bd_flags.as_bitfield,
4030            le16_to_cpu(tx_start_bd->vlan_or_ethertype));
4031
4032         if (xmit_type & XMIT_GSO) {
4033
4034                 DP(NETIF_MSG_TX_QUEUED,
4035                    "TSO packet len %d  hlen %d  total len %d  tso size %d\n",
4036                    skb->len, hlen, skb_headlen(skb),
4037                    skb_shinfo(skb)->gso_size);
4038
4039                 tx_start_bd->bd_flags.as_bitfield |= ETH_TX_BD_FLAGS_SW_LSO;
4040
4041                 if (unlikely(skb_headlen(skb) > hlen)) {
4042                         nbd++;
4043                         bd_prod = bnx2x_tx_split(bp, txdata, tx_buf,
4044                                                  &tx_start_bd, hlen,
4045                                                  bd_prod);
4046                 }
4047                 if (!CHIP_IS_E1x(bp))
4048                         pbd_e2_parsing_data |=
4049                                 (skb_shinfo(skb)->gso_size <<
4050                                  ETH_TX_PARSE_BD_E2_LSO_MSS_SHIFT) &
4051                                  ETH_TX_PARSE_BD_E2_LSO_MSS;
4052                 else
4053                         bnx2x_set_pbd_gso(skb, pbd_e1x, xmit_type);
4054         }
4055
4056         /* Set the PBD's parsing_data field if not zero
4057          * (for the chips newer than 57711).
4058          */
4059         if (pbd_e2_parsing_data)
4060                 pbd_e2->parsing_data = cpu_to_le32(pbd_e2_parsing_data);
4061
4062         tx_data_bd = (struct eth_tx_bd *)tx_start_bd;
4063
4064         /* Handle fragmented skb */
4065         for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
4066                 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
4067
4068                 mapping = skb_frag_dma_map(&bp->pdev->dev, frag, 0,
4069                                            skb_frag_size(frag), DMA_TO_DEVICE);
4070                 if (unlikely(dma_mapping_error(&bp->pdev->dev, mapping))) {
4071                         unsigned int pkts_compl = 0, bytes_compl = 0;
4072
4073                         DP(NETIF_MSG_TX_QUEUED,
4074                            "Unable to map page - dropping packet...\n");
4075
4076                         /* we need unmap all buffers already mapped
4077                          * for this SKB;
4078                          * first_bd->nbd need to be properly updated
4079                          * before call to bnx2x_free_tx_pkt
4080                          */
4081                         first_bd->nbd = cpu_to_le16(nbd);
4082                         bnx2x_free_tx_pkt(bp, txdata,
4083                                           TX_BD(txdata->tx_pkt_prod),
4084                                           &pkts_compl, &bytes_compl);
4085                         return NETDEV_TX_OK;
4086                 }
4087
4088                 bd_prod = TX_BD(NEXT_TX_IDX(bd_prod));
4089                 tx_data_bd = &txdata->tx_desc_ring[bd_prod].reg_bd;
4090                 if (total_pkt_bd == NULL)
4091                         total_pkt_bd = &txdata->tx_desc_ring[bd_prod].reg_bd;
4092
4093                 tx_data_bd->addr_hi = cpu_to_le32(U64_HI(mapping));
4094                 tx_data_bd->addr_lo = cpu_to_le32(U64_LO(mapping));
4095                 tx_data_bd->nbytes = cpu_to_le16(skb_frag_size(frag));
4096                 le16_add_cpu(&pkt_size, skb_frag_size(frag));
4097                 nbd++;
4098
4099                 DP(NETIF_MSG_TX_QUEUED,
4100                    "frag %d  bd @%p  addr (%x:%x)  nbytes %d\n",
4101                    i, tx_data_bd, tx_data_bd->addr_hi, tx_data_bd->addr_lo,
4102                    le16_to_cpu(tx_data_bd->nbytes));
4103         }
4104
4105         DP(NETIF_MSG_TX_QUEUED, "last bd @%p\n", tx_data_bd);
4106
4107         /* update with actual num BDs */
4108         first_bd->nbd = cpu_to_le16(nbd);
4109
4110         bd_prod = TX_BD(NEXT_TX_IDX(bd_prod));
4111
4112         /* now send a tx doorbell, counting the next BD
4113          * if the packet contains or ends with it
4114          */
4115         if (TX_BD_POFF(bd_prod) < nbd)
4116                 nbd++;
4117
4118         /* total_pkt_bytes should be set on the first data BD if
4119          * it's not an LSO packet and there is more than one
4120          * data BD. In this case pkt_size is limited by an MTU value.
4121          * However we prefer to set it for an LSO packet (while we don't
4122          * have to) in order to save some CPU cycles in a none-LSO
4123          * case, when we much more care about them.
4124          */
4125         if (total_pkt_bd != NULL)
4126                 total_pkt_bd->total_pkt_bytes = pkt_size;
4127
4128         if (pbd_e1x)
4129                 DP(NETIF_MSG_TX_QUEUED,
4130                    "PBD (E1X) @%p  ip_data %x  ip_hlen %u  ip_id %u  lso_mss %u  tcp_flags %x  xsum %x  seq %u  hlen %u\n",
4131                    pbd_e1x, pbd_e1x->global_data, pbd_e1x->ip_hlen_w,
4132                    pbd_e1x->ip_id, pbd_e1x->lso_mss, pbd_e1x->tcp_flags,
4133                    pbd_e1x->tcp_pseudo_csum, pbd_e1x->tcp_send_seq,
4134                     le16_to_cpu(pbd_e1x->total_hlen_w));
4135         if (pbd_e2)
4136                 DP(NETIF_MSG_TX_QUEUED,
4137                    "PBD (E2) @%p  dst %x %x %x src %x %x %x parsing_data %x\n",
4138                    pbd_e2,
4139                    pbd_e2->data.mac_addr.dst_hi,
4140                    pbd_e2->data.mac_addr.dst_mid,
4141                    pbd_e2->data.mac_addr.dst_lo,
4142                    pbd_e2->data.mac_addr.src_hi,
4143                    pbd_e2->data.mac_addr.src_mid,
4144                    pbd_e2->data.mac_addr.src_lo,
4145                    pbd_e2->parsing_data);
4146         DP(NETIF_MSG_TX_QUEUED, "doorbell: nbd %d  bd %u\n", nbd, bd_prod);
4147
4148         netdev_tx_sent_queue(txq, skb->len);
4149
4150         skb_tx_timestamp(skb);
4151
4152         txdata->tx_pkt_prod++;
4153         /*
4154          * Make sure that the BD data is updated before updating the producer
4155          * since FW might read the BD right after the producer is updated.
4156          * This is only applicable for weak-ordered memory model archs such
4157          * as IA-64. The following barrier is also mandatory since FW will
4158          * assumes packets must have BDs.
4159          */
4160         wmb();
4161
4162         txdata->tx_db.data.prod += nbd;
4163         /* make sure descriptor update is observed by HW */
4164         wmb();
4165
4166         DOORBELL_RELAXED(bp, txdata->cid, txdata->tx_db.raw);
4167
4168         mmiowb();
4169
4170         txdata->tx_bd_prod += nbd;
4171
4172         if (unlikely(bnx2x_tx_avail(bp, txdata) < MAX_DESC_PER_TX_PKT)) {
4173                 netif_tx_stop_queue(txq);
4174
4175                 /* paired memory barrier is in bnx2x_tx_int(), we have to keep
4176                  * ordering of set_bit() in netif_tx_stop_queue() and read of
4177                  * fp->bd_tx_cons */
4178                 smp_mb();
4179
4180                 bnx2x_fp_qstats(bp, txdata->parent_fp)->driver_xoff++;
4181                 if (bnx2x_tx_avail(bp, txdata) >= MAX_DESC_PER_TX_PKT)
4182                         netif_tx_wake_queue(txq);
4183         }
4184         txdata->tx_pkt++;
4185
4186         return NETDEV_TX_OK;
4187 }
4188
4189 void bnx2x_get_c2s_mapping(struct bnx2x *bp, u8 *c2s_map, u8 *c2s_default)
4190 {
4191         int mfw_vn = BP_FW_MB_IDX(bp);
4192         u32 tmp;
4193
4194         /* If the shmem shouldn't affect configuration, reflect */
4195         if (!IS_MF_BD(bp)) {
4196                 int i;
4197
4198                 for (i = 0; i < BNX2X_MAX_PRIORITY; i++)
4199                         c2s_map[i] = i;
4200                 *c2s_default = 0;
4201
4202                 return;
4203         }
4204
4205         tmp = SHMEM2_RD(bp, c2s_pcp_map_lower[mfw_vn]);
4206         tmp = (__force u32)be32_to_cpu((__force __be32)tmp);
4207         c2s_map[0] = tmp & 0xff;
4208         c2s_map[1] = (tmp >> 8) & 0xff;
4209         c2s_map[2] = (tmp >> 16) & 0xff;
4210         c2s_map[3] = (tmp >> 24) & 0xff;
4211
4212         tmp = SHMEM2_RD(bp, c2s_pcp_map_upper[mfw_vn]);
4213         tmp = (__force u32)be32_to_cpu((__force __be32)tmp);
4214         c2s_map[4] = tmp & 0xff;
4215         c2s_map[5] = (tmp >> 8) & 0xff;
4216         c2s_map[6] = (tmp >> 16) & 0xff;
4217         c2s_map[7] = (tmp >> 24) & 0xff;
4218
4219         tmp = SHMEM2_RD(bp, c2s_pcp_map_default[mfw_vn]);
4220         tmp = (__force u32)be32_to_cpu((__force __be32)tmp);
4221         *c2s_default = (tmp >> (8 * mfw_vn)) & 0xff;
4222 }
4223
4224 /**
4225  * bnx2x_setup_tc - routine to configure net_device for multi tc
4226  *
4227  * @netdev: net device to configure
4228  * @tc: number of traffic classes to enable
4229  *
4230  * callback connected to the ndo_setup_tc function pointer
4231  */
4232 int bnx2x_setup_tc(struct net_device *dev, u8 num_tc)
4233 {
4234         struct bnx2x *bp = netdev_priv(dev);
4235         u8 c2s_map[BNX2X_MAX_PRIORITY], c2s_def;
4236         int cos, prio, count, offset;
4237
4238         /* setup tc must be called under rtnl lock */
4239         ASSERT_RTNL();
4240
4241         /* no traffic classes requested. Aborting */
4242         if (!num_tc) {
4243                 netdev_reset_tc(dev);
4244                 return 0;
4245         }
4246
4247         /* requested to support too many traffic classes */
4248         if (num_tc > bp->max_cos) {
4249                 BNX2X_ERR("support for too many traffic classes requested: %d. Max supported is %d\n",
4250                           num_tc, bp->max_cos);
4251                 return -EINVAL;
4252         }
4253
4254         /* declare amount of supported traffic classes */
4255         if (netdev_set_num_tc(dev, num_tc)) {
4256                 BNX2X_ERR("failed to declare %d traffic classes\n", num_tc);
4257                 return -EINVAL;
4258         }
4259
4260         bnx2x_get_c2s_mapping(bp, c2s_map, &c2s_def);
4261
4262         /* configure priority to traffic class mapping */
4263         for (prio = 0; prio < BNX2X_MAX_PRIORITY; prio++) {
4264                 int outer_prio = c2s_map[prio];
4265
4266                 netdev_set_prio_tc_map(dev, prio, bp->prio_to_cos[outer_prio]);
4267                 DP(BNX2X_MSG_SP | NETIF_MSG_IFUP,
4268                    "mapping priority %d to tc %d\n",
4269                    outer_prio, bp->prio_to_cos[outer_prio]);
4270         }
4271
4272         /* Use this configuration to differentiate tc0 from other COSes
4273            This can be used for ets or pfc, and save the effort of setting
4274            up a multio class queue disc or negotiating DCBX with a switch
4275         netdev_set_prio_tc_map(dev, 0, 0);
4276         DP(BNX2X_MSG_SP, "mapping priority %d to tc %d\n", 0, 0);
4277         for (prio = 1; prio < 16; prio++) {
4278                 netdev_set_prio_tc_map(dev, prio, 1);
4279                 DP(BNX2X_MSG_SP, "mapping priority %d to tc %d\n", prio, 1);
4280         } */
4281
4282         /* configure traffic class to transmission queue mapping */
4283         for (cos = 0; cos < bp->max_cos; cos++) {
4284                 count = BNX2X_NUM_ETH_QUEUES(bp);
4285                 offset = cos * BNX2X_NUM_NON_CNIC_QUEUES(bp);
4286                 netdev_set_tc_queue(dev, cos, count, offset);
4287                 DP(BNX2X_MSG_SP | NETIF_MSG_IFUP,
4288                    "mapping tc %d to offset %d count %d\n",
4289                    cos, offset, count);
4290         }
4291
4292         return 0;
4293 }
4294
4295 int __bnx2x_setup_tc(struct net_device *dev, enum tc_setup_type type,
4296                      void *type_data)
4297 {
4298         struct tc_mqprio_qopt *mqprio = type_data;
4299
4300         if (type != TC_SETUP_QDISC_MQPRIO)
4301                 return -EOPNOTSUPP;
4302
4303         mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS;
4304
4305         return bnx2x_setup_tc(dev, mqprio->num_tc);
4306 }
4307
4308 /* called with rtnl_lock */
4309 int bnx2x_change_mac_addr(struct net_device *dev, void *p)
4310 {
4311         struct sockaddr *addr = p;
4312         struct bnx2x *bp = netdev_priv(dev);
4313         int rc = 0;
4314
4315         if (!is_valid_ether_addr(addr->sa_data)) {
4316                 BNX2X_ERR("Requested MAC address is not valid\n");
4317                 return -EINVAL;
4318         }
4319
4320         if (IS_MF_STORAGE_ONLY(bp)) {
4321                 BNX2X_ERR("Can't change address on STORAGE ONLY function\n");
4322                 return -EINVAL;
4323         }
4324
4325         if (netif_running(dev))  {
4326                 rc = bnx2x_set_eth_mac(bp, false);
4327                 if (rc)
4328                         return rc;
4329         }
4330
4331         memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
4332
4333         if (netif_running(dev))
4334                 rc = bnx2x_set_eth_mac(bp, true);
4335
4336         if (IS_PF(bp) && SHMEM2_HAS(bp, curr_cfg))
4337                 SHMEM2_WR(bp, curr_cfg, CURR_CFG_MET_OS);
4338
4339         return rc;
4340 }
4341
4342 static void bnx2x_free_fp_mem_at(struct bnx2x *bp, int fp_index)
4343 {
4344         union host_hc_status_block *sb = &bnx2x_fp(bp, fp_index, status_blk);
4345         struct bnx2x_fastpath *fp = &bp->fp[fp_index];
4346         u8 cos;
4347
4348         /* Common */
4349
4350         if (IS_FCOE_IDX(fp_index)) {
4351                 memset(sb, 0, sizeof(union host_hc_status_block));
4352                 fp->status_blk_mapping = 0;
4353         } else {
4354                 /* status blocks */
4355                 if (!CHIP_IS_E1x(bp))
4356                         BNX2X_PCI_FREE(sb->e2_sb,
4357                                        bnx2x_fp(bp, fp_index,
4358                                                 status_blk_mapping),
4359                                        sizeof(struct host_hc_status_block_e2));
4360                 else
4361                         BNX2X_PCI_FREE(sb->e1x_sb,
4362                                        bnx2x_fp(bp, fp_index,
4363                                                 status_blk_mapping),
4364                                        sizeof(struct host_hc_status_block_e1x));
4365         }
4366
4367         /* Rx */
4368         if (!skip_rx_queue(bp, fp_index)) {
4369                 bnx2x_free_rx_bds(fp);
4370
4371                 /* fastpath rx rings: rx_buf rx_desc rx_comp */
4372                 BNX2X_FREE(bnx2x_fp(bp, fp_index, rx_buf_ring));
4373                 BNX2X_PCI_FREE(bnx2x_fp(bp, fp_index, rx_desc_ring),
4374                                bnx2x_fp(bp, fp_index, rx_desc_mapping),
4375                                sizeof(struct eth_rx_bd) * NUM_RX_BD);
4376
4377                 BNX2X_PCI_FREE(bnx2x_fp(bp, fp_index, rx_comp_ring),
4378                                bnx2x_fp(bp, fp_index, rx_comp_mapping),
4379                                sizeof(struct eth_fast_path_rx_cqe) *
4380                                NUM_RCQ_BD);
4381
4382                 /* SGE ring */
4383                 BNX2X_FREE(bnx2x_fp(bp, fp_index, rx_page_ring));
4384                 BNX2X_PCI_FREE(bnx2x_fp(bp, fp_index, rx_sge_ring),
4385                                bnx2x_fp(bp, fp_index, rx_sge_mapping),
4386                                BCM_PAGE_SIZE * NUM_RX_SGE_PAGES);
4387         }
4388
4389         /* Tx */
4390         if (!skip_tx_queue(bp, fp_index)) {
4391                 /* fastpath tx rings: tx_buf tx_desc */
4392                 for_each_cos_in_tx_queue(fp, cos) {
4393                         struct bnx2x_fp_txdata *txdata = fp->txdata_ptr[cos];
4394
4395                         DP(NETIF_MSG_IFDOWN,
4396                            "freeing tx memory of fp %d cos %d cid %d\n",
4397                            fp_index, cos, txdata->cid);
4398
4399                         BNX2X_FREE(txdata->tx_buf_ring);
4400                         BNX2X_PCI_FREE(txdata->tx_desc_ring,
4401                                 txdata->tx_desc_mapping,
4402                                 sizeof(union eth_tx_bd_types) * NUM_TX_BD);
4403                 }
4404         }
4405         /* end of fastpath */
4406 }
4407
4408 static void bnx2x_free_fp_mem_cnic(struct bnx2x *bp)
4409 {
4410         int i;
4411         for_each_cnic_queue(bp, i)
4412                 bnx2x_free_fp_mem_at(bp, i);
4413 }
4414
4415 void bnx2x_free_fp_mem(struct bnx2x *bp)
4416 {
4417         int i;
4418         for_each_eth_queue(bp, i)
4419                 bnx2x_free_fp_mem_at(bp, i);
4420 }
4421
4422 static void set_sb_shortcuts(struct bnx2x *bp, int index)
4423 {
4424         union host_hc_status_block status_blk = bnx2x_fp(bp, index, status_blk);
4425         if (!CHIP_IS_E1x(bp)) {
4426                 bnx2x_fp(bp, index, sb_index_values) =
4427                         (__le16 *)status_blk.e2_sb->sb.index_values;
4428                 bnx2x_fp(bp, index, sb_running_index) =
4429                         (__le16 *)status_blk.e2_sb->sb.running_index;
4430         } else {
4431                 bnx2x_fp(bp, index, sb_index_values) =
4432                         (__le16 *)status_blk.e1x_sb->sb.index_values;
4433                 bnx2x_fp(bp, index, sb_running_index) =
4434                         (__le16 *)status_blk.e1x_sb->sb.running_index;
4435         }
4436 }
4437
4438 /* Returns the number of actually allocated BDs */
4439 static int bnx2x_alloc_rx_bds(struct bnx2x_fastpath *fp,
4440                               int rx_ring_size)
4441 {
4442         struct bnx2x *bp = fp->bp;
4443         u16 ring_prod, cqe_ring_prod;
4444         int i, failure_cnt = 0;
4445
4446         fp->rx_comp_cons = 0;
4447         cqe_ring_prod = ring_prod = 0;
4448
4449         /* This routine is called only during fo init so
4450          * fp->eth_q_stats.rx_skb_alloc_failed = 0
4451          */
4452         for (i = 0; i < rx_ring_size; i++) {
4453                 if (bnx2x_alloc_rx_data(bp, fp, ring_prod, GFP_KERNEL) < 0) {
4454                         failure_cnt++;
4455                         continue;
4456                 }
4457                 ring_prod = NEXT_RX_IDX(ring_prod);
4458                 cqe_ring_prod = NEXT_RCQ_IDX(cqe_ring_prod);
4459                 WARN_ON(ring_prod <= (i - failure_cnt));
4460         }
4461
4462         if (failure_cnt)
4463                 BNX2X_ERR("was only able to allocate %d rx skbs on queue[%d]\n",
4464                           i - failure_cnt, fp->index);
4465
4466         fp->rx_bd_prod = ring_prod;
4467         /* Limit the CQE producer by the CQE ring size */
4468         fp->rx_comp_prod = min_t(u16, NUM_RCQ_RINGS*RCQ_DESC_CNT,
4469                                cqe_ring_prod);
4470
4471         bnx2x_fp_stats(bp, fp)->eth_q_stats.rx_skb_alloc_failed += failure_cnt;
4472
4473         return i - failure_cnt;
4474 }
4475
4476 static void bnx2x_set_next_page_rx_cq(struct bnx2x_fastpath *fp)
4477 {
4478         int i;
4479
4480         for (i = 1; i <= NUM_RCQ_RINGS; i++) {
4481                 struct eth_rx_cqe_next_page *nextpg;
4482
4483                 nextpg = (struct eth_rx_cqe_next_page *)
4484                         &fp->rx_comp_ring[RCQ_DESC_CNT * i - 1];
4485                 nextpg->addr_hi =
4486                         cpu_to_le32(U64_HI(fp->rx_comp_mapping +
4487                                    BCM_PAGE_SIZE*(i % NUM_RCQ_RINGS)));
4488                 nextpg->addr_lo =
4489                         cpu_to_le32(U64_LO(fp->rx_comp_mapping +
4490                                    BCM_PAGE_SIZE*(i % NUM_RCQ_RINGS)));
4491         }
4492 }
4493
4494 static int bnx2x_alloc_fp_mem_at(struct bnx2x *bp, int index)
4495 {
4496         union host_hc_status_block *sb;
4497         struct bnx2x_fastpath *fp = &bp->fp[index];
4498         int ring_size = 0;
4499         u8 cos;
4500         int rx_ring_size = 0;
4501
4502         if (!bp->rx_ring_size && IS_MF_STORAGE_ONLY(bp)) {
4503                 rx_ring_size = MIN_RX_SIZE_NONTPA;
4504                 bp->rx_ring_size = rx_ring_size;
4505         } else if (!bp->rx_ring_size) {
4506                 rx_ring_size = MAX_RX_AVAIL/BNX2X_NUM_RX_QUEUES(bp);
4507
4508                 if (CHIP_IS_E3(bp)) {
4509                         u32 cfg = SHMEM_RD(bp,
4510                                            dev_info.port_hw_config[BP_PORT(bp)].
4511                                            default_cfg);
4512
4513                         /* Decrease ring size for 1G functions */
4514                         if ((cfg & PORT_HW_CFG_NET_SERDES_IF_MASK) ==
4515                             PORT_HW_CFG_NET_SERDES_IF_SGMII)
4516                                 rx_ring_size /= 10;
4517                 }
4518
4519                 /* allocate at least number of buffers required by FW */
4520                 rx_ring_size = max_t(int, bp->disable_tpa ? MIN_RX_SIZE_NONTPA :
4521                                      MIN_RX_SIZE_TPA, rx_ring_size);
4522
4523                 bp->rx_ring_size = rx_ring_size;
4524         } else /* if rx_ring_size specified - use it */
4525                 rx_ring_size = bp->rx_ring_size;
4526
4527         DP(BNX2X_MSG_SP, "calculated rx_ring_size %d\n", rx_ring_size);
4528
4529         /* Common */
4530         sb = &bnx2x_fp(bp, index, status_blk);
4531
4532         if (!IS_FCOE_IDX(index)) {
4533                 /* status blocks */
4534                 if (!CHIP_IS_E1x(bp)) {
4535                         sb->e2_sb = BNX2X_PCI_ALLOC(&bnx2x_fp(bp, index, status_blk_mapping),
4536                                                     sizeof(struct host_hc_status_block_e2));
4537                         if (!sb->e2_sb)
4538                                 goto alloc_mem_err;
4539                 } else {
4540                         sb->e1x_sb = BNX2X_PCI_ALLOC(&bnx2x_fp(bp, index, status_blk_mapping),
4541                                                      sizeof(struct host_hc_status_block_e1x));
4542                         if (!sb->e1x_sb)
4543                                 goto alloc_mem_err;
4544                 }
4545         }
4546
4547         /* FCoE Queue uses Default SB and doesn't ACK the SB, thus no need to
4548          * set shortcuts for it.
4549          */
4550         if (!IS_FCOE_IDX(index))
4551                 set_sb_shortcuts(bp, index);
4552
4553         /* Tx */
4554         if (!skip_tx_queue(bp, index)) {
4555                 /* fastpath tx rings: tx_buf tx_desc */
4556                 for_each_cos_in_tx_queue(fp, cos) {
4557                         struct bnx2x_fp_txdata *txdata = fp->txdata_ptr[cos];
4558
4559                         DP(NETIF_MSG_IFUP,
4560                            "allocating tx memory of fp %d cos %d\n",
4561                            index, cos);
4562
4563                         txdata->tx_buf_ring = kcalloc(NUM_TX_BD,
4564                                                       sizeof(struct sw_tx_bd),
4565                                                       GFP_KERNEL);
4566                         if (!txdata->tx_buf_ring)
4567                                 goto alloc_mem_err;
4568                         txdata->tx_desc_ring = BNX2X_PCI_ALLOC(&txdata->tx_desc_mapping,
4569                                                                sizeof(union eth_tx_bd_types) * NUM_TX_BD);
4570                         if (!txdata->tx_desc_ring)
4571                                 goto alloc_mem_err;
4572                 }
4573         }
4574
4575         /* Rx */
4576         if (!skip_rx_queue(bp, index)) {
4577                 /* fastpath rx rings: rx_buf rx_desc rx_comp */
4578                 bnx2x_fp(bp, index, rx_buf_ring) =
4579                         kcalloc(NUM_RX_BD, sizeof(struct sw_rx_bd), GFP_KERNEL);
4580                 if (!bnx2x_fp(bp, index, rx_buf_ring))
4581                         goto alloc_mem_err;
4582                 bnx2x_fp(bp, index, rx_desc_ring) =
4583                         BNX2X_PCI_ALLOC(&bnx2x_fp(bp, index, rx_desc_mapping),
4584                                         sizeof(struct eth_rx_bd) * NUM_RX_BD);
4585                 if (!bnx2x_fp(bp, index, rx_desc_ring))
4586                         goto alloc_mem_err;
4587
4588                 /* Seed all CQEs by 1s */
4589                 bnx2x_fp(bp, index, rx_comp_ring) =
4590                         BNX2X_PCI_FALLOC(&bnx2x_fp(bp, index, rx_comp_mapping),
4591                                          sizeof(struct eth_fast_path_rx_cqe) * NUM_RCQ_BD);
4592                 if (!bnx2x_fp(bp, index, rx_comp_ring))
4593                         goto alloc_mem_err;
4594
4595                 /* SGE ring */
4596                 bnx2x_fp(bp, index, rx_page_ring) =
4597                         kcalloc(NUM_RX_SGE, sizeof(struct sw_rx_page),
4598                                 GFP_KERNEL);
4599                 if (!bnx2x_fp(bp, index, rx_page_ring))
4600                         goto alloc_mem_err;
4601                 bnx2x_fp(bp, index, rx_sge_ring) =
4602                         BNX2X_PCI_ALLOC(&bnx2x_fp(bp, index, rx_sge_mapping),
4603                                         BCM_PAGE_SIZE * NUM_RX_SGE_PAGES);
4604                 if (!bnx2x_fp(bp, index, rx_sge_ring))
4605                         goto alloc_mem_err;
4606                 /* RX BD ring */
4607                 bnx2x_set_next_page_rx_bd(fp);
4608
4609                 /* CQ ring */
4610                 bnx2x_set_next_page_rx_cq(fp);
4611
4612                 /* BDs */
4613                 ring_size = bnx2x_alloc_rx_bds(fp, rx_ring_size);
4614                 if (ring_size < rx_ring_size)
4615                         goto alloc_mem_err;
4616         }
4617
4618         return 0;
4619
4620 /* handles low memory cases */
4621 alloc_mem_err:
4622         BNX2X_ERR("Unable to allocate full memory for queue %d (size %d)\n",
4623                                                 index, ring_size);
4624         /* FW will drop all packets if queue is not big enough,
4625          * In these cases we disable the queue
4626          * Min size is different for OOO, TPA and non-TPA queues
4627          */
4628         if (ring_size < (fp->mode == TPA_MODE_DISABLED ?
4629                                 MIN_RX_SIZE_NONTPA : MIN_RX_SIZE_TPA)) {
4630                         /* release memory allocated for this queue */
4631                         bnx2x_free_fp_mem_at(bp, index);
4632                         return -ENOMEM;
4633         }
4634         return 0;
4635 }
4636
4637 static int bnx2x_alloc_fp_mem_cnic(struct bnx2x *bp)
4638 {
4639         if (!NO_FCOE(bp))
4640                 /* FCoE */
4641                 if (bnx2x_alloc_fp_mem_at(bp, FCOE_IDX(bp)))
4642                         /* we will fail load process instead of mark
4643                          * NO_FCOE_FLAG
4644                          */
4645                         return -ENOMEM;
4646
4647         return 0;
4648 }
4649
4650 static int bnx2x_alloc_fp_mem(struct bnx2x *bp)
4651 {
4652         int i;
4653
4654         /* 1. Allocate FP for leading - fatal if error
4655          * 2. Allocate RSS - fix number of queues if error
4656          */
4657
4658         /* leading */
4659         if (bnx2x_alloc_fp_mem_at(bp, 0))
4660                 return -ENOMEM;
4661
4662         /* RSS */
4663         for_each_nondefault_eth_queue(bp, i)
4664                 if (bnx2x_alloc_fp_mem_at(bp, i))
4665                         break;
4666
4667         /* handle memory failures */
4668         if (i != BNX2X_NUM_ETH_QUEUES(bp)) {
4669                 int delta = BNX2X_NUM_ETH_QUEUES(bp) - i;
4670
4671                 WARN_ON(delta < 0);
4672                 bnx2x_shrink_eth_fp(bp, delta);
4673                 if (CNIC_SUPPORT(bp))
4674                         /* move non eth FPs next to last eth FP
4675                          * must be done in that order
4676                          * FCOE_IDX < FWD_IDX < OOO_IDX
4677                          */
4678
4679                         /* move FCoE fp even NO_FCOE_FLAG is on */
4680                         bnx2x_move_fp(bp, FCOE_IDX(bp), FCOE_IDX(bp) - delta);
4681                 bp->num_ethernet_queues -= delta;
4682                 bp->num_queues = bp->num_ethernet_queues +
4683                                  bp->num_cnic_queues;
4684                 BNX2X_ERR("Adjusted num of queues from %d to %d\n",
4685                           bp->num_queues + delta, bp->num_queues);
4686         }
4687
4688         return 0;
4689 }
4690
4691 void bnx2x_free_mem_bp(struct bnx2x *bp)
4692 {
4693         int i;
4694
4695         for (i = 0; i < bp->fp_array_size; i++)
4696                 kfree(bp->fp[i].tpa_info);
4697         kfree(bp->fp);
4698         kfree(bp->sp_objs);
4699         kfree(bp->fp_stats);
4700         kfree(bp->bnx2x_txq);
4701         kfree(bp->msix_table);
4702         kfree(bp->ilt);
4703 }
4704
4705 int bnx2x_alloc_mem_bp(struct bnx2x *bp)
4706 {
4707         struct bnx2x_fastpath *fp;
4708         struct msix_entry *tbl;
4709         struct bnx2x_ilt *ilt;
4710         int msix_table_size = 0;
4711         int fp_array_size, txq_array_size;
4712         int i;
4713
4714         /*
4715          * The biggest MSI-X table we might need is as a maximum number of fast
4716          * path IGU SBs plus default SB (for PF only).
4717          */
4718         msix_table_size = bp->igu_sb_cnt;
4719         if (IS_PF(bp))
4720                 msix_table_size++;
4721         BNX2X_DEV_INFO("msix_table_size %d\n", msix_table_size);
4722
4723         /* fp array: RSS plus CNIC related L2 queues */
4724         fp_array_size = BNX2X_MAX_RSS_COUNT(bp) + CNIC_SUPPORT(bp);
4725         bp->fp_array_size = fp_array_size;
4726         BNX2X_DEV_INFO("fp_array_size %d\n", bp->fp_array_size);
4727
4728         fp = kcalloc(bp->fp_array_size, sizeof(*fp), GFP_KERNEL);
4729         if (!fp)
4730                 goto alloc_err;
4731         for (i = 0; i < bp->fp_array_size; i++) {
4732                 fp[i].tpa_info =
4733                         kcalloc(ETH_MAX_AGGREGATION_QUEUES_E1H_E2,
4734                                 sizeof(struct bnx2x_agg_info), GFP_KERNEL);
4735                 if (!(fp[i].tpa_info))
4736                         goto alloc_err;
4737         }
4738
4739         bp->fp = fp;
4740
4741         /* allocate sp objs */
4742         bp->sp_objs = kcalloc(bp->fp_array_size, sizeof(struct bnx2x_sp_objs),
4743                               GFP_KERNEL);
4744         if (!bp->sp_objs)
4745                 goto alloc_err;
4746
4747         /* allocate fp_stats */
4748         bp->fp_stats = kcalloc(bp->fp_array_size, sizeof(struct bnx2x_fp_stats),
4749                                GFP_KERNEL);
4750         if (!bp->fp_stats)
4751                 goto alloc_err;
4752
4753         /* Allocate memory for the transmission queues array */
4754         txq_array_size =
4755                 BNX2X_MAX_RSS_COUNT(bp) * BNX2X_MULTI_TX_COS + CNIC_SUPPORT(bp);
4756         BNX2X_DEV_INFO("txq_array_size %d", txq_array_size);
4757
4758         bp->bnx2x_txq = kcalloc(txq_array_size, sizeof(struct bnx2x_fp_txdata),
4759                                 GFP_KERNEL);
4760         if (!bp->bnx2x_txq)
4761                 goto alloc_err;
4762
4763         /* msix table */
4764         tbl = kcalloc(msix_table_size, sizeof(*tbl), GFP_KERNEL);
4765         if (!tbl)
4766                 goto alloc_err;
4767         bp->msix_table = tbl;
4768
4769         /* ilt */
4770         ilt = kzalloc(sizeof(*ilt), GFP_KERNEL);
4771         if (!ilt)
4772                 goto alloc_err;
4773         bp->ilt = ilt;
4774
4775         return 0;
4776 alloc_err:
4777         bnx2x_free_mem_bp(bp);
4778         return -ENOMEM;
4779 }
4780
4781 int bnx2x_reload_if_running(struct net_device *dev)
4782 {
4783         struct bnx2x *bp = netdev_priv(dev);
4784
4785         if (unlikely(!netif_running(dev)))
4786                 return 0;
4787
4788         bnx2x_nic_unload(bp, UNLOAD_NORMAL, true);
4789         return bnx2x_nic_load(bp, LOAD_NORMAL);
4790 }
4791
4792 int bnx2x_get_cur_phy_idx(struct bnx2x *bp)
4793 {
4794         u32 sel_phy_idx = 0;
4795         if (bp->link_params.num_phys <= 1)
4796                 return INT_PHY;
4797
4798         if (bp->link_vars.link_up) {
4799                 sel_phy_idx = EXT_PHY1;
4800                 /* In case link is SERDES, check if the EXT_PHY2 is the one */
4801                 if ((bp->link_vars.link_status & LINK_STATUS_SERDES_LINK) &&
4802                     (bp->link_params.phy[EXT_PHY2].supported & SUPPORTED_FIBRE))
4803                         sel_phy_idx = EXT_PHY2;
4804         } else {
4805
4806                 switch (bnx2x_phy_selection(&bp->link_params)) {
4807                 case PORT_HW_CFG_PHY_SELECTION_HARDWARE_DEFAULT:
4808                 case PORT_HW_CFG_PHY_SELECTION_FIRST_PHY:
4809                 case PORT_HW_CFG_PHY_SELECTION_FIRST_PHY_PRIORITY:
4810                        sel_phy_idx = EXT_PHY1;
4811                        break;
4812                 case PORT_HW_CFG_PHY_SELECTION_SECOND_PHY:
4813                 case PORT_HW_CFG_PHY_SELECTION_SECOND_PHY_PRIORITY:
4814                        sel_phy_idx = EXT_PHY2;
4815                        break;
4816                 }
4817         }
4818
4819         return sel_phy_idx;
4820 }
4821 int bnx2x_get_link_cfg_idx(struct bnx2x *bp)
4822 {
4823         u32 sel_phy_idx = bnx2x_get_cur_phy_idx(bp);
4824         /*
4825          * The selected activated PHY is always after swapping (in case PHY
4826          * swapping is enabled). So when swapping is enabled, we need to reverse
4827          * the configuration
4828          */
4829
4830         if (bp->link_params.multi_phy_config &
4831             PORT_HW_CFG_PHY_SWAPPED_ENABLED) {
4832                 if (sel_phy_idx == EXT_PHY1)
4833                         sel_phy_idx = EXT_PHY2;
4834                 else if (sel_phy_idx == EXT_PHY2)
4835                         sel_phy_idx = EXT_PHY1;
4836         }
4837         return LINK_CONFIG_IDX(sel_phy_idx);
4838 }
4839
4840 #ifdef NETDEV_FCOE_WWNN
4841 int bnx2x_fcoe_get_wwn(struct net_device *dev, u64 *wwn, int type)
4842 {
4843         struct bnx2x *bp = netdev_priv(dev);
4844         struct cnic_eth_dev *cp = &bp->cnic_eth_dev;
4845
4846         switch (type) {
4847         case NETDEV_FCOE_WWNN:
4848                 *wwn = HILO_U64(cp->fcoe_wwn_node_name_hi,
4849                                 cp->fcoe_wwn_node_name_lo);
4850                 break;
4851         case NETDEV_FCOE_WWPN:
4852                 *wwn = HILO_U64(cp->fcoe_wwn_port_name_hi,
4853                                 cp->fcoe_wwn_port_name_lo);
4854                 break;
4855         default:
4856                 BNX2X_ERR("Wrong WWN type requested - %d\n", type);
4857                 return -EINVAL;
4858         }
4859
4860         return 0;
4861 }
4862 #endif
4863
4864 /* called with rtnl_lock */
4865 int bnx2x_change_mtu(struct net_device *dev, int new_mtu)
4866 {
4867         struct bnx2x *bp = netdev_priv(dev);
4868
4869         if (pci_num_vf(bp->pdev)) {
4870                 DP(BNX2X_MSG_IOV, "VFs are enabled, can not change MTU\n");
4871                 return -EPERM;
4872         }
4873
4874         if (bp->recovery_state != BNX2X_RECOVERY_DONE) {
4875                 BNX2X_ERR("Can't perform change MTU during parity recovery\n");
4876                 return -EAGAIN;
4877         }
4878
4879         /* This does not race with packet allocation
4880          * because the actual alloc size is
4881          * only updated as part of load
4882          */
4883         dev->mtu = new_mtu;
4884
4885         if (!bnx2x_mtu_allows_gro(new_mtu))
4886                 dev->features &= ~NETIF_F_GRO_HW;
4887
4888         if (IS_PF(bp) && SHMEM2_HAS(bp, curr_cfg))
4889                 SHMEM2_WR(bp, curr_cfg, CURR_CFG_MET_OS);
4890
4891         return bnx2x_reload_if_running(dev);
4892 }
4893
4894 netdev_features_t bnx2x_fix_features(struct net_device *dev,
4895                                      netdev_features_t features)
4896 {
4897         struct bnx2x *bp = netdev_priv(dev);
4898
4899         if (pci_num_vf(bp->pdev)) {
4900                 netdev_features_t changed = dev->features ^ features;
4901
4902                 /* Revert the requested changes in features if they
4903                  * would require internal reload of PF in bnx2x_set_features().
4904                  */
4905                 if (!(features & NETIF_F_RXCSUM) && !bp->disable_tpa) {
4906                         features &= ~NETIF_F_RXCSUM;
4907                         features |= dev->features & NETIF_F_RXCSUM;
4908                 }
4909
4910                 if (changed & NETIF_F_LOOPBACK) {
4911                         features &= ~NETIF_F_LOOPBACK;
4912                         features |= dev->features & NETIF_F_LOOPBACK;
4913                 }
4914         }
4915
4916         /* TPA requires Rx CSUM offloading */
4917         if (!(features & NETIF_F_RXCSUM))
4918                 features &= ~NETIF_F_LRO;
4919
4920         if (!(features & NETIF_F_GRO) || !bnx2x_mtu_allows_gro(dev->mtu))
4921                 features &= ~NETIF_F_GRO_HW;
4922         if (features & NETIF_F_GRO_HW)
4923                 features &= ~NETIF_F_LRO;
4924
4925         return features;
4926 }
4927
4928 int bnx2x_set_features(struct net_device *dev, netdev_features_t features)
4929 {
4930         struct bnx2x *bp = netdev_priv(dev);
4931         netdev_features_t changes = features ^ dev->features;
4932         bool bnx2x_reload = false;
4933         int rc;
4934
4935         /* VFs or non SRIOV PFs should be able to change loopback feature */
4936         if (!pci_num_vf(bp->pdev)) {
4937                 if (features & NETIF_F_LOOPBACK) {
4938                         if (bp->link_params.loopback_mode != LOOPBACK_BMAC) {
4939                                 bp->link_params.loopback_mode = LOOPBACK_BMAC;
4940                                 bnx2x_reload = true;
4941                         }
4942                 } else {
4943                         if (bp->link_params.loopback_mode != LOOPBACK_NONE) {
4944                                 bp->link_params.loopback_mode = LOOPBACK_NONE;
4945                                 bnx2x_reload = true;
4946                         }
4947                 }
4948         }
4949
4950         /* Don't care about GRO changes */
4951         changes &= ~NETIF_F_GRO;
4952
4953         if (changes)
4954                 bnx2x_reload = true;
4955
4956         if (bnx2x_reload) {
4957                 if (bp->recovery_state == BNX2X_RECOVERY_DONE) {
4958                         dev->features = features;
4959                         rc = bnx2x_reload_if_running(dev);
4960                         return rc ? rc : 1;
4961                 }
4962                 /* else: bnx2x_nic_load() will be called at end of recovery */
4963         }
4964
4965         return 0;
4966 }
4967
4968 void bnx2x_tx_timeout(struct net_device *dev)
4969 {
4970         struct bnx2x *bp = netdev_priv(dev);
4971
4972         /* We want the information of the dump logged,
4973          * but calling bnx2x_panic() would kill all chances of recovery.
4974          */
4975         if (!bp->panic)
4976 #ifndef BNX2X_STOP_ON_ERROR
4977                 bnx2x_panic_dump(bp, false);
4978 #else
4979                 bnx2x_panic();
4980 #endif
4981
4982         /* This allows the netif to be shutdown gracefully before resetting */
4983         bnx2x_schedule_sp_rtnl(bp, BNX2X_SP_RTNL_TX_TIMEOUT, 0);
4984 }
4985
4986 int bnx2x_suspend(struct pci_dev *pdev, pm_message_t state)
4987 {
4988         struct net_device *dev = pci_get_drvdata(pdev);
4989         struct bnx2x *bp;
4990
4991         if (!dev) {
4992                 dev_err(&pdev->dev, "BAD net device from bnx2x_init_one\n");
4993                 return -ENODEV;
4994         }
4995         bp = netdev_priv(dev);
4996
4997         rtnl_lock();
4998
4999         pci_save_state(pdev);
5000
5001         if (!netif_running(dev)) {
5002                 rtnl_unlock();
5003                 return 0;
5004         }
5005
5006         netif_device_detach(dev);
5007
5008         bnx2x_nic_unload(bp, UNLOAD_CLOSE, false);
5009
5010         bnx2x_set_power_state(bp, pci_choose_state(pdev, state));
5011
5012         rtnl_unlock();
5013
5014         return 0;
5015 }
5016
5017 int bnx2x_resume(struct pci_dev *pdev)
5018 {
5019         struct net_device *dev = pci_get_drvdata(pdev);
5020         struct bnx2x *bp;
5021         int rc;
5022
5023         if (!dev) {
5024                 dev_err(&pdev->dev, "BAD net device from bnx2x_init_one\n");
5025                 return -ENODEV;
5026         }
5027         bp = netdev_priv(dev);
5028
5029         if (bp->recovery_state != BNX2X_RECOVERY_DONE) {
5030                 BNX2X_ERR("Handling parity error recovery. Try again later\n");
5031                 return -EAGAIN;
5032         }
5033
5034         rtnl_lock();
5035
5036         pci_restore_state(pdev);
5037
5038         if (!netif_running(dev)) {
5039                 rtnl_unlock();
5040                 return 0;
5041         }
5042
5043         bnx2x_set_power_state(bp, PCI_D0);
5044         netif_device_attach(dev);
5045
5046         rc = bnx2x_nic_load(bp, LOAD_OPEN);
5047
5048         rtnl_unlock();
5049
5050         return rc;
5051 }
5052
5053 void bnx2x_set_ctx_validation(struct bnx2x *bp, struct eth_context *cxt,
5054                               u32 cid)
5055 {
5056         if (!cxt) {
5057                 BNX2X_ERR("bad context pointer %p\n", cxt);
5058                 return;
5059         }
5060
5061         /* ustorm cxt validation */
5062         cxt->ustorm_ag_context.cdu_usage =
5063                 CDU_RSRVD_VALUE_TYPE_A(HW_CID(bp, cid),
5064                         CDU_REGION_NUMBER_UCM_AG, ETH_CONNECTION_TYPE);
5065         /* xcontext validation */
5066         cxt->xstorm_ag_context.cdu_reserved =
5067                 CDU_RSRVD_VALUE_TYPE_A(HW_CID(bp, cid),
5068                         CDU_REGION_NUMBER_XCM_AG, ETH_CONNECTION_TYPE);
5069 }
5070
5071 static void storm_memset_hc_timeout(struct bnx2x *bp, u8 port,
5072                                     u8 fw_sb_id, u8 sb_index,
5073                                     u8 ticks)
5074 {
5075         u32 addr = BAR_CSTRORM_INTMEM +
5076                    CSTORM_STATUS_BLOCK_DATA_TIMEOUT_OFFSET(fw_sb_id, sb_index);
5077         REG_WR8(bp, addr, ticks);
5078         DP(NETIF_MSG_IFUP,
5079            "port %x fw_sb_id %d sb_index %d ticks %d\n",
5080            port, fw_sb_id, sb_index, ticks);
5081 }
5082
5083 static void storm_memset_hc_disable(struct bnx2x *bp, u8 port,
5084                                     u16 fw_sb_id, u8 sb_index,
5085                                     u8 disable)
5086 {
5087         u32 enable_flag = disable ? 0 : (1 << HC_INDEX_DATA_HC_ENABLED_SHIFT);
5088         u32 addr = BAR_CSTRORM_INTMEM +
5089                    CSTORM_STATUS_BLOCK_DATA_FLAGS_OFFSET(fw_sb_id, sb_index);
5090         u8 flags = REG_RD8(bp, addr);
5091         /* clear and set */
5092         flags &= ~HC_INDEX_DATA_HC_ENABLED;
5093         flags |= enable_flag;
5094         REG_WR8(bp, addr, flags);
5095         DP(NETIF_MSG_IFUP,
5096            "port %x fw_sb_id %d sb_index %d disable %d\n",
5097            port, fw_sb_id, sb_index, disable);
5098 }
5099
5100 void bnx2x_update_coalesce_sb_index(struct bnx2x *bp, u8 fw_sb_id,
5101                                     u8 sb_index, u8 disable, u16 usec)
5102 {
5103         int port = BP_PORT(bp);
5104         u8 ticks = usec / BNX2X_BTR;
5105
5106         storm_memset_hc_timeout(bp, port, fw_sb_id, sb_index, ticks);
5107
5108         disable = disable ? 1 : (usec ? 0 : 1);
5109         storm_memset_hc_disable(bp, port, fw_sb_id, sb_index, disable);
5110 }
5111
5112 void bnx2x_schedule_sp_rtnl(struct bnx2x *bp, enum sp_rtnl_flag flag,
5113                             u32 verbose)
5114 {
5115         smp_mb__before_atomic();
5116         set_bit(flag, &bp->sp_rtnl_state);
5117         smp_mb__after_atomic();
5118         DP((BNX2X_MSG_SP | verbose), "Scheduling sp_rtnl task [Flag: %d]\n",
5119            flag);
5120         schedule_delayed_work(&bp->sp_rtnl_task, 0);
5121 }