1 // SPDX-License-Identifier: GPL-2.0-only
2 /* Aquantia Corporation Network Driver
3 * Copyright (C) 2014-2019 Aquantia Corporation. All rights reserved
7 * Definition of functions for Linux PTP support.
10 #include <linux/ptp_clock_kernel.h>
11 #include <linux/ptp_classify.h>
12 #include <linux/interrupt.h>
13 #include <linux/clocksource.h>
19 #include "aq_filters.h"
21 #define AQ_PTP_TX_TIMEOUT (HZ * 10)
23 #define POLL_SYNC_TIMER_MS 15
25 enum ptp_speed_offsets {
26 ptp_offset_idx_10 = 0,
35 struct sk_buff **buff;
42 struct ptp_tx_timeout {
45 unsigned long tx_start;
49 struct aq_nic_s *aq_nic;
50 struct hwtstamp_config hwtstamp_config;
52 spinlock_t ptp_ring_lock;
53 struct ptp_clock *ptp_clock;
54 struct ptp_clock_info ptp_info;
56 atomic_t offset_egress;
57 atomic_t offset_ingress;
59 struct aq_ring_param_s ptp_ring_param;
61 struct ptp_tx_timeout ptp_tx_timeout;
63 unsigned int idx_vector;
64 struct napi_struct napi;
66 struct aq_ring_s ptp_tx;
67 struct aq_ring_s ptp_rx;
68 struct aq_ring_s hwts_rx;
70 struct ptp_skb_ring skb_ring;
72 struct aq_rx_filter_l3l4 udp_filter;
73 struct aq_rx_filter_l2 eth_type_filter;
75 struct delayed_work poll_sync;
78 bool extts_pin_enabled;
82 struct ptp_tm_offset {
88 static struct ptp_tm_offset ptp_offset[6];
90 void aq_ptp_tm_offset_set(struct aq_nic_s *aq_nic, unsigned int mbps)
92 struct aq_ptp_s *aq_ptp = aq_nic->aq_ptp;
93 int i, egress, ingress;
101 for (i = 0; i < ARRAY_SIZE(ptp_offset); i++) {
102 if (mbps == ptp_offset[i].mbps) {
103 egress = ptp_offset[i].egress;
104 ingress = ptp_offset[i].ingress;
109 atomic_set(&aq_ptp->offset_egress, egress);
110 atomic_set(&aq_ptp->offset_ingress, ingress);
113 static int __aq_ptp_skb_put(struct ptp_skb_ring *ring, struct sk_buff *skb)
115 unsigned int next_head = (ring->head + 1) % ring->size;
117 if (next_head == ring->tail)
120 ring->buff[ring->head] = skb_get(skb);
121 ring->head = next_head;
126 static int aq_ptp_skb_put(struct ptp_skb_ring *ring, struct sk_buff *skb)
131 spin_lock_irqsave(&ring->lock, flags);
132 ret = __aq_ptp_skb_put(ring, skb);
133 spin_unlock_irqrestore(&ring->lock, flags);
138 static struct sk_buff *__aq_ptp_skb_get(struct ptp_skb_ring *ring)
142 if (ring->tail == ring->head)
145 skb = ring->buff[ring->tail];
146 ring->tail = (ring->tail + 1) % ring->size;
151 static struct sk_buff *aq_ptp_skb_get(struct ptp_skb_ring *ring)
156 spin_lock_irqsave(&ring->lock, flags);
157 skb = __aq_ptp_skb_get(ring);
158 spin_unlock_irqrestore(&ring->lock, flags);
163 static unsigned int aq_ptp_skb_buf_len(struct ptp_skb_ring *ring)
168 spin_lock_irqsave(&ring->lock, flags);
169 len = (ring->head >= ring->tail) ?
170 ring->head - ring->tail :
171 ring->size - ring->tail + ring->head;
172 spin_unlock_irqrestore(&ring->lock, flags);
177 static int aq_ptp_skb_ring_init(struct ptp_skb_ring *ring, unsigned int size)
179 struct sk_buff **buff = kmalloc(sizeof(*buff) * size, GFP_KERNEL);
184 spin_lock_init(&ring->lock);
194 static void aq_ptp_skb_ring_clean(struct ptp_skb_ring *ring)
198 while ((skb = aq_ptp_skb_get(ring)) != NULL)
199 dev_kfree_skb_any(skb);
202 static void aq_ptp_skb_ring_release(struct ptp_skb_ring *ring)
205 aq_ptp_skb_ring_clean(ring);
211 static void aq_ptp_tx_timeout_init(struct ptp_tx_timeout *timeout)
213 spin_lock_init(&timeout->lock);
214 timeout->active = false;
217 static void aq_ptp_tx_timeout_start(struct aq_ptp_s *aq_ptp)
219 struct ptp_tx_timeout *timeout = &aq_ptp->ptp_tx_timeout;
222 spin_lock_irqsave(&timeout->lock, flags);
223 timeout->active = true;
224 timeout->tx_start = jiffies;
225 spin_unlock_irqrestore(&timeout->lock, flags);
228 static void aq_ptp_tx_timeout_update(struct aq_ptp_s *aq_ptp)
230 if (!aq_ptp_skb_buf_len(&aq_ptp->skb_ring)) {
231 struct ptp_tx_timeout *timeout = &aq_ptp->ptp_tx_timeout;
234 spin_lock_irqsave(&timeout->lock, flags);
235 timeout->active = false;
236 spin_unlock_irqrestore(&timeout->lock, flags);
240 static void aq_ptp_tx_timeout_check(struct aq_ptp_s *aq_ptp)
242 struct ptp_tx_timeout *timeout = &aq_ptp->ptp_tx_timeout;
246 timeout_flag = false;
248 spin_lock_irqsave(&timeout->lock, flags);
249 if (timeout->active) {
250 timeout_flag = time_is_before_jiffies(timeout->tx_start +
252 /* reset active flag if timeout detected */
254 timeout->active = false;
256 spin_unlock_irqrestore(&timeout->lock, flags);
259 aq_ptp_skb_ring_clean(&aq_ptp->skb_ring);
260 netdev_err(aq_ptp->aq_nic->ndev,
261 "PTP Timeout. Clearing Tx Timestamp SKBs\n");
266 * @ptp: the ptp clock structure
267 * @ppb: parts per billion adjustment from base
269 * adjust the frequency of the ptp cycle counter by the
270 * indicated ppb from the base frequency.
272 static int aq_ptp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm)
274 struct aq_ptp_s *aq_ptp = container_of(ptp, struct aq_ptp_s, ptp_info);
275 struct aq_nic_s *aq_nic = aq_ptp->aq_nic;
277 mutex_lock(&aq_nic->fwreq_mutex);
278 aq_nic->aq_hw_ops->hw_adj_clock_freq(aq_nic->aq_hw,
279 scaled_ppm_to_ppb(scaled_ppm));
280 mutex_unlock(&aq_nic->fwreq_mutex);
286 * @ptp: the ptp clock structure
287 * @delta: offset to adjust the cycle counter by
289 * adjust the timer by resetting the timecounter structure.
291 static int aq_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta)
293 struct aq_ptp_s *aq_ptp = container_of(ptp, struct aq_ptp_s, ptp_info);
294 struct aq_nic_s *aq_nic = aq_ptp->aq_nic;
297 spin_lock_irqsave(&aq_ptp->ptp_lock, flags);
298 aq_nic->aq_hw_ops->hw_adj_sys_clock(aq_nic->aq_hw, delta);
299 spin_unlock_irqrestore(&aq_ptp->ptp_lock, flags);
305 * @ptp: the ptp clock structure
306 * @ts: timespec structure to hold the current time value
308 * read the timecounter and return the correct value on ns,
309 * after converting it into a struct timespec.
311 static int aq_ptp_gettime(struct ptp_clock_info *ptp, struct timespec64 *ts)
313 struct aq_ptp_s *aq_ptp = container_of(ptp, struct aq_ptp_s, ptp_info);
314 struct aq_nic_s *aq_nic = aq_ptp->aq_nic;
318 spin_lock_irqsave(&aq_ptp->ptp_lock, flags);
319 aq_nic->aq_hw_ops->hw_get_ptp_ts(aq_nic->aq_hw, &ns);
320 spin_unlock_irqrestore(&aq_ptp->ptp_lock, flags);
322 *ts = ns_to_timespec64(ns);
328 * @ptp: the ptp clock structure
329 * @ts: the timespec containing the new time for the cycle counter
331 * reset the timecounter to use a new base value instead of the kernel
334 static int aq_ptp_settime(struct ptp_clock_info *ptp,
335 const struct timespec64 *ts)
337 struct aq_ptp_s *aq_ptp = container_of(ptp, struct aq_ptp_s, ptp_info);
338 struct aq_nic_s *aq_nic = aq_ptp->aq_nic;
340 u64 ns = timespec64_to_ns(ts);
343 spin_lock_irqsave(&aq_ptp->ptp_lock, flags);
344 aq_nic->aq_hw_ops->hw_get_ptp_ts(aq_nic->aq_hw, &now);
345 aq_nic->aq_hw_ops->hw_adj_sys_clock(aq_nic->aq_hw, (s64)ns - (s64)now);
347 spin_unlock_irqrestore(&aq_ptp->ptp_lock, flags);
352 static void aq_ptp_convert_to_hwtstamp(struct aq_ptp_s *aq_ptp,
353 struct skb_shared_hwtstamps *hwtstamp,
356 memset(hwtstamp, 0, sizeof(*hwtstamp));
357 hwtstamp->hwtstamp = ns_to_ktime(timestamp);
360 static int aq_ptp_hw_pin_conf(struct aq_nic_s *aq_nic, u32 pin_index, u64 start,
364 netdev_dbg(aq_nic->ndev,
365 "Enable GPIO %d pulsing, start time %llu, period %u\n",
366 pin_index, start, (u32)period);
368 netdev_dbg(aq_nic->ndev,
369 "Disable GPIO %d pulsing, start time %llu, period %u\n",
370 pin_index, start, (u32)period);
372 /* Notify hardware of request to being sending pulses.
373 * If period is ZERO then pulsen is disabled.
375 mutex_lock(&aq_nic->fwreq_mutex);
376 aq_nic->aq_hw_ops->hw_gpio_pulse(aq_nic->aq_hw, pin_index,
378 mutex_unlock(&aq_nic->fwreq_mutex);
383 static int aq_ptp_perout_pin_configure(struct ptp_clock_info *ptp,
384 struct ptp_clock_request *rq, int on)
386 struct aq_ptp_s *aq_ptp = container_of(ptp, struct aq_ptp_s, ptp_info);
387 struct ptp_clock_time *t = &rq->perout.period;
388 struct ptp_clock_time *s = &rq->perout.start;
389 struct aq_nic_s *aq_nic = aq_ptp->aq_nic;
391 u32 pin_index = rq->perout.index;
393 /* verify the request channel is there */
394 if (pin_index >= ptp->n_per_out)
397 /* we cannot support periods greater
398 * than 4 seconds due to reg limit
400 if (t->sec > 4 || t->sec < 0)
403 /* convert to unsigned 64b ns,
404 * verify we can put it in a 32b register
406 period = on ? t->sec * NSEC_PER_SEC + t->nsec : 0;
408 /* verify the value is in range supported by hardware */
409 if (period > U32_MAX)
411 /* convert to unsigned 64b ns */
412 /* TODO convert to AQ time */
413 start = on ? s->sec * NSEC_PER_SEC + s->nsec : 0;
415 aq_ptp_hw_pin_conf(aq_nic, pin_index, start, period);
420 static int aq_ptp_pps_pin_configure(struct ptp_clock_info *ptp,
421 struct ptp_clock_request *rq, int on)
423 struct aq_ptp_s *aq_ptp = container_of(ptp, struct aq_ptp_s, ptp_info);
424 struct aq_nic_s *aq_nic = aq_ptp->aq_nic;
429 /* verify the request channel is there */
430 if (pin_index >= ptp->n_per_out)
433 aq_nic->aq_hw_ops->hw_get_ptp_ts(aq_nic->aq_hw, &start);
434 div_u64_rem(start, NSEC_PER_SEC, &rest);
435 period = on ? NSEC_PER_SEC : 0; /* PPS - pulse per second */
436 start = on ? start - rest + NSEC_PER_SEC *
437 (rest > 990000000LL ? 2 : 1) : 0;
439 aq_ptp_hw_pin_conf(aq_nic, pin_index, start, period);
444 static void aq_ptp_extts_pin_ctrl(struct aq_ptp_s *aq_ptp)
446 struct aq_nic_s *aq_nic = aq_ptp->aq_nic;
447 u32 enable = aq_ptp->extts_pin_enabled;
449 if (aq_nic->aq_hw_ops->hw_extts_gpio_enable)
450 aq_nic->aq_hw_ops->hw_extts_gpio_enable(aq_nic->aq_hw, 0,
454 static int aq_ptp_extts_pin_configure(struct ptp_clock_info *ptp,
455 struct ptp_clock_request *rq, int on)
457 struct aq_ptp_s *aq_ptp = container_of(ptp, struct aq_ptp_s, ptp_info);
459 u32 pin_index = rq->extts.index;
461 if (pin_index >= ptp->n_ext_ts)
464 aq_ptp->extts_pin_enabled = !!on;
466 aq_ptp->poll_timeout_ms = POLL_SYNC_TIMER_MS;
467 cancel_delayed_work_sync(&aq_ptp->poll_sync);
468 schedule_delayed_work(&aq_ptp->poll_sync,
469 msecs_to_jiffies(aq_ptp->poll_timeout_ms));
472 aq_ptp_extts_pin_ctrl(aq_ptp);
476 /* aq_ptp_gpio_feature_enable
477 * @ptp: the ptp clock structure
478 * @rq: the requested feature to change
479 * @on: whether to enable or disable the feature
481 static int aq_ptp_gpio_feature_enable(struct ptp_clock_info *ptp,
482 struct ptp_clock_request *rq, int on)
485 case PTP_CLK_REQ_EXTTS:
486 return aq_ptp_extts_pin_configure(ptp, rq, on);
487 case PTP_CLK_REQ_PEROUT:
488 return aq_ptp_perout_pin_configure(ptp, rq, on);
489 case PTP_CLK_REQ_PPS:
490 return aq_ptp_pps_pin_configure(ptp, rq, on);
499 * @ptp: the ptp clock structure
500 * @pin: index of the pin in question
501 * @func: the desired function to use
502 * @chan: the function channel index to use
504 static int aq_ptp_verify(struct ptp_clock_info *ptp, unsigned int pin,
505 enum ptp_pin_function func, unsigned int chan)
507 /* verify the requested pin is there */
508 if (!ptp->pin_config || pin >= ptp->n_pins)
511 /* enforce locked channels, no changing them */
512 if (chan != ptp->pin_config[pin].chan)
515 /* we want to keep the functions locked as well */
516 if (func != ptp->pin_config[pin].func)
522 /* aq_ptp_tx_hwtstamp - utility function which checks for TX time stamp
523 * @adapter: the private adapter struct
525 * if the timestamp is valid, we convert it into the timecounter ns
526 * value, then store that result into the hwtstamps structure which
527 * is passed up the network stack
529 void aq_ptp_tx_hwtstamp(struct aq_nic_s *aq_nic, u64 timestamp)
531 struct aq_ptp_s *aq_ptp = aq_nic->aq_ptp;
532 struct sk_buff *skb = aq_ptp_skb_get(&aq_ptp->skb_ring);
533 struct skb_shared_hwtstamps hwtstamp;
536 netdev_err(aq_nic->ndev, "have timestamp but tx_queues empty\n");
540 timestamp += atomic_read(&aq_ptp->offset_egress);
541 aq_ptp_convert_to_hwtstamp(aq_ptp, &hwtstamp, timestamp);
542 skb_tstamp_tx(skb, &hwtstamp);
543 dev_kfree_skb_any(skb);
545 aq_ptp_tx_timeout_update(aq_ptp);
548 /* aq_ptp_rx_hwtstamp - utility function which checks for RX time stamp
549 * @adapter: pointer to adapter struct
550 * @skb: particular skb to send timestamp with
552 * if the timestamp is valid, we convert it into the timecounter ns
553 * value, then store that result into the hwtstamps structure which
554 * is passed up the network stack
556 static void aq_ptp_rx_hwtstamp(struct aq_ptp_s *aq_ptp, struct sk_buff *skb,
559 timestamp -= atomic_read(&aq_ptp->offset_ingress);
560 aq_ptp_convert_to_hwtstamp(aq_ptp, skb_hwtstamps(skb), timestamp);
563 void aq_ptp_hwtstamp_config_get(struct aq_ptp_s *aq_ptp,
564 struct hwtstamp_config *config)
566 *config = aq_ptp->hwtstamp_config;
569 static void aq_ptp_prepare_filters(struct aq_ptp_s *aq_ptp)
571 aq_ptp->udp_filter.cmd = HW_ATL_RX_ENABLE_FLTR_L3L4 |
572 HW_ATL_RX_ENABLE_CMP_PROT_L4 |
574 HW_ATL_RX_ENABLE_CMP_DEST_PORT_L4 |
575 HW_ATL_RX_HOST << HW_ATL_RX_ACTION_FL3F4_SHIFT |
576 HW_ATL_RX_ENABLE_QUEUE_L3L4 |
577 aq_ptp->ptp_rx.idx << HW_ATL_RX_QUEUE_FL3L4_SHIFT;
578 aq_ptp->udp_filter.p_dst = PTP_EV_PORT;
580 aq_ptp->eth_type_filter.ethertype = ETH_P_1588;
581 aq_ptp->eth_type_filter.queue = aq_ptp->ptp_rx.idx;
584 int aq_ptp_hwtstamp_config_set(struct aq_ptp_s *aq_ptp,
585 struct hwtstamp_config *config)
587 struct aq_nic_s *aq_nic = aq_ptp->aq_nic;
588 const struct aq_hw_ops *hw_ops;
591 hw_ops = aq_nic->aq_hw_ops;
592 if (config->tx_type == HWTSTAMP_TX_ON ||
593 config->rx_filter == HWTSTAMP_FILTER_PTP_V2_EVENT) {
594 aq_ptp_prepare_filters(aq_ptp);
595 if (hw_ops->hw_filter_l3l4_set) {
596 err = hw_ops->hw_filter_l3l4_set(aq_nic->aq_hw,
597 &aq_ptp->udp_filter);
599 if (!err && hw_ops->hw_filter_l2_set) {
600 err = hw_ops->hw_filter_l2_set(aq_nic->aq_hw,
601 &aq_ptp->eth_type_filter);
603 aq_utils_obj_set(&aq_nic->flags, AQ_NIC_PTP_DPATH_UP);
605 aq_ptp->udp_filter.cmd &= ~HW_ATL_RX_ENABLE_FLTR_L3L4;
606 if (hw_ops->hw_filter_l3l4_set) {
607 err = hw_ops->hw_filter_l3l4_set(aq_nic->aq_hw,
608 &aq_ptp->udp_filter);
610 if (!err && hw_ops->hw_filter_l2_clear) {
611 err = hw_ops->hw_filter_l2_clear(aq_nic->aq_hw,
612 &aq_ptp->eth_type_filter);
614 aq_utils_obj_clear(&aq_nic->flags, AQ_NIC_PTP_DPATH_UP);
620 aq_ptp->hwtstamp_config = *config;
625 bool aq_ptp_ring(struct aq_nic_s *aq_nic, struct aq_ring_s *ring)
627 struct aq_ptp_s *aq_ptp = aq_nic->aq_ptp;
632 return &aq_ptp->ptp_tx == ring ||
633 &aq_ptp->ptp_rx == ring || &aq_ptp->hwts_rx == ring;
636 u16 aq_ptp_extract_ts(struct aq_nic_s *aq_nic, struct sk_buff *skb, u8 *p,
639 struct aq_ptp_s *aq_ptp = aq_nic->aq_ptp;
641 u16 ret = aq_nic->aq_hw_ops->rx_extract_ts(aq_nic->aq_hw,
645 aq_ptp_rx_hwtstamp(aq_ptp, skb, timestamp);
650 static int aq_ptp_poll(struct napi_struct *napi, int budget)
652 struct aq_ptp_s *aq_ptp = container_of(napi, struct aq_ptp_s, napi);
653 struct aq_nic_s *aq_nic = aq_ptp->aq_nic;
654 bool was_cleaned = false;
658 /* Processing PTP TX traffic */
659 err = aq_nic->aq_hw_ops->hw_ring_tx_head_update(aq_nic->aq_hw,
664 if (aq_ptp->ptp_tx.sw_head != aq_ptp->ptp_tx.hw_head) {
665 aq_ring_tx_clean(&aq_ptp->ptp_tx);
670 /* Processing HW_TIMESTAMP RX traffic */
671 err = aq_nic->aq_hw_ops->hw_ring_hwts_rx_receive(aq_nic->aq_hw,
676 if (aq_ptp->hwts_rx.sw_head != aq_ptp->hwts_rx.hw_head) {
677 aq_ring_hwts_rx_clean(&aq_ptp->hwts_rx, aq_nic);
679 err = aq_nic->aq_hw_ops->hw_ring_hwts_rx_fill(aq_nic->aq_hw,
685 /* Processing PTP RX traffic */
686 err = aq_nic->aq_hw_ops->hw_ring_rx_receive(aq_nic->aq_hw,
691 if (aq_ptp->ptp_rx.sw_head != aq_ptp->ptp_rx.hw_head) {
692 unsigned int sw_tail_old;
694 err = aq_ring_rx_clean(&aq_ptp->ptp_rx, napi, &work_done, budget);
698 sw_tail_old = aq_ptp->ptp_rx.sw_tail;
699 err = aq_ring_rx_fill(&aq_ptp->ptp_rx);
703 err = aq_nic->aq_hw_ops->hw_ring_rx_fill(aq_nic->aq_hw,
713 if (work_done < budget) {
714 napi_complete_done(napi, work_done);
715 aq_nic->aq_hw_ops->hw_irq_enable(aq_nic->aq_hw,
716 1 << aq_ptp->ptp_ring_param.vec_idx);
723 static irqreturn_t aq_ptp_isr(int irq, void *private)
725 struct aq_ptp_s *aq_ptp = private;
732 napi_schedule(&aq_ptp->napi);
735 return err >= 0 ? IRQ_HANDLED : IRQ_NONE;
738 int aq_ptp_xmit(struct aq_nic_s *aq_nic, struct sk_buff *skb)
740 struct aq_ptp_s *aq_ptp = aq_nic->aq_ptp;
741 struct aq_ring_s *ring = &aq_ptp->ptp_tx;
742 unsigned long irq_flags;
743 int err = NETDEV_TX_OK;
747 dev_kfree_skb_any(skb);
751 frags = skb_shinfo(skb)->nr_frags + 1;
752 /* Frags cannot be bigger 16KB
753 * because PTP usually works
754 * without Jumbo even in a background
756 if (frags > AQ_CFG_SKB_FRAGS_MAX || frags > aq_ring_avail_dx(ring)) {
757 /* Drop packet because it doesn't make sence to delay it */
758 dev_kfree_skb_any(skb);
762 err = aq_ptp_skb_put(&aq_ptp->skb_ring, skb);
764 netdev_err(aq_nic->ndev, "SKB Ring is overflow (%u)!\n",
766 return NETDEV_TX_BUSY;
768 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
769 aq_ptp_tx_timeout_start(aq_ptp);
770 skb_tx_timestamp(skb);
772 spin_lock_irqsave(&aq_nic->aq_ptp->ptp_ring_lock, irq_flags);
773 frags = aq_nic_map_skb(aq_nic, skb, ring);
776 err = aq_nic->aq_hw_ops->hw_ring_tx_xmit(aq_nic->aq_hw,
779 ++ring->stats.tx.packets;
780 ring->stats.tx.bytes += skb->len;
783 err = NETDEV_TX_BUSY;
785 spin_unlock_irqrestore(&aq_nic->aq_ptp->ptp_ring_lock, irq_flags);
791 void aq_ptp_service_task(struct aq_nic_s *aq_nic)
793 struct aq_ptp_s *aq_ptp = aq_nic->aq_ptp;
798 aq_ptp_tx_timeout_check(aq_ptp);
801 int aq_ptp_irq_alloc(struct aq_nic_s *aq_nic)
803 struct pci_dev *pdev = aq_nic->pdev;
804 struct aq_ptp_s *aq_ptp = aq_nic->aq_ptp;
810 if (pdev->msix_enabled || pdev->msi_enabled) {
811 err = request_irq(pci_irq_vector(pdev, aq_ptp->idx_vector),
812 aq_ptp_isr, 0, aq_nic->ndev->name, aq_ptp);
822 void aq_ptp_irq_free(struct aq_nic_s *aq_nic)
824 struct aq_ptp_s *aq_ptp = aq_nic->aq_ptp;
825 struct pci_dev *pdev = aq_nic->pdev;
830 free_irq(pci_irq_vector(pdev, aq_ptp->idx_vector), aq_ptp);
833 int aq_ptp_ring_init(struct aq_nic_s *aq_nic)
835 struct aq_ptp_s *aq_ptp = aq_nic->aq_ptp;
841 err = aq_ring_init(&aq_ptp->ptp_tx);
844 err = aq_nic->aq_hw_ops->hw_ring_tx_init(aq_nic->aq_hw,
846 &aq_ptp->ptp_ring_param);
850 err = aq_ring_init(&aq_ptp->ptp_rx);
853 err = aq_nic->aq_hw_ops->hw_ring_rx_init(aq_nic->aq_hw,
855 &aq_ptp->ptp_ring_param);
859 err = aq_ring_rx_fill(&aq_ptp->ptp_rx);
862 err = aq_nic->aq_hw_ops->hw_ring_rx_fill(aq_nic->aq_hw,
868 err = aq_ring_init(&aq_ptp->hwts_rx);
871 err = aq_nic->aq_hw_ops->hw_ring_rx_init(aq_nic->aq_hw,
873 &aq_ptp->ptp_ring_param);
876 err = aq_nic->aq_hw_ops->hw_ring_hwts_rx_fill(aq_nic->aq_hw,
884 aq_ring_rx_deinit(&aq_ptp->ptp_rx);
889 int aq_ptp_ring_start(struct aq_nic_s *aq_nic)
891 struct aq_ptp_s *aq_ptp = aq_nic->aq_ptp;
897 err = aq_nic->aq_hw_ops->hw_ring_tx_start(aq_nic->aq_hw, &aq_ptp->ptp_tx);
901 err = aq_nic->aq_hw_ops->hw_ring_rx_start(aq_nic->aq_hw, &aq_ptp->ptp_rx);
905 err = aq_nic->aq_hw_ops->hw_ring_rx_start(aq_nic->aq_hw,
910 napi_enable(&aq_ptp->napi);
916 void aq_ptp_ring_stop(struct aq_nic_s *aq_nic)
918 struct aq_ptp_s *aq_ptp = aq_nic->aq_ptp;
923 aq_nic->aq_hw_ops->hw_ring_tx_stop(aq_nic->aq_hw, &aq_ptp->ptp_tx);
924 aq_nic->aq_hw_ops->hw_ring_rx_stop(aq_nic->aq_hw, &aq_ptp->ptp_rx);
926 aq_nic->aq_hw_ops->hw_ring_rx_stop(aq_nic->aq_hw, &aq_ptp->hwts_rx);
928 napi_disable(&aq_ptp->napi);
931 void aq_ptp_ring_deinit(struct aq_nic_s *aq_nic)
933 struct aq_ptp_s *aq_ptp = aq_nic->aq_ptp;
935 if (!aq_ptp || !aq_ptp->ptp_tx.aq_nic || !aq_ptp->ptp_rx.aq_nic)
938 aq_ring_tx_clean(&aq_ptp->ptp_tx);
939 aq_ring_rx_deinit(&aq_ptp->ptp_rx);
942 #define PTP_8TC_RING_IDX 8
943 #define PTP_4TC_RING_IDX 16
944 #define PTP_HWST_RING_IDX 31
946 int aq_ptp_ring_alloc(struct aq_nic_s *aq_nic)
948 struct aq_ptp_s *aq_ptp = aq_nic->aq_ptp;
949 unsigned int tx_ring_idx, rx_ring_idx;
950 struct aq_ring_s *hwts;
951 u32 tx_tc_mode, rx_tc_mode;
952 struct aq_ring_s *ring;
958 /* Index must to be 8 (8 TCs) or 16 (4 TCs).
959 * It depends from Traffic Class mode.
961 aq_nic->aq_hw_ops->hw_tx_tc_mode_get(aq_nic->aq_hw, &tx_tc_mode);
963 tx_ring_idx = PTP_8TC_RING_IDX;
965 tx_ring_idx = PTP_4TC_RING_IDX;
967 ring = aq_ring_tx_alloc(&aq_ptp->ptp_tx, aq_nic,
968 tx_ring_idx, &aq_nic->aq_nic_cfg);
974 aq_nic->aq_hw_ops->hw_rx_tc_mode_get(aq_nic->aq_hw, &rx_tc_mode);
976 rx_ring_idx = PTP_8TC_RING_IDX;
978 rx_ring_idx = PTP_4TC_RING_IDX;
980 ring = aq_ring_rx_alloc(&aq_ptp->ptp_rx, aq_nic,
981 rx_ring_idx, &aq_nic->aq_nic_cfg);
984 goto err_exit_ptp_tx;
987 hwts = aq_ring_hwts_rx_alloc(&aq_ptp->hwts_rx, aq_nic, PTP_HWST_RING_IDX,
988 aq_nic->aq_nic_cfg.rxds,
989 aq_nic->aq_nic_cfg.aq_hw_caps->rxd_size);
992 goto err_exit_ptp_rx;
995 err = aq_ptp_skb_ring_init(&aq_ptp->skb_ring, aq_nic->aq_nic_cfg.rxds);
998 goto err_exit_hwts_rx;
1001 aq_ptp->ptp_ring_param.vec_idx = aq_ptp->idx_vector;
1002 aq_ptp->ptp_ring_param.cpu = aq_ptp->ptp_ring_param.vec_idx +
1003 aq_nic_get_cfg(aq_nic)->aq_rss.base_cpu_number;
1004 cpumask_set_cpu(aq_ptp->ptp_ring_param.cpu,
1005 &aq_ptp->ptp_ring_param.affinity_mask);
1010 aq_ring_free(&aq_ptp->hwts_rx);
1012 aq_ring_free(&aq_ptp->ptp_rx);
1014 aq_ring_free(&aq_ptp->ptp_tx);
1019 void aq_ptp_ring_free(struct aq_nic_s *aq_nic)
1021 struct aq_ptp_s *aq_ptp = aq_nic->aq_ptp;
1026 aq_ring_free(&aq_ptp->ptp_tx);
1027 aq_ring_free(&aq_ptp->ptp_rx);
1028 aq_ring_free(&aq_ptp->hwts_rx);
1030 aq_ptp_skb_ring_release(&aq_ptp->skb_ring);
1033 #define MAX_PTP_GPIO_COUNT 4
1035 static struct ptp_clock_info aq_ptp_clock = {
1036 .owner = THIS_MODULE,
1037 .name = "atlantic ptp",
1038 .max_adj = 999999999,
1041 .adjfine = aq_ptp_adjfine,
1042 .adjtime = aq_ptp_adjtime,
1043 .gettime64 = aq_ptp_gettime,
1044 .settime64 = aq_ptp_settime,
1046 .enable = aq_ptp_gpio_feature_enable,
1048 .verify = aq_ptp_verify,
1052 #define ptp_offset_init(__idx, __mbps, __egress, __ingress) do { \
1053 ptp_offset[__idx].mbps = (__mbps); \
1054 ptp_offset[__idx].egress = (__egress); \
1055 ptp_offset[__idx].ingress = (__ingress); } \
1058 static void aq_ptp_offset_init_from_fw(const struct hw_aq_ptp_offset *offsets)
1062 /* Load offsets for PTP */
1063 for (i = 0; i < ARRAY_SIZE(ptp_offset); i++) {
1066 case ptp_offset_idx_100:
1067 ptp_offset_init(i, 100,
1068 offsets->egress_100,
1069 offsets->ingress_100);
1072 case ptp_offset_idx_1000:
1073 ptp_offset_init(i, 1000,
1074 offsets->egress_1000,
1075 offsets->ingress_1000);
1078 case ptp_offset_idx_2500:
1079 ptp_offset_init(i, 2500,
1080 offsets->egress_2500,
1081 offsets->ingress_2500);
1084 case ptp_offset_idx_5000:
1085 ptp_offset_init(i, 5000,
1086 offsets->egress_5000,
1087 offsets->ingress_5000);
1090 case ptp_offset_idx_10000:
1091 ptp_offset_init(i, 10000,
1092 offsets->egress_10000,
1093 offsets->ingress_10000);
1099 static void aq_ptp_offset_init(const struct hw_aq_ptp_offset *offsets)
1101 memset(ptp_offset, 0, sizeof(ptp_offset));
1103 aq_ptp_offset_init_from_fw(offsets);
1106 static void aq_ptp_gpio_init(struct ptp_clock_info *info,
1107 struct hw_aq_info *hw_info)
1109 struct ptp_pin_desc pin_desc[MAX_PTP_GPIO_COUNT];
1110 u32 extts_pin_cnt = 0;
1111 u32 out_pin_cnt = 0;
1114 memset(pin_desc, 0, sizeof(pin_desc));
1116 for (i = 0; i < MAX_PTP_GPIO_COUNT - 1; i++) {
1117 if (hw_info->gpio_pin[i] ==
1118 (GPIO_PIN_FUNCTION_PTP0 + out_pin_cnt)) {
1119 snprintf(pin_desc[out_pin_cnt].name,
1120 sizeof(pin_desc[out_pin_cnt].name),
1122 pin_desc[out_pin_cnt].index = out_pin_cnt;
1123 pin_desc[out_pin_cnt].chan = out_pin_cnt;
1124 pin_desc[out_pin_cnt++].func = PTP_PF_PEROUT;
1128 info->n_per_out = out_pin_cnt;
1130 if (hw_info->caps_ex & BIT(CAPS_EX_PHY_CTRL_TS_PIN)) {
1133 snprintf(pin_desc[out_pin_cnt].name,
1134 sizeof(pin_desc[out_pin_cnt].name),
1135 "AQ_GPIO%d", out_pin_cnt);
1136 pin_desc[out_pin_cnt].index = out_pin_cnt;
1137 pin_desc[out_pin_cnt].chan = 0;
1138 pin_desc[out_pin_cnt].func = PTP_PF_EXTTS;
1141 info->n_pins = out_pin_cnt + extts_pin_cnt;
1142 info->n_ext_ts = extts_pin_cnt;
1147 info->pin_config = kcalloc(info->n_pins, sizeof(struct ptp_pin_desc),
1150 if (!info->pin_config)
1153 memcpy(info->pin_config, &pin_desc,
1154 sizeof(struct ptp_pin_desc) * info->n_pins);
1157 void aq_ptp_clock_init(struct aq_nic_s *aq_nic)
1159 struct aq_ptp_s *aq_ptp = aq_nic->aq_ptp;
1160 struct timespec64 ts;
1162 ktime_get_real_ts64(&ts);
1163 aq_ptp_settime(&aq_ptp->ptp_info, &ts);
1166 static void aq_ptp_poll_sync_work_cb(struct work_struct *w);
1168 int aq_ptp_init(struct aq_nic_s *aq_nic, unsigned int idx_vec)
1170 struct hw_atl_utils_mbox mbox;
1171 struct ptp_clock *clock;
1172 struct aq_ptp_s *aq_ptp;
1175 if (!aq_nic->aq_hw_ops->hw_get_ptp_ts) {
1176 aq_nic->aq_ptp = NULL;
1180 if (!aq_nic->aq_fw_ops->enable_ptp) {
1181 aq_nic->aq_ptp = NULL;
1185 hw_atl_utils_mpi_read_stats(aq_nic->aq_hw, &mbox);
1187 if (!(mbox.info.caps_ex & BIT(CAPS_EX_PHY_PTP_EN))) {
1188 aq_nic->aq_ptp = NULL;
1192 aq_ptp_offset_init(&mbox.info.ptp_offset);
1194 aq_ptp = kzalloc(sizeof(*aq_ptp), GFP_KERNEL);
1200 aq_ptp->aq_nic = aq_nic;
1202 spin_lock_init(&aq_ptp->ptp_lock);
1203 spin_lock_init(&aq_ptp->ptp_ring_lock);
1205 aq_ptp->ptp_info = aq_ptp_clock;
1206 aq_ptp_gpio_init(&aq_ptp->ptp_info, &mbox.info);
1207 clock = ptp_clock_register(&aq_ptp->ptp_info, &aq_nic->ndev->dev);
1208 if (!clock || IS_ERR(clock)) {
1209 netdev_err(aq_nic->ndev, "ptp_clock_register failed\n");
1210 err = PTR_ERR(clock);
1213 aq_ptp->ptp_clock = clock;
1214 aq_ptp_tx_timeout_init(&aq_ptp->ptp_tx_timeout);
1216 atomic_set(&aq_ptp->offset_egress, 0);
1217 atomic_set(&aq_ptp->offset_ingress, 0);
1219 netif_napi_add(aq_nic_get_ndev(aq_nic), &aq_ptp->napi,
1220 aq_ptp_poll, AQ_CFG_NAPI_WEIGHT);
1222 aq_ptp->idx_vector = idx_vec;
1224 aq_nic->aq_ptp = aq_ptp;
1226 /* enable ptp counter */
1227 aq_utils_obj_set(&aq_nic->aq_hw->flags, AQ_HW_PTP_AVAILABLE);
1228 mutex_lock(&aq_nic->fwreq_mutex);
1229 aq_nic->aq_fw_ops->enable_ptp(aq_nic->aq_hw, 1);
1230 aq_ptp_clock_init(aq_nic);
1231 mutex_unlock(&aq_nic->fwreq_mutex);
1233 INIT_DELAYED_WORK(&aq_ptp->poll_sync, &aq_ptp_poll_sync_work_cb);
1234 aq_ptp->eth_type_filter.location =
1235 aq_nic_reserve_filter(aq_nic, aq_rx_filter_ethertype);
1236 aq_ptp->udp_filter.location =
1237 aq_nic_reserve_filter(aq_nic, aq_rx_filter_l3l4);
1243 kfree(aq_ptp->ptp_info.pin_config);
1245 aq_nic->aq_ptp = NULL;
1249 void aq_ptp_unregister(struct aq_nic_s *aq_nic)
1251 struct aq_ptp_s *aq_ptp = aq_nic->aq_ptp;
1256 ptp_clock_unregister(aq_ptp->ptp_clock);
1259 void aq_ptp_free(struct aq_nic_s *aq_nic)
1261 struct aq_ptp_s *aq_ptp = aq_nic->aq_ptp;
1266 aq_nic_release_filter(aq_nic, aq_rx_filter_ethertype,
1267 aq_ptp->eth_type_filter.location);
1268 aq_nic_release_filter(aq_nic, aq_rx_filter_l3l4,
1269 aq_ptp->udp_filter.location);
1270 cancel_delayed_work_sync(&aq_ptp->poll_sync);
1272 mutex_lock(&aq_nic->fwreq_mutex);
1273 aq_nic->aq_fw_ops->enable_ptp(aq_nic->aq_hw, 0);
1274 mutex_unlock(&aq_nic->fwreq_mutex);
1276 kfree(aq_ptp->ptp_info.pin_config);
1278 netif_napi_del(&aq_ptp->napi);
1280 aq_nic->aq_ptp = NULL;
1283 struct ptp_clock *aq_ptp_get_ptp_clock(struct aq_ptp_s *aq_ptp)
1285 return aq_ptp->ptp_clock;
1288 /* PTP external GPIO nanoseconds count */
1289 static uint64_t aq_ptp_get_sync1588_ts(struct aq_nic_s *aq_nic)
1293 if (aq_nic->aq_hw_ops->hw_get_sync_ts)
1294 aq_nic->aq_hw_ops->hw_get_sync_ts(aq_nic->aq_hw, &ts);
1299 static void aq_ptp_start_work(struct aq_ptp_s *aq_ptp)
1301 if (aq_ptp->extts_pin_enabled) {
1302 aq_ptp->poll_timeout_ms = POLL_SYNC_TIMER_MS;
1303 aq_ptp->last_sync1588_ts =
1304 aq_ptp_get_sync1588_ts(aq_ptp->aq_nic);
1305 schedule_delayed_work(&aq_ptp->poll_sync,
1306 msecs_to_jiffies(aq_ptp->poll_timeout_ms));
1310 int aq_ptp_link_change(struct aq_nic_s *aq_nic)
1312 struct aq_ptp_s *aq_ptp = aq_nic->aq_ptp;
1317 if (aq_nic->aq_hw->aq_link_status.mbps)
1318 aq_ptp_start_work(aq_ptp);
1320 cancel_delayed_work_sync(&aq_ptp->poll_sync);
1325 static bool aq_ptp_sync_ts_updated(struct aq_ptp_s *aq_ptp, u64 *new_ts)
1327 struct aq_nic_s *aq_nic = aq_ptp->aq_nic;
1331 sync_ts = aq_ptp_get_sync1588_ts(aq_nic);
1333 if (sync_ts != aq_ptp->last_sync1588_ts) {
1334 sync_ts2 = aq_ptp_get_sync1588_ts(aq_nic);
1335 if (sync_ts != sync_ts2) {
1337 sync_ts2 = aq_ptp_get_sync1588_ts(aq_nic);
1338 if (sync_ts != sync_ts2) {
1339 netdev_err(aq_nic->ndev,
1340 "%s: Unable to get correct GPIO TS",
1352 static int aq_ptp_check_sync1588(struct aq_ptp_s *aq_ptp)
1354 struct aq_nic_s *aq_nic = aq_ptp->aq_nic;
1357 /* Sync1588 pin was triggered */
1358 if (aq_ptp_sync_ts_updated(aq_ptp, &sync_ts)) {
1359 if (aq_ptp->extts_pin_enabled) {
1360 struct ptp_clock_event ptp_event;
1363 aq_nic->aq_hw_ops->hw_ts_to_sys_clock(aq_nic->aq_hw,
1365 ptp_event.index = aq_ptp->ptp_info.n_pins - 1;
1366 ptp_event.timestamp = time;
1368 ptp_event.type = PTP_CLOCK_EXTTS;
1369 ptp_clock_event(aq_ptp->ptp_clock, &ptp_event);
1372 aq_ptp->last_sync1588_ts = sync_ts;
1378 void aq_ptp_poll_sync_work_cb(struct work_struct *w)
1380 struct delayed_work *dw = to_delayed_work(w);
1381 struct aq_ptp_s *aq_ptp = container_of(dw, struct aq_ptp_s, poll_sync);
1383 aq_ptp_check_sync1588(aq_ptp);
1385 if (aq_ptp->extts_pin_enabled) {
1386 unsigned long timeout = msecs_to_jiffies(aq_ptp->poll_timeout_ms);
1388 schedule_delayed_work(&aq_ptp->poll_sync, timeout);