1 // SPDX-License-Identifier: GPL-2.0-only
2 /* Atlantic Network Driver
4 * Copyright (C) 2014-2019 aQuantia Corporation
5 * Copyright (C) 2019-2020 Marvell International Ltd.
9 * Definition of functions for Linux PTP support.
12 #include <linux/ptp_clock_kernel.h>
13 #include <linux/ptp_classify.h>
14 #include <linux/interrupt.h>
15 #include <linux/clocksource.h>
21 #include "aq_filters.h"
23 #if IS_REACHABLE(CONFIG_PTP_1588_CLOCK)
25 #define AQ_PTP_TX_TIMEOUT (HZ * 10)
27 #define POLL_SYNC_TIMER_MS 15
29 enum ptp_speed_offsets {
30 ptp_offset_idx_10 = 0,
39 struct sk_buff **buff;
46 struct ptp_tx_timeout {
49 unsigned long tx_start;
53 struct aq_nic_s *aq_nic;
54 struct hwtstamp_config hwtstamp_config;
56 spinlock_t ptp_ring_lock;
57 struct ptp_clock *ptp_clock;
58 struct ptp_clock_info ptp_info;
60 atomic_t offset_egress;
61 atomic_t offset_ingress;
63 struct aq_ring_param_s ptp_ring_param;
65 struct ptp_tx_timeout ptp_tx_timeout;
67 unsigned int idx_vector;
68 struct napi_struct napi;
70 struct aq_ring_s ptp_tx;
71 struct aq_ring_s ptp_rx;
72 struct aq_ring_s hwts_rx;
74 struct ptp_skb_ring skb_ring;
76 struct aq_rx_filter_l3l4 udp_filter;
77 struct aq_rx_filter_l2 eth_type_filter;
79 struct delayed_work poll_sync;
82 bool extts_pin_enabled;
86 struct ptp_tm_offset {
92 static struct ptp_tm_offset ptp_offset[6];
94 void aq_ptp_tm_offset_set(struct aq_nic_s *aq_nic, unsigned int mbps)
96 struct aq_ptp_s *aq_ptp = aq_nic->aq_ptp;
97 int i, egress, ingress;
105 for (i = 0; i < ARRAY_SIZE(ptp_offset); i++) {
106 if (mbps == ptp_offset[i].mbps) {
107 egress = ptp_offset[i].egress;
108 ingress = ptp_offset[i].ingress;
113 atomic_set(&aq_ptp->offset_egress, egress);
114 atomic_set(&aq_ptp->offset_ingress, ingress);
117 static int __aq_ptp_skb_put(struct ptp_skb_ring *ring, struct sk_buff *skb)
119 unsigned int next_head = (ring->head + 1) % ring->size;
121 if (next_head == ring->tail)
124 ring->buff[ring->head] = skb_get(skb);
125 ring->head = next_head;
130 static int aq_ptp_skb_put(struct ptp_skb_ring *ring, struct sk_buff *skb)
135 spin_lock_irqsave(&ring->lock, flags);
136 ret = __aq_ptp_skb_put(ring, skb);
137 spin_unlock_irqrestore(&ring->lock, flags);
142 static struct sk_buff *__aq_ptp_skb_get(struct ptp_skb_ring *ring)
146 if (ring->tail == ring->head)
149 skb = ring->buff[ring->tail];
150 ring->tail = (ring->tail + 1) % ring->size;
155 static struct sk_buff *aq_ptp_skb_get(struct ptp_skb_ring *ring)
160 spin_lock_irqsave(&ring->lock, flags);
161 skb = __aq_ptp_skb_get(ring);
162 spin_unlock_irqrestore(&ring->lock, flags);
167 static unsigned int aq_ptp_skb_buf_len(struct ptp_skb_ring *ring)
172 spin_lock_irqsave(&ring->lock, flags);
173 len = (ring->head >= ring->tail) ?
174 ring->head - ring->tail :
175 ring->size - ring->tail + ring->head;
176 spin_unlock_irqrestore(&ring->lock, flags);
181 static int aq_ptp_skb_ring_init(struct ptp_skb_ring *ring, unsigned int size)
183 struct sk_buff **buff = kmalloc(sizeof(*buff) * size, GFP_KERNEL);
188 spin_lock_init(&ring->lock);
198 static void aq_ptp_skb_ring_clean(struct ptp_skb_ring *ring)
202 while ((skb = aq_ptp_skb_get(ring)) != NULL)
203 dev_kfree_skb_any(skb);
206 static void aq_ptp_skb_ring_release(struct ptp_skb_ring *ring)
209 aq_ptp_skb_ring_clean(ring);
215 static void aq_ptp_tx_timeout_init(struct ptp_tx_timeout *timeout)
217 spin_lock_init(&timeout->lock);
218 timeout->active = false;
221 static void aq_ptp_tx_timeout_start(struct aq_ptp_s *aq_ptp)
223 struct ptp_tx_timeout *timeout = &aq_ptp->ptp_tx_timeout;
226 spin_lock_irqsave(&timeout->lock, flags);
227 timeout->active = true;
228 timeout->tx_start = jiffies;
229 spin_unlock_irqrestore(&timeout->lock, flags);
232 static void aq_ptp_tx_timeout_update(struct aq_ptp_s *aq_ptp)
234 if (!aq_ptp_skb_buf_len(&aq_ptp->skb_ring)) {
235 struct ptp_tx_timeout *timeout = &aq_ptp->ptp_tx_timeout;
238 spin_lock_irqsave(&timeout->lock, flags);
239 timeout->active = false;
240 spin_unlock_irqrestore(&timeout->lock, flags);
244 static void aq_ptp_tx_timeout_check(struct aq_ptp_s *aq_ptp)
246 struct ptp_tx_timeout *timeout = &aq_ptp->ptp_tx_timeout;
250 timeout_flag = false;
252 spin_lock_irqsave(&timeout->lock, flags);
253 if (timeout->active) {
254 timeout_flag = time_is_before_jiffies(timeout->tx_start +
256 /* reset active flag if timeout detected */
258 timeout->active = false;
260 spin_unlock_irqrestore(&timeout->lock, flags);
263 aq_ptp_skb_ring_clean(&aq_ptp->skb_ring);
264 netdev_err(aq_ptp->aq_nic->ndev,
265 "PTP Timeout. Clearing Tx Timestamp SKBs\n");
270 * @ptp: the ptp clock structure
271 * @ppb: parts per billion adjustment from base
273 * adjust the frequency of the ptp cycle counter by the
274 * indicated ppb from the base frequency.
276 static int aq_ptp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm)
278 struct aq_ptp_s *aq_ptp = container_of(ptp, struct aq_ptp_s, ptp_info);
279 struct aq_nic_s *aq_nic = aq_ptp->aq_nic;
281 mutex_lock(&aq_nic->fwreq_mutex);
282 aq_nic->aq_hw_ops->hw_adj_clock_freq(aq_nic->aq_hw,
283 scaled_ppm_to_ppb(scaled_ppm));
284 mutex_unlock(&aq_nic->fwreq_mutex);
290 * @ptp: the ptp clock structure
291 * @delta: offset to adjust the cycle counter by
293 * adjust the timer by resetting the timecounter structure.
295 static int aq_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta)
297 struct aq_ptp_s *aq_ptp = container_of(ptp, struct aq_ptp_s, ptp_info);
298 struct aq_nic_s *aq_nic = aq_ptp->aq_nic;
301 spin_lock_irqsave(&aq_ptp->ptp_lock, flags);
302 aq_nic->aq_hw_ops->hw_adj_sys_clock(aq_nic->aq_hw, delta);
303 spin_unlock_irqrestore(&aq_ptp->ptp_lock, flags);
309 * @ptp: the ptp clock structure
310 * @ts: timespec structure to hold the current time value
312 * read the timecounter and return the correct value on ns,
313 * after converting it into a struct timespec.
315 static int aq_ptp_gettime(struct ptp_clock_info *ptp, struct timespec64 *ts)
317 struct aq_ptp_s *aq_ptp = container_of(ptp, struct aq_ptp_s, ptp_info);
318 struct aq_nic_s *aq_nic = aq_ptp->aq_nic;
322 spin_lock_irqsave(&aq_ptp->ptp_lock, flags);
323 aq_nic->aq_hw_ops->hw_get_ptp_ts(aq_nic->aq_hw, &ns);
324 spin_unlock_irqrestore(&aq_ptp->ptp_lock, flags);
326 *ts = ns_to_timespec64(ns);
332 * @ptp: the ptp clock structure
333 * @ts: the timespec containing the new time for the cycle counter
335 * reset the timecounter to use a new base value instead of the kernel
338 static int aq_ptp_settime(struct ptp_clock_info *ptp,
339 const struct timespec64 *ts)
341 struct aq_ptp_s *aq_ptp = container_of(ptp, struct aq_ptp_s, ptp_info);
342 struct aq_nic_s *aq_nic = aq_ptp->aq_nic;
344 u64 ns = timespec64_to_ns(ts);
347 spin_lock_irqsave(&aq_ptp->ptp_lock, flags);
348 aq_nic->aq_hw_ops->hw_get_ptp_ts(aq_nic->aq_hw, &now);
349 aq_nic->aq_hw_ops->hw_adj_sys_clock(aq_nic->aq_hw, (s64)ns - (s64)now);
351 spin_unlock_irqrestore(&aq_ptp->ptp_lock, flags);
356 static void aq_ptp_convert_to_hwtstamp(struct aq_ptp_s *aq_ptp,
357 struct skb_shared_hwtstamps *hwtstamp,
360 memset(hwtstamp, 0, sizeof(*hwtstamp));
361 hwtstamp->hwtstamp = ns_to_ktime(timestamp);
364 static int aq_ptp_hw_pin_conf(struct aq_nic_s *aq_nic, u32 pin_index, u64 start,
368 netdev_dbg(aq_nic->ndev,
369 "Enable GPIO %d pulsing, start time %llu, period %u\n",
370 pin_index, start, (u32)period);
372 netdev_dbg(aq_nic->ndev,
373 "Disable GPIO %d pulsing, start time %llu, period %u\n",
374 pin_index, start, (u32)period);
376 /* Notify hardware of request to being sending pulses.
377 * If period is ZERO then pulsen is disabled.
379 mutex_lock(&aq_nic->fwreq_mutex);
380 aq_nic->aq_hw_ops->hw_gpio_pulse(aq_nic->aq_hw, pin_index,
382 mutex_unlock(&aq_nic->fwreq_mutex);
387 static int aq_ptp_perout_pin_configure(struct ptp_clock_info *ptp,
388 struct ptp_clock_request *rq, int on)
390 struct aq_ptp_s *aq_ptp = container_of(ptp, struct aq_ptp_s, ptp_info);
391 struct ptp_clock_time *t = &rq->perout.period;
392 struct ptp_clock_time *s = &rq->perout.start;
393 struct aq_nic_s *aq_nic = aq_ptp->aq_nic;
395 u32 pin_index = rq->perout.index;
397 /* verify the request channel is there */
398 if (pin_index >= ptp->n_per_out)
401 /* we cannot support periods greater
402 * than 4 seconds due to reg limit
404 if (t->sec > 4 || t->sec < 0)
407 /* convert to unsigned 64b ns,
408 * verify we can put it in a 32b register
410 period = on ? t->sec * NSEC_PER_SEC + t->nsec : 0;
412 /* verify the value is in range supported by hardware */
413 if (period > U32_MAX)
415 /* convert to unsigned 64b ns */
416 /* TODO convert to AQ time */
417 start = on ? s->sec * NSEC_PER_SEC + s->nsec : 0;
419 aq_ptp_hw_pin_conf(aq_nic, pin_index, start, period);
424 static int aq_ptp_pps_pin_configure(struct ptp_clock_info *ptp,
425 struct ptp_clock_request *rq, int on)
427 struct aq_ptp_s *aq_ptp = container_of(ptp, struct aq_ptp_s, ptp_info);
428 struct aq_nic_s *aq_nic = aq_ptp->aq_nic;
433 /* verify the request channel is there */
434 if (pin_index >= ptp->n_per_out)
437 aq_nic->aq_hw_ops->hw_get_ptp_ts(aq_nic->aq_hw, &start);
438 div_u64_rem(start, NSEC_PER_SEC, &rest);
439 period = on ? NSEC_PER_SEC : 0; /* PPS - pulse per second */
440 start = on ? start - rest + NSEC_PER_SEC *
441 (rest > 990000000LL ? 2 : 1) : 0;
443 aq_ptp_hw_pin_conf(aq_nic, pin_index, start, period);
448 static void aq_ptp_extts_pin_ctrl(struct aq_ptp_s *aq_ptp)
450 struct aq_nic_s *aq_nic = aq_ptp->aq_nic;
451 u32 enable = aq_ptp->extts_pin_enabled;
453 if (aq_nic->aq_hw_ops->hw_extts_gpio_enable)
454 aq_nic->aq_hw_ops->hw_extts_gpio_enable(aq_nic->aq_hw, 0,
458 static int aq_ptp_extts_pin_configure(struct ptp_clock_info *ptp,
459 struct ptp_clock_request *rq, int on)
461 struct aq_ptp_s *aq_ptp = container_of(ptp, struct aq_ptp_s, ptp_info);
463 u32 pin_index = rq->extts.index;
465 if (pin_index >= ptp->n_ext_ts)
468 aq_ptp->extts_pin_enabled = !!on;
470 aq_ptp->poll_timeout_ms = POLL_SYNC_TIMER_MS;
471 cancel_delayed_work_sync(&aq_ptp->poll_sync);
472 schedule_delayed_work(&aq_ptp->poll_sync,
473 msecs_to_jiffies(aq_ptp->poll_timeout_ms));
476 aq_ptp_extts_pin_ctrl(aq_ptp);
480 /* aq_ptp_gpio_feature_enable
481 * @ptp: the ptp clock structure
482 * @rq: the requested feature to change
483 * @on: whether to enable or disable the feature
485 static int aq_ptp_gpio_feature_enable(struct ptp_clock_info *ptp,
486 struct ptp_clock_request *rq, int on)
489 case PTP_CLK_REQ_EXTTS:
490 return aq_ptp_extts_pin_configure(ptp, rq, on);
491 case PTP_CLK_REQ_PEROUT:
492 return aq_ptp_perout_pin_configure(ptp, rq, on);
493 case PTP_CLK_REQ_PPS:
494 return aq_ptp_pps_pin_configure(ptp, rq, on);
503 * @ptp: the ptp clock structure
504 * @pin: index of the pin in question
505 * @func: the desired function to use
506 * @chan: the function channel index to use
508 static int aq_ptp_verify(struct ptp_clock_info *ptp, unsigned int pin,
509 enum ptp_pin_function func, unsigned int chan)
511 /* verify the requested pin is there */
512 if (!ptp->pin_config || pin >= ptp->n_pins)
515 /* enforce locked channels, no changing them */
516 if (chan != ptp->pin_config[pin].chan)
519 /* we want to keep the functions locked as well */
520 if (func != ptp->pin_config[pin].func)
526 /* aq_ptp_tx_hwtstamp - utility function which checks for TX time stamp
527 * @adapter: the private adapter struct
529 * if the timestamp is valid, we convert it into the timecounter ns
530 * value, then store that result into the hwtstamps structure which
531 * is passed up the network stack
533 void aq_ptp_tx_hwtstamp(struct aq_nic_s *aq_nic, u64 timestamp)
535 struct aq_ptp_s *aq_ptp = aq_nic->aq_ptp;
536 struct sk_buff *skb = aq_ptp_skb_get(&aq_ptp->skb_ring);
537 struct skb_shared_hwtstamps hwtstamp;
540 netdev_err(aq_nic->ndev, "have timestamp but tx_queues empty\n");
544 timestamp += atomic_read(&aq_ptp->offset_egress);
545 aq_ptp_convert_to_hwtstamp(aq_ptp, &hwtstamp, timestamp);
546 skb_tstamp_tx(skb, &hwtstamp);
547 dev_kfree_skb_any(skb);
549 aq_ptp_tx_timeout_update(aq_ptp);
552 /* aq_ptp_rx_hwtstamp - utility function which checks for RX time stamp
553 * @adapter: pointer to adapter struct
554 * @skb: particular skb to send timestamp with
556 * if the timestamp is valid, we convert it into the timecounter ns
557 * value, then store that result into the hwtstamps structure which
558 * is passed up the network stack
560 static void aq_ptp_rx_hwtstamp(struct aq_ptp_s *aq_ptp, struct sk_buff *skb,
563 timestamp -= atomic_read(&aq_ptp->offset_ingress);
564 aq_ptp_convert_to_hwtstamp(aq_ptp, skb_hwtstamps(skb), timestamp);
567 void aq_ptp_hwtstamp_config_get(struct aq_ptp_s *aq_ptp,
568 struct hwtstamp_config *config)
570 *config = aq_ptp->hwtstamp_config;
573 static void aq_ptp_prepare_filters(struct aq_ptp_s *aq_ptp)
575 aq_ptp->udp_filter.cmd = HW_ATL_RX_ENABLE_FLTR_L3L4 |
576 HW_ATL_RX_ENABLE_CMP_PROT_L4 |
578 HW_ATL_RX_ENABLE_CMP_DEST_PORT_L4 |
579 HW_ATL_RX_HOST << HW_ATL_RX_ACTION_FL3F4_SHIFT |
580 HW_ATL_RX_ENABLE_QUEUE_L3L4 |
581 aq_ptp->ptp_rx.idx << HW_ATL_RX_QUEUE_FL3L4_SHIFT;
582 aq_ptp->udp_filter.p_dst = PTP_EV_PORT;
584 aq_ptp->eth_type_filter.ethertype = ETH_P_1588;
585 aq_ptp->eth_type_filter.queue = aq_ptp->ptp_rx.idx;
588 int aq_ptp_hwtstamp_config_set(struct aq_ptp_s *aq_ptp,
589 struct hwtstamp_config *config)
591 struct aq_nic_s *aq_nic = aq_ptp->aq_nic;
592 const struct aq_hw_ops *hw_ops;
595 hw_ops = aq_nic->aq_hw_ops;
596 if (config->tx_type == HWTSTAMP_TX_ON ||
597 config->rx_filter == HWTSTAMP_FILTER_PTP_V2_EVENT) {
598 aq_ptp_prepare_filters(aq_ptp);
599 if (hw_ops->hw_filter_l3l4_set) {
600 err = hw_ops->hw_filter_l3l4_set(aq_nic->aq_hw,
601 &aq_ptp->udp_filter);
603 if (!err && hw_ops->hw_filter_l2_set) {
604 err = hw_ops->hw_filter_l2_set(aq_nic->aq_hw,
605 &aq_ptp->eth_type_filter);
607 aq_utils_obj_set(&aq_nic->flags, AQ_NIC_PTP_DPATH_UP);
609 aq_ptp->udp_filter.cmd &= ~HW_ATL_RX_ENABLE_FLTR_L3L4;
610 if (hw_ops->hw_filter_l3l4_set) {
611 err = hw_ops->hw_filter_l3l4_set(aq_nic->aq_hw,
612 &aq_ptp->udp_filter);
614 if (!err && hw_ops->hw_filter_l2_clear) {
615 err = hw_ops->hw_filter_l2_clear(aq_nic->aq_hw,
616 &aq_ptp->eth_type_filter);
618 aq_utils_obj_clear(&aq_nic->flags, AQ_NIC_PTP_DPATH_UP);
624 aq_ptp->hwtstamp_config = *config;
629 bool aq_ptp_ring(struct aq_nic_s *aq_nic, struct aq_ring_s *ring)
631 struct aq_ptp_s *aq_ptp = aq_nic->aq_ptp;
636 return &aq_ptp->ptp_tx == ring ||
637 &aq_ptp->ptp_rx == ring || &aq_ptp->hwts_rx == ring;
640 u16 aq_ptp_extract_ts(struct aq_nic_s *aq_nic, struct sk_buff *skb, u8 *p,
643 struct aq_ptp_s *aq_ptp = aq_nic->aq_ptp;
645 u16 ret = aq_nic->aq_hw_ops->rx_extract_ts(aq_nic->aq_hw,
649 aq_ptp_rx_hwtstamp(aq_ptp, skb, timestamp);
654 static int aq_ptp_poll(struct napi_struct *napi, int budget)
656 struct aq_ptp_s *aq_ptp = container_of(napi, struct aq_ptp_s, napi);
657 struct aq_nic_s *aq_nic = aq_ptp->aq_nic;
658 bool was_cleaned = false;
662 /* Processing PTP TX traffic */
663 err = aq_nic->aq_hw_ops->hw_ring_tx_head_update(aq_nic->aq_hw,
668 if (aq_ptp->ptp_tx.sw_head != aq_ptp->ptp_tx.hw_head) {
669 aq_ring_tx_clean(&aq_ptp->ptp_tx);
674 /* Processing HW_TIMESTAMP RX traffic */
675 err = aq_nic->aq_hw_ops->hw_ring_hwts_rx_receive(aq_nic->aq_hw,
680 if (aq_ptp->hwts_rx.sw_head != aq_ptp->hwts_rx.hw_head) {
681 aq_ring_hwts_rx_clean(&aq_ptp->hwts_rx, aq_nic);
683 err = aq_nic->aq_hw_ops->hw_ring_hwts_rx_fill(aq_nic->aq_hw,
691 /* Processing PTP RX traffic */
692 err = aq_nic->aq_hw_ops->hw_ring_rx_receive(aq_nic->aq_hw,
697 if (aq_ptp->ptp_rx.sw_head != aq_ptp->ptp_rx.hw_head) {
698 unsigned int sw_tail_old;
700 err = aq_ring_rx_clean(&aq_ptp->ptp_rx, napi, &work_done, budget);
704 sw_tail_old = aq_ptp->ptp_rx.sw_tail;
705 err = aq_ring_rx_fill(&aq_ptp->ptp_rx);
709 err = aq_nic->aq_hw_ops->hw_ring_rx_fill(aq_nic->aq_hw,
719 if (work_done < budget) {
720 napi_complete_done(napi, work_done);
721 aq_nic->aq_hw_ops->hw_irq_enable(aq_nic->aq_hw,
722 BIT_ULL(aq_ptp->ptp_ring_param.vec_idx));
729 static irqreturn_t aq_ptp_isr(int irq, void *private)
731 struct aq_ptp_s *aq_ptp = private;
738 napi_schedule(&aq_ptp->napi);
741 return err >= 0 ? IRQ_HANDLED : IRQ_NONE;
744 int aq_ptp_xmit(struct aq_nic_s *aq_nic, struct sk_buff *skb)
746 struct aq_ptp_s *aq_ptp = aq_nic->aq_ptp;
747 struct aq_ring_s *ring = &aq_ptp->ptp_tx;
748 unsigned long irq_flags;
749 int err = NETDEV_TX_OK;
753 dev_kfree_skb_any(skb);
757 frags = skb_shinfo(skb)->nr_frags + 1;
758 /* Frags cannot be bigger 16KB
759 * because PTP usually works
760 * without Jumbo even in a background
762 if (frags > AQ_CFG_SKB_FRAGS_MAX || frags > aq_ring_avail_dx(ring)) {
763 /* Drop packet because it doesn't make sence to delay it */
764 dev_kfree_skb_any(skb);
768 err = aq_ptp_skb_put(&aq_ptp->skb_ring, skb);
770 netdev_err(aq_nic->ndev, "SKB Ring is overflow (%u)!\n",
772 return NETDEV_TX_BUSY;
774 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
775 aq_ptp_tx_timeout_start(aq_ptp);
776 skb_tx_timestamp(skb);
778 spin_lock_irqsave(&aq_nic->aq_ptp->ptp_ring_lock, irq_flags);
779 frags = aq_nic_map_skb(aq_nic, skb, ring);
782 err = aq_nic->aq_hw_ops->hw_ring_tx_xmit(aq_nic->aq_hw,
785 ++ring->stats.tx.packets;
786 ring->stats.tx.bytes += skb->len;
789 err = NETDEV_TX_BUSY;
791 spin_unlock_irqrestore(&aq_nic->aq_ptp->ptp_ring_lock, irq_flags);
797 void aq_ptp_service_task(struct aq_nic_s *aq_nic)
799 struct aq_ptp_s *aq_ptp = aq_nic->aq_ptp;
804 aq_ptp_tx_timeout_check(aq_ptp);
807 int aq_ptp_irq_alloc(struct aq_nic_s *aq_nic)
809 struct pci_dev *pdev = aq_nic->pdev;
810 struct aq_ptp_s *aq_ptp = aq_nic->aq_ptp;
816 if (pdev->msix_enabled || pdev->msi_enabled) {
817 err = request_irq(pci_irq_vector(pdev, aq_ptp->idx_vector),
818 aq_ptp_isr, 0, aq_nic->ndev->name, aq_ptp);
828 void aq_ptp_irq_free(struct aq_nic_s *aq_nic)
830 struct aq_ptp_s *aq_ptp = aq_nic->aq_ptp;
831 struct pci_dev *pdev = aq_nic->pdev;
836 free_irq(pci_irq_vector(pdev, aq_ptp->idx_vector), aq_ptp);
839 int aq_ptp_ring_init(struct aq_nic_s *aq_nic)
841 struct aq_ptp_s *aq_ptp = aq_nic->aq_ptp;
847 err = aq_ring_init(&aq_ptp->ptp_tx, ATL_RING_TX);
850 err = aq_nic->aq_hw_ops->hw_ring_tx_init(aq_nic->aq_hw,
852 &aq_ptp->ptp_ring_param);
856 err = aq_ring_init(&aq_ptp->ptp_rx, ATL_RING_RX);
859 err = aq_nic->aq_hw_ops->hw_ring_rx_init(aq_nic->aq_hw,
861 &aq_ptp->ptp_ring_param);
865 err = aq_ring_rx_fill(&aq_ptp->ptp_rx);
868 err = aq_nic->aq_hw_ops->hw_ring_rx_fill(aq_nic->aq_hw,
874 err = aq_ring_init(&aq_ptp->hwts_rx, ATL_RING_RX);
877 err = aq_nic->aq_hw_ops->hw_ring_rx_init(aq_nic->aq_hw,
879 &aq_ptp->ptp_ring_param);
882 err = aq_nic->aq_hw_ops->hw_ring_hwts_rx_fill(aq_nic->aq_hw,
890 aq_ring_rx_deinit(&aq_ptp->ptp_rx);
895 int aq_ptp_ring_start(struct aq_nic_s *aq_nic)
897 struct aq_ptp_s *aq_ptp = aq_nic->aq_ptp;
903 err = aq_nic->aq_hw_ops->hw_ring_tx_start(aq_nic->aq_hw, &aq_ptp->ptp_tx);
907 err = aq_nic->aq_hw_ops->hw_ring_rx_start(aq_nic->aq_hw, &aq_ptp->ptp_rx);
911 err = aq_nic->aq_hw_ops->hw_ring_rx_start(aq_nic->aq_hw,
916 napi_enable(&aq_ptp->napi);
922 void aq_ptp_ring_stop(struct aq_nic_s *aq_nic)
924 struct aq_ptp_s *aq_ptp = aq_nic->aq_ptp;
929 aq_nic->aq_hw_ops->hw_ring_tx_stop(aq_nic->aq_hw, &aq_ptp->ptp_tx);
930 aq_nic->aq_hw_ops->hw_ring_rx_stop(aq_nic->aq_hw, &aq_ptp->ptp_rx);
932 aq_nic->aq_hw_ops->hw_ring_rx_stop(aq_nic->aq_hw, &aq_ptp->hwts_rx);
934 napi_disable(&aq_ptp->napi);
937 void aq_ptp_ring_deinit(struct aq_nic_s *aq_nic)
939 struct aq_ptp_s *aq_ptp = aq_nic->aq_ptp;
941 if (!aq_ptp || !aq_ptp->ptp_tx.aq_nic || !aq_ptp->ptp_rx.aq_nic)
944 aq_ring_tx_clean(&aq_ptp->ptp_tx);
945 aq_ring_rx_deinit(&aq_ptp->ptp_rx);
948 #define PTP_8TC_RING_IDX 8
949 #define PTP_4TC_RING_IDX 16
950 #define PTP_HWST_RING_IDX 31
952 /* Index must be 8 (8 TCs) or 16 (4 TCs).
953 * It depends on Traffic Class mode.
955 static unsigned int ptp_ring_idx(const enum aq_tc_mode tc_mode)
957 if (tc_mode == AQ_TC_MODE_8TCS)
958 return PTP_8TC_RING_IDX;
960 return PTP_4TC_RING_IDX;
963 int aq_ptp_ring_alloc(struct aq_nic_s *aq_nic)
965 struct aq_ptp_s *aq_ptp = aq_nic->aq_ptp;
966 unsigned int tx_ring_idx, rx_ring_idx;
967 struct aq_ring_s *hwts;
968 struct aq_ring_s *ring;
974 tx_ring_idx = ptp_ring_idx(aq_nic->aq_nic_cfg.tc_mode);
976 ring = aq_ring_tx_alloc(&aq_ptp->ptp_tx, aq_nic,
977 tx_ring_idx, &aq_nic->aq_nic_cfg);
983 rx_ring_idx = ptp_ring_idx(aq_nic->aq_nic_cfg.tc_mode);
985 ring = aq_ring_rx_alloc(&aq_ptp->ptp_rx, aq_nic,
986 rx_ring_idx, &aq_nic->aq_nic_cfg);
989 goto err_exit_ptp_tx;
992 hwts = aq_ring_hwts_rx_alloc(&aq_ptp->hwts_rx, aq_nic, PTP_HWST_RING_IDX,
993 aq_nic->aq_nic_cfg.rxds,
994 aq_nic->aq_nic_cfg.aq_hw_caps->rxd_size);
997 goto err_exit_ptp_rx;
1000 err = aq_ptp_skb_ring_init(&aq_ptp->skb_ring, aq_nic->aq_nic_cfg.rxds);
1003 goto err_exit_hwts_rx;
1006 aq_ptp->ptp_ring_param.vec_idx = aq_ptp->idx_vector;
1007 aq_ptp->ptp_ring_param.cpu = aq_ptp->ptp_ring_param.vec_idx +
1008 aq_nic_get_cfg(aq_nic)->aq_rss.base_cpu_number;
1009 cpumask_set_cpu(aq_ptp->ptp_ring_param.cpu,
1010 &aq_ptp->ptp_ring_param.affinity_mask);
1015 aq_ring_free(&aq_ptp->hwts_rx);
1017 aq_ring_free(&aq_ptp->ptp_rx);
1019 aq_ring_free(&aq_ptp->ptp_tx);
1024 void aq_ptp_ring_free(struct aq_nic_s *aq_nic)
1026 struct aq_ptp_s *aq_ptp = aq_nic->aq_ptp;
1031 aq_ring_free(&aq_ptp->ptp_tx);
1032 aq_ring_free(&aq_ptp->ptp_rx);
1033 aq_ring_free(&aq_ptp->hwts_rx);
1035 aq_ptp_skb_ring_release(&aq_ptp->skb_ring);
1038 #define MAX_PTP_GPIO_COUNT 4
1040 static struct ptp_clock_info aq_ptp_clock = {
1041 .owner = THIS_MODULE,
1042 .name = "atlantic ptp",
1043 .max_adj = 999999999,
1046 .adjfine = aq_ptp_adjfine,
1047 .adjtime = aq_ptp_adjtime,
1048 .gettime64 = aq_ptp_gettime,
1049 .settime64 = aq_ptp_settime,
1051 .enable = aq_ptp_gpio_feature_enable,
1053 .verify = aq_ptp_verify,
1057 #define ptp_offset_init(__idx, __mbps, __egress, __ingress) do { \
1058 ptp_offset[__idx].mbps = (__mbps); \
1059 ptp_offset[__idx].egress = (__egress); \
1060 ptp_offset[__idx].ingress = (__ingress); } \
1063 static void aq_ptp_offset_init_from_fw(const struct hw_atl_ptp_offset *offsets)
1067 /* Load offsets for PTP */
1068 for (i = 0; i < ARRAY_SIZE(ptp_offset); i++) {
1071 case ptp_offset_idx_100:
1072 ptp_offset_init(i, 100,
1073 offsets->egress_100,
1074 offsets->ingress_100);
1077 case ptp_offset_idx_1000:
1078 ptp_offset_init(i, 1000,
1079 offsets->egress_1000,
1080 offsets->ingress_1000);
1083 case ptp_offset_idx_2500:
1084 ptp_offset_init(i, 2500,
1085 offsets->egress_2500,
1086 offsets->ingress_2500);
1089 case ptp_offset_idx_5000:
1090 ptp_offset_init(i, 5000,
1091 offsets->egress_5000,
1092 offsets->ingress_5000);
1095 case ptp_offset_idx_10000:
1096 ptp_offset_init(i, 10000,
1097 offsets->egress_10000,
1098 offsets->ingress_10000);
1104 static void aq_ptp_offset_init(const struct hw_atl_ptp_offset *offsets)
1106 memset(ptp_offset, 0, sizeof(ptp_offset));
1108 aq_ptp_offset_init_from_fw(offsets);
1111 static void aq_ptp_gpio_init(struct ptp_clock_info *info,
1112 struct hw_atl_info *hw_info)
1114 struct ptp_pin_desc pin_desc[MAX_PTP_GPIO_COUNT];
1115 u32 extts_pin_cnt = 0;
1116 u32 out_pin_cnt = 0;
1119 memset(pin_desc, 0, sizeof(pin_desc));
1121 for (i = 0; i < MAX_PTP_GPIO_COUNT - 1; i++) {
1122 if (hw_info->gpio_pin[i] ==
1123 (GPIO_PIN_FUNCTION_PTP0 + out_pin_cnt)) {
1124 snprintf(pin_desc[out_pin_cnt].name,
1125 sizeof(pin_desc[out_pin_cnt].name),
1127 pin_desc[out_pin_cnt].index = out_pin_cnt;
1128 pin_desc[out_pin_cnt].chan = out_pin_cnt;
1129 pin_desc[out_pin_cnt++].func = PTP_PF_PEROUT;
1133 info->n_per_out = out_pin_cnt;
1135 if (hw_info->caps_ex & BIT(CAPS_EX_PHY_CTRL_TS_PIN)) {
1138 snprintf(pin_desc[out_pin_cnt].name,
1139 sizeof(pin_desc[out_pin_cnt].name),
1140 "AQ_GPIO%d", out_pin_cnt);
1141 pin_desc[out_pin_cnt].index = out_pin_cnt;
1142 pin_desc[out_pin_cnt].chan = 0;
1143 pin_desc[out_pin_cnt].func = PTP_PF_EXTTS;
1146 info->n_pins = out_pin_cnt + extts_pin_cnt;
1147 info->n_ext_ts = extts_pin_cnt;
1152 info->pin_config = kcalloc(info->n_pins, sizeof(struct ptp_pin_desc),
1155 if (!info->pin_config)
1158 memcpy(info->pin_config, &pin_desc,
1159 sizeof(struct ptp_pin_desc) * info->n_pins);
1162 void aq_ptp_clock_init(struct aq_nic_s *aq_nic)
1164 struct aq_ptp_s *aq_ptp = aq_nic->aq_ptp;
1165 struct timespec64 ts;
1167 ktime_get_real_ts64(&ts);
1168 aq_ptp_settime(&aq_ptp->ptp_info, &ts);
1171 static void aq_ptp_poll_sync_work_cb(struct work_struct *w);
1173 int aq_ptp_init(struct aq_nic_s *aq_nic, unsigned int idx_vec)
1175 struct hw_atl_utils_mbox mbox;
1176 struct ptp_clock *clock;
1177 struct aq_ptp_s *aq_ptp;
1180 if (!aq_nic->aq_hw_ops->hw_get_ptp_ts) {
1181 aq_nic->aq_ptp = NULL;
1185 if (!aq_nic->aq_fw_ops->enable_ptp) {
1186 aq_nic->aq_ptp = NULL;
1190 hw_atl_utils_mpi_read_stats(aq_nic->aq_hw, &mbox);
1192 if (!(mbox.info.caps_ex & BIT(CAPS_EX_PHY_PTP_EN))) {
1193 aq_nic->aq_ptp = NULL;
1197 aq_ptp_offset_init(&mbox.info.ptp_offset);
1199 aq_ptp = kzalloc(sizeof(*aq_ptp), GFP_KERNEL);
1205 aq_ptp->aq_nic = aq_nic;
1207 spin_lock_init(&aq_ptp->ptp_lock);
1208 spin_lock_init(&aq_ptp->ptp_ring_lock);
1210 aq_ptp->ptp_info = aq_ptp_clock;
1211 aq_ptp_gpio_init(&aq_ptp->ptp_info, &mbox.info);
1212 clock = ptp_clock_register(&aq_ptp->ptp_info, &aq_nic->ndev->dev);
1213 if (IS_ERR(clock)) {
1214 netdev_err(aq_nic->ndev, "ptp_clock_register failed\n");
1215 err = PTR_ERR(clock);
1218 aq_ptp->ptp_clock = clock;
1219 aq_ptp_tx_timeout_init(&aq_ptp->ptp_tx_timeout);
1221 atomic_set(&aq_ptp->offset_egress, 0);
1222 atomic_set(&aq_ptp->offset_ingress, 0);
1224 netif_napi_add(aq_nic_get_ndev(aq_nic), &aq_ptp->napi,
1225 aq_ptp_poll, AQ_CFG_NAPI_WEIGHT);
1227 aq_ptp->idx_vector = idx_vec;
1229 aq_nic->aq_ptp = aq_ptp;
1231 /* enable ptp counter */
1232 aq_utils_obj_set(&aq_nic->aq_hw->flags, AQ_HW_PTP_AVAILABLE);
1233 mutex_lock(&aq_nic->fwreq_mutex);
1234 aq_nic->aq_fw_ops->enable_ptp(aq_nic->aq_hw, 1);
1235 aq_ptp_clock_init(aq_nic);
1236 mutex_unlock(&aq_nic->fwreq_mutex);
1238 INIT_DELAYED_WORK(&aq_ptp->poll_sync, &aq_ptp_poll_sync_work_cb);
1239 aq_ptp->eth_type_filter.location =
1240 aq_nic_reserve_filter(aq_nic, aq_rx_filter_ethertype);
1241 aq_ptp->udp_filter.location =
1242 aq_nic_reserve_filter(aq_nic, aq_rx_filter_l3l4);
1248 kfree(aq_ptp->ptp_info.pin_config);
1250 aq_nic->aq_ptp = NULL;
1254 void aq_ptp_unregister(struct aq_nic_s *aq_nic)
1256 struct aq_ptp_s *aq_ptp = aq_nic->aq_ptp;
1261 ptp_clock_unregister(aq_ptp->ptp_clock);
1264 void aq_ptp_free(struct aq_nic_s *aq_nic)
1266 struct aq_ptp_s *aq_ptp = aq_nic->aq_ptp;
1271 aq_nic_release_filter(aq_nic, aq_rx_filter_ethertype,
1272 aq_ptp->eth_type_filter.location);
1273 aq_nic_release_filter(aq_nic, aq_rx_filter_l3l4,
1274 aq_ptp->udp_filter.location);
1275 cancel_delayed_work_sync(&aq_ptp->poll_sync);
1277 mutex_lock(&aq_nic->fwreq_mutex);
1278 aq_nic->aq_fw_ops->enable_ptp(aq_nic->aq_hw, 0);
1279 mutex_unlock(&aq_nic->fwreq_mutex);
1281 kfree(aq_ptp->ptp_info.pin_config);
1283 netif_napi_del(&aq_ptp->napi);
1285 aq_nic->aq_ptp = NULL;
1288 struct ptp_clock *aq_ptp_get_ptp_clock(struct aq_ptp_s *aq_ptp)
1290 return aq_ptp->ptp_clock;
1293 /* PTP external GPIO nanoseconds count */
1294 static uint64_t aq_ptp_get_sync1588_ts(struct aq_nic_s *aq_nic)
1298 if (aq_nic->aq_hw_ops->hw_get_sync_ts)
1299 aq_nic->aq_hw_ops->hw_get_sync_ts(aq_nic->aq_hw, &ts);
1304 static void aq_ptp_start_work(struct aq_ptp_s *aq_ptp)
1306 if (aq_ptp->extts_pin_enabled) {
1307 aq_ptp->poll_timeout_ms = POLL_SYNC_TIMER_MS;
1308 aq_ptp->last_sync1588_ts =
1309 aq_ptp_get_sync1588_ts(aq_ptp->aq_nic);
1310 schedule_delayed_work(&aq_ptp->poll_sync,
1311 msecs_to_jiffies(aq_ptp->poll_timeout_ms));
1315 int aq_ptp_link_change(struct aq_nic_s *aq_nic)
1317 struct aq_ptp_s *aq_ptp = aq_nic->aq_ptp;
1322 if (aq_nic->aq_hw->aq_link_status.mbps)
1323 aq_ptp_start_work(aq_ptp);
1325 cancel_delayed_work_sync(&aq_ptp->poll_sync);
1330 static bool aq_ptp_sync_ts_updated(struct aq_ptp_s *aq_ptp, u64 *new_ts)
1332 struct aq_nic_s *aq_nic = aq_ptp->aq_nic;
1336 sync_ts = aq_ptp_get_sync1588_ts(aq_nic);
1338 if (sync_ts != aq_ptp->last_sync1588_ts) {
1339 sync_ts2 = aq_ptp_get_sync1588_ts(aq_nic);
1340 if (sync_ts != sync_ts2) {
1342 sync_ts2 = aq_ptp_get_sync1588_ts(aq_nic);
1343 if (sync_ts != sync_ts2) {
1344 netdev_err(aq_nic->ndev,
1345 "%s: Unable to get correct GPIO TS",
1357 static int aq_ptp_check_sync1588(struct aq_ptp_s *aq_ptp)
1359 struct aq_nic_s *aq_nic = aq_ptp->aq_nic;
1362 /* Sync1588 pin was triggered */
1363 if (aq_ptp_sync_ts_updated(aq_ptp, &sync_ts)) {
1364 if (aq_ptp->extts_pin_enabled) {
1365 struct ptp_clock_event ptp_event;
1368 aq_nic->aq_hw_ops->hw_ts_to_sys_clock(aq_nic->aq_hw,
1370 ptp_event.index = aq_ptp->ptp_info.n_pins - 1;
1371 ptp_event.timestamp = time;
1373 ptp_event.type = PTP_CLOCK_EXTTS;
1374 ptp_clock_event(aq_ptp->ptp_clock, &ptp_event);
1377 aq_ptp->last_sync1588_ts = sync_ts;
1383 static void aq_ptp_poll_sync_work_cb(struct work_struct *w)
1385 struct delayed_work *dw = to_delayed_work(w);
1386 struct aq_ptp_s *aq_ptp = container_of(dw, struct aq_ptp_s, poll_sync);
1388 aq_ptp_check_sync1588(aq_ptp);
1390 if (aq_ptp->extts_pin_enabled) {
1391 unsigned long timeout = msecs_to_jiffies(aq_ptp->poll_timeout_ms);
1393 schedule_delayed_work(&aq_ptp->poll_sync, timeout);