1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright (c) 2018, Sensor-Technik Wiedemann GmbH
3 * Copyright (c) 2018-2019, Vladimir Oltean <olteanv@gmail.com>
6 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
8 #include <linux/delay.h>
9 #include <linux/module.h>
10 #include <linux/printk.h>
11 #include <linux/spi/spi.h>
12 #include <linux/errno.h>
13 #include <linux/gpio/consumer.h>
14 #include <linux/phylink.h>
16 #include <linux/of_net.h>
17 #include <linux/of_mdio.h>
18 #include <linux/of_device.h>
19 #include <linux/netdev_features.h>
20 #include <linux/netdevice.h>
21 #include <linux/if_bridge.h>
22 #include <linux/if_ether.h>
23 #include <linux/dsa/8021q.h>
26 static void sja1105_hw_reset(struct gpio_desc *gpio, unsigned int pulse_len,
27 unsigned int startup_delay)
29 gpiod_set_value_cansleep(gpio, 1);
30 /* Wait for minimum reset pulse length */
32 gpiod_set_value_cansleep(gpio, 0);
33 /* Wait until chip is ready after reset */
34 msleep(startup_delay);
38 sja1105_port_allow_traffic(struct sja1105_l2_forwarding_entry *l2_fwd,
39 int from, int to, bool allow)
42 l2_fwd[from].bc_domain |= BIT(to);
43 l2_fwd[from].reach_port |= BIT(to);
44 l2_fwd[from].fl_domain |= BIT(to);
46 l2_fwd[from].bc_domain &= ~BIT(to);
47 l2_fwd[from].reach_port &= ~BIT(to);
48 l2_fwd[from].fl_domain &= ~BIT(to);
52 /* Structure used to temporarily transport device tree
53 * settings into sja1105_setup
55 struct sja1105_dt_port {
56 phy_interface_t phy_mode;
57 sja1105_mii_role_t role;
60 static int sja1105_init_mac_settings(struct sja1105_private *priv)
62 struct sja1105_mac_config_entry default_mac = {
63 /* Enable all 8 priority queues on egress.
64 * Every queue i holds top[i] - base[i] frames.
65 * Sum of top[i] - base[i] is 511 (max hardware limit).
67 .top = {0x3F, 0x7F, 0xBF, 0xFF, 0x13F, 0x17F, 0x1BF, 0x1FF},
68 .base = {0x0, 0x40, 0x80, 0xC0, 0x100, 0x140, 0x180, 0x1C0},
69 .enabled = {true, true, true, true, true, true, true, true},
70 /* Keep standard IFG of 12 bytes on egress. */
72 /* Always put the MAC speed in automatic mode, where it can be
73 * retrieved from the PHY object through phylib and
74 * sja1105_adjust_port_config.
76 .speed = SJA1105_SPEED_AUTO,
77 /* No static correction for 1-step 1588 events */
80 /* Disable aging for critical TTEthernet traffic */
82 /* Internal VLAN (pvid) to apply to untagged ingress */
87 /* Don't drop traffic with other EtherType than ETH_P_IP */
89 /* Don't drop double-tagged traffic */
91 /* Don't drop untagged traffic */
93 /* Don't retag 802.1p (VID 0) traffic with the pvid */
95 /* Disable learning and I/O on user ports by default -
102 struct sja1105_mac_config_entry *mac;
103 struct sja1105_table *table;
106 table = &priv->static_config.tables[BLK_IDX_MAC_CONFIG];
108 /* Discard previous MAC Configuration Table */
109 if (table->entry_count) {
110 kfree(table->entries);
111 table->entry_count = 0;
114 table->entries = kcalloc(SJA1105_NUM_PORTS,
115 table->ops->unpacked_entry_size, GFP_KERNEL);
119 /* Override table based on phylib DT bindings */
120 table->entry_count = SJA1105_NUM_PORTS;
122 mac = table->entries;
124 for (i = 0; i < SJA1105_NUM_PORTS; i++) {
125 mac[i] = default_mac;
126 if (i == dsa_upstream_port(priv->ds, i)) {
127 /* STP doesn't get called for CPU port, so we need to
128 * set the I/O parameters statically.
130 mac[i].dyn_learn = true;
131 mac[i].ingress = true;
132 mac[i].egress = true;
139 static int sja1105_init_mii_settings(struct sja1105_private *priv,
140 struct sja1105_dt_port *ports)
142 struct device *dev = &priv->spidev->dev;
143 struct sja1105_xmii_params_entry *mii;
144 struct sja1105_table *table;
147 table = &priv->static_config.tables[BLK_IDX_XMII_PARAMS];
149 /* Discard previous xMII Mode Parameters Table */
150 if (table->entry_count) {
151 kfree(table->entries);
152 table->entry_count = 0;
155 table->entries = kcalloc(SJA1105_MAX_XMII_PARAMS_COUNT,
156 table->ops->unpacked_entry_size, GFP_KERNEL);
160 /* Override table based on phylib DT bindings */
161 table->entry_count = SJA1105_MAX_XMII_PARAMS_COUNT;
163 mii = table->entries;
165 for (i = 0; i < SJA1105_NUM_PORTS; i++) {
166 switch (ports[i].phy_mode) {
167 case PHY_INTERFACE_MODE_MII:
168 mii->xmii_mode[i] = XMII_MODE_MII;
170 case PHY_INTERFACE_MODE_RMII:
171 mii->xmii_mode[i] = XMII_MODE_RMII;
173 case PHY_INTERFACE_MODE_RGMII:
174 case PHY_INTERFACE_MODE_RGMII_ID:
175 case PHY_INTERFACE_MODE_RGMII_RXID:
176 case PHY_INTERFACE_MODE_RGMII_TXID:
177 mii->xmii_mode[i] = XMII_MODE_RGMII;
180 dev_err(dev, "Unsupported PHY mode %s!\n",
181 phy_modes(ports[i].phy_mode));
184 mii->phy_mac[i] = ports[i].role;
189 static int sja1105_init_static_fdb(struct sja1105_private *priv)
191 struct sja1105_table *table;
193 table = &priv->static_config.tables[BLK_IDX_L2_LOOKUP];
195 /* We only populate the FDB table through dynamic
196 * L2 Address Lookup entries
198 if (table->entry_count) {
199 kfree(table->entries);
200 table->entry_count = 0;
205 static int sja1105_init_l2_lookup_params(struct sja1105_private *priv)
207 struct sja1105_table *table;
208 struct sja1105_l2_lookup_params_entry default_l2_lookup_params = {
209 /* Learned FDB entries are forgotten after 300 seconds */
210 .maxage = SJA1105_AGEING_TIME_MS(300000),
211 /* All entries within a FDB bin are available for learning */
212 .dyn_tbsz = SJA1105ET_FDB_BIN_SIZE,
213 /* And the P/Q/R/S equivalent setting: */
215 /* 2^8 + 2^5 + 2^3 + 2^2 + 2^1 + 1 in Koopman notation */
217 /* This selects between Independent VLAN Learning (IVL) and
218 * Shared VLAN Learning (SVL)
220 .shared_learn = false,
221 /* Don't discard management traffic based on ENFPORT -
222 * we don't perform SMAC port enforcement anyway, so
223 * what we are setting here doesn't matter.
225 .no_enf_hostprt = false,
226 /* Don't learn SMAC for mac_fltres1 and mac_fltres0.
227 * Maybe correlate with no_linklocal_learn from bridge driver?
229 .no_mgmt_learn = true,
232 /* Dynamically learned FDB entries can overwrite other (older)
233 * dynamic FDB entries
239 table = &priv->static_config.tables[BLK_IDX_L2_LOOKUP_PARAMS];
241 if (table->entry_count) {
242 kfree(table->entries);
243 table->entry_count = 0;
246 table->entries = kcalloc(SJA1105_MAX_L2_LOOKUP_PARAMS_COUNT,
247 table->ops->unpacked_entry_size, GFP_KERNEL);
251 table->entry_count = SJA1105_MAX_L2_LOOKUP_PARAMS_COUNT;
253 /* This table only has a single entry */
254 ((struct sja1105_l2_lookup_params_entry *)table->entries)[0] =
255 default_l2_lookup_params;
260 static int sja1105_init_static_vlan(struct sja1105_private *priv)
262 struct sja1105_table *table;
263 struct sja1105_vlan_lookup_entry pvid = {
273 table = &priv->static_config.tables[BLK_IDX_VLAN_LOOKUP];
275 /* The static VLAN table will only contain the initial pvid of 0.
276 * All other VLANs are to be configured through dynamic entries,
277 * and kept in the static configuration table as backing memory.
278 * The pvid of 0 is sufficient to pass traffic while the ports are
279 * standalone and when vlan_filtering is disabled. When filtering
280 * gets enabled, the switchdev core sets up the VLAN ID 1 and sets
281 * it as the new pvid. Actually 'pvid 1' still comes up in 'bridge
282 * vlan' even when vlan_filtering is off, but it has no effect.
284 if (table->entry_count) {
285 kfree(table->entries);
286 table->entry_count = 0;
289 table->entries = kcalloc(1, table->ops->unpacked_entry_size,
294 table->entry_count = 1;
296 /* VLAN ID 0: all DT-defined ports are members; no restrictions on
297 * forwarding; always transmit priority-tagged frames as untagged.
299 for (i = 0; i < SJA1105_NUM_PORTS; i++) {
300 pvid.vmemb_port |= BIT(i);
301 pvid.vlan_bc |= BIT(i);
302 pvid.tag_port &= ~BIT(i);
305 ((struct sja1105_vlan_lookup_entry *)table->entries)[0] = pvid;
309 static int sja1105_init_l2_forwarding(struct sja1105_private *priv)
311 struct sja1105_l2_forwarding_entry *l2fwd;
312 struct sja1105_table *table;
315 table = &priv->static_config.tables[BLK_IDX_L2_FORWARDING];
317 if (table->entry_count) {
318 kfree(table->entries);
319 table->entry_count = 0;
322 table->entries = kcalloc(SJA1105_MAX_L2_FORWARDING_COUNT,
323 table->ops->unpacked_entry_size, GFP_KERNEL);
327 table->entry_count = SJA1105_MAX_L2_FORWARDING_COUNT;
329 l2fwd = table->entries;
331 /* First 5 entries define the forwarding rules */
332 for (i = 0; i < SJA1105_NUM_PORTS; i++) {
333 unsigned int upstream = dsa_upstream_port(priv->ds, i);
335 for (j = 0; j < SJA1105_NUM_TC; j++)
336 l2fwd[i].vlan_pmap[j] = j;
341 sja1105_port_allow_traffic(l2fwd, i, upstream, true);
342 sja1105_port_allow_traffic(l2fwd, upstream, i, true);
344 /* Next 8 entries define VLAN PCP mapping from ingress to egress.
345 * Create a one-to-one mapping.
347 for (i = 0; i < SJA1105_NUM_TC; i++)
348 for (j = 0; j < SJA1105_NUM_PORTS; j++)
349 l2fwd[SJA1105_NUM_PORTS + i].vlan_pmap[j] = i;
354 static int sja1105_init_l2_forwarding_params(struct sja1105_private *priv)
356 struct sja1105_l2_forwarding_params_entry default_l2fwd_params = {
357 /* Disallow dynamic reconfiguration of vlan_pmap */
359 /* Use a single memory partition for all ingress queues */
360 .part_spc = { SJA1105_MAX_FRAME_MEMORY, 0, 0, 0, 0, 0, 0, 0 },
362 struct sja1105_table *table;
364 table = &priv->static_config.tables[BLK_IDX_L2_FORWARDING_PARAMS];
366 if (table->entry_count) {
367 kfree(table->entries);
368 table->entry_count = 0;
371 table->entries = kcalloc(SJA1105_MAX_L2_FORWARDING_PARAMS_COUNT,
372 table->ops->unpacked_entry_size, GFP_KERNEL);
376 table->entry_count = SJA1105_MAX_L2_FORWARDING_PARAMS_COUNT;
378 /* This table only has a single entry */
379 ((struct sja1105_l2_forwarding_params_entry *)table->entries)[0] =
380 default_l2fwd_params;
385 static int sja1105_init_general_params(struct sja1105_private *priv)
387 struct sja1105_general_params_entry default_general_params = {
388 /* Disallow dynamic changing of the mirror port */
390 .switchid = priv->ds->index,
391 /* Priority queue for link-local frames trapped to CPU */
393 .mac_fltres1 = SJA1105_LINKLOCAL_FILTER_A,
394 .mac_flt1 = SJA1105_LINKLOCAL_FILTER_A_MASK,
395 .incl_srcpt1 = false,
397 .mac_fltres0 = SJA1105_LINKLOCAL_FILTER_B,
398 .mac_flt0 = SJA1105_LINKLOCAL_FILTER_B_MASK,
399 .incl_srcpt0 = false,
401 /* The destination for traffic matching mac_fltres1 and
402 * mac_fltres0 on all ports except host_port. Such traffic
403 * receieved on host_port itself would be dropped, except
404 * by installing a temporary 'management route'
406 .host_port = dsa_upstream_port(priv->ds, 0),
407 /* Same as host port */
408 .mirr_port = dsa_upstream_port(priv->ds, 0),
409 /* Link-local traffic received on casc_port will be forwarded
410 * to host_port without embedding the source port and device ID
411 * info in the destination MAC address (presumably because it
412 * is a cascaded port and a downstream SJA switch already did
413 * that). Default to an invalid port (to disable the feature)
414 * and overwrite this if we find any DSA (cascaded) ports.
416 .casc_port = SJA1105_NUM_PORTS,
421 /* Only update correctionField for 1-step PTP (L2 transport) */
423 /* Forcefully disable VLAN filtering by telling
424 * the switch that VLAN has a different EtherType.
426 .tpid = ETH_P_SJA1105,
427 .tpid2 = ETH_P_SJA1105,
429 struct sja1105_table *table;
432 for (i = 0; i < SJA1105_NUM_PORTS; i++) {
433 if (dsa_is_dsa_port(priv->ds, i))
434 default_general_params.casc_port = i;
435 else if (dsa_is_user_port(priv->ds, i))
436 priv->ports[i].mgmt_slot = k++;
439 table = &priv->static_config.tables[BLK_IDX_GENERAL_PARAMS];
441 if (table->entry_count) {
442 kfree(table->entries);
443 table->entry_count = 0;
446 table->entries = kcalloc(SJA1105_MAX_GENERAL_PARAMS_COUNT,
447 table->ops->unpacked_entry_size, GFP_KERNEL);
451 table->entry_count = SJA1105_MAX_GENERAL_PARAMS_COUNT;
453 /* This table only has a single entry */
454 ((struct sja1105_general_params_entry *)table->entries)[0] =
455 default_general_params;
460 #define SJA1105_RATE_MBPS(speed) (((speed) * 64000) / 1000)
463 sja1105_setup_policer(struct sja1105_l2_policing_entry *policing,
466 policing[index].sharindx = index;
467 policing[index].smax = 65535; /* Burst size in bytes */
468 policing[index].rate = SJA1105_RATE_MBPS(1000);
469 policing[index].maxlen = ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN;
470 policing[index].partition = 0;
473 static int sja1105_init_l2_policing(struct sja1105_private *priv)
475 struct sja1105_l2_policing_entry *policing;
476 struct sja1105_table *table;
479 table = &priv->static_config.tables[BLK_IDX_L2_POLICING];
481 /* Discard previous L2 Policing Table */
482 if (table->entry_count) {
483 kfree(table->entries);
484 table->entry_count = 0;
487 table->entries = kcalloc(SJA1105_MAX_L2_POLICING_COUNT,
488 table->ops->unpacked_entry_size, GFP_KERNEL);
492 table->entry_count = SJA1105_MAX_L2_POLICING_COUNT;
494 policing = table->entries;
496 /* k sweeps through all unicast policers (0-39).
497 * bcast sweeps through policers 40-44.
499 for (i = 0, k = 0; i < SJA1105_NUM_PORTS; i++) {
500 int bcast = (SJA1105_NUM_PORTS * SJA1105_NUM_TC) + i;
502 for (j = 0; j < SJA1105_NUM_TC; j++, k++)
503 sja1105_setup_policer(policing, k);
505 /* Set up this port's policer for broadcast traffic */
506 sja1105_setup_policer(policing, bcast);
511 static int sja1105_init_avb_params(struct sja1105_private *priv,
514 struct sja1105_avb_params_entry *avb;
515 struct sja1105_table *table;
517 table = &priv->static_config.tables[BLK_IDX_AVB_PARAMS];
519 /* Discard previous AVB Parameters Table */
520 if (table->entry_count) {
521 kfree(table->entries);
522 table->entry_count = 0;
525 /* Configure the reception of meta frames only if requested */
529 table->entries = kcalloc(SJA1105_MAX_AVB_PARAMS_COUNT,
530 table->ops->unpacked_entry_size, GFP_KERNEL);
534 table->entry_count = SJA1105_MAX_AVB_PARAMS_COUNT;
536 avb = table->entries;
538 avb->destmeta = SJA1105_META_DMAC;
539 avb->srcmeta = SJA1105_META_SMAC;
544 static int sja1105_static_config_load(struct sja1105_private *priv,
545 struct sja1105_dt_port *ports)
549 sja1105_static_config_free(&priv->static_config);
550 rc = sja1105_static_config_init(&priv->static_config,
551 priv->info->static_ops,
552 priv->info->device_id);
556 /* Build static configuration */
557 rc = sja1105_init_mac_settings(priv);
560 rc = sja1105_init_mii_settings(priv, ports);
563 rc = sja1105_init_static_fdb(priv);
566 rc = sja1105_init_static_vlan(priv);
569 rc = sja1105_init_l2_lookup_params(priv);
572 rc = sja1105_init_l2_forwarding(priv);
575 rc = sja1105_init_l2_forwarding_params(priv);
578 rc = sja1105_init_l2_policing(priv);
581 rc = sja1105_init_general_params(priv);
584 rc = sja1105_init_avb_params(priv, false);
588 /* Send initial configuration to hardware via SPI */
589 return sja1105_static_config_upload(priv);
592 static int sja1105_parse_rgmii_delays(struct sja1105_private *priv,
593 const struct sja1105_dt_port *ports)
597 for (i = 0; i < SJA1105_NUM_PORTS; i++) {
598 if (ports->role == XMII_MAC)
601 if (ports->phy_mode == PHY_INTERFACE_MODE_RGMII_RXID ||
602 ports->phy_mode == PHY_INTERFACE_MODE_RGMII_ID)
603 priv->rgmii_rx_delay[i] = true;
605 if (ports->phy_mode == PHY_INTERFACE_MODE_RGMII_TXID ||
606 ports->phy_mode == PHY_INTERFACE_MODE_RGMII_ID)
607 priv->rgmii_tx_delay[i] = true;
609 if ((priv->rgmii_rx_delay[i] || priv->rgmii_tx_delay[i]) &&
610 !priv->info->setup_rgmii_delay)
616 static int sja1105_parse_ports_node(struct sja1105_private *priv,
617 struct sja1105_dt_port *ports,
618 struct device_node *ports_node)
620 struct device *dev = &priv->spidev->dev;
621 struct device_node *child;
623 for_each_child_of_node(ports_node, child) {
624 struct device_node *phy_node;
628 /* Get switch port number from DT */
629 if (of_property_read_u32(child, "reg", &index) < 0) {
630 dev_err(dev, "Port number not defined in device tree "
631 "(property \"reg\")\n");
635 /* Get PHY mode from DT */
636 phy_mode = of_get_phy_mode(child);
638 dev_err(dev, "Failed to read phy-mode or "
639 "phy-interface-type property for port %d\n",
643 ports[index].phy_mode = phy_mode;
645 phy_node = of_parse_phandle(child, "phy-handle", 0);
647 if (!of_phy_is_fixed_link(child)) {
648 dev_err(dev, "phy-handle or fixed-link "
649 "properties missing!\n");
652 /* phy-handle is missing, but fixed-link isn't.
653 * So it's a fixed link. Default to PHY role.
655 ports[index].role = XMII_PHY;
657 /* phy-handle present => put port in MAC role */
658 ports[index].role = XMII_MAC;
659 of_node_put(phy_node);
662 /* The MAC/PHY role can be overridden with explicit bindings */
663 if (of_property_read_bool(child, "sja1105,role-mac"))
664 ports[index].role = XMII_MAC;
665 else if (of_property_read_bool(child, "sja1105,role-phy"))
666 ports[index].role = XMII_PHY;
672 static int sja1105_parse_dt(struct sja1105_private *priv,
673 struct sja1105_dt_port *ports)
675 struct device *dev = &priv->spidev->dev;
676 struct device_node *switch_node = dev->of_node;
677 struct device_node *ports_node;
680 ports_node = of_get_child_by_name(switch_node, "ports");
682 dev_err(dev, "Incorrect bindings: absent \"ports\" node\n");
686 rc = sja1105_parse_ports_node(priv, ports, ports_node);
687 of_node_put(ports_node);
692 /* Convert back and forth MAC speed from Mbps to SJA1105 encoding */
693 static int sja1105_speed[] = {
694 [SJA1105_SPEED_AUTO] = 0,
695 [SJA1105_SPEED_10MBPS] = 10,
696 [SJA1105_SPEED_100MBPS] = 100,
697 [SJA1105_SPEED_1000MBPS] = 1000,
700 /* Set link speed and enable/disable traffic I/O in the MAC configuration
701 * for a specific port.
703 * @speed_mbps: If 0, leave the speed unchanged, else adapt MAC to PHY speed.
704 * @enabled: Manage Rx and Tx settings for this port. If false, overrides the
705 * settings from the STP state, but not persistently (does not
706 * overwrite the static MAC info for this port).
708 static int sja1105_adjust_port_config(struct sja1105_private *priv, int port,
709 int speed_mbps, bool enabled)
711 struct sja1105_mac_config_entry dyn_mac;
712 struct sja1105_xmii_params_entry *mii;
713 struct sja1105_mac_config_entry *mac;
714 struct device *dev = priv->ds->dev;
715 sja1105_phy_interface_t phy_mode;
716 sja1105_speed_t speed;
719 mii = priv->static_config.tables[BLK_IDX_XMII_PARAMS].entries;
720 mac = priv->static_config.tables[BLK_IDX_MAC_CONFIG].entries;
722 switch (speed_mbps) {
724 /* No speed update requested */
725 speed = SJA1105_SPEED_AUTO;
728 speed = SJA1105_SPEED_10MBPS;
731 speed = SJA1105_SPEED_100MBPS;
734 speed = SJA1105_SPEED_1000MBPS;
737 dev_err(dev, "Invalid speed %iMbps\n", speed_mbps);
741 /* If requested, overwrite SJA1105_SPEED_AUTO from the static MAC
742 * configuration table, since this will be used for the clocking setup,
743 * and we no longer need to store it in the static config (already told
744 * hardware we want auto during upload phase).
746 mac[port].speed = speed;
748 /* On P/Q/R/S, one can read from the device via the MAC reconfiguration
749 * tables. On E/T, MAC reconfig tables are not readable, only writable.
750 * We have to *know* what the MAC looks like. For the sake of keeping
751 * the code common, we'll use the static configuration tables as a
752 * reasonable approximation for both E/T and P/Q/R/S.
755 dyn_mac.ingress = enabled && mac[port].ingress;
756 dyn_mac.egress = enabled && mac[port].egress;
758 /* Write to the dynamic reconfiguration tables */
759 rc = sja1105_dynamic_config_write(priv, BLK_IDX_MAC_CONFIG,
760 port, &dyn_mac, true);
762 dev_err(dev, "Failed to write MAC config: %d\n", rc);
766 /* Reconfigure the PLLs for the RGMII interfaces (required 125 MHz at
767 * gigabit, 25 MHz at 100 Mbps and 2.5 MHz at 10 Mbps). For MII and
768 * RMII no change of the clock setup is required. Actually, changing
769 * the clock setup does interrupt the clock signal for a certain time
770 * which causes trouble for all PHYs relying on this signal.
775 phy_mode = mii->xmii_mode[port];
776 if (phy_mode != XMII_MODE_RGMII)
779 return sja1105_clocking_setup_port(priv, port);
782 static void sja1105_mac_config(struct dsa_switch *ds, int port,
783 unsigned int link_an_mode,
784 const struct phylink_link_state *state)
786 struct sja1105_private *priv = ds->priv;
789 sja1105_adjust_port_config(priv, port, 0, false);
791 sja1105_adjust_port_config(priv, port, state->speed, true);
794 static void sja1105_phylink_validate(struct dsa_switch *ds, int port,
795 unsigned long *supported,
796 struct phylink_link_state *state)
798 /* Construct a new mask which exhaustively contains all link features
799 * supported by the MAC, and then apply that (logical AND) to what will
800 * be sent to the PHY for "marketing".
802 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
803 struct sja1105_private *priv = ds->priv;
804 struct sja1105_xmii_params_entry *mii;
806 mii = priv->static_config.tables[BLK_IDX_XMII_PARAMS].entries;
808 /* The MAC does not support pause frames, and also doesn't
809 * support half-duplex traffic modes.
811 phylink_set(mask, Autoneg);
812 phylink_set(mask, MII);
813 phylink_set(mask, 10baseT_Full);
814 phylink_set(mask, 100baseT_Full);
815 if (mii->xmii_mode[port] == XMII_MODE_RGMII)
816 phylink_set(mask, 1000baseT_Full);
818 bitmap_and(supported, supported, mask, __ETHTOOL_LINK_MODE_MASK_NBITS);
819 bitmap_and(state->advertising, state->advertising, mask,
820 __ETHTOOL_LINK_MODE_MASK_NBITS);
823 /* First-generation switches have a 4-way set associative TCAM that
824 * holds the FDB entries. An FDB index spans from 0 to 1023 and is comprised of
825 * a "bin" (grouping of 4 entries) and a "way" (an entry within a bin).
826 * For the placement of a newly learnt FDB entry, the switch selects the bin
827 * based on a hash function, and the way within that bin incrementally.
829 static inline int sja1105et_fdb_index(int bin, int way)
831 return bin * SJA1105ET_FDB_BIN_SIZE + way;
834 static int sja1105et_is_fdb_entry_in_bin(struct sja1105_private *priv, int bin,
835 const u8 *addr, u16 vid,
836 struct sja1105_l2_lookup_entry *match,
841 for (way = 0; way < SJA1105ET_FDB_BIN_SIZE; way++) {
842 struct sja1105_l2_lookup_entry l2_lookup = {0};
843 int index = sja1105et_fdb_index(bin, way);
845 /* Skip unused entries, optionally marking them
846 * into the return value
848 if (sja1105_dynamic_config_read(priv, BLK_IDX_L2_LOOKUP,
849 index, &l2_lookup)) {
855 if (l2_lookup.macaddr == ether_addr_to_u64(addr) &&
856 l2_lookup.vlanid == vid) {
862 /* Return an invalid entry index if not found */
866 int sja1105et_fdb_add(struct dsa_switch *ds, int port,
867 const unsigned char *addr, u16 vid)
869 struct sja1105_l2_lookup_entry l2_lookup = {0};
870 struct sja1105_private *priv = ds->priv;
871 struct device *dev = ds->dev;
872 int last_unused = -1;
875 bin = sja1105et_fdb_hash(priv, addr, vid);
877 way = sja1105et_is_fdb_entry_in_bin(priv, bin, addr, vid,
878 &l2_lookup, &last_unused);
880 /* We have an FDB entry. Is our port in the destination
881 * mask? If yes, we need to do nothing. If not, we need
882 * to rewrite the entry by adding this port to it.
884 if (l2_lookup.destports & BIT(port))
886 l2_lookup.destports |= BIT(port);
888 int index = sja1105et_fdb_index(bin, way);
890 /* We don't have an FDB entry. We construct a new one and
891 * try to find a place for it within the FDB table.
893 l2_lookup.macaddr = ether_addr_to_u64(addr);
894 l2_lookup.destports = BIT(port);
895 l2_lookup.vlanid = vid;
897 if (last_unused >= 0) {
900 /* Bin is full, need to evict somebody.
901 * Choose victim at random. If you get these messages
902 * often, you may need to consider changing the
903 * distribution function:
904 * static_config[BLK_IDX_L2_LOOKUP_PARAMS].entries->poly
906 get_random_bytes(&way, sizeof(u8));
907 way %= SJA1105ET_FDB_BIN_SIZE;
908 dev_warn(dev, "Warning, FDB bin %d full while adding entry for %pM. Evicting entry %u.\n",
911 sja1105_dynamic_config_write(priv, BLK_IDX_L2_LOOKUP,
915 l2_lookup.index = sja1105et_fdb_index(bin, way);
917 return sja1105_dynamic_config_write(priv, BLK_IDX_L2_LOOKUP,
918 l2_lookup.index, &l2_lookup,
922 int sja1105et_fdb_del(struct dsa_switch *ds, int port,
923 const unsigned char *addr, u16 vid)
925 struct sja1105_l2_lookup_entry l2_lookup = {0};
926 struct sja1105_private *priv = ds->priv;
930 bin = sja1105et_fdb_hash(priv, addr, vid);
931 way = sja1105et_is_fdb_entry_in_bin(priv, bin, addr, vid,
935 index = sja1105et_fdb_index(bin, way);
937 /* We have an FDB entry. Is our port in the destination mask? If yes,
938 * we need to remove it. If the resulting port mask becomes empty, we
939 * need to completely evict the FDB entry.
940 * Otherwise we just write it back.
942 l2_lookup.destports &= ~BIT(port);
944 if (l2_lookup.destports)
949 return sja1105_dynamic_config_write(priv, BLK_IDX_L2_LOOKUP,
950 index, &l2_lookup, keep);
953 int sja1105pqrs_fdb_add(struct dsa_switch *ds, int port,
954 const unsigned char *addr, u16 vid)
956 struct sja1105_l2_lookup_entry l2_lookup = {0};
957 struct sja1105_private *priv = ds->priv;
960 /* Search for an existing entry in the FDB table */
961 l2_lookup.macaddr = ether_addr_to_u64(addr);
962 l2_lookup.vlanid = vid;
963 l2_lookup.iotag = SJA1105_S_TAG;
964 l2_lookup.mask_macaddr = GENMASK_ULL(ETH_ALEN * 8 - 1, 0);
965 l2_lookup.mask_vlanid = VLAN_VID_MASK;
966 l2_lookup.mask_iotag = BIT(0);
967 l2_lookup.destports = BIT(port);
969 rc = sja1105_dynamic_config_read(priv, BLK_IDX_L2_LOOKUP,
970 SJA1105_SEARCH, &l2_lookup);
972 /* Found and this port is already in the entry's
973 * port mask => job done
975 if (l2_lookup.destports & BIT(port))
977 /* l2_lookup.index is populated by the switch in case it
980 l2_lookup.destports |= BIT(port);
981 goto skip_finding_an_index;
984 /* Not found, so try to find an unused spot in the FDB.
985 * This is slightly inefficient because the strategy is knock-knock at
986 * every possible position from 0 to 1023.
988 for (i = 0; i < SJA1105_MAX_L2_LOOKUP_COUNT; i++) {
989 rc = sja1105_dynamic_config_read(priv, BLK_IDX_L2_LOOKUP,
994 if (i == SJA1105_MAX_L2_LOOKUP_COUNT) {
995 dev_err(ds->dev, "FDB is full, cannot add entry.\n");
1000 skip_finding_an_index:
1001 return sja1105_dynamic_config_write(priv, BLK_IDX_L2_LOOKUP,
1002 l2_lookup.index, &l2_lookup,
1006 int sja1105pqrs_fdb_del(struct dsa_switch *ds, int port,
1007 const unsigned char *addr, u16 vid)
1009 struct sja1105_l2_lookup_entry l2_lookup = {0};
1010 struct sja1105_private *priv = ds->priv;
1014 l2_lookup.macaddr = ether_addr_to_u64(addr);
1015 l2_lookup.vlanid = vid;
1016 l2_lookup.iotag = SJA1105_S_TAG;
1017 l2_lookup.mask_macaddr = GENMASK_ULL(ETH_ALEN * 8 - 1, 0);
1018 l2_lookup.mask_vlanid = VLAN_VID_MASK;
1019 l2_lookup.mask_iotag = BIT(0);
1020 l2_lookup.destports = BIT(port);
1022 rc = sja1105_dynamic_config_read(priv, BLK_IDX_L2_LOOKUP,
1023 SJA1105_SEARCH, &l2_lookup);
1027 l2_lookup.destports &= ~BIT(port);
1029 /* Decide whether we remove just this port from the FDB entry,
1030 * or if we remove it completely.
1032 if (l2_lookup.destports)
1037 return sja1105_dynamic_config_write(priv, BLK_IDX_L2_LOOKUP,
1038 l2_lookup.index, &l2_lookup, keep);
1041 static int sja1105_fdb_add(struct dsa_switch *ds, int port,
1042 const unsigned char *addr, u16 vid)
1044 struct sja1105_private *priv = ds->priv;
1047 /* Since we make use of VLANs even when the bridge core doesn't tell us
1048 * to, translate these FDB entries into the correct dsa_8021q ones.
1050 if (!dsa_port_is_vlan_filtering(&ds->ports[port])) {
1051 unsigned int upstream = dsa_upstream_port(priv->ds, port);
1052 u16 tx_vid = dsa_8021q_tx_vid(ds, port);
1053 u16 rx_vid = dsa_8021q_rx_vid(ds, port);
1055 rc = priv->info->fdb_add_cmd(ds, port, addr, tx_vid);
1058 return priv->info->fdb_add_cmd(ds, upstream, addr, rx_vid);
1060 return priv->info->fdb_add_cmd(ds, port, addr, vid);
1063 static int sja1105_fdb_del(struct dsa_switch *ds, int port,
1064 const unsigned char *addr, u16 vid)
1066 struct sja1105_private *priv = ds->priv;
1069 /* Since we make use of VLANs even when the bridge core doesn't tell us
1070 * to, translate these FDB entries into the correct dsa_8021q ones.
1072 if (!dsa_port_is_vlan_filtering(&ds->ports[port])) {
1073 unsigned int upstream = dsa_upstream_port(priv->ds, port);
1074 u16 tx_vid = dsa_8021q_tx_vid(ds, port);
1075 u16 rx_vid = dsa_8021q_rx_vid(ds, port);
1077 rc = priv->info->fdb_del_cmd(ds, port, addr, tx_vid);
1080 return priv->info->fdb_del_cmd(ds, upstream, addr, rx_vid);
1082 return priv->info->fdb_del_cmd(ds, port, addr, vid);
1085 static int sja1105_fdb_dump(struct dsa_switch *ds, int port,
1086 dsa_fdb_dump_cb_t *cb, void *data)
1088 struct sja1105_private *priv = ds->priv;
1089 struct device *dev = ds->dev;
1092 for (i = 0; i < SJA1105_MAX_L2_LOOKUP_COUNT; i++) {
1093 struct sja1105_l2_lookup_entry l2_lookup = {0};
1094 u8 macaddr[ETH_ALEN];
1097 rc = sja1105_dynamic_config_read(priv, BLK_IDX_L2_LOOKUP,
1099 /* No fdb entry at i, not an issue */
1103 dev_err(dev, "Failed to dump FDB: %d\n", rc);
1107 /* FDB dump callback is per port. This means we have to
1108 * disregard a valid entry if it's not for this port, even if
1109 * only to revisit it later. This is inefficient because the
1110 * 1024-sized FDB table needs to be traversed 4 times through
1111 * SPI during a 'bridge fdb show' command.
1113 if (!(l2_lookup.destports & BIT(port)))
1115 u64_to_ether_addr(l2_lookup.macaddr, macaddr);
1117 /* We need to hide the dsa_8021q VLAN from the user.
1118 * Convert the TX VID into the pvid that is active in
1119 * standalone and non-vlan_filtering modes, aka 1.
1120 * The RX VID is applied on the CPU port, which is not seen by
1121 * the bridge core anyway, so there's nothing to hide.
1123 if (!dsa_port_is_vlan_filtering(&ds->ports[port]))
1124 l2_lookup.vlanid = 1;
1125 cb(macaddr, l2_lookup.vlanid, false, data);
1130 /* This callback needs to be present */
1131 static int sja1105_mdb_prepare(struct dsa_switch *ds, int port,
1132 const struct switchdev_obj_port_mdb *mdb)
1137 static void sja1105_mdb_add(struct dsa_switch *ds, int port,
1138 const struct switchdev_obj_port_mdb *mdb)
1140 sja1105_fdb_add(ds, port, mdb->addr, mdb->vid);
1143 static int sja1105_mdb_del(struct dsa_switch *ds, int port,
1144 const struct switchdev_obj_port_mdb *mdb)
1146 return sja1105_fdb_del(ds, port, mdb->addr, mdb->vid);
1149 static int sja1105_bridge_member(struct dsa_switch *ds, int port,
1150 struct net_device *br, bool member)
1152 struct sja1105_l2_forwarding_entry *l2_fwd;
1153 struct sja1105_private *priv = ds->priv;
1156 l2_fwd = priv->static_config.tables[BLK_IDX_L2_FORWARDING].entries;
1158 for (i = 0; i < SJA1105_NUM_PORTS; i++) {
1159 /* Add this port to the forwarding matrix of the
1160 * other ports in the same bridge, and viceversa.
1162 if (!dsa_is_user_port(ds, i))
1164 /* For the ports already under the bridge, only one thing needs
1165 * to be done, and that is to add this port to their
1166 * reachability domain. So we can perform the SPI write for
1167 * them immediately. However, for this port itself (the one
1168 * that is new to the bridge), we need to add all other ports
1169 * to its reachability domain. So we do that incrementally in
1170 * this loop, and perform the SPI write only at the end, once
1171 * the domain contains all other bridge ports.
1175 if (dsa_to_port(ds, i)->bridge_dev != br)
1177 sja1105_port_allow_traffic(l2_fwd, i, port, member);
1178 sja1105_port_allow_traffic(l2_fwd, port, i, member);
1180 rc = sja1105_dynamic_config_write(priv, BLK_IDX_L2_FORWARDING,
1181 i, &l2_fwd[i], true);
1186 return sja1105_dynamic_config_write(priv, BLK_IDX_L2_FORWARDING,
1187 port, &l2_fwd[port], true);
1190 static void sja1105_bridge_stp_state_set(struct dsa_switch *ds, int port,
1193 struct sja1105_private *priv = ds->priv;
1194 struct sja1105_mac_config_entry *mac;
1196 mac = priv->static_config.tables[BLK_IDX_MAC_CONFIG].entries;
1199 case BR_STATE_DISABLED:
1200 case BR_STATE_BLOCKING:
1201 /* From UM10944 description of DRPDTAG (why put this there?):
1202 * "Management traffic flows to the port regardless of the state
1203 * of the INGRESS flag". So BPDUs are still be allowed to pass.
1204 * At the moment no difference between DISABLED and BLOCKING.
1206 mac[port].ingress = false;
1207 mac[port].egress = false;
1208 mac[port].dyn_learn = false;
1210 case BR_STATE_LISTENING:
1211 mac[port].ingress = true;
1212 mac[port].egress = false;
1213 mac[port].dyn_learn = false;
1215 case BR_STATE_LEARNING:
1216 mac[port].ingress = true;
1217 mac[port].egress = false;
1218 mac[port].dyn_learn = true;
1220 case BR_STATE_FORWARDING:
1221 mac[port].ingress = true;
1222 mac[port].egress = true;
1223 mac[port].dyn_learn = true;
1226 dev_err(ds->dev, "invalid STP state: %d\n", state);
1230 sja1105_dynamic_config_write(priv, BLK_IDX_MAC_CONFIG, port,
1234 static int sja1105_bridge_join(struct dsa_switch *ds, int port,
1235 struct net_device *br)
1237 return sja1105_bridge_member(ds, port, br, true);
1240 static void sja1105_bridge_leave(struct dsa_switch *ds, int port,
1241 struct net_device *br)
1243 sja1105_bridge_member(ds, port, br, false);
1246 static u8 sja1105_stp_state_get(struct sja1105_private *priv, int port)
1248 struct sja1105_mac_config_entry *mac;
1250 mac = priv->static_config.tables[BLK_IDX_MAC_CONFIG].entries;
1252 if (!mac[port].ingress && !mac[port].egress && !mac[port].dyn_learn)
1253 return BR_STATE_BLOCKING;
1254 if (mac[port].ingress && !mac[port].egress && !mac[port].dyn_learn)
1255 return BR_STATE_LISTENING;
1256 if (mac[port].ingress && !mac[port].egress && mac[port].dyn_learn)
1257 return BR_STATE_LEARNING;
1258 if (mac[port].ingress && mac[port].egress && mac[port].dyn_learn)
1259 return BR_STATE_FORWARDING;
1260 /* This is really an error condition if the MAC was in none of the STP
1261 * states above. But treating the port as disabled does nothing, which
1262 * is adequate, and it also resets the MAC to a known state later on.
1264 return BR_STATE_DISABLED;
1267 /* For situations where we need to change a setting at runtime that is only
1268 * available through the static configuration, resetting the switch in order
1269 * to upload the new static config is unavoidable. Back up the settings we
1270 * modify at runtime (currently only MAC) and restore them after uploading,
1271 * such that this operation is relatively seamless.
1273 static int sja1105_static_config_reload(struct sja1105_private *priv)
1275 struct sja1105_mac_config_entry *mac;
1276 int speed_mbps[SJA1105_NUM_PORTS];
1277 u8 stp_state[SJA1105_NUM_PORTS];
1280 mac = priv->static_config.tables[BLK_IDX_MAC_CONFIG].entries;
1282 /* Back up settings changed by sja1105_adjust_port_config and
1283 * sja1105_bridge_stp_state_set and restore their defaults.
1285 for (i = 0; i < SJA1105_NUM_PORTS; i++) {
1286 speed_mbps[i] = sja1105_speed[mac[i].speed];
1287 mac[i].speed = SJA1105_SPEED_AUTO;
1288 if (i == dsa_upstream_port(priv->ds, i)) {
1289 mac[i].ingress = true;
1290 mac[i].egress = true;
1291 mac[i].dyn_learn = true;
1293 stp_state[i] = sja1105_stp_state_get(priv, i);
1294 mac[i].ingress = false;
1295 mac[i].egress = false;
1296 mac[i].dyn_learn = false;
1300 /* Reset switch and send updated static configuration */
1301 rc = sja1105_static_config_upload(priv);
1305 /* Configure the CGU (PLLs) for MII and RMII PHYs.
1306 * For these interfaces there is no dynamic configuration
1307 * needed, since PLLs have same settings at all speeds.
1309 rc = sja1105_clocking_setup(priv);
1313 for (i = 0; i < SJA1105_NUM_PORTS; i++) {
1314 bool enabled = (speed_mbps[i] != 0);
1316 if (i != dsa_upstream_port(priv->ds, i))
1317 sja1105_bridge_stp_state_set(priv->ds, i, stp_state[i]);
1319 rc = sja1105_adjust_port_config(priv, i, speed_mbps[i],
1328 static int sja1105_pvid_apply(struct sja1105_private *priv, int port, u16 pvid)
1330 struct sja1105_mac_config_entry *mac;
1332 mac = priv->static_config.tables[BLK_IDX_MAC_CONFIG].entries;
1334 mac[port].vlanid = pvid;
1336 return sja1105_dynamic_config_write(priv, BLK_IDX_MAC_CONFIG, port,
1340 static int sja1105_is_vlan_configured(struct sja1105_private *priv, u16 vid)
1342 struct sja1105_vlan_lookup_entry *vlan;
1345 vlan = priv->static_config.tables[BLK_IDX_VLAN_LOOKUP].entries;
1346 count = priv->static_config.tables[BLK_IDX_VLAN_LOOKUP].entry_count;
1348 for (i = 0; i < count; i++)
1349 if (vlan[i].vlanid == vid)
1352 /* Return an invalid entry index if not found */
1356 static int sja1105_vlan_apply(struct sja1105_private *priv, int port, u16 vid,
1357 bool enabled, bool untagged)
1359 struct sja1105_vlan_lookup_entry *vlan;
1360 struct sja1105_table *table;
1364 table = &priv->static_config.tables[BLK_IDX_VLAN_LOOKUP];
1366 match = sja1105_is_vlan_configured(priv, vid);
1368 /* Can't delete a missing entry. */
1371 rc = sja1105_table_resize(table, table->entry_count + 1);
1374 match = table->entry_count - 1;
1376 /* Assign pointer after the resize (it's new memory) */
1377 vlan = table->entries;
1378 vlan[match].vlanid = vid;
1380 vlan[match].vlan_bc |= BIT(port);
1381 vlan[match].vmemb_port |= BIT(port);
1383 vlan[match].vlan_bc &= ~BIT(port);
1384 vlan[match].vmemb_port &= ~BIT(port);
1386 /* Also unset tag_port if removing this VLAN was requested,
1387 * just so we don't have a confusing bitmap (no practical purpose).
1389 if (untagged || !enabled)
1390 vlan[match].tag_port &= ~BIT(port);
1392 vlan[match].tag_port |= BIT(port);
1393 /* If there's no port left as member of this VLAN,
1394 * it's time for it to go.
1396 if (!vlan[match].vmemb_port)
1399 dev_dbg(priv->ds->dev,
1400 "%s: port %d, vid %llu, broadcast domain 0x%llx, "
1401 "port members 0x%llx, tagged ports 0x%llx, keep %d\n",
1402 __func__, port, vlan[match].vlanid, vlan[match].vlan_bc,
1403 vlan[match].vmemb_port, vlan[match].tag_port, keep);
1405 rc = sja1105_dynamic_config_write(priv, BLK_IDX_VLAN_LOOKUP, vid,
1406 &vlan[match], keep);
1411 return sja1105_table_delete_entry(table, match);
1416 static int sja1105_setup_8021q_tagging(struct dsa_switch *ds, bool enabled)
1420 for (i = 0; i < SJA1105_NUM_PORTS; i++) {
1421 rc = dsa_port_setup_8021q_tagging(ds, i, enabled);
1423 dev_err(ds->dev, "Failed to setup VLAN tagging for port %d: %d\n",
1428 dev_info(ds->dev, "%s switch tagging\n",
1429 enabled ? "Enabled" : "Disabled");
1433 static enum dsa_tag_protocol
1434 sja1105_get_tag_protocol(struct dsa_switch *ds, int port)
1436 return DSA_TAG_PROTO_SJA1105;
1439 /* This callback needs to be present */
1440 static int sja1105_vlan_prepare(struct dsa_switch *ds, int port,
1441 const struct switchdev_obj_port_vlan *vlan)
1446 /* The TPID setting belongs to the General Parameters table,
1447 * which can only be partially reconfigured at runtime (and not the TPID).
1448 * So a switch reset is required.
1450 static int sja1105_vlan_filtering(struct dsa_switch *ds, int port, bool enabled)
1452 struct sja1105_general_params_entry *general_params;
1453 struct sja1105_private *priv = ds->priv;
1454 struct sja1105_table *table;
1459 /* Enable VLAN filtering. */
1460 tpid = ETH_P_8021AD;
1461 tpid2 = ETH_P_8021Q;
1463 /* Disable VLAN filtering. */
1464 tpid = ETH_P_SJA1105;
1465 tpid2 = ETH_P_SJA1105;
1468 table = &priv->static_config.tables[BLK_IDX_GENERAL_PARAMS];
1469 general_params = table->entries;
1470 /* EtherType used to identify outer tagged (S-tag) VLAN traffic */
1471 general_params->tpid = tpid;
1472 /* EtherType used to identify inner tagged (C-tag) VLAN traffic */
1473 general_params->tpid2 = tpid2;
1474 /* When VLAN filtering is on, we need to at least be able to
1475 * decode management traffic through the "backup plan".
1477 general_params->incl_srcpt1 = enabled;
1478 general_params->incl_srcpt0 = enabled;
1480 rc = sja1105_static_config_reload(priv);
1482 dev_err(ds->dev, "Failed to change VLAN Ethertype\n");
1484 /* Switch port identification based on 802.1Q is only passable
1485 * if we are not under a vlan_filtering bridge. So make sure
1486 * the two configurations are mutually exclusive.
1488 return sja1105_setup_8021q_tagging(ds, !enabled);
1491 static void sja1105_vlan_add(struct dsa_switch *ds, int port,
1492 const struct switchdev_obj_port_vlan *vlan)
1494 struct sja1105_private *priv = ds->priv;
1498 for (vid = vlan->vid_begin; vid <= vlan->vid_end; vid++) {
1499 rc = sja1105_vlan_apply(priv, port, vid, true, vlan->flags &
1500 BRIDGE_VLAN_INFO_UNTAGGED);
1502 dev_err(ds->dev, "Failed to add VLAN %d to port %d: %d\n",
1506 if (vlan->flags & BRIDGE_VLAN_INFO_PVID) {
1507 rc = sja1105_pvid_apply(ds->priv, port, vid);
1509 dev_err(ds->dev, "Failed to set pvid %d on port %d: %d\n",
1517 static int sja1105_vlan_del(struct dsa_switch *ds, int port,
1518 const struct switchdev_obj_port_vlan *vlan)
1520 struct sja1105_private *priv = ds->priv;
1524 for (vid = vlan->vid_begin; vid <= vlan->vid_end; vid++) {
1525 rc = sja1105_vlan_apply(priv, port, vid, false, vlan->flags &
1526 BRIDGE_VLAN_INFO_UNTAGGED);
1528 dev_err(ds->dev, "Failed to remove VLAN %d from port %d: %d\n",
1536 /* The programming model for the SJA1105 switch is "all-at-once" via static
1537 * configuration tables. Some of these can be dynamically modified at runtime,
1538 * but not the xMII mode parameters table.
1539 * Furthermode, some PHYs may not have crystals for generating their clocks
1540 * (e.g. RMII). Instead, their 50MHz clock is supplied via the SJA1105 port's
1541 * ref_clk pin. So port clocking needs to be initialized early, before
1542 * connecting to PHYs is attempted, otherwise they won't respond through MDIO.
1543 * Setting correct PHY link speed does not matter now.
1544 * But dsa_slave_phy_setup is called later than sja1105_setup, so the PHY
1545 * bindings are not yet parsed by DSA core. We need to parse early so that we
1546 * can populate the xMII mode parameters table.
1548 static int sja1105_setup(struct dsa_switch *ds)
1550 struct sja1105_dt_port ports[SJA1105_NUM_PORTS];
1551 struct sja1105_private *priv = ds->priv;
1554 rc = sja1105_parse_dt(priv, ports);
1556 dev_err(ds->dev, "Failed to parse DT: %d\n", rc);
1560 /* Error out early if internal delays are required through DT
1561 * and we can't apply them.
1563 rc = sja1105_parse_rgmii_delays(priv, ports);
1565 dev_err(ds->dev, "RGMII delay not supported\n");
1569 rc = sja1105_ptp_clock_register(priv);
1571 dev_err(ds->dev, "Failed to register PTP clock: %d\n", rc);
1574 /* Create and send configuration down to device */
1575 rc = sja1105_static_config_load(priv, ports);
1577 dev_err(ds->dev, "Failed to load static config: %d\n", rc);
1580 /* Configure the CGU (PHY link modes and speeds) */
1581 rc = sja1105_clocking_setup(priv);
1583 dev_err(ds->dev, "Failed to configure MII clocking: %d\n", rc);
1586 /* On SJA1105, VLAN filtering per se is always enabled in hardware.
1587 * The only thing we can do to disable it is lie about what the 802.1Q
1589 * So it will still try to apply VLAN filtering, but all ingress
1590 * traffic (except frames received with EtherType of ETH_P_SJA1105)
1591 * will be internally tagged with a distorted VLAN header where the
1592 * TPID is ETH_P_SJA1105, and the VLAN ID is the port pvid.
1594 ds->vlan_filtering_is_global = true;
1596 /* The DSA/switchdev model brings up switch ports in standalone mode by
1597 * default, and that means vlan_filtering is 0 since they're not under
1598 * a bridge, so it's safe to set up switch tagging at this time.
1600 return sja1105_setup_8021q_tagging(ds, true);
1603 static int sja1105_mgmt_xmit(struct dsa_switch *ds, int port, int slot,
1604 struct sk_buff *skb, bool takets)
1606 struct sja1105_mgmt_entry mgmt_route = {0};
1607 struct sja1105_private *priv = ds->priv;
1614 mgmt_route.macaddr = ether_addr_to_u64(hdr->h_dest);
1615 mgmt_route.destports = BIT(port);
1616 mgmt_route.enfport = 1;
1617 mgmt_route.tsreg = 0;
1618 mgmt_route.takets = takets;
1620 rc = sja1105_dynamic_config_write(priv, BLK_IDX_MGMT_ROUTE,
1621 slot, &mgmt_route, true);
1627 /* Transfer skb to the host port. */
1628 dsa_enqueue_skb(skb, ds->ports[port].slave);
1630 /* Wait until the switch has processed the frame */
1632 rc = sja1105_dynamic_config_read(priv, BLK_IDX_MGMT_ROUTE,
1635 dev_err_ratelimited(priv->ds->dev,
1636 "failed to poll for mgmt route\n");
1640 /* UM10944: The ENFPORT flag of the respective entry is
1641 * cleared when a match is found. The host can use this
1642 * flag as an acknowledgment.
1645 } while (mgmt_route.enfport && --timeout);
1648 /* Clean up the management route so that a follow-up
1649 * frame may not match on it by mistake.
1650 * This is only hardware supported on P/Q/R/S - on E/T it is
1651 * a no-op and we are silently discarding the -EOPNOTSUPP.
1653 sja1105_dynamic_config_write(priv, BLK_IDX_MGMT_ROUTE,
1654 slot, &mgmt_route, false);
1655 dev_err_ratelimited(priv->ds->dev, "xmit timed out\n");
1658 return NETDEV_TX_OK;
1661 /* Deferred work is unfortunately necessary because setting up the management
1662 * route cannot be done from atomit context (SPI transfer takes a sleepable
1665 static netdev_tx_t sja1105_port_deferred_xmit(struct dsa_switch *ds, int port,
1666 struct sk_buff *skb)
1668 struct sja1105_private *priv = ds->priv;
1669 struct sja1105_port *sp = &priv->ports[port];
1670 struct skb_shared_hwtstamps shwt = {0};
1671 int slot = sp->mgmt_slot;
1672 struct sk_buff *clone;
1676 /* The tragic fact about the switch having 4x2 slots for installing
1677 * management routes is that all of them except one are actually
1679 * If 2 slots are simultaneously configured for two BPDUs sent to the
1680 * same (multicast) DMAC but on different egress ports, the switch
1681 * would confuse them and redirect first frame it receives on the CPU
1682 * port towards the port configured on the numerically first slot
1683 * (therefore wrong port), then second received frame on second slot
1684 * (also wrong port).
1685 * So for all practical purposes, there needs to be a lock that
1686 * prevents that from happening. The slot used here is utterly useless
1687 * (could have simply been 0 just as fine), but we are doing it
1688 * nonetheless, in case a smarter idea ever comes up in the future.
1690 mutex_lock(&priv->mgmt_lock);
1692 /* The clone, if there, was made by dsa_skb_tx_timestamp */
1693 clone = DSA_SKB_CB(skb)->clone;
1695 sja1105_mgmt_xmit(ds, port, slot, skb, !!clone);
1700 skb_shinfo(clone)->tx_flags |= SKBTX_IN_PROGRESS;
1702 mutex_lock(&priv->ptp_lock);
1704 now = priv->tstamp_cc.read(&priv->tstamp_cc);
1706 rc = sja1105_ptpegr_ts_poll(priv, slot, &ts);
1708 dev_err(ds->dev, "xmit: timed out polling for tstamp\n");
1710 goto out_unlock_ptp;
1713 ts = sja1105_tstamp_reconstruct(priv, now, ts);
1714 ts = timecounter_cyc2time(&priv->tstamp_tc, ts);
1716 shwt.hwtstamp = ns_to_ktime(ts);
1717 skb_complete_tx_timestamp(clone, &shwt);
1720 mutex_unlock(&priv->ptp_lock);
1722 mutex_unlock(&priv->mgmt_lock);
1723 return NETDEV_TX_OK;
1726 /* The MAXAGE setting belongs to the L2 Forwarding Parameters table,
1727 * which cannot be reconfigured at runtime. So a switch reset is required.
1729 static int sja1105_set_ageing_time(struct dsa_switch *ds,
1730 unsigned int ageing_time)
1732 struct sja1105_l2_lookup_params_entry *l2_lookup_params;
1733 struct sja1105_private *priv = ds->priv;
1734 struct sja1105_table *table;
1735 unsigned int maxage;
1737 table = &priv->static_config.tables[BLK_IDX_L2_LOOKUP_PARAMS];
1738 l2_lookup_params = table->entries;
1740 maxage = SJA1105_AGEING_TIME_MS(ageing_time);
1742 if (l2_lookup_params->maxage == maxage)
1745 l2_lookup_params->maxage = maxage;
1747 return sja1105_static_config_reload(priv);
1750 /* Called from dsa_skb_tx_timestamp. This callback is just to make DSA clone
1751 * the skb and have it available in DSA_SKB_CB in the .port_deferred_xmit
1752 * callback, where we will timestamp it synchronously.
1754 bool sja1105_port_txtstamp(struct dsa_switch *ds, int port,
1755 struct sk_buff *skb, unsigned int type)
1757 struct sja1105_private *priv = ds->priv;
1758 struct sja1105_port *sp = &priv->ports[port];
1760 if (!sp->hwts_tx_en)
1766 static const struct dsa_switch_ops sja1105_switch_ops = {
1767 .get_tag_protocol = sja1105_get_tag_protocol,
1768 .setup = sja1105_setup,
1769 .set_ageing_time = sja1105_set_ageing_time,
1770 .phylink_validate = sja1105_phylink_validate,
1771 .phylink_mac_config = sja1105_mac_config,
1772 .get_strings = sja1105_get_strings,
1773 .get_ethtool_stats = sja1105_get_ethtool_stats,
1774 .get_sset_count = sja1105_get_sset_count,
1775 .get_ts_info = sja1105_get_ts_info,
1776 .port_fdb_dump = sja1105_fdb_dump,
1777 .port_fdb_add = sja1105_fdb_add,
1778 .port_fdb_del = sja1105_fdb_del,
1779 .port_bridge_join = sja1105_bridge_join,
1780 .port_bridge_leave = sja1105_bridge_leave,
1781 .port_stp_state_set = sja1105_bridge_stp_state_set,
1782 .port_vlan_prepare = sja1105_vlan_prepare,
1783 .port_vlan_filtering = sja1105_vlan_filtering,
1784 .port_vlan_add = sja1105_vlan_add,
1785 .port_vlan_del = sja1105_vlan_del,
1786 .port_mdb_prepare = sja1105_mdb_prepare,
1787 .port_mdb_add = sja1105_mdb_add,
1788 .port_mdb_del = sja1105_mdb_del,
1789 .port_deferred_xmit = sja1105_port_deferred_xmit,
1790 .port_txtstamp = sja1105_port_txtstamp,
1793 static int sja1105_check_device_id(struct sja1105_private *priv)
1795 const struct sja1105_regs *regs = priv->info->regs;
1796 u8 prod_id[SJA1105_SIZE_DEVICE_ID] = {0};
1797 struct device *dev = &priv->spidev->dev;
1802 rc = sja1105_spi_send_int(priv, SPI_READ, regs->device_id,
1803 &device_id, SJA1105_SIZE_DEVICE_ID);
1807 if (device_id != priv->info->device_id) {
1808 dev_err(dev, "Expected device ID 0x%llx but read 0x%llx\n",
1809 priv->info->device_id, device_id);
1813 rc = sja1105_spi_send_packed_buf(priv, SPI_READ, regs->prod_id,
1814 prod_id, SJA1105_SIZE_DEVICE_ID);
1818 sja1105_unpack(prod_id, &part_no, 19, 4, SJA1105_SIZE_DEVICE_ID);
1820 if (part_no != priv->info->part_no) {
1821 dev_err(dev, "Expected part number 0x%llx but read 0x%llx\n",
1822 priv->info->part_no, part_no);
1829 static int sja1105_probe(struct spi_device *spi)
1831 struct sja1105_tagger_data *tagger_data;
1832 struct device *dev = &spi->dev;
1833 struct sja1105_private *priv;
1834 struct dsa_switch *ds;
1837 if (!dev->of_node) {
1838 dev_err(dev, "No DTS bindings for SJA1105 driver\n");
1842 priv = devm_kzalloc(dev, sizeof(struct sja1105_private), GFP_KERNEL);
1846 /* Configure the optional reset pin and bring up switch */
1847 priv->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
1848 if (IS_ERR(priv->reset_gpio))
1849 dev_dbg(dev, "reset-gpios not defined, ignoring\n");
1851 sja1105_hw_reset(priv->reset_gpio, 1, 1);
1853 /* Populate our driver private structure (priv) based on
1854 * the device tree node that was probed (spi)
1857 spi_set_drvdata(spi, priv);
1859 /* Configure the SPI bus */
1860 spi->bits_per_word = 8;
1861 rc = spi_setup(spi);
1863 dev_err(dev, "Could not init SPI\n");
1867 priv->info = of_device_get_match_data(dev);
1869 /* Detect hardware device */
1870 rc = sja1105_check_device_id(priv);
1872 dev_err(dev, "Device ID check failed: %d\n", rc);
1876 dev_info(dev, "Probed switch chip: %s\n", priv->info->name);
1878 ds = dsa_switch_alloc(dev, SJA1105_NUM_PORTS);
1882 ds->ops = &sja1105_switch_ops;
1886 tagger_data = &priv->tagger_data;
1887 skb_queue_head_init(&tagger_data->skb_rxtstamp_queue);
1889 /* Connections between dsa_port and sja1105_port */
1890 for (i = 0; i < SJA1105_NUM_PORTS; i++) {
1891 struct sja1105_port *sp = &priv->ports[i];
1893 ds->ports[i].priv = sp;
1894 sp->dp = &ds->ports[i];
1895 sp->data = tagger_data;
1897 mutex_init(&priv->mgmt_lock);
1899 return dsa_register_switch(priv->ds);
1902 static int sja1105_remove(struct spi_device *spi)
1904 struct sja1105_private *priv = spi_get_drvdata(spi);
1906 sja1105_ptp_clock_unregister(priv);
1907 dsa_unregister_switch(priv->ds);
1908 sja1105_static_config_free(&priv->static_config);
1912 static const struct of_device_id sja1105_dt_ids[] = {
1913 { .compatible = "nxp,sja1105e", .data = &sja1105e_info },
1914 { .compatible = "nxp,sja1105t", .data = &sja1105t_info },
1915 { .compatible = "nxp,sja1105p", .data = &sja1105p_info },
1916 { .compatible = "nxp,sja1105q", .data = &sja1105q_info },
1917 { .compatible = "nxp,sja1105r", .data = &sja1105r_info },
1918 { .compatible = "nxp,sja1105s", .data = &sja1105s_info },
1921 MODULE_DEVICE_TABLE(of, sja1105_dt_ids);
1923 static struct spi_driver sja1105_driver = {
1926 .owner = THIS_MODULE,
1927 .of_match_table = of_match_ptr(sja1105_dt_ids),
1929 .probe = sja1105_probe,
1930 .remove = sja1105_remove,
1933 module_spi_driver(sja1105_driver);
1935 MODULE_AUTHOR("Vladimir Oltean <olteanv@gmail.com>");
1936 MODULE_AUTHOR("Georg Waibel <georg.waibel@sensor-technik.de>");
1937 MODULE_DESCRIPTION("SJA1105 Driver");
1938 MODULE_LICENSE("GPL v2");