drivers/net/dsa/sja1105/sja1105_main.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /* Copyright (c) 2018, Sensor-Technik Wiedemann GmbH
   3  * Copyright (c) 2018-2019, Vladimir Oltean <olteanv@gmail.com>
   4  */
   5
   6 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
   7
   8 #include <linux/delay.h>
   9 #include <linux/module.h>
  10 #include <linux/printk.h>
  11 #include <linux/spi/spi.h>
  12 #include <linux/errno.h>
  13 #include <linux/gpio/consumer.h>
  14 #include <linux/phylink.h>
  15 #include <linux/of.h>
  16 #include <linux/of_net.h>
  17 #include <linux/of_mdio.h>
  18 #include <linux/of_device.h>
  19 #include <linux/pcs/pcs-xpcs.h>
  20 #include <linux/netdev_features.h>
  21 #include <linux/netdevice.h>
  22 #include <linux/if_bridge.h>
  23 #include <linux/if_ether.h>
  24 #include <linux/dsa/8021q.h>
  25 #include "sja1105.h"
  26 #include "sja1105_tas.h"
  27
  28 #define SJA1105_UNKNOWN_MULTICAST       0x010000000000ull
  29 #define SJA1105_DEFAULT_VLAN            (VLAN_N_VID - 1)
  30
  31 static const struct dsa_switch_ops sja1105_switch_ops;
  32
  33 static void sja1105_hw_reset(struct gpio_desc *gpio, unsigned int pulse_len,
  34                              unsigned int startup_delay)
  35 {
  36         gpiod_set_value_cansleep(gpio, 1);
  37         /* Wait for minimum reset pulse length */
  38         msleep(pulse_len);
  39         gpiod_set_value_cansleep(gpio, 0);
  40         /* Wait until chip is ready after reset */
  41         msleep(startup_delay);
  42 }
  43
  44 static void
  45 sja1105_port_allow_traffic(struct sja1105_l2_forwarding_entry *l2_fwd,
  46                            int from, int to, bool allow)
  47 {
  48         if (allow)
  49                 l2_fwd[from].reach_port |= BIT(to);
  50         else
  51                 l2_fwd[from].reach_port &= ~BIT(to);
  52 }
  53
  54 static bool sja1105_can_forward(struct sja1105_l2_forwarding_entry *l2_fwd,
  55                                 int from, int to)
  56 {
  57         return !!(l2_fwd[from].reach_port & BIT(to));
  58 }
  59
  60 static int sja1105_init_mac_settings(struct sja1105_private *priv)
  61 {
  62         struct sja1105_mac_config_entry default_mac = {
  63                 /* Enable all 8 priority queues on egress.
  64                  * Every queue i holds top[i] - base[i] frames.
  65                  * Sum of top[i] - base[i] is 511 (max hardware limit).
  66                  */
  67                 .top  = {0x3F, 0x7F, 0xBF, 0xFF, 0x13F, 0x17F, 0x1BF, 0x1FF},
  68                 .base = {0x0, 0x40, 0x80, 0xC0, 0x100, 0x140, 0x180, 0x1C0},
  69                 .enabled = {true, true, true, true, true, true, true, true},
  70                 /* Keep standard IFG of 12 bytes on egress. */
  71                 .ifg = 0,
  72                 /* Always put the MAC speed in automatic mode, where it can be
  73                  * adjusted at runtime by PHYLINK.
  74                  */
  75                 .speed = priv->info->port_speed[SJA1105_SPEED_AUTO],
  76                 /* No static correction for 1-step 1588 events */
  77                 .tp_delin = 0,
  78                 .tp_delout = 0,
  79                 /* Disable aging for critical TTEthernet traffic */
  80                 .maxage = 0xFF,
  81                 /* Internal VLAN (pvid) to apply to untagged ingress */
  82                 .vlanprio = 0,
  83                 .vlanid = 1,
  84                 .ing_mirr = false,
  85                 .egr_mirr = false,
  86                 /* Don't drop traffic with other EtherType than ETH_P_IP */
  87                 .drpnona664 = false,
  88                 /* Don't drop double-tagged traffic */
  89                 .drpdtag = false,
  90                 /* Don't drop untagged traffic */
  91                 .drpuntag = false,
  92                 /* Don't retag 802.1p (VID 0) traffic with the pvid */
  93                 .retag = false,
  94                 /* Disable learning and I/O on user ports by default -
  95                  * STP will enable it.
  96                  */
  97                 .dyn_learn = false,
  98                 .egress = false,
  99                 .ingress = false,
 100         };
 101         struct sja1105_mac_config_entry *mac;
 102         struct dsa_switch *ds = priv->ds;
 103         struct sja1105_table *table;
 104         int i;
 105
 106         table = &priv->static_config.tables[BLK_IDX_MAC_CONFIG];
 107
 108         /* Discard previous MAC Configuration Table */
 109         if (table->entry_count) {
 110                 kfree(table->entries);
 111                 table->entry_count = 0;
 112         }
 113
 114         table->entries = kcalloc(table->ops->max_entry_count,
 115                                  table->ops->unpacked_entry_size, GFP_KERNEL);
 116         if (!table->entries)
 117                 return -ENOMEM;
 118
 119         table->entry_count = table->ops->max_entry_count;
 120
 121         mac = table->entries;
 122
 123         for (i = 0; i < ds->num_ports; i++) {
 124                 mac[i] = default_mac;
 125
 126                 /* Let sja1105_bridge_stp_state_set() keep address learning
 127                  * enabled for the CPU port.
 128                  */
 129                 if (dsa_is_cpu_port(ds, i))
 130                         priv->learn_ena |= BIT(i);
 131         }
 132
 133         return 0;
 134 }
 135
 136 static int sja1105_init_mii_settings(struct sja1105_private *priv)
 137 {
 138         struct device *dev = &priv->spidev->dev;
 139         struct sja1105_xmii_params_entry *mii;
 140         struct dsa_switch *ds = priv->ds;
 141         struct sja1105_table *table;
 142         int i;
 143
 144         table = &priv->static_config.tables[BLK_IDX_XMII_PARAMS];
 145
 146         /* Discard previous xMII Mode Parameters Table */
 147         if (table->entry_count) {
 148                 kfree(table->entries);
 149                 table->entry_count = 0;
 150         }
 151
 152         table->entries = kcalloc(table->ops->max_entry_count,
 153                                  table->ops->unpacked_entry_size, GFP_KERNEL);
 154         if (!table->entries)
 155                 return -ENOMEM;
 156
 157         /* Override table based on PHYLINK DT bindings */
 158         table->entry_count = table->ops->max_entry_count;
 159
 160         mii = table->entries;
 161
 162         for (i = 0; i < ds->num_ports; i++) {
 163                 sja1105_mii_role_t role = XMII_MAC;
 164
 165                 if (dsa_is_unused_port(priv->ds, i))
 166                         continue;
 167
 168                 switch (priv->phy_mode[i]) {
 169                 case PHY_INTERFACE_MODE_INTERNAL:
 170                         if (priv->info->internal_phy[i] == SJA1105_NO_PHY)
 171                                 goto unsupported;
 172
 173                         mii->xmii_mode[i] = XMII_MODE_MII;
 174                         if (priv->info->internal_phy[i] == SJA1105_PHY_BASE_TX)
 175                                 mii->special[i] = true;
 176
 177                         break;
 178                 case PHY_INTERFACE_MODE_REVMII:
 179                         role = XMII_PHY;
 180                         fallthrough;
 181                 case PHY_INTERFACE_MODE_MII:
 182                         if (!priv->info->supports_mii[i])
 183                                 goto unsupported;
 184
 185                         mii->xmii_mode[i] = XMII_MODE_MII;
 186                         break;
 187                 case PHY_INTERFACE_MODE_REVRMII:
 188                         role = XMII_PHY;
 189                         fallthrough;
 190                 case PHY_INTERFACE_MODE_RMII:
 191                         if (!priv->info->supports_rmii[i])
 192                                 goto unsupported;
 193
 194                         mii->xmii_mode[i] = XMII_MODE_RMII;
 195                         break;
 196                 case PHY_INTERFACE_MODE_RGMII:
 197                 case PHY_INTERFACE_MODE_RGMII_ID:
 198                 case PHY_INTERFACE_MODE_RGMII_RXID:
 199                 case PHY_INTERFACE_MODE_RGMII_TXID:
 200                         if (!priv->info->supports_rgmii[i])
 201                                 goto unsupported;
 202
 203                         mii->xmii_mode[i] = XMII_MODE_RGMII;
 204                         break;
 205                 case PHY_INTERFACE_MODE_SGMII:
 206                         if (!priv->info->supports_sgmii[i])
 207                                 goto unsupported;
 208
 209                         mii->xmii_mode[i] = XMII_MODE_SGMII;
 210                         mii->special[i] = true;
 211                         break;
 212                 case PHY_INTERFACE_MODE_2500BASEX:
 213                         if (!priv->info->supports_2500basex[i])
 214                                 goto unsupported;
 215
 216                         mii->xmii_mode[i] = XMII_MODE_SGMII;
 217                         mii->special[i] = true;
 218                         break;
 219 unsupported:
 220                 default:
 221                         dev_err(dev, "Unsupported PHY mode %s on port %d!\n",
 222                                 phy_modes(priv->phy_mode[i]), i);
 223                         return -EINVAL;
 224                 }
 225
 226                 mii->phy_mac[i] = role;
 227         }
 228         return 0;
 229 }
 230
 231 static int sja1105_init_static_fdb(struct sja1105_private *priv)
 232 {
 233         struct sja1105_l2_lookup_entry *l2_lookup;
 234         struct sja1105_table *table;
 235         int port;
 236
 237         table = &priv->static_config.tables[BLK_IDX_L2_LOOKUP];
 238
 239         /* We only populate the FDB table through dynamic L2 Address Lookup
 240          * entries, except for a special entry at the end which is a catch-all
 241          * for unknown multicast and will be used to control flooding domain.
 242          */
 243         if (table->entry_count) {
 244                 kfree(table->entries);
 245                 table->entry_count = 0;
 246         }
 247
 248         if (!priv->info->can_limit_mcast_flood)
 249                 return 0;
 250
 251         table->entries = kcalloc(1, table->ops->unpacked_entry_size,
 252                                  GFP_KERNEL);
 253         if (!table->entries)
 254                 return -ENOMEM;
 255
 256         table->entry_count = 1;
 257         l2_lookup = table->entries;
 258
 259         /* All L2 multicast addresses have an odd first octet */
 260         l2_lookup[0].macaddr = SJA1105_UNKNOWN_MULTICAST;
 261         l2_lookup[0].mask_macaddr = SJA1105_UNKNOWN_MULTICAST;
 262         l2_lookup[0].lockeds = true;
 263         l2_lookup[0].index = SJA1105_MAX_L2_LOOKUP_COUNT - 1;
 264
 265         /* Flood multicast to every port by default */
 266         for (port = 0; port < priv->ds->num_ports; port++)
 267                 if (!dsa_is_unused_port(priv->ds, port))
 268                         l2_lookup[0].destports |= BIT(port);
 269
 270         return 0;
 271 }
 272
 273 static int sja1105_init_l2_lookup_params(struct sja1105_private *priv)
 274 {
 275         struct sja1105_l2_lookup_params_entry default_l2_lookup_params = {
 276                 /* Learned FDB entries are forgotten after 300 seconds */
 277                 .maxage = SJA1105_AGEING_TIME_MS(300000),
 278                 /* All entries within a FDB bin are available for learning */
 279                 .dyn_tbsz = SJA1105ET_FDB_BIN_SIZE,
 280                 /* And the P/Q/R/S equivalent setting: */
 281                 .start_dynspc = 0,
 282                 /* 2^8 + 2^5 + 2^3 + 2^2 + 2^1 + 1 in Koopman notation */
 283                 .poly = 0x97,
 284                 /* This selects between Independent VLAN Learning (IVL) and
 285                  * Shared VLAN Learning (SVL)
 286                  */
 287                 .shared_learn = true,
 288                 /* Don't discard management traffic based on ENFPORT -
 289                  * we don't perform SMAC port enforcement anyway, so
 290                  * what we are setting here doesn't matter.
 291                  */
 292                 .no_enf_hostprt = false,
 293                 /* Don't learn SMAC for mac_fltres1 and mac_fltres0.
 294                  * Maybe correlate with no_linklocal_learn from bridge driver?
 295                  */
 296                 .no_mgmt_learn = true,
 297                 /* P/Q/R/S only */
 298                 .use_static = true,
 299                 /* Dynamically learned FDB entries can overwrite other (older)
 300                  * dynamic FDB entries
 301                  */
 302                 .owr_dyn = true,
 303                 .drpnolearn = true,
 304         };
 305         struct dsa_switch *ds = priv->ds;
 306         int port, num_used_ports = 0;
 307         struct sja1105_table *table;
 308         u64 max_fdb_entries;
 309
 310         for (port = 0; port < ds->num_ports; port++)
 311                 if (!dsa_is_unused_port(ds, port))
 312                         num_used_ports++;
 313
 314         max_fdb_entries = SJA1105_MAX_L2_LOOKUP_COUNT / num_used_ports;
 315
 316         for (port = 0; port < ds->num_ports; port++) {
 317                 if (dsa_is_unused_port(ds, port))
 318                         continue;
 319
 320                 default_l2_lookup_params.maxaddrp[port] = max_fdb_entries;
 321         }
 322
 323         table = &priv->static_config.tables[BLK_IDX_L2_LOOKUP_PARAMS];
 324
 325         if (table->entry_count) {
 326                 kfree(table->entries);
 327                 table->entry_count = 0;
 328         }
 329
 330         table->entries = kcalloc(table->ops->max_entry_count,
 331                                  table->ops->unpacked_entry_size, GFP_KERNEL);
 332         if (!table->entries)
 333                 return -ENOMEM;
 334
 335         table->entry_count = table->ops->max_entry_count;
 336
 337         /* This table only has a single entry */
 338         ((struct sja1105_l2_lookup_params_entry *)table->entries)[0] =
 339                                 default_l2_lookup_params;
 340
 341         return 0;
 342 }
 343
 344 /* Set up a default VLAN for untagged traffic injected from the CPU
 345  * using management routes (e.g. STP, PTP) as opposed to tag_8021q.
 346  * All DT-defined ports are members of this VLAN, and there are no
 347  * restrictions on forwarding (since the CPU selects the destination).
 348  * Frames from this VLAN will always be transmitted as untagged, and
 349  * neither the bridge nor the 8021q module cannot create this VLAN ID.
 350  */
 351 static int sja1105_init_static_vlan(struct sja1105_private *priv)
 352 {
 353         struct sja1105_table *table;
 354         struct sja1105_vlan_lookup_entry pvid = {
 355                 .type_entry = SJA1110_VLAN_D_TAG,
 356                 .ving_mirr = 0,
 357                 .vegr_mirr = 0,
 358                 .vmemb_port = 0,
 359                 .vlan_bc = 0,
 360                 .tag_port = 0,
 361                 .vlanid = SJA1105_DEFAULT_VLAN,
 362         };
 363         struct dsa_switch *ds = priv->ds;
 364         int port;
 365
 366         table = &priv->static_config.tables[BLK_IDX_VLAN_LOOKUP];
 367
 368         if (table->entry_count) {
 369                 kfree(table->entries);
 370                 table->entry_count = 0;
 371         }
 372
 373         table->entries = kzalloc(table->ops->unpacked_entry_size,
 374                                  GFP_KERNEL);
 375         if (!table->entries)
 376                 return -ENOMEM;
 377
 378         table->entry_count = 1;
 379
 380         for (port = 0; port < ds->num_ports; port++) {
 381                 struct sja1105_bridge_vlan *v;
 382
 383                 if (dsa_is_unused_port(ds, port))
 384                         continue;
 385
 386                 pvid.vmemb_port |= BIT(port);
 387                 pvid.vlan_bc |= BIT(port);
 388                 pvid.tag_port &= ~BIT(port);
 389
 390                 v = kzalloc(sizeof(*v), GFP_KERNEL);
 391                 if (!v)
 392                         return -ENOMEM;
 393
 394                 v->port = port;
 395                 v->vid = SJA1105_DEFAULT_VLAN;
 396                 v->untagged = true;
 397                 if (dsa_is_cpu_port(ds, port))
 398                         v->pvid = true;
 399                 list_add(&v->list, &priv->dsa_8021q_vlans);
 400
 401                 v = kmemdup(v, sizeof(*v), GFP_KERNEL);
 402                 if (!v)
 403                         return -ENOMEM;
 404
 405                 list_add(&v->list, &priv->bridge_vlans);
 406         }
 407
 408         ((struct sja1105_vlan_lookup_entry *)table->entries)[0] = pvid;
 409         return 0;
 410 }
 411
 412 static int sja1105_init_l2_forwarding(struct sja1105_private *priv)
 413 {
 414         struct sja1105_l2_forwarding_entry *l2fwd;
 415         struct dsa_switch *ds = priv->ds;
 416         struct sja1105_table *table;
 417         int i, j;
 418
 419         table = &priv->static_config.tables[BLK_IDX_L2_FORWARDING];
 420
 421         if (table->entry_count) {
 422                 kfree(table->entries);
 423                 table->entry_count = 0;
 424         }
 425
 426         table->entries = kcalloc(table->ops->max_entry_count,
 427                                  table->ops->unpacked_entry_size, GFP_KERNEL);
 428         if (!table->entries)
 429                 return -ENOMEM;
 430
 431         table->entry_count = table->ops->max_entry_count;
 432
 433         l2fwd = table->entries;
 434
 435         /* First 5 entries define the forwarding rules */
 436         for (i = 0; i < ds->num_ports; i++) {
 437                 unsigned int upstream = dsa_upstream_port(priv->ds, i);
 438
 439                 if (dsa_is_unused_port(ds, i))
 440                         continue;
 441
 442                 for (j = 0; j < SJA1105_NUM_TC; j++)
 443                         l2fwd[i].vlan_pmap[j] = j;
 444
 445                 /* All ports start up with egress flooding enabled,
 446                  * including the CPU port.
 447                  */
 448                 priv->ucast_egress_floods |= BIT(i);
 449                 priv->bcast_egress_floods |= BIT(i);
 450
 451                 if (i == upstream)
 452                         continue;
 453
 454                 sja1105_port_allow_traffic(l2fwd, i, upstream, true);
 455                 sja1105_port_allow_traffic(l2fwd, upstream, i, true);
 456
 457                 l2fwd[i].bc_domain = BIT(upstream);
 458                 l2fwd[i].fl_domain = BIT(upstream);
 459
 460                 l2fwd[upstream].bc_domain |= BIT(i);
 461                 l2fwd[upstream].fl_domain |= BIT(i);
 462         }
 463
 464         /* Next 8 entries define VLAN PCP mapping from ingress to egress.
 465          * Create a one-to-one mapping.
 466          */
 467         for (i = 0; i < SJA1105_NUM_TC; i++) {
 468                 for (j = 0; j < ds->num_ports; j++) {
 469                         if (dsa_is_unused_port(ds, j))
 470                                 continue;
 471
 472                         l2fwd[ds->num_ports + i].vlan_pmap[j] = i;
 473                 }
 474
 475                 l2fwd[ds->num_ports + i].type_egrpcp2outputq = true;
 476         }
 477
 478         return 0;
 479 }
 480
 481 static int sja1110_init_pcp_remapping(struct sja1105_private *priv)
 482 {
 483         struct sja1110_pcp_remapping_entry *pcp_remap;
 484         struct dsa_switch *ds = priv->ds;
 485         struct sja1105_table *table;
 486         int port, tc;
 487
 488         table = &priv->static_config.tables[BLK_IDX_PCP_REMAPPING];
 489
 490         /* Nothing to do for SJA1105 */
 491         if (!table->ops->max_entry_count)
 492                 return 0;
 493
 494         if (table->entry_count) {
 495                 kfree(table->entries);
 496                 table->entry_count = 0;
 497         }
 498
 499         table->entries = kcalloc(table->ops->max_entry_count,
 500                                  table->ops->unpacked_entry_size, GFP_KERNEL);
 501         if (!table->entries)
 502                 return -ENOMEM;
 503
 504         table->entry_count = table->ops->max_entry_count;
 505
 506         pcp_remap = table->entries;
 507
 508         /* Repeat the configuration done for vlan_pmap */
 509         for (port = 0; port < ds->num_ports; port++) {
 510                 if (dsa_is_unused_port(ds, port))
 511                         continue;
 512
 513                 for (tc = 0; tc < SJA1105_NUM_TC; tc++)
 514                         pcp_remap[port].egrpcp[tc] = tc;
 515         }
 516
 517         return 0;
 518 }
 519
 520 static int sja1105_init_l2_forwarding_params(struct sja1105_private *priv)
 521 {
 522         struct sja1105_l2_forwarding_params_entry *l2fwd_params;
 523         struct sja1105_table *table;
 524
 525         table = &priv->static_config.tables[BLK_IDX_L2_FORWARDING_PARAMS];
 526
 527         if (table->entry_count) {
 528                 kfree(table->entries);
 529                 table->entry_count = 0;
 530         }
 531
 532         table->entries = kcalloc(table->ops->max_entry_count,
 533                                  table->ops->unpacked_entry_size, GFP_KERNEL);
 534         if (!table->entries)
 535                 return -ENOMEM;
 536
 537         table->entry_count = table->ops->max_entry_count;
 538
 539         /* This table only has a single entry */
 540         l2fwd_params = table->entries;
 541
 542         /* Disallow dynamic reconfiguration of vlan_pmap */
 543         l2fwd_params->max_dynp = 0;
 544         /* Use a single memory partition for all ingress queues */
 545         l2fwd_params->part_spc[0] = priv->info->max_frame_mem;
 546
 547         return 0;
 548 }
 549
 550 void sja1105_frame_memory_partitioning(struct sja1105_private *priv)
 551 {
 552         struct sja1105_l2_forwarding_params_entry *l2_fwd_params;
 553         struct sja1105_vl_forwarding_params_entry *vl_fwd_params;
 554         int max_mem = priv->info->max_frame_mem;
 555         struct sja1105_table *table;
 556
 557         /* VLAN retagging is implemented using a loopback port that consumes
 558          * frame buffers. That leaves less for us.
 559          */
 560         if (priv->vlan_state == SJA1105_VLAN_BEST_EFFORT)
 561                 max_mem -= SJA1105_FRAME_MEMORY_RETAGGING_OVERHEAD;
 562
 563         table = &priv->static_config.tables[BLK_IDX_L2_FORWARDING_PARAMS];
 564         l2_fwd_params = table->entries;
 565         l2_fwd_params->part_spc[0] = max_mem;
 566
 567         /* If we have any critical-traffic virtual links, we need to reserve
 568          * some frame buffer memory for them. At the moment, hardcode the value
 569          * at 100 blocks of 128 bytes of memory each. This leaves 829 blocks
 570          * remaining for best-effort traffic. TODO: figure out a more flexible
 571          * way to perform the frame buffer partitioning.
 572          */
 573         if (!priv->static_config.tables[BLK_IDX_VL_FORWARDING].entry_count)
 574                 return;
 575
 576         table = &priv->static_config.tables[BLK_IDX_VL_FORWARDING_PARAMS];
 577         vl_fwd_params = table->entries;
 578
 579         l2_fwd_params->part_spc[0] -= SJA1105_VL_FRAME_MEMORY;
 580         vl_fwd_params->partspc[0] = SJA1105_VL_FRAME_MEMORY;
 581 }
 582
 583 /* SJA1110 TDMACONFIGIDX values:
 584  *
 585  *      | 100 Mbps ports |  1Gbps ports  | 2.5Gbps ports | Disabled ports
 586  * -----+----------------+---------------+---------------+---------------
 587  *   0  |   0, [5:10]    |     [1:2]     |     [3:4]     |     retag
 588  *   1  |0, [5:10], retag|     [1:2]     |     [3:4]     |       -
 589  *   2  |   0, [5:10]    |  [1:3], retag |       4       |       -
 590  *   3  |   0, [5:10]    |[1:2], 4, retag|       3       |       -
 591  *   4  |  0, 2, [5:10]  |    1, retag   |     [3:4]     |       -
 592  *   5  |  0, 1, [5:10]  |    2, retag   |     [3:4]     |       -
 593  *  14  |   0, [5:10]    | [1:4], retag  |       -       |       -
 594  *  15  |     [5:10]     | [0:4], retag  |       -       |       -
 595  */
 596 static void sja1110_select_tdmaconfigidx(struct sja1105_private *priv)
 597 {
 598         struct sja1105_general_params_entry *general_params;
 599         struct sja1105_table *table;
 600         bool port_1_is_base_tx;
 601         bool port_3_is_2500;
 602         bool port_4_is_2500;
 603         u64 tdmaconfigidx;
 604
 605         if (priv->info->device_id != SJA1110_DEVICE_ID)
 606                 return;
 607
 608         table = &priv->static_config.tables[BLK_IDX_GENERAL_PARAMS];
 609         general_params = table->entries;
 610
 611         /* All the settings below are "as opposed to SGMII", which is the
 612          * other pinmuxing option.
 613          */
 614         port_1_is_base_tx = priv->phy_mode[1] == PHY_INTERFACE_MODE_INTERNAL;
 615         port_3_is_2500 = priv->phy_mode[3] == PHY_INTERFACE_MODE_2500BASEX;
 616         port_4_is_2500 = priv->phy_mode[4] == PHY_INTERFACE_MODE_2500BASEX;
 617
 618         if (port_1_is_base_tx)
 619                 /* Retagging port will operate at 1 Gbps */
 620                 tdmaconfigidx = 5;
 621         else if (port_3_is_2500 && port_4_is_2500)
 622                 /* Retagging port will operate at 100 Mbps */
 623                 tdmaconfigidx = 1;
 624         else if (port_3_is_2500)
 625                 /* Retagging port will operate at 1 Gbps */
 626                 tdmaconfigidx = 3;
 627         else if (port_4_is_2500)
 628                 /* Retagging port will operate at 1 Gbps */
 629                 tdmaconfigidx = 2;
 630         else
 631                 /* Retagging port will operate at 1 Gbps */
 632                 tdmaconfigidx = 14;
 633
 634         general_params->tdmaconfigidx = tdmaconfigidx;
 635 }
 636
 637 static int sja1105_init_general_params(struct sja1105_private *priv)
 638 {
 639         struct sja1105_general_params_entry default_general_params = {
 640                 /* Allow dynamic changing of the mirror port */
 641                 .mirr_ptacu = true,
 642                 .switchid = priv->ds->index,
 643                 /* Priority queue for link-local management frames
 644                  * (both ingress to and egress from CPU - PTP, STP etc)
 645                  */
 646                 .hostprio = 7,
 647                 .mac_fltres1 = SJA1105_LINKLOCAL_FILTER_A,
 648                 .mac_flt1    = SJA1105_LINKLOCAL_FILTER_A_MASK,
 649                 .incl_srcpt1 = false,
 650                 .send_meta1  = false,
 651                 .mac_fltres0 = SJA1105_LINKLOCAL_FILTER_B,
 652                 .mac_flt0    = SJA1105_LINKLOCAL_FILTER_B_MASK,
 653                 .incl_srcpt0 = false,
 654                 .send_meta0  = false,
 655                 /* The destination for traffic matching mac_fltres1 and
 656                  * mac_fltres0 on all ports except host_port. Such traffic
 657                  * receieved on host_port itself would be dropped, except
 658                  * by installing a temporary 'management route'
 659                  */
 660                 .host_port = priv->ds->num_ports,
 661                 /* Default to an invalid value */
 662                 .mirr_port = priv->ds->num_ports,
 663                 /* No TTEthernet */
 664                 .vllupformat = SJA1105_VL_FORMAT_PSFP,
 665                 .vlmarker = 0,
 666                 .vlmask = 0,
 667                 /* Only update correctionField for 1-step PTP (L2 transport) */
 668                 .ignore2stf = 0,
 669                 /* Forcefully disable VLAN filtering by telling
 670                  * the switch that VLAN has a different EtherType.
 671                  */
 672                 .tpid = ETH_P_SJA1105,
 673                 .tpid2 = ETH_P_SJA1105,
 674                 /* Enable the TTEthernet engine on SJA1110 */
 675                 .tte_en = true,
 676                 /* Set up the EtherType for control packets on SJA1110 */
 677                 .header_type = ETH_P_SJA1110,
 678         };
 679         struct sja1105_general_params_entry *general_params;
 680         struct dsa_switch *ds = priv->ds;
 681         struct sja1105_table *table;
 682         int port;
 683
 684         for (port = 0; port < ds->num_ports; port++) {
 685                 if (dsa_is_cpu_port(ds, port)) {
 686                         default_general_params.host_port = port;
 687                         break;
 688                 }
 689         }
 690
 691         table = &priv->static_config.tables[BLK_IDX_GENERAL_PARAMS];
 692
 693         if (table->entry_count) {
 694                 kfree(table->entries);
 695                 table->entry_count = 0;
 696         }
 697
 698         table->entries = kcalloc(table->ops->max_entry_count,
 699                                  table->ops->unpacked_entry_size, GFP_KERNEL);
 700         if (!table->entries)
 701                 return -ENOMEM;
 702
 703         table->entry_count = table->ops->max_entry_count;
 704
 705         general_params = table->entries;
 706
 707         /* This table only has a single entry */
 708         general_params[0] = default_general_params;
 709
 710         sja1110_select_tdmaconfigidx(priv);
 711
 712         /* Link-local traffic received on casc_port will be forwarded
 713          * to host_port without embedding the source port and device ID
 714          * info in the destination MAC address, and no RX timestamps will be
 715          * taken either (presumably because it is a cascaded port and a
 716          * downstream SJA switch already did that).
 717          * To disable the feature, we need to do different things depending on
 718          * switch generation. On SJA1105 we need to set an invalid port, while
 719          * on SJA1110 which support multiple cascaded ports, this field is a
 720          * bitmask so it must be left zero.
 721          */
 722         if (!priv->info->multiple_cascade_ports)
 723                 general_params->casc_port = ds->num_ports;
 724
 725         return 0;
 726 }
 727
 728 static int sja1105_init_avb_params(struct sja1105_private *priv)
 729 {
 730         struct sja1105_avb_params_entry *avb;
 731         struct sja1105_table *table;
 732
 733         table = &priv->static_config.tables[BLK_IDX_AVB_PARAMS];
 734
 735         /* Discard previous AVB Parameters Table */
 736         if (table->entry_count) {
 737                 kfree(table->entries);
 738                 table->entry_count = 0;
 739         }
 740
 741         table->entries = kcalloc(table->ops->max_entry_count,
 742                                  table->ops->unpacked_entry_size, GFP_KERNEL);
 743         if (!table->entries)
 744                 return -ENOMEM;
 745
 746         table->entry_count = table->ops->max_entry_count;
 747
 748         avb = table->entries;
 749
 750         /* Configure the MAC addresses for meta frames */
 751         avb->destmeta = SJA1105_META_DMAC;
 752         avb->srcmeta  = SJA1105_META_SMAC;
 753         /* On P/Q/R/S, configure the direction of the PTP_CLK pin as input by
 754          * default. This is because there might be boards with a hardware
 755          * layout where enabling the pin as output might cause an electrical
 756          * clash. On E/T the pin is always an output, which the board designers
 757          * probably already knew, so even if there are going to be electrical
 758          * issues, there's nothing we can do.
 759          */
 760         avb->cas_master = false;
 761
 762         return 0;
 763 }
 764
 765 /* The L2 policing table is 2-stage. The table is looked up for each frame
 766  * according to the ingress port, whether it was broadcast or not, and the
 767  * classified traffic class (given by VLAN PCP). This portion of the lookup is
 768  * fixed, and gives access to the SHARINDX, an indirection register pointing
 769  * within the policing table itself, which is used to resolve the policer that
 770  * will be used for this frame.
 771  *
 772  *  Stage 1                              Stage 2
 773  * +------------+--------+              +---------------------------------+
 774  * |Port 0 TC 0 |SHARINDX|              | Policer 0: Rate, Burst, MTU     |
 775  * +------------+--------+              +---------------------------------+
 776  * |Port 0 TC 1 |SHARINDX|              | Policer 1: Rate, Burst, MTU     |
 777  * +------------+--------+              +---------------------------------+
 778  *    ...                               | Policer 2: Rate, Burst, MTU     |
 779  * +------------+--------+              +---------------------------------+
 780  * |Port 0 TC 7 |SHARINDX|              | Policer 3: Rate, Burst, MTU     |
 781  * +------------+--------+              +---------------------------------+
 782  * |Port 1 TC 0 |SHARINDX|              | Policer 4: Rate, Burst, MTU     |
 783  * +------------+--------+              +---------------------------------+
 784  *    ...                               | Policer 5: Rate, Burst, MTU     |
 785  * +------------+--------+              +---------------------------------+
 786  * |Port 1 TC 7 |SHARINDX|              | Policer 6: Rate, Burst, MTU     |
 787  * +------------+--------+              +---------------------------------+
 788  *    ...                               | Policer 7: Rate, Burst, MTU     |
 789  * +------------+--------+              +---------------------------------+
 790  * |Port 4 TC 7 |SHARINDX|                 ...
 791  * +------------+--------+
 792  * |Port 0 BCAST|SHARINDX|                 ...
 793  * +------------+--------+
 794  * |Port 1 BCAST|SHARINDX|                 ...
 795  * +------------+--------+
 796  *    ...                                  ...
 797  * +------------+--------+              +---------------------------------+
 798  * |Port 4 BCAST|SHARINDX|              | Policer 44: Rate, Burst, MTU    |
 799  * +------------+--------+              +---------------------------------+
 800  *
 801  * In this driver, we shall use policers 0-4 as statically alocated port
 802  * (matchall) policers. So we need to make the SHARINDX for all lookups
 803  * corresponding to this ingress port (8 VLAN PCP lookups and 1 broadcast
 804  * lookup) equal.
 805  * The remaining policers (40) shall be dynamically allocated for flower
 806  * policers, where the key is either vlan_prio or dst_mac ff:ff:ff:ff:ff:ff.
 807  */
 808 #define SJA1105_RATE_MBPS(speed) (((speed) * 64000) / 1000)
 809
 810 static int sja1105_init_l2_policing(struct sja1105_private *priv)
 811 {
 812         struct sja1105_l2_policing_entry *policing;
 813         struct dsa_switch *ds = priv->ds;
 814         struct sja1105_table *table;
 815         int port, tc;
 816
 817         table = &priv->static_config.tables[BLK_IDX_L2_POLICING];
 818
 819         /* Discard previous L2 Policing Table */
 820         if (table->entry_count) {
 821                 kfree(table->entries);
 822                 table->entry_count = 0;
 823         }
 824
 825         table->entries = kcalloc(table->ops->max_entry_count,
 826                                  table->ops->unpacked_entry_size, GFP_KERNEL);
 827         if (!table->entries)
 828                 return -ENOMEM;
 829
 830         table->entry_count = table->ops->max_entry_count;
 831
 832         policing = table->entries;
 833
 834         /* Setup shared indices for the matchall policers */
 835         for (port = 0; port < ds->num_ports; port++) {
 836                 int mcast = (ds->num_ports * (SJA1105_NUM_TC + 1)) + port;
 837                 int bcast = (ds->num_ports * SJA1105_NUM_TC) + port;
 838
 839                 for (tc = 0; tc < SJA1105_NUM_TC; tc++)
 840                         policing[port * SJA1105_NUM_TC + tc].sharindx = port;
 841
 842                 policing[bcast].sharindx = port;
 843                 /* Only SJA1110 has multicast policers */
 844                 if (mcast <= table->ops->max_entry_count)
 845                         policing[mcast].sharindx = port;
 846         }
 847
 848         /* Setup the matchall policer parameters */
 849         for (port = 0; port < ds->num_ports; port++) {
 850                 int mtu = VLAN_ETH_FRAME_LEN + ETH_FCS_LEN;
 851
 852                 if (dsa_is_cpu_port(priv->ds, port))
 853                         mtu += VLAN_HLEN;
 854
 855                 policing[port].smax = 65535; /* Burst size in bytes */
 856                 policing[port].rate = SJA1105_RATE_MBPS(1000);
 857                 policing[port].maxlen = mtu;
 858                 policing[port].partition = 0;
 859         }
 860
 861         return 0;
 862 }
 863
 864 static int sja1105_static_config_load(struct sja1105_private *priv)
 865 {
 866         int rc;
 867
 868         sja1105_static_config_free(&priv->static_config);
 869         rc = sja1105_static_config_init(&priv->static_config,
 870                                         priv->info->static_ops,
 871                                         priv->info->device_id);
 872         if (rc)
 873                 return rc;
 874
 875         /* Build static configuration */
 876         rc = sja1105_init_mac_settings(priv);
 877         if (rc < 0)
 878                 return rc;
 879         rc = sja1105_init_mii_settings(priv);
 880         if (rc < 0)
 881                 return rc;
 882         rc = sja1105_init_static_fdb(priv);
 883         if (rc < 0)
 884                 return rc;
 885         rc = sja1105_init_static_vlan(priv);
 886         if (rc < 0)
 887                 return rc;
 888         rc = sja1105_init_l2_lookup_params(priv);
 889         if (rc < 0)
 890                 return rc;
 891         rc = sja1105_init_l2_forwarding(priv);
 892         if (rc < 0)
 893                 return rc;
 894         rc = sja1105_init_l2_forwarding_params(priv);
 895         if (rc < 0)
 896                 return rc;
 897         rc = sja1105_init_l2_policing(priv);
 898         if (rc < 0)
 899                 return rc;
 900         rc = sja1105_init_general_params(priv);
 901         if (rc < 0)
 902                 return rc;
 903         rc = sja1105_init_avb_params(priv);
 904         if (rc < 0)
 905                 return rc;
 906         rc = sja1110_init_pcp_remapping(priv);
 907         if (rc < 0)
 908                 return rc;
 909
 910         /* Send initial configuration to hardware via SPI */
 911         return sja1105_static_config_upload(priv);
 912 }
 913
 914 static int sja1105_parse_rgmii_delays(struct sja1105_private *priv)
 915 {
 916         struct dsa_switch *ds = priv->ds;
 917         int port;
 918
 919         for (port = 0; port < ds->num_ports; port++) {
 920                 if (!priv->fixed_link[port])
 921                         continue;
 922
 923                 if (priv->phy_mode[port] == PHY_INTERFACE_MODE_RGMII_RXID ||
 924                     priv->phy_mode[port] == PHY_INTERFACE_MODE_RGMII_ID)
 925                         priv->rgmii_rx_delay[port] = true;
 926
 927                 if (priv->phy_mode[port] == PHY_INTERFACE_MODE_RGMII_TXID ||
 928                     priv->phy_mode[port] == PHY_INTERFACE_MODE_RGMII_ID)
 929                         priv->rgmii_tx_delay[port] = true;
 930
 931                 if ((priv->rgmii_rx_delay[port] || priv->rgmii_tx_delay[port]) &&
 932                     !priv->info->setup_rgmii_delay)
 933                         return -EINVAL;
 934         }
 935         return 0;
 936 }
 937
 938 static int sja1105_parse_ports_node(struct sja1105_private *priv,
 939                                     struct device_node *ports_node)
 940 {
 941         struct device *dev = &priv->spidev->dev;
 942         struct device_node *child;
 943
 944         for_each_available_child_of_node(ports_node, child) {
 945                 struct device_node *phy_node;
 946                 phy_interface_t phy_mode;
 947                 u32 index;
 948                 int err;
 949
 950                 /* Get switch port number from DT */
 951                 if (of_property_read_u32(child, "reg", &index) < 0) {
 952                         dev_err(dev, "Port number not defined in device tree "
 953                                 "(property \"reg\")\n");
 954                         of_node_put(child);
 955                         return -ENODEV;
 956                 }
 957
 958                 /* Get PHY mode from DT */
 959                 err = of_get_phy_mode(child, &phy_mode);
 960                 if (err) {
 961                         dev_err(dev, "Failed to read phy-mode or "
 962                                 "phy-interface-type property for port %d\n",
 963                                 index);
 964                         of_node_put(child);
 965                         return -ENODEV;
 966                 }
 967
 968                 phy_node = of_parse_phandle(child, "phy-handle", 0);
 969                 if (!phy_node) {
 970                         if (!of_phy_is_fixed_link(child)) {
 971                                 dev_err(dev, "phy-handle or fixed-link "
 972                                         "properties missing!\n");
 973                                 of_node_put(child);
 974                                 return -ENODEV;
 975                         }
 976                         /* phy-handle is missing, but fixed-link isn't.
 977                          * So it's a fixed link. Default to PHY role.
 978                          */
 979                         priv->fixed_link[index] = true;
 980                 } else {
 981                         of_node_put(phy_node);
 982                 }
 983
 984                 priv->phy_mode[index] = phy_mode;
 985         }
 986
 987         return 0;
 988 }
 989
 990 static int sja1105_parse_dt(struct sja1105_private *priv)
 991 {
 992         struct device *dev = &priv->spidev->dev;
 993         struct device_node *switch_node = dev->of_node;
 994         struct device_node *ports_node;
 995         int rc;
 996
 997         ports_node = of_get_child_by_name(switch_node, "ports");
 998         if (!ports_node)
 999                 ports_node = of_get_child_by_name(switch_node, "ethernet-ports");
1000         if (!ports_node) {
1001                 dev_err(dev, "Incorrect bindings: absent \"ports\" node\n");
1002                 return -ENODEV;
1003         }
1004
1005         rc = sja1105_parse_ports_node(priv, ports_node);
1006         of_node_put(ports_node);
1007
1008         return rc;
1009 }
1010
1011 /* Convert link speed from SJA1105 to ethtool encoding */
1012 static int sja1105_port_speed_to_ethtool(struct sja1105_private *priv,
1013                                          u64 speed)
1014 {
1015         if (speed == priv->info->port_speed[SJA1105_SPEED_10MBPS])
1016                 return SPEED_10;
1017         if (speed == priv->info->port_speed[SJA1105_SPEED_100MBPS])
1018                 return SPEED_100;
1019         if (speed == priv->info->port_speed[SJA1105_SPEED_1000MBPS])
1020                 return SPEED_1000;
1021         if (speed == priv->info->port_speed[SJA1105_SPEED_2500MBPS])
1022                 return SPEED_2500;
1023         return SPEED_UNKNOWN;
1024 }
1025
1026 /* Set link speed in the MAC configuration for a specific port. */
1027 static int sja1105_adjust_port_config(struct sja1105_private *priv, int port,
1028                                       int speed_mbps)
1029 {
1030         struct sja1105_mac_config_entry *mac;
1031         struct device *dev = priv->ds->dev;
1032         u64 speed;
1033         int rc;
1034
1035         /* On P/Q/R/S, one can read from the device via the MAC reconfiguration
1036          * tables. On E/T, MAC reconfig tables are not readable, only writable.
1037          * We have to *know* what the MAC looks like.  For the sake of keeping
1038          * the code common, we'll use the static configuration tables as a
1039          * reasonable approximation for both E/T and P/Q/R/S.
1040          */
1041         mac = priv->static_config.tables[BLK_IDX_MAC_CONFIG].entries;
1042
1043         switch (speed_mbps) {
1044         case SPEED_UNKNOWN:
1045                 /* PHYLINK called sja1105_mac_config() to inform us about
1046                  * the state->interface, but AN has not completed and the
1047                  * speed is not yet valid. UM10944.pdf says that setting
1048                  * SJA1105_SPEED_AUTO at runtime disables the port, so that is
1049                  * ok for power consumption in case AN will never complete -
1050                  * otherwise PHYLINK should come back with a new update.
1051                  */
1052                 speed = priv->info->port_speed[SJA1105_SPEED_AUTO];
1053                 break;
1054         case SPEED_10:
1055                 speed = priv->info->port_speed[SJA1105_SPEED_10MBPS];
1056                 break;
1057         case SPEED_100:
1058                 speed = priv->info->port_speed[SJA1105_SPEED_100MBPS];
1059                 break;
1060         case SPEED_1000:
1061                 speed = priv->info->port_speed[SJA1105_SPEED_1000MBPS];
1062                 break;
1063         case SPEED_2500:
1064                 speed = priv->info->port_speed[SJA1105_SPEED_2500MBPS];
1065                 break;
1066         default:
1067                 dev_err(dev, "Invalid speed %iMbps\n", speed_mbps);
1068                 return -EINVAL;
1069         }
1070
1071         /* Overwrite SJA1105_SPEED_AUTO from the static MAC configuration
1072          * table, since this will be used for the clocking setup, and we no
1073          * longer need to store it in the static config (already told hardware
1074          * we want auto during upload phase).
1075          * Actually for the SGMII port, the MAC is fixed at 1 Gbps and
1076          * we need to configure the PCS only (if even that).
1077          */
1078         if (priv->phy_mode[port] == PHY_INTERFACE_MODE_SGMII)
1079                 mac[port].speed = priv->info->port_speed[SJA1105_SPEED_1000MBPS];
1080         else if (priv->phy_mode[port] == PHY_INTERFACE_MODE_2500BASEX)
1081                 mac[port].speed = priv->info->port_speed[SJA1105_SPEED_2500MBPS];
1082         else
1083                 mac[port].speed = speed;
1084
1085         /* Write to the dynamic reconfiguration tables */
1086         rc = sja1105_dynamic_config_write(priv, BLK_IDX_MAC_CONFIG, port,
1087                                           &mac[port], true);
1088         if (rc < 0) {
1089                 dev_err(dev, "Failed to write MAC config: %d\n", rc);
1090                 return rc;
1091         }
1092
1093         /* Reconfigure the PLLs for the RGMII interfaces (required 125 MHz at
1094          * gigabit, 25 MHz at 100 Mbps and 2.5 MHz at 10 Mbps). For MII and
1095          * RMII no change of the clock setup is required. Actually, changing
1096          * the clock setup does interrupt the clock signal for a certain time
1097          * which causes trouble for all PHYs relying on this signal.
1098          */
1099         if (!phy_interface_mode_is_rgmii(priv->phy_mode[port]))
1100                 return 0;
1101
1102         return sja1105_clocking_setup_port(priv, port);
1103 }
1104
1105 /* The SJA1105 MAC programming model is through the static config (the xMII
1106  * Mode table cannot be dynamically reconfigured), and we have to program
1107  * that early (earlier than PHYLINK calls us, anyway).
1108  * So just error out in case the connected PHY attempts to change the initial
1109  * system interface MII protocol from what is defined in the DT, at least for
1110  * now.
1111  */
1112 static bool sja1105_phy_mode_mismatch(struct sja1105_private *priv, int port,
1113                                       phy_interface_t interface)
1114 {
1115         return priv->phy_mode[port] != interface;
1116 }
1117
1118 static void sja1105_mac_config(struct dsa_switch *ds, int port,
1119                                unsigned int mode,
1120                                const struct phylink_link_state *state)
1121 {
1122         struct dsa_port *dp = dsa_to_port(ds, port);
1123         struct sja1105_private *priv = ds->priv;
1124         struct dw_xpcs *xpcs;
1125
1126         if (sja1105_phy_mode_mismatch(priv, port, state->interface)) {
1127                 dev_err(ds->dev, "Changing PHY mode to %s not supported!\n",
1128                         phy_modes(state->interface));
1129                 return;
1130         }
1131
1132         xpcs = priv->xpcs[port];
1133
1134         if (xpcs)
1135                 phylink_set_pcs(dp->pl, &xpcs->pcs);
1136 }
1137
1138 static void sja1105_mac_link_down(struct dsa_switch *ds, int port,
1139                                   unsigned int mode,
1140                                   phy_interface_t interface)
1141 {
1142         sja1105_inhibit_tx(ds->priv, BIT(port), true);
1143 }
1144
1145 static void sja1105_mac_link_up(struct dsa_switch *ds, int port,
1146                                 unsigned int mode,
1147                                 phy_interface_t interface,
1148                                 struct phy_device *phydev,
1149                                 int speed, int duplex,
1150                                 bool tx_pause, bool rx_pause)
1151 {
1152         struct sja1105_private *priv = ds->priv;
1153
1154         sja1105_adjust_port_config(priv, port, speed);
1155
1156         sja1105_inhibit_tx(priv, BIT(port), false);
1157 }
1158
1159 static void sja1105_phylink_validate(struct dsa_switch *ds, int port,
1160                                      unsigned long *supported,
1161                                      struct phylink_link_state *state)
1162 {
1163         /* Construct a new mask which exhaustively contains all link features
1164          * supported by the MAC, and then apply that (logical AND) to what will
1165          * be sent to the PHY for "marketing".
1166          */
1167         __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
1168         struct sja1105_private *priv = ds->priv;
1169         struct sja1105_xmii_params_entry *mii;
1170
1171         mii = priv->static_config.tables[BLK_IDX_XMII_PARAMS].entries;
1172
1173         /* include/linux/phylink.h says:
1174          *     When @state->interface is %PHY_INTERFACE_MODE_NA, phylink
1175          *     expects the MAC driver to return all supported link modes.
1176          */
1177         if (state->interface != PHY_INTERFACE_MODE_NA &&
1178             sja1105_phy_mode_mismatch(priv, port, state->interface)) {
1179                 bitmap_zero(supported, __ETHTOOL_LINK_MODE_MASK_NBITS);
1180                 return;
1181         }
1182
1183         /* The MAC does not support pause frames, and also doesn't
1184          * support half-duplex traffic modes.
1185          */
1186         phylink_set(mask, Autoneg);
1187         phylink_set(mask, MII);
1188         phylink_set(mask, 10baseT_Full);
1189         phylink_set(mask, 100baseT_Full);
1190         phylink_set(mask, 100baseT1_Full);
1191         if (mii->xmii_mode[port] == XMII_MODE_RGMII ||
1192             mii->xmii_mode[port] == XMII_MODE_SGMII)
1193                 phylink_set(mask, 1000baseT_Full);
1194         if (priv->info->supports_2500basex[port]) {
1195                 phylink_set(mask, 2500baseT_Full);
1196                 phylink_set(mask, 2500baseX_Full);
1197         }
1198
1199         bitmap_and(supported, supported, mask, __ETHTOOL_LINK_MODE_MASK_NBITS);
1200         bitmap_and(state->advertising, state->advertising, mask,
1201                    __ETHTOOL_LINK_MODE_MASK_NBITS);
1202 }
1203
1204 static int
1205 sja1105_find_static_fdb_entry(struct sja1105_private *priv, int port,
1206                               const struct sja1105_l2_lookup_entry *requested)
1207 {
1208         struct sja1105_l2_lookup_entry *l2_lookup;
1209         struct sja1105_table *table;
1210         int i;
1211
1212         table = &priv->static_config.tables[BLK_IDX_L2_LOOKUP];
1213         l2_lookup = table->entries;
1214
1215         for (i = 0; i < table->entry_count; i++)
1216                 if (l2_lookup[i].macaddr == requested->macaddr &&
1217                     l2_lookup[i].vlanid == requested->vlanid &&
1218                     l2_lookup[i].destports & BIT(port))
1219                         return i;
1220
1221         return -1;
1222 }
1223
1224 /* We want FDB entries added statically through the bridge command to persist
1225  * across switch resets, which are a common thing during normal SJA1105
1226  * operation. So we have to back them up in the static configuration tables
1227  * and hence apply them on next static config upload... yay!
1228  */
1229 static int
1230 sja1105_static_fdb_change(struct sja1105_private *priv, int port,
1231                           const struct sja1105_l2_lookup_entry *requested,
1232                           bool keep)
1233 {
1234         struct sja1105_l2_lookup_entry *l2_lookup;
1235         struct sja1105_table *table;
1236         int rc, match;
1237
1238         table = &priv->static_config.tables[BLK_IDX_L2_LOOKUP];
1239
1240         match = sja1105_find_static_fdb_entry(priv, port, requested);
1241         if (match < 0) {
1242                 /* Can't delete a missing entry. */
1243                 if (!keep)
1244                         return 0;
1245
1246                 /* No match => new entry */
1247                 rc = sja1105_table_resize(table, table->entry_count + 1);
1248                 if (rc)
1249                         return rc;
1250
1251                 match = table->entry_count - 1;
1252         }
1253
1254         /* Assign pointer after the resize (it may be new memory) */
1255         l2_lookup = table->entries;
1256
1257         /* We have a match.
1258          * If the job was to add this FDB entry, it's already done (mostly
1259          * anyway, since the port forwarding mask may have changed, case in
1260          * which we update it).
1261          * Otherwise we have to delete it.
1262          */
1263         if (keep) {
1264                 l2_lookup[match] = *requested;
1265                 return 0;
1266         }
1267
1268         /* To remove, the strategy is to overwrite the element with
1269          * the last one, and then reduce the array size by 1
1270          */
1271         l2_lookup[match] = l2_lookup[table->entry_count - 1];
1272         return sja1105_table_resize(table, table->entry_count - 1);
1273 }
1274
1275 /* First-generation switches have a 4-way set associative TCAM that
1276  * holds the FDB entries. An FDB index spans from 0 to 1023 and is comprised of
1277  * a "bin" (grouping of 4 entries) and a "way" (an entry within a bin).
1278  * For the placement of a newly learnt FDB entry, the switch selects the bin
1279  * based on a hash function, and the way within that bin incrementally.
1280  */
1281 static int sja1105et_fdb_index(int bin, int way)
1282 {
1283         return bin * SJA1105ET_FDB_BIN_SIZE + way;
1284 }
1285
1286 static int sja1105et_is_fdb_entry_in_bin(struct sja1105_private *priv, int bin,
1287                                          const u8 *addr, u16 vid,
1288                                          struct sja1105_l2_lookup_entry *match,
1289                                          int *last_unused)
1290 {
1291         int way;
1292
1293         for (way = 0; way < SJA1105ET_FDB_BIN_SIZE; way++) {
1294                 struct sja1105_l2_lookup_entry l2_lookup = {0};
1295                 int index = sja1105et_fdb_index(bin, way);
1296
1297                 /* Skip unused entries, optionally marking them
1298                  * into the return value
1299                  */
1300                 if (sja1105_dynamic_config_read(priv, BLK_IDX_L2_LOOKUP,
1301                                                 index, &l2_lookup)) {
1302                         if (last_unused)
1303                                 *last_unused = way;
1304                         continue;
1305                 }
1306
1307                 if (l2_lookup.macaddr == ether_addr_to_u64(addr) &&
1308                     l2_lookup.vlanid == vid) {
1309                         if (match)
1310                                 *match = l2_lookup;
1311                         return way;
1312                 }
1313         }
1314         /* Return an invalid entry index if not found */
1315         return -1;
1316 }
1317
1318 int sja1105et_fdb_add(struct dsa_switch *ds, int port,
1319                       const unsigned char *addr, u16 vid)
1320 {
1321         struct sja1105_l2_lookup_entry l2_lookup = {0};
1322         struct sja1105_private *priv = ds->priv;
1323         struct device *dev = ds->dev;
1324         int last_unused = -1;
1325         int bin, way, rc;
1326
1327         bin = sja1105et_fdb_hash(priv, addr, vid);
1328
1329         way = sja1105et_is_fdb_entry_in_bin(priv, bin, addr, vid,
1330                                             &l2_lookup, &last_unused);
1331         if (way >= 0) {
1332                 /* We have an FDB entry. Is our port in the destination
1333                  * mask? If yes, we need to do nothing. If not, we need
1334                  * to rewrite the entry by adding this port to it.
1335                  */
1336                 if ((l2_lookup.destports & BIT(port)) && l2_lookup.lockeds)
1337                         return 0;
1338                 l2_lookup.destports |= BIT(port);
1339         } else {
1340                 int index = sja1105et_fdb_index(bin, way);
1341
1342                 /* We don't have an FDB entry. We construct a new one and
1343                  * try to find a place for it within the FDB table.
1344                  */
1345                 l2_lookup.macaddr = ether_addr_to_u64(addr);
1346                 l2_lookup.destports = BIT(port);
1347                 l2_lookup.vlanid = vid;
1348
1349                 if (last_unused >= 0) {
1350                         way = last_unused;
1351                 } else {
1352                         /* Bin is full, need to evict somebody.
1353                          * Choose victim at random. If you get these messages
1354                          * often, you may need to consider changing the
1355                          * distribution function:
1356                          * static_config[BLK_IDX_L2_LOOKUP_PARAMS].entries->poly
1357                          */
1358                         get_random_bytes(&way, sizeof(u8));
1359                         way %= SJA1105ET_FDB_BIN_SIZE;
1360                         dev_warn(dev, "Warning, FDB bin %d full while adding entry for %pM. Evicting entry %u.\n",
1361                                  bin, addr, way);
1362                         /* Evict entry */
1363                         sja1105_dynamic_config_write(priv, BLK_IDX_L2_LOOKUP,
1364                                                      index, NULL, false);
1365                 }
1366         }
1367         l2_lookup.lockeds = true;
1368         l2_lookup.index = sja1105et_fdb_index(bin, way);
1369
1370         rc = sja1105_dynamic_config_write(priv, BLK_IDX_L2_LOOKUP,
1371                                           l2_lookup.index, &l2_lookup,
1372                                           true);
1373         if (rc < 0)
1374                 return rc;
1375
1376         return sja1105_static_fdb_change(priv, port, &l2_lookup, true);
1377 }
1378
1379 int sja1105et_fdb_del(struct dsa_switch *ds, int port,
1380                       const unsigned char *addr, u16 vid)
1381 {
1382         struct sja1105_l2_lookup_entry l2_lookup = {0};
1383         struct sja1105_private *priv = ds->priv;
1384         int index, bin, way, rc;
1385         bool keep;
1386
1387         bin = sja1105et_fdb_hash(priv, addr, vid);
1388         way = sja1105et_is_fdb_entry_in_bin(priv, bin, addr, vid,
1389                                             &l2_lookup, NULL);
1390         if (way < 0)
1391                 return 0;
1392         index = sja1105et_fdb_index(bin, way);
1393
1394         /* We have an FDB entry. Is our port in the destination mask? If yes,
1395          * we need to remove it. If the resulting port mask becomes empty, we
1396          * need to completely evict the FDB entry.
1397          * Otherwise we just write it back.
1398          */
1399         l2_lookup.destports &= ~BIT(port);
1400
1401         if (l2_lookup.destports)
1402                 keep = true;
1403         else
1404                 keep = false;
1405
1406         rc = sja1105_dynamic_config_write(priv, BLK_IDX_L2_LOOKUP,
1407                                           index, &l2_lookup, keep);
1408         if (rc < 0)
1409                 return rc;
1410
1411         return sja1105_static_fdb_change(priv, port, &l2_lookup, keep);
1412 }
1413
1414 int sja1105pqrs_fdb_add(struct dsa_switch *ds, int port,
1415                         const unsigned char *addr, u16 vid)
1416 {
1417         struct sja1105_l2_lookup_entry l2_lookup = {0};
1418         struct sja1105_private *priv = ds->priv;
1419         int rc, i;
1420
1421         /* Search for an existing entry in the FDB table */
1422         l2_lookup.macaddr = ether_addr_to_u64(addr);
1423         l2_lookup.vlanid = vid;
1424         l2_lookup.iotag = SJA1105_S_TAG;
1425         l2_lookup.mask_macaddr = GENMASK_ULL(ETH_ALEN * 8 - 1, 0);
1426         if (priv->vlan_state != SJA1105_VLAN_UNAWARE) {
1427                 l2_lookup.mask_vlanid = VLAN_VID_MASK;
1428                 l2_lookup.mask_iotag = BIT(0);
1429         } else {
1430                 l2_lookup.mask_vlanid = 0;
1431                 l2_lookup.mask_iotag = 0;
1432         }
1433         l2_lookup.destports = BIT(port);
1434
1435         rc = sja1105_dynamic_config_read(priv, BLK_IDX_L2_LOOKUP,
1436                                          SJA1105_SEARCH, &l2_lookup);
1437         if (rc == 0) {
1438                 /* Found a static entry and this port is already in the entry's
1439                  * port mask => job done
1440                  */
1441                 if ((l2_lookup.destports & BIT(port)) && l2_lookup.lockeds)
1442                         return 0;
1443                 /* l2_lookup.index is populated by the switch in case it
1444                  * found something.
1445                  */
1446                 l2_lookup.destports |= BIT(port);
1447                 goto skip_finding_an_index;
1448         }
1449
1450         /* Not found, so try to find an unused spot in the FDB.
1451          * This is slightly inefficient because the strategy is knock-knock at
1452          * every possible position from 0 to 1023.
1453          */
1454         for (i = 0; i < SJA1105_MAX_L2_LOOKUP_COUNT; i++) {
1455                 rc = sja1105_dynamic_config_read(priv, BLK_IDX_L2_LOOKUP,
1456                                                  i, NULL);
1457                 if (rc < 0)
1458                         break;
1459         }
1460         if (i == SJA1105_MAX_L2_LOOKUP_COUNT) {
1461                 dev_err(ds->dev, "FDB is full, cannot add entry.\n");
1462                 return -EINVAL;
1463         }
1464         l2_lookup.index = i;
1465
1466 skip_finding_an_index:
1467         l2_lookup.lockeds = true;
1468
1469         rc = sja1105_dynamic_config_write(priv, BLK_IDX_L2_LOOKUP,
1470                                           l2_lookup.index, &l2_lookup,
1471                                           true);
1472         if (rc < 0)
1473                 return rc;
1474
1475         return sja1105_static_fdb_change(priv, port, &l2_lookup, true);
1476 }
1477
1478 int sja1105pqrs_fdb_del(struct dsa_switch *ds, int port,
1479                         const unsigned char *addr, u16 vid)
1480 {
1481         struct sja1105_l2_lookup_entry l2_lookup = {0};
1482         struct sja1105_private *priv = ds->priv;
1483         bool keep;
1484         int rc;
1485
1486         l2_lookup.macaddr = ether_addr_to_u64(addr);
1487         l2_lookup.vlanid = vid;
1488         l2_lookup.iotag = SJA1105_S_TAG;
1489         l2_lookup.mask_macaddr = GENMASK_ULL(ETH_ALEN * 8 - 1, 0);
1490         if (priv->vlan_state != SJA1105_VLAN_UNAWARE) {
1491                 l2_lookup.mask_vlanid = VLAN_VID_MASK;
1492                 l2_lookup.mask_iotag = BIT(0);
1493         } else {
1494                 l2_lookup.mask_vlanid = 0;
1495                 l2_lookup.mask_iotag = 0;
1496         }
1497         l2_lookup.destports = BIT(port);
1498
1499         rc = sja1105_dynamic_config_read(priv, BLK_IDX_L2_LOOKUP,
1500                                          SJA1105_SEARCH, &l2_lookup);
1501         if (rc < 0)
1502                 return 0;
1503
1504         l2_lookup.destports &= ~BIT(port);
1505
1506         /* Decide whether we remove just this port from the FDB entry,
1507          * or if we remove it completely.
1508          */
1509         if (l2_lookup.destports)
1510                 keep = true;
1511         else
1512                 keep = false;
1513
1514         rc = sja1105_dynamic_config_write(priv, BLK_IDX_L2_LOOKUP,
1515                                           l2_lookup.index, &l2_lookup, keep);
1516         if (rc < 0)
1517                 return rc;
1518
1519         return sja1105_static_fdb_change(priv, port, &l2_lookup, keep);
1520 }
1521
1522 static int sja1105_fdb_add(struct dsa_switch *ds, int port,
1523                            const unsigned char *addr, u16 vid)
1524 {
1525         struct sja1105_private *priv = ds->priv;
1526
1527         /* dsa_8021q is in effect when the bridge's vlan_filtering isn't,
1528          * so the switch still does some VLAN processing internally.
1529          * But Shared VLAN Learning (SVL) is also active, and it will take
1530          * care of autonomous forwarding between the unique pvid's of each
1531          * port.  Here we just make sure that users can't add duplicate FDB
1532          * entries when in this mode - the actual VID doesn't matter except
1533          * for what gets printed in 'bridge fdb show'.  In the case of zero,
1534          * no VID gets printed at all.
1535          */
1536         if (priv->vlan_state != SJA1105_VLAN_FILTERING_FULL)
1537                 vid = 0;
1538
1539         return priv->info->fdb_add_cmd(ds, port, addr, vid);
1540 }
1541
1542 static int sja1105_fdb_del(struct dsa_switch *ds, int port,
1543                            const unsigned char *addr, u16 vid)
1544 {
1545         struct sja1105_private *priv = ds->priv;
1546
1547         if (priv->vlan_state != SJA1105_VLAN_FILTERING_FULL)
1548                 vid = 0;
1549
1550         return priv->info->fdb_del_cmd(ds, port, addr, vid);
1551 }
1552
1553 static int sja1105_fdb_dump(struct dsa_switch *ds, int port,
1554                             dsa_fdb_dump_cb_t *cb, void *data)
1555 {
1556         struct sja1105_private *priv = ds->priv;
1557         struct device *dev = ds->dev;
1558         int i;
1559
1560         for (i = 0; i < SJA1105_MAX_L2_LOOKUP_COUNT; i++) {
1561                 struct sja1105_l2_lookup_entry l2_lookup = {0};
1562                 u8 macaddr[ETH_ALEN];
1563                 int rc;
1564
1565                 rc = sja1105_dynamic_config_read(priv, BLK_IDX_L2_LOOKUP,
1566                                                  i, &l2_lookup);
1567                 /* No fdb entry at i, not an issue */
1568                 if (rc == -ENOENT)
1569                         continue;
1570                 if (rc) {
1571                         dev_err(dev, "Failed to dump FDB: %d\n", rc);
1572                         return rc;
1573                 }
1574
1575                 /* FDB dump callback is per port. This means we have to
1576                  * disregard a valid entry if it's not for this port, even if
1577                  * only to revisit it later. This is inefficient because the
1578                  * 1024-sized FDB table needs to be traversed 4 times through
1579                  * SPI during a 'bridge fdb show' command.
1580                  */
1581                 if (!(l2_lookup.destports & BIT(port)))
1582                         continue;
1583
1584                 /* We need to hide the FDB entry for unknown multicast */
1585                 if (l2_lookup.macaddr == SJA1105_UNKNOWN_MULTICAST &&
1586                     l2_lookup.mask_macaddr == SJA1105_UNKNOWN_MULTICAST)
1587                         continue;
1588
1589                 u64_to_ether_addr(l2_lookup.macaddr, macaddr);
1590
1591                 /* We need to hide the dsa_8021q VLANs from the user. */
1592                 if (priv->vlan_state == SJA1105_VLAN_UNAWARE)
1593                         l2_lookup.vlanid = 0;
1594                 cb(macaddr, l2_lookup.vlanid, l2_lookup.lockeds, data);
1595         }
1596         return 0;
1597 }
1598
1599 static int sja1105_mdb_add(struct dsa_switch *ds, int port,
1600                            const struct switchdev_obj_port_mdb *mdb)
1601 {
1602         return sja1105_fdb_add(ds, port, mdb->addr, mdb->vid);
1603 }
1604
1605 static int sja1105_mdb_del(struct dsa_switch *ds, int port,
1606                            const struct switchdev_obj_port_mdb *mdb)
1607 {
1608         return sja1105_fdb_del(ds, port, mdb->addr, mdb->vid);
1609 }
1610
1611 /* Common function for unicast and broadcast flood configuration.
1612  * Flooding is configured between each {ingress, egress} port pair, and since
1613  * the bridge's semantics are those of "egress flooding", it means we must
1614  * enable flooding towards this port from all ingress ports that are in the
1615  * same forwarding domain.
1616  */
1617 static int sja1105_manage_flood_domains(struct sja1105_private *priv)
1618 {
1619         struct sja1105_l2_forwarding_entry *l2_fwd;
1620         struct dsa_switch *ds = priv->ds;
1621         int from, to, rc;
1622
1623         l2_fwd = priv->static_config.tables[BLK_IDX_L2_FORWARDING].entries;
1624
1625         for (from = 0; from < ds->num_ports; from++) {
1626                 u64 fl_domain = 0, bc_domain = 0;
1627
1628                 for (to = 0; to < priv->ds->num_ports; to++) {
1629                         if (!sja1105_can_forward(l2_fwd, from, to))
1630                                 continue;
1631
1632                         if (priv->ucast_egress_floods & BIT(to))
1633                                 fl_domain |= BIT(to);
1634                         if (priv->bcast_egress_floods & BIT(to))
1635                                 bc_domain |= BIT(to);
1636                 }
1637
1638                 /* Nothing changed, nothing to do */
1639                 if (l2_fwd[from].fl_domain == fl_domain &&
1640                     l2_fwd[from].bc_domain == bc_domain)
1641                         continue;
1642
1643                 l2_fwd[from].fl_domain = fl_domain;
1644                 l2_fwd[from].bc_domain = bc_domain;
1645
1646                 rc = sja1105_dynamic_config_write(priv, BLK_IDX_L2_FORWARDING,
1647                                                   from, &l2_fwd[from], true);
1648                 if (rc < 0)
1649                         return rc;
1650         }
1651
1652         return 0;
1653 }
1654
1655 static int sja1105_bridge_member(struct dsa_switch *ds, int port,
1656                                  struct net_device *br, bool member)
1657 {
1658         struct sja1105_l2_forwarding_entry *l2_fwd;
1659         struct sja1105_private *priv = ds->priv;
1660         int i, rc;
1661
1662         l2_fwd = priv->static_config.tables[BLK_IDX_L2_FORWARDING].entries;
1663
1664         for (i = 0; i < ds->num_ports; i++) {
1665                 /* Add this port to the forwarding matrix of the
1666                  * other ports in the same bridge, and viceversa.
1667                  */
1668                 if (!dsa_is_user_port(ds, i))
1669                         continue;
1670                 /* For the ports already under the bridge, only one thing needs
1671                  * to be done, and that is to add this port to their
1672                  * reachability domain. So we can perform the SPI write for
1673                  * them immediately. However, for this port itself (the one
1674                  * that is new to the bridge), we need to add all other ports
1675                  * to its reachability domain. So we do that incrementally in
1676                  * this loop, and perform the SPI write only at the end, once
1677                  * the domain contains all other bridge ports.
1678                  */
1679                 if (i == port)
1680                         continue;
1681                 if (dsa_to_port(ds, i)->bridge_dev != br)
1682                         continue;
1683                 sja1105_port_allow_traffic(l2_fwd, i, port, member);
1684                 sja1105_port_allow_traffic(l2_fwd, port, i, member);
1685
1686                 rc = sja1105_dynamic_config_write(priv, BLK_IDX_L2_FORWARDING,
1687                                                   i, &l2_fwd[i], true);
1688                 if (rc < 0)
1689                         return rc;
1690         }
1691
1692         rc = sja1105_dynamic_config_write(priv, BLK_IDX_L2_FORWARDING,
1693                                           port, &l2_fwd[port], true);
1694         if (rc)
1695                 return rc;
1696
1697         return sja1105_manage_flood_domains(priv);
1698 }
1699
1700 static void sja1105_bridge_stp_state_set(struct dsa_switch *ds, int port,
1701                                          u8 state)
1702 {
1703         struct sja1105_private *priv = ds->priv;
1704         struct sja1105_mac_config_entry *mac;
1705
1706         mac = priv->static_config.tables[BLK_IDX_MAC_CONFIG].entries;
1707
1708         switch (state) {
1709         case BR_STATE_DISABLED:
1710         case BR_STATE_BLOCKING:
1711                 /* From UM10944 description of DRPDTAG (why put this there?):
1712                  * "Management traffic flows to the port regardless of the state
1713                  * of the INGRESS flag". So BPDUs are still be allowed to pass.
1714                  * At the moment no difference between DISABLED and BLOCKING.
1715                  */
1716                 mac[port].ingress   = false;
1717                 mac[port].egress    = false;
1718                 mac[port].dyn_learn = false;
1719                 break;
1720         case BR_STATE_LISTENING:
1721                 mac[port].ingress   = true;
1722                 mac[port].egress    = false;
1723                 mac[port].dyn_learn = false;
1724                 break;
1725         case BR_STATE_LEARNING:
1726                 mac[port].ingress   = true;
1727                 mac[port].egress    = false;
1728                 mac[port].dyn_learn = !!(priv->learn_ena & BIT(port));
1729                 break;
1730         case BR_STATE_FORWARDING:
1731                 mac[port].ingress   = true;
1732                 mac[port].egress    = true;
1733                 mac[port].dyn_learn = !!(priv->learn_ena & BIT(port));
1734                 break;
1735         default:
1736                 dev_err(ds->dev, "invalid STP state: %d\n", state);
1737                 return;
1738         }
1739
1740         sja1105_dynamic_config_write(priv, BLK_IDX_MAC_CONFIG, port,
1741                                      &mac[port], true);
1742 }
1743
1744 static int sja1105_bridge_join(struct dsa_switch *ds, int port,
1745                                struct net_device *br)
1746 {
1747         return sja1105_bridge_member(ds, port, br, true);
1748 }
1749
1750 static void sja1105_bridge_leave(struct dsa_switch *ds, int port,
1751                                  struct net_device *br)
1752 {
1753         sja1105_bridge_member(ds, port, br, false);
1754 }
1755
1756 #define BYTES_PER_KBIT (1000LL / 8)
1757
1758 static int sja1105_find_unused_cbs_shaper(struct sja1105_private *priv)
1759 {
1760         int i;
1761
1762         for (i = 0; i < priv->info->num_cbs_shapers; i++)
1763                 if (!priv->cbs[i].idle_slope && !priv->cbs[i].send_slope)
1764                         return i;
1765
1766         return -1;
1767 }
1768
1769 static int sja1105_delete_cbs_shaper(struct sja1105_private *priv, int port,
1770                                      int prio)
1771 {
1772         int i;
1773
1774         for (i = 0; i < priv->info->num_cbs_shapers; i++) {
1775                 struct sja1105_cbs_entry *cbs = &priv->cbs[i];
1776
1777                 if (cbs->port == port && cbs->prio == prio) {
1778                         memset(cbs, 0, sizeof(*cbs));
1779                         return sja1105_dynamic_config_write(priv, BLK_IDX_CBS,
1780                                                             i, cbs, true);
1781                 }
1782         }
1783
1784         return 0;
1785 }
1786
1787 static int sja1105_setup_tc_cbs(struct dsa_switch *ds, int port,
1788                                 struct tc_cbs_qopt_offload *offload)
1789 {
1790         struct sja1105_private *priv = ds->priv;
1791         struct sja1105_cbs_entry *cbs;
1792         int index;
1793
1794         if (!offload->enable)
1795                 return sja1105_delete_cbs_shaper(priv, port, offload->queue);
1796
1797         index = sja1105_find_unused_cbs_shaper(priv);
1798         if (index < 0)
1799                 return -ENOSPC;
1800
1801         cbs = &priv->cbs[index];
1802         cbs->port = port;
1803         cbs->prio = offload->queue;
1804         /* locredit and sendslope are negative by definition. In hardware,
1805          * positive values must be provided, and the negative sign is implicit.
1806          */
1807         cbs->credit_hi = offload->hicredit;
1808         cbs->credit_lo = abs(offload->locredit);
1809         /* User space is in kbits/sec, hardware in bytes/sec */
1810         cbs->idle_slope = offload->idleslope * BYTES_PER_KBIT;
1811         cbs->send_slope = abs(offload->sendslope * BYTES_PER_KBIT);
1812         /* Convert the negative values from 64-bit 2's complement
1813          * to 32-bit 2's complement (for the case of 0x80000000 whose
1814          * negative is still negative).
1815          */
1816         cbs->credit_lo &= GENMASK_ULL(31, 0);
1817         cbs->send_slope &= GENMASK_ULL(31, 0);
1818
1819         return sja1105_dynamic_config_write(priv, BLK_IDX_CBS, index, cbs,
1820                                             true);
1821 }
1822
1823 static int sja1105_reload_cbs(struct sja1105_private *priv)
1824 {
1825         int rc = 0, i;
1826
1827         /* The credit based shapers are only allocated if
1828          * CONFIG_NET_SCH_CBS is enabled.
1829          */
1830         if (!priv->cbs)
1831                 return 0;
1832
1833         for (i = 0; i < priv->info->num_cbs_shapers; i++) {
1834                 struct sja1105_cbs_entry *cbs = &priv->cbs[i];
1835
1836                 if (!cbs->idle_slope && !cbs->send_slope)
1837                         continue;
1838
1839                 rc = sja1105_dynamic_config_write(priv, BLK_IDX_CBS, i, cbs,
1840                                                   true);
1841                 if (rc)
1842                         break;
1843         }
1844
1845         return rc;
1846 }
1847
1848 static const char * const sja1105_reset_reasons[] = {
1849         [SJA1105_VLAN_FILTERING] = "VLAN filtering",
1850         [SJA1105_RX_HWTSTAMPING] = "RX timestamping",
1851         [SJA1105_AGEING_TIME] = "Ageing time",
1852         [SJA1105_SCHEDULING] = "Time-aware scheduling",
1853         [SJA1105_BEST_EFFORT_POLICING] = "Best-effort policing",
1854         [SJA1105_VIRTUAL_LINKS] = "Virtual links",
1855 };
1856
1857 /* For situations where we need to change a setting at runtime that is only
1858  * available through the static configuration, resetting the switch in order
1859  * to upload the new static config is unavoidable. Back up the settings we
1860  * modify at runtime (currently only MAC) and restore them after uploading,
1861  * such that this operation is relatively seamless.
1862  */
1863 int sja1105_static_config_reload(struct sja1105_private *priv,
1864                                  enum sja1105_reset_reason reason)
1865 {
1866         struct ptp_system_timestamp ptp_sts_before;
1867         struct ptp_system_timestamp ptp_sts_after;
1868         int speed_mbps[SJA1105_MAX_NUM_PORTS];
1869         u16 bmcr[SJA1105_MAX_NUM_PORTS] = {0};
1870         struct sja1105_mac_config_entry *mac;
1871         struct dsa_switch *ds = priv->ds;
1872         s64 t1, t2, t3, t4;
1873         s64 t12, t34;
1874         int rc, i;
1875         s64 now;
1876
1877         mutex_lock(&priv->mgmt_lock);
1878
1879         mac = priv->static_config.tables[BLK_IDX_MAC_CONFIG].entries;
1880
1881         /* Back up the dynamic link speed changed by sja1105_adjust_port_config
1882          * in order to temporarily restore it to SJA1105_SPEED_AUTO - which the
1883          * switch wants to see in the static config in order to allow us to
1884          * change it through the dynamic interface later.
1885          */
1886         for (i = 0; i < ds->num_ports; i++) {
1887                 u32 reg_addr = mdiobus_c45_addr(MDIO_MMD_VEND2, MDIO_CTRL1);
1888
1889                 speed_mbps[i] = sja1105_port_speed_to_ethtool(priv,
1890                                                               mac[i].speed);
1891                 mac[i].speed = priv->info->port_speed[SJA1105_SPEED_AUTO];
1892
1893                 if (priv->xpcs[i])
1894                         bmcr[i] = mdiobus_read(priv->mdio_pcs, i, reg_addr);
1895         }
1896
1897         /* No PTP operations can run right now */
1898         mutex_lock(&priv->ptp_data.lock);
1899
1900         rc = __sja1105_ptp_gettimex(ds, &now, &ptp_sts_before);
1901         if (rc < 0) {
1902                 mutex_unlock(&priv->ptp_data.lock);
1903                 goto out;
1904         }
1905
1906         /* Reset switch and send updated static configuration */
1907         rc = sja1105_static_config_upload(priv);
1908         if (rc < 0) {
1909                 mutex_unlock(&priv->ptp_data.lock);
1910                 goto out;
1911         }
1912
1913         rc = __sja1105_ptp_settime(ds, 0, &ptp_sts_after);
1914         if (rc < 0) {
1915                 mutex_unlock(&priv->ptp_data.lock);
1916                 goto out;
1917         }
1918
1919         t1 = timespec64_to_ns(&ptp_sts_before.pre_ts);
1920         t2 = timespec64_to_ns(&ptp_sts_before.post_ts);
1921         t3 = timespec64_to_ns(&ptp_sts_after.pre_ts);
1922         t4 = timespec64_to_ns(&ptp_sts_after.post_ts);
1923         /* Mid point, corresponds to pre-reset PTPCLKVAL */
1924         t12 = t1 + (t2 - t1) / 2;
1925         /* Mid point, corresponds to post-reset PTPCLKVAL, aka 0 */
1926         t34 = t3 + (t4 - t3) / 2;
1927         /* Advance PTPCLKVAL by the time it took since its readout */
1928         now += (t34 - t12);
1929
1930         __sja1105_ptp_adjtime(ds, now);
1931
1932         mutex_unlock(&priv->ptp_data.lock);
1933
1934         dev_info(priv->ds->dev,
1935                  "Reset switch and programmed static config. Reason: %s\n",
1936                  sja1105_reset_reasons[reason]);
1937
1938         /* Configure the CGU (PLLs) for MII and RMII PHYs.
1939          * For these interfaces there is no dynamic configuration
1940          * needed, since PLLs have same settings at all speeds.
1941          */
1942         if (priv->info->clocking_setup) {
1943                 rc = priv->info->clocking_setup(priv);
1944                 if (rc < 0)
1945                         goto out;
1946         }
1947
1948         for (i = 0; i < ds->num_ports; i++) {
1949                 struct dw_xpcs *xpcs = priv->xpcs[i];
1950                 unsigned int mode;
1951
1952                 rc = sja1105_adjust_port_config(priv, i, speed_mbps[i]);
1953                 if (rc < 0)
1954                         goto out;
1955
1956                 if (!xpcs)
1957                         continue;
1958
1959                 if (bmcr[i] & BMCR_ANENABLE)
1960                         mode = MLO_AN_INBAND;
1961                 else if (priv->fixed_link[i])
1962                         mode = MLO_AN_FIXED;
1963                 else
1964                         mode = MLO_AN_PHY;
1965
1966                 rc = xpcs_do_config(xpcs, priv->phy_mode[i], mode);
1967                 if (rc < 0)
1968                         goto out;
1969
1970                 if (!phylink_autoneg_inband(mode)) {
1971                         int speed = SPEED_UNKNOWN;
1972
1973                         if (priv->phy_mode[i] == PHY_INTERFACE_MODE_2500BASEX)
1974                                 speed = SPEED_2500;
1975                         else if (bmcr[i] & BMCR_SPEED1000)
1976                                 speed = SPEED_1000;
1977                         else if (bmcr[i] & BMCR_SPEED100)
1978                                 speed = SPEED_100;
1979                         else
1980                                 speed = SPEED_10;
1981
1982                         xpcs_link_up(&xpcs->pcs, mode, priv->phy_mode[i],
1983                                      speed, DUPLEX_FULL);
1984                 }
1985         }
1986
1987         rc = sja1105_reload_cbs(priv);
1988         if (rc < 0)
1989                 goto out;
1990 out:
1991         mutex_unlock(&priv->mgmt_lock);
1992
1993         return rc;
1994 }
1995
1996 static int sja1105_pvid_apply(struct sja1105_private *priv, int port, u16 pvid)
1997 {
1998         struct sja1105_mac_config_entry *mac;
1999
2000         mac = priv->static_config.tables[BLK_IDX_MAC_CONFIG].entries;
2001
2002         mac[port].vlanid = pvid;
2003
2004         return sja1105_dynamic_config_write(priv, BLK_IDX_MAC_CONFIG, port,
2005                                            &mac[port], true);
2006 }
2007
2008 static int sja1105_crosschip_bridge_join(struct dsa_switch *ds,
2009                                          int tree_index, int sw_index,
2010                                          int other_port, struct net_device *br)
2011 {
2012         struct dsa_switch *other_ds = dsa_switch_find(tree_index, sw_index);
2013         struct sja1105_private *other_priv = other_ds->priv;
2014         struct sja1105_private *priv = ds->priv;
2015         int port, rc;
2016
2017         if (other_ds->ops != &sja1105_switch_ops)
2018                 return 0;
2019
2020         for (port = 0; port < ds->num_ports; port++) {
2021                 if (!dsa_is_user_port(ds, port))
2022                         continue;
2023                 if (dsa_to_port(ds, port)->bridge_dev != br)
2024                         continue;
2025
2026                 rc = dsa_8021q_crosschip_bridge_join(priv->dsa_8021q_ctx,
2027                                                      port,
2028                                                      other_priv->dsa_8021q_ctx,
2029                                                      other_port);
2030                 if (rc)
2031                         return rc;
2032
2033                 rc = dsa_8021q_crosschip_bridge_join(other_priv->dsa_8021q_ctx,
2034                                                      other_port,
2035                                                      priv->dsa_8021q_ctx,
2036                                                      port);
2037                 if (rc)
2038                         return rc;
2039         }
2040
2041         return 0;
2042 }
2043
2044 static void sja1105_crosschip_bridge_leave(struct dsa_switch *ds,
2045                                            int tree_index, int sw_index,
2046                                            int other_port,
2047                                            struct net_device *br)
2048 {
2049         struct dsa_switch *other_ds = dsa_switch_find(tree_index, sw_index);
2050         struct sja1105_private *other_priv = other_ds->priv;
2051         struct sja1105_private *priv = ds->priv;
2052         int port;
2053
2054         if (other_ds->ops != &sja1105_switch_ops)
2055                 return;
2056
2057         for (port = 0; port < ds->num_ports; port++) {
2058                 if (!dsa_is_user_port(ds, port))
2059                         continue;
2060                 if (dsa_to_port(ds, port)->bridge_dev != br)
2061                         continue;
2062
2063                 dsa_8021q_crosschip_bridge_leave(priv->dsa_8021q_ctx, port,
2064                                                  other_priv->dsa_8021q_ctx,
2065                                                  other_port);
2066
2067                 dsa_8021q_crosschip_bridge_leave(other_priv->dsa_8021q_ctx,
2068                                                  other_port,
2069                                                  priv->dsa_8021q_ctx, port);
2070         }
2071 }
2072
2073 static int sja1105_setup_8021q_tagging(struct dsa_switch *ds, bool enabled)
2074 {
2075         struct sja1105_private *priv = ds->priv;
2076         int rc;
2077
2078         rc = dsa_8021q_setup(priv->dsa_8021q_ctx, enabled);
2079         if (rc)
2080                 return rc;
2081
2082         dev_info(ds->dev, "%s switch tagging\n",
2083                  enabled ? "Enabled" : "Disabled");
2084         return 0;
2085 }
2086
2087 static enum dsa_tag_protocol
2088 sja1105_get_tag_protocol(struct dsa_switch *ds, int port,
2089                          enum dsa_tag_protocol mp)
2090 {
2091         struct sja1105_private *priv = ds->priv;
2092
2093         return priv->info->tag_proto;
2094 }
2095
2096 static int sja1105_find_free_subvlan(u16 *subvlan_map, bool pvid)
2097 {
2098         int subvlan;
2099
2100         if (pvid)
2101                 return 0;
2102
2103         for (subvlan = 1; subvlan < DSA_8021Q_N_SUBVLAN; subvlan++)
2104                 if (subvlan_map[subvlan] == VLAN_N_VID)
2105                         return subvlan;
2106
2107         return -1;
2108 }
2109
2110 static int sja1105_find_subvlan(u16 *subvlan_map, u16 vid)
2111 {
2112         int subvlan;
2113
2114         for (subvlan = 0; subvlan < DSA_8021Q_N_SUBVLAN; subvlan++)
2115                 if (subvlan_map[subvlan] == vid)
2116                         return subvlan;
2117
2118         return -1;
2119 }
2120
2121 static int sja1105_find_committed_subvlan(struct sja1105_private *priv,
2122                                           int port, u16 vid)
2123 {
2124         struct sja1105_port *sp = &priv->ports[port];
2125
2126         return sja1105_find_subvlan(sp->subvlan_map, vid);
2127 }
2128
2129 static void sja1105_init_subvlan_map(u16 *subvlan_map)
2130 {
2131         int subvlan;
2132
2133         for (subvlan = 0; subvlan < DSA_8021Q_N_SUBVLAN; subvlan++)
2134                 subvlan_map[subvlan] = VLAN_N_VID;
2135 }
2136
2137 static void sja1105_commit_subvlan_map(struct sja1105_private *priv, int port,
2138                                        u16 *subvlan_map)
2139 {
2140         struct sja1105_port *sp = &priv->ports[port];
2141         int subvlan;
2142
2143         for (subvlan = 0; subvlan < DSA_8021Q_N_SUBVLAN; subvlan++)
2144                 sp->subvlan_map[subvlan] = subvlan_map[subvlan];
2145 }
2146
2147 static int sja1105_is_vlan_configured(struct sja1105_private *priv, u16 vid)
2148 {
2149         struct sja1105_vlan_lookup_entry *vlan;
2150         int count, i;
2151
2152         vlan = priv->static_config.tables[BLK_IDX_VLAN_LOOKUP].entries;
2153         count = priv->static_config.tables[BLK_IDX_VLAN_LOOKUP].entry_count;
2154
2155         for (i = 0; i < count; i++)
2156                 if (vlan[i].vlanid == vid)
2157                         return i;
2158
2159         /* Return an invalid entry index if not found */
2160         return -1;
2161 }
2162
2163 static int
2164 sja1105_find_retagging_entry(struct sja1105_retagging_entry *retagging,
2165                              int count, int from_port, u16 from_vid,
2166                              u16 to_vid)
2167 {
2168         int i;
2169
2170         for (i = 0; i < count; i++)
2171                 if (retagging[i].ing_port == BIT(from_port) &&
2172                     retagging[i].vlan_ing == from_vid &&
2173                     retagging[i].vlan_egr == to_vid)
2174                         return i;
2175
2176         /* Return an invalid entry index if not found */
2177         return -1;
2178 }
2179
2180 static int sja1105_commit_vlans(struct sja1105_private *priv,
2181                                 struct sja1105_vlan_lookup_entry *new_vlan,
2182                                 struct sja1105_retagging_entry *new_retagging,
2183                                 int num_retagging)
2184 {
2185         struct sja1105_retagging_entry *retagging;
2186         struct sja1105_vlan_lookup_entry *vlan;
2187         struct sja1105_table *table;
2188         int num_vlans = 0;
2189         int rc, i, k = 0;
2190
2191         /* VLAN table */
2192         table = &priv->static_config.tables[BLK_IDX_VLAN_LOOKUP];
2193         vlan = table->entries;
2194
2195         for (i = 0; i < VLAN_N_VID; i++) {
2196                 int match = sja1105_is_vlan_configured(priv, i);
2197
2198                 if (new_vlan[i].vlanid != VLAN_N_VID)
2199                         num_vlans++;
2200
2201                 if (new_vlan[i].vlanid == VLAN_N_VID && match >= 0) {
2202                         /* Was there before, no longer is. Delete */
2203                         dev_dbg(priv->ds->dev, "Deleting VLAN %d\n", i);
2204                         rc = sja1105_dynamic_config_write(priv,
2205                                                           BLK_IDX_VLAN_LOOKUP,
2206                                                           i, &vlan[match], false);
2207                         if (rc < 0)
2208                                 return rc;
2209                 } else if (new_vlan[i].vlanid != VLAN_N_VID) {
2210                         /* Nothing changed, don't do anything */
2211                         if (match >= 0 &&
2212                             vlan[match].vlanid == new_vlan[i].vlanid &&
2213                             vlan[match].tag_port == new_vlan[i].tag_port &&
2214                             vlan[match].vlan_bc == new_vlan[i].vlan_bc &&
2215                             vlan[match].vmemb_port == new_vlan[i].vmemb_port)
2216                                 continue;
2217                         /* Update entry */
2218                         dev_dbg(priv->ds->dev, "Updating VLAN %d\n", i);
2219                         rc = sja1105_dynamic_config_write(priv,
2220                                                           BLK_IDX_VLAN_LOOKUP,
2221                                                           i, &new_vlan[i],
2222                                                           true);
2223                         if (rc < 0)
2224                                 return rc;
2225                 }
2226         }
2227
2228         if (table->entry_count)
2229                 kfree(table->entries);
2230
2231         table->entries = kcalloc(num_vlans, table->ops->unpacked_entry_size,
2232                                  GFP_KERNEL);
2233         if (!table->entries)
2234                 return -ENOMEM;
2235
2236         table->entry_count = num_vlans;
2237         vlan = table->entries;
2238
2239         for (i = 0; i < VLAN_N_VID; i++) {
2240                 if (new_vlan[i].vlanid == VLAN_N_VID)
2241                         continue;
2242                 vlan[k++] = new_vlan[i];
2243         }
2244
2245         /* VLAN Retagging Table */
2246         table = &priv->static_config.tables[BLK_IDX_RETAGGING];
2247         retagging = table->entries;
2248
2249         for (i = 0; i < table->entry_count; i++) {
2250                 rc = sja1105_dynamic_config_write(priv, BLK_IDX_RETAGGING,
2251                                                   i, &retagging[i], false);
2252                 if (rc)
2253                         return rc;
2254         }
2255
2256         if (table->entry_count)
2257                 kfree(table->entries);
2258
2259         table->entries = kcalloc(num_retagging, table->ops->unpacked_entry_size,
2260                                  GFP_KERNEL);
2261         if (!table->entries)
2262                 return -ENOMEM;
2263
2264         table->entry_count = num_retagging;
2265         retagging = table->entries;
2266
2267         for (i = 0; i < num_retagging; i++) {
2268                 retagging[i] = new_retagging[i];
2269
2270                 /* Update entry */
2271                 rc = sja1105_dynamic_config_write(priv, BLK_IDX_RETAGGING,
2272                                                   i, &retagging[i], true);
2273                 if (rc < 0)
2274                         return rc;
2275         }
2276
2277         return 0;
2278 }
2279
2280 struct sja1105_crosschip_vlan {
2281         struct list_head list;
2282         u16 vid;
2283         bool untagged;
2284         int port;
2285         int other_port;
2286         struct dsa_8021q_context *other_ctx;
2287 };
2288
2289 struct sja1105_crosschip_switch {
2290         struct list_head list;
2291         struct dsa_8021q_context *other_ctx;
2292 };
2293
2294 static int sja1105_commit_pvid(struct sja1105_private *priv)
2295 {
2296         struct sja1105_bridge_vlan *v;
2297         struct list_head *vlan_list;
2298         int rc = 0;
2299
2300         if (priv->vlan_state == SJA1105_VLAN_FILTERING_FULL)
2301                 vlan_list = &priv->bridge_vlans;
2302         else
2303                 vlan_list = &priv->dsa_8021q_vlans;
2304
2305         list_for_each_entry(v, vlan_list, list) {
2306                 if (v->pvid) {
2307                         rc = sja1105_pvid_apply(priv, v->port, v->vid);
2308                         if (rc)
2309                                 break;
2310                 }
2311         }
2312
2313         return rc;
2314 }
2315
2316 static int
2317 sja1105_build_bridge_vlans(struct sja1105_private *priv,
2318                            struct sja1105_vlan_lookup_entry *new_vlan)
2319 {
2320         struct sja1105_bridge_vlan *v;
2321
2322         if (priv->vlan_state == SJA1105_VLAN_UNAWARE)
2323                 return 0;
2324
2325         list_for_each_entry(v, &priv->bridge_vlans, list) {
2326                 int match = v->vid;
2327
2328                 new_vlan[match].vlanid = v->vid;
2329                 new_vlan[match].vmemb_port |= BIT(v->port);
2330                 new_vlan[match].vlan_bc |= BIT(v->port);
2331                 if (!v->untagged)
2332                         new_vlan[match].tag_port |= BIT(v->port);
2333                 new_vlan[match].type_entry = SJA1110_VLAN_D_TAG;
2334         }
2335
2336         return 0;
2337 }
2338
2339 static int
2340 sja1105_build_dsa_8021q_vlans(struct sja1105_private *priv,
2341                               struct sja1105_vlan_lookup_entry *new_vlan)
2342 {
2343         struct sja1105_bridge_vlan *v;
2344
2345         if (priv->vlan_state == SJA1105_VLAN_FILTERING_FULL)
2346                 return 0;
2347
2348         list_for_each_entry(v, &priv->dsa_8021q_vlans, list) {
2349                 int match = v->vid;
2350
2351                 new_vlan[match].vlanid = v->vid;
2352                 new_vlan[match].vmemb_port |= BIT(v->port);
2353                 new_vlan[match].vlan_bc |= BIT(v->port);
2354                 if (!v->untagged)
2355                         new_vlan[match].tag_port |= BIT(v->port);
2356                 new_vlan[match].type_entry = SJA1110_VLAN_D_TAG;
2357         }
2358
2359         return 0;
2360 }
2361
2362 static int sja1105_build_subvlans(struct sja1105_private *priv,
2363                                   u16 subvlan_map[][DSA_8021Q_N_SUBVLAN],
2364                                   struct sja1105_vlan_lookup_entry *new_vlan,
2365                                   struct sja1105_retagging_entry *new_retagging,
2366                                   int *num_retagging)
2367 {
2368         struct sja1105_bridge_vlan *v;
2369         int k = *num_retagging;
2370
2371         if (priv->vlan_state != SJA1105_VLAN_BEST_EFFORT)
2372                 return 0;
2373
2374         list_for_each_entry(v, &priv->bridge_vlans, list) {
2375                 int upstream = dsa_upstream_port(priv->ds, v->port);
2376                 int match, subvlan;
2377                 u16 rx_vid;
2378
2379                 /* Only sub-VLANs on user ports need to be applied.
2380                  * Bridge VLANs also include VLANs added automatically
2381                  * by DSA on the CPU port.
2382                  */
2383                 if (!dsa_is_user_port(priv->ds, v->port))
2384                         continue;
2385
2386                 subvlan = sja1105_find_subvlan(subvlan_map[v->port],
2387                                                v->vid);
2388                 if (subvlan < 0) {
2389                         subvlan = sja1105_find_free_subvlan(subvlan_map[v->port],
2390                                                             v->pvid);
2391                         if (subvlan < 0) {
2392                                 dev_err(priv->ds->dev, "No more free subvlans\n");
2393                                 return -ENOSPC;
2394                         }
2395                 }
2396
2397                 rx_vid = dsa_8021q_rx_vid_subvlan(priv->ds, v->port, subvlan);
2398
2399                 /* @v->vid on @v->port needs to be retagged to @rx_vid
2400                  * on @upstream. Assume @v->vid on @v->port and on
2401                  * @upstream was already configured by the previous
2402                  * iteration over bridge_vlans.
2403                  */
2404                 match = rx_vid;
2405                 new_vlan[match].vlanid = rx_vid;
2406                 new_vlan[match].vmemb_port |= BIT(v->port);
2407                 new_vlan[match].vmemb_port |= BIT(upstream);
2408                 new_vlan[match].vlan_bc |= BIT(v->port);
2409                 new_vlan[match].vlan_bc |= BIT(upstream);
2410                 /* The "untagged" flag is set the same as for the
2411                  * original VLAN
2412                  */
2413                 if (!v->untagged)
2414                         new_vlan[match].tag_port |= BIT(v->port);
2415                 /* But it's always tagged towards the CPU */
2416                 new_vlan[match].tag_port |= BIT(upstream);
2417                 new_vlan[match].type_entry = SJA1110_VLAN_D_TAG;
2418
2419                 /* The Retagging Table generates packet *clones* with
2420                  * the new VLAN. This is a very odd hardware quirk
2421                  * which we need to suppress by dropping the original
2422                  * packet.
2423                  * Deny egress of the original VLAN towards the CPU
2424                  * port. This will force the switch to drop it, and
2425                  * we'll see only the retagged packets.
2426                  */
2427                 match = v->vid;
2428                 new_vlan[match].vlan_bc &= ~BIT(upstream);
2429
2430                 /* And the retagging itself */
2431                 new_retagging[k].vlan_ing = v->vid;
2432                 new_retagging[k].vlan_egr = rx_vid;
2433                 new_retagging[k].ing_port = BIT(v->port);
2434                 new_retagging[k].egr_port = BIT(upstream);
2435                 if (k++ == SJA1105_MAX_RETAGGING_COUNT) {
2436                         dev_err(priv->ds->dev, "No more retagging rules\n");
2437                         return -ENOSPC;
2438                 }
2439
2440                 subvlan_map[v->port][subvlan] = v->vid;
2441         }
2442
2443         *num_retagging = k;
2444
2445         return 0;
2446 }
2447
2448 /* Sadly, in crosschip scenarios where the CPU port is also the link to another
2449  * switch, we should retag backwards (the dsa_8021q vid to the original vid) on
2450  * the CPU port of neighbour switches.
2451  */
2452 static int
2453 sja1105_build_crosschip_subvlans(struct sja1105_private *priv,
2454                                  struct sja1105_vlan_lookup_entry *new_vlan,
2455                                  struct sja1105_retagging_entry *new_retagging,
2456                                  int *num_retagging)
2457 {
2458         struct sja1105_crosschip_vlan *tmp, *pos;
2459         struct dsa_8021q_crosschip_link *c;
2460         struct sja1105_bridge_vlan *v, *w;
2461         struct list_head crosschip_vlans;
2462         int k = *num_retagging;
2463         int rc = 0;
2464
2465         if (priv->vlan_state != SJA1105_VLAN_BEST_EFFORT)
2466                 return 0;
2467
2468         INIT_LIST_HEAD(&crosschip_vlans);
2469
2470         list_for_each_entry(c, &priv->dsa_8021q_ctx->crosschip_links, list) {
2471                 struct sja1105_private *other_priv = c->other_ctx->ds->priv;
2472
2473                 if (other_priv->vlan_state == SJA1105_VLAN_FILTERING_FULL)
2474                         continue;
2475
2476                 /* Crosschip links are also added to the CPU ports.
2477                  * Ignore those.
2478                  */
2479                 if (!dsa_is_user_port(priv->ds, c->port))
2480                         continue;
2481                 if (!dsa_is_user_port(c->other_ctx->ds, c->other_port))
2482                         continue;
2483
2484                 /* Search for VLANs on the remote port */
2485                 list_for_each_entry(v, &other_priv->bridge_vlans, list) {
2486                         bool already_added = false;
2487                         bool we_have_it = false;
2488
2489                         if (v->port != c->other_port)
2490                                 continue;
2491
2492                         /* If @v is a pvid on @other_ds, it does not need
2493                          * re-retagging, because its SVL field is 0 and we
2494                          * already allow that, via the dsa_8021q crosschip
2495                          * links.
2496                          */
2497                         if (v->pvid)
2498                                 continue;
2499
2500                         /* Search for the VLAN on our local port */
2501                         list_for_each_entry(w, &priv->bridge_vlans, list) {
2502                                 if (w->port == c->port && w->vid == v->vid) {
2503                                         we_have_it = true;
2504                                         break;
2505                                 }
2506                         }
2507
2508                         if (!we_have_it)
2509                                 continue;
2510
2511                         list_for_each_entry(tmp, &crosschip_vlans, list) {
2512                                 if (tmp->vid == v->vid &&
2513                                     tmp->untagged == v->untagged &&
2514                                     tmp->port == c->port &&
2515                                     tmp->other_port == v->port &&
2516                                     tmp->other_ctx == c->other_ctx) {
2517                                         already_added = true;
2518                                         break;
2519                                 }
2520                         }
2521
2522                         if (already_added)
2523                                 continue;
2524
2525                         tmp = kzalloc(sizeof(*tmp), GFP_KERNEL);
2526                         if (!tmp) {
2527                                 dev_err(priv->ds->dev, "Failed to allocate memory\n");
2528                                 rc = -ENOMEM;
2529                                 goto out;
2530                         }
2531                         tmp->vid = v->vid;
2532                         tmp->port = c->port;
2533                         tmp->other_port = v->port;
2534                         tmp->other_ctx = c->other_ctx;
2535                         tmp->untagged = v->untagged;
2536                         list_add(&tmp->list, &crosschip_vlans);
2537                 }
2538         }
2539
2540         list_for_each_entry(tmp, &crosschip_vlans, list) {
2541                 struct sja1105_private *other_priv = tmp->other_ctx->ds->priv;
2542                 int upstream = dsa_upstream_port(priv->ds, tmp->port);
2543                 int match, subvlan;
2544                 u16 rx_vid;
2545
2546                 subvlan = sja1105_find_committed_subvlan(other_priv,
2547                                                          tmp->other_port,
2548                                                          tmp->vid);
2549                 /* If this happens, it's a bug. The neighbour switch does not
2550                  * have a subvlan for tmp->vid on tmp->other_port, but it
2551                  * should, since we already checked for its vlan_state.
2552                  */
2553                 if (WARN_ON(subvlan < 0)) {
2554                         rc = -EINVAL;
2555                         goto out;
2556                 }
2557
2558                 rx_vid = dsa_8021q_rx_vid_subvlan(tmp->other_ctx->ds,
2559                                                   tmp->other_port,
2560                                                   subvlan);
2561
2562                 /* The @rx_vid retagged from @tmp->vid on
2563                  * {@tmp->other_ds, @tmp->other_port} needs to be
2564                  * re-retagged to @tmp->vid on the way back to us.
2565                  *
2566                  * Assume the original @tmp->vid is already configured
2567                  * on this local switch, otherwise we wouldn't be
2568                  * retagging its subvlan on the other switch in the
2569                  * first place. We just need to add a reverse retagging
2570                  * rule for @rx_vid and install @rx_vid on our ports.
2571                  */
2572                 match = rx_vid;
2573                 new_vlan[match].vlanid = rx_vid;
2574                 new_vlan[match].vmemb_port |= BIT(tmp->port);
2575                 new_vlan[match].vmemb_port |= BIT(upstream);
2576                 /* The "untagged" flag is set the same as for the
2577                  * original VLAN. And towards the CPU, it doesn't
2578                  * really matter, because @rx_vid will only receive
2579                  * traffic on that port. For consistency with other dsa_8021q
2580                  * VLANs, we'll keep the CPU port tagged.
2581                  */
2582                 if (!tmp->untagged)
2583                         new_vlan[match].tag_port |= BIT(tmp->port);
2584                 new_vlan[match].tag_port |= BIT(upstream);
2585                 new_vlan[match].type_entry = SJA1110_VLAN_D_TAG;
2586                 /* Deny egress of @rx_vid towards our front-panel port.
2587                  * This will force the switch to drop it, and we'll see
2588                  * only the re-retagged packets (having the original,
2589                  * pre-initial-retagging, VLAN @tmp->vid).
2590                  */
2591                 new_vlan[match].vlan_bc &= ~BIT(tmp->port);
2592
2593                 /* On reverse retagging, the same ingress VLAN goes to multiple
2594                  * ports. So we have an opportunity to create composite rules
2595                  * to not waste the limited space in the retagging table.
2596                  */
2597                 k = sja1105_find_retagging_entry(new_retagging, *num_retagging,
2598                                                  upstream, rx_vid, tmp->vid);
2599                 if (k < 0) {
2600                         if (*num_retagging == SJA1105_MAX_RETAGGING_COUNT) {
2601                                 dev_err(priv->ds->dev, "No more retagging rules\n");
2602                                 rc = -ENOSPC;
2603                                 goto out;
2604                         }
2605                         k = (*num_retagging)++;
2606                 }
2607                 /* And the retagging itself */
2608                 new_retagging[k].vlan_ing = rx_vid;
2609                 new_retagging[k].vlan_egr = tmp->vid;
2610                 new_retagging[k].ing_port = BIT(upstream);
2611                 new_retagging[k].egr_port |= BIT(tmp->port);
2612         }
2613
2614 out:
2615         list_for_each_entry_safe(tmp, pos, &crosschip_vlans, list) {
2616                 list_del(&tmp->list);
2617                 kfree(tmp);
2618         }
2619
2620         return rc;
2621 }
2622
2623 static int sja1105_build_vlan_table(struct sja1105_private *priv, bool notify);
2624
2625 static int sja1105_notify_crosschip_switches(struct sja1105_private *priv)
2626 {
2627         struct sja1105_crosschip_switch *s, *pos;
2628         struct list_head crosschip_switches;
2629         struct dsa_8021q_crosschip_link *c;
2630         int rc = 0;
2631
2632         INIT_LIST_HEAD(&crosschip_switches);
2633
2634         list_for_each_entry(c, &priv->dsa_8021q_ctx->crosschip_links, list) {
2635                 bool already_added = false;
2636
2637                 list_for_each_entry(s, &crosschip_switches, list) {
2638                         if (s->other_ctx == c->other_ctx) {
2639                                 already_added = true;
2640                                 break;
2641                         }
2642                 }
2643
2644                 if (already_added)
2645                         continue;
2646
2647                 s = kzalloc(sizeof(*s), GFP_KERNEL);
2648                 if (!s) {
2649                         dev_err(priv->ds->dev, "Failed to allocate memory\n");
2650                         rc = -ENOMEM;
2651                         goto out;
2652                 }
2653                 s->other_ctx = c->other_ctx;
2654                 list_add(&s->list, &crosschip_switches);
2655         }
2656
2657         list_for_each_entry(s, &crosschip_switches, list) {
2658                 struct sja1105_private *other_priv = s->other_ctx->ds->priv;
2659
2660                 rc = sja1105_build_vlan_table(other_priv, false);
2661                 if (rc)
2662                         goto out;
2663         }
2664
2665 out:
2666         list_for_each_entry_safe(s, pos, &crosschip_switches, list) {
2667                 list_del(&s->list);
2668                 kfree(s);
2669         }
2670
2671         return rc;
2672 }
2673
2674 static int sja1105_build_vlan_table(struct sja1105_private *priv, bool notify)
2675 {
2676         u16 subvlan_map[SJA1105_MAX_NUM_PORTS][DSA_8021Q_N_SUBVLAN];
2677         struct sja1105_retagging_entry *new_retagging;
2678         struct sja1105_vlan_lookup_entry *new_vlan;
2679         struct sja1105_table *table;
2680         int i, num_retagging = 0;
2681         int rc;
2682
2683         table = &priv->static_config.tables[BLK_IDX_VLAN_LOOKUP];
2684         new_vlan = kcalloc(VLAN_N_VID,
2685                            table->ops->unpacked_entry_size, GFP_KERNEL);
2686         if (!new_vlan)
2687                 return -ENOMEM;
2688
2689         table = &priv->static_config.tables[BLK_IDX_VLAN_LOOKUP];
2690         new_retagging = kcalloc(SJA1105_MAX_RETAGGING_COUNT,
2691                                 table->ops->unpacked_entry_size, GFP_KERNEL);
2692         if (!new_retagging) {
2693                 kfree(new_vlan);
2694                 return -ENOMEM;
2695         }
2696
2697         for (i = 0; i < VLAN_N_VID; i++)
2698                 new_vlan[i].vlanid = VLAN_N_VID;
2699
2700         for (i = 0; i < SJA1105_MAX_RETAGGING_COUNT; i++)
2701                 new_retagging[i].vlan_ing = VLAN_N_VID;
2702
2703         for (i = 0; i < priv->ds->num_ports; i++)
2704                 sja1105_init_subvlan_map(subvlan_map[i]);
2705
2706         /* Bridge VLANs */
2707         rc = sja1105_build_bridge_vlans(priv, new_vlan);
2708         if (rc)
2709                 goto out;
2710
2711         /* VLANs necessary for dsa_8021q operation, given to us by tag_8021q.c:
2712          * - RX VLANs
2713          * - TX VLANs
2714          * - Crosschip links
2715          */
2716         rc = sja1105_build_dsa_8021q_vlans(priv, new_vlan);
2717         if (rc)
2718                 goto out;
2719
2720         /* Private VLANs necessary for dsa_8021q operation, which we need to
2721          * determine on our own:
2722          * - Sub-VLANs
2723          * - Sub-VLANs of crosschip switches
2724          */
2725         rc = sja1105_build_subvlans(priv, subvlan_map, new_vlan, new_retagging,
2726                                     &num_retagging);
2727         if (rc)
2728                 goto out;
2729
2730         rc = sja1105_build_crosschip_subvlans(priv, new_vlan, new_retagging,
2731                                               &num_retagging);
2732         if (rc)
2733                 goto out;
2734
2735         rc = sja1105_commit_vlans(priv, new_vlan, new_retagging, num_retagging);
2736         if (rc)
2737                 goto out;
2738
2739         rc = sja1105_commit_pvid(priv);
2740         if (rc)
2741                 goto out;
2742
2743         for (i = 0; i < priv->ds->num_ports; i++)
2744                 sja1105_commit_subvlan_map(priv, i, subvlan_map[i]);
2745
2746         if (notify) {
2747                 rc = sja1105_notify_crosschip_switches(priv);
2748                 if (rc)
2749                         goto out;
2750         }
2751
2752 out:
2753         kfree(new_vlan);
2754         kfree(new_retagging);
2755
2756         return rc;
2757 }
2758
2759 /* The TPID setting belongs to the General Parameters table,
2760  * which can only be partially reconfigured at runtime (and not the TPID).
2761  * So a switch reset is required.
2762  */
2763 int sja1105_vlan_filtering(struct dsa_switch *ds, int port, bool enabled,
2764                            struct netlink_ext_ack *extack)
2765 {
2766         struct sja1105_l2_lookup_params_entry *l2_lookup_params;
2767         struct sja1105_general_params_entry *general_params;
2768         struct sja1105_private *priv = ds->priv;
2769         enum sja1105_vlan_state state;
2770         struct sja1105_table *table;
2771         struct sja1105_rule *rule;
2772         bool want_tagging;
2773         u16 tpid, tpid2;
2774         int rc;
2775
2776         list_for_each_entry(rule, &priv->flow_block.rules, list) {
2777                 if (rule->type == SJA1105_RULE_VL) {
2778                         NL_SET_ERR_MSG_MOD(extack,
2779                                            "Cannot change VLAN filtering with active VL rules");
2780                         return -EBUSY;
2781                 }
2782         }
2783
2784         if (enabled) {
2785                 /* Enable VLAN filtering. */
2786                 tpid  = ETH_P_8021Q;
2787                 tpid2 = ETH_P_8021AD;
2788         } else {
2789                 /* Disable VLAN filtering. */
2790                 tpid  = ETH_P_SJA1105;
2791                 tpid2 = ETH_P_SJA1105;
2792         }
2793
2794         for (port = 0; port < ds->num_ports; port++) {
2795                 struct sja1105_port *sp = &priv->ports[port];
2796
2797                 if (enabled)
2798                         sp->xmit_tpid = priv->info->qinq_tpid;
2799                 else
2800                         sp->xmit_tpid = ETH_P_SJA1105;
2801         }
2802
2803         if (!enabled)
2804                 state = SJA1105_VLAN_UNAWARE;
2805         else if (priv->best_effort_vlan_filtering)
2806                 state = SJA1105_VLAN_BEST_EFFORT;
2807         else
2808                 state = SJA1105_VLAN_FILTERING_FULL;
2809
2810         if (priv->vlan_state == state)
2811                 return 0;
2812
2813         priv->vlan_state = state;
2814         want_tagging = (state == SJA1105_VLAN_UNAWARE ||
2815                         state == SJA1105_VLAN_BEST_EFFORT);
2816
2817         table = &priv->static_config.tables[BLK_IDX_GENERAL_PARAMS];
2818         general_params = table->entries;
2819         /* EtherType used to identify inner tagged (C-tag) VLAN traffic */
2820         general_params->tpid = tpid;
2821         /* EtherType used to identify outer tagged (S-tag) VLAN traffic */
2822         general_params->tpid2 = tpid2;
2823         /* When VLAN filtering is on, we need to at least be able to
2824          * decode management traffic through the "backup plan".
2825          */
2826         general_params->incl_srcpt1 = enabled;
2827         general_params->incl_srcpt0 = enabled;
2828
2829         want_tagging = priv->best_effort_vlan_filtering || !enabled;
2830
2831         /* VLAN filtering => independent VLAN learning.
2832          * No VLAN filtering (or best effort) => shared VLAN learning.
2833          *
2834          * In shared VLAN learning mode, untagged traffic still gets
2835          * pvid-tagged, and the FDB table gets populated with entries
2836          * containing the "real" (pvid or from VLAN tag) VLAN ID.
2837          * However the switch performs a masked L2 lookup in the FDB,
2838          * effectively only looking up a frame's DMAC (and not VID) for the
2839          * forwarding decision.
2840          *
2841          * This is extremely convenient for us, because in modes with
2842          * vlan_filtering=0, dsa_8021q actually installs unique pvid's into
2843          * each front panel port. This is good for identification but breaks
2844          * learning badly - the VID of the learnt FDB entry is unique, aka
2845          * no frames coming from any other port are going to have it. So
2846          * for forwarding purposes, this is as though learning was broken
2847          * (all frames get flooded).
2848          */
2849         table = &priv->static_config.tables[BLK_IDX_L2_LOOKUP_PARAMS];
2850         l2_lookup_params = table->entries;
2851         l2_lookup_params->shared_learn = want_tagging;
2852
2853         sja1105_frame_memory_partitioning(priv);
2854
2855         rc = sja1105_build_vlan_table(priv, false);
2856         if (rc)
2857                 return rc;
2858
2859         rc = sja1105_static_config_reload(priv, SJA1105_VLAN_FILTERING);
2860         if (rc)
2861                 NL_SET_ERR_MSG_MOD(extack, "Failed to change VLAN Ethertype");
2862
2863         /* Switch port identification based on 802.1Q is only passable
2864          * if we are not under a vlan_filtering bridge. So make sure
2865          * the two configurations are mutually exclusive (of course, the
2866          * user may know better, i.e. best_effort_vlan_filtering).
2867          */
2868         return sja1105_setup_8021q_tagging(ds, want_tagging);
2869 }
2870
2871 /* Returns number of VLANs added (0 or 1) on success,
2872  * or a negative error code.
2873  */
2874 static int sja1105_vlan_add_one(struct dsa_switch *ds, int port, u16 vid,
2875                                 u16 flags, struct list_head *vlan_list)
2876 {
2877         bool untagged = flags & BRIDGE_VLAN_INFO_UNTAGGED;
2878         bool pvid = flags & BRIDGE_VLAN_INFO_PVID;
2879         struct sja1105_bridge_vlan *v;
2880
2881         list_for_each_entry(v, vlan_list, list) {
2882                 if (v->port == port && v->vid == vid) {
2883                         /* Already added */
2884                         if (v->untagged == untagged && v->pvid == pvid)
2885                                 /* Nothing changed */
2886                                 return 0;
2887
2888                         /* It's the same VLAN, but some of the flags changed
2889                          * and the user did not bother to delete it first.
2890                          * Update it and trigger sja1105_build_vlan_table.
2891                          */
2892                         v->untagged = untagged;
2893                         v->pvid = pvid;
2894                         return 1;
2895                 }
2896         }
2897
2898         v = kzalloc(sizeof(*v), GFP_KERNEL);
2899         if (!v) {
2900                 dev_err(ds->dev, "Out of memory while storing VLAN\n");
2901                 return -ENOMEM;
2902         }
2903
2904         v->port = port;
2905         v->vid = vid;
2906         v->untagged = untagged;
2907         v->pvid = pvid;
2908         list_add(&v->list, vlan_list);
2909
2910         return 1;
2911 }
2912
2913 /* Returns number of VLANs deleted (0 or 1) */
2914 static int sja1105_vlan_del_one(struct dsa_switch *ds, int port, u16 vid,
2915                                 struct list_head *vlan_list)
2916 {
2917         struct sja1105_bridge_vlan *v, *n;
2918
2919         list_for_each_entry_safe(v, n, vlan_list, list) {
2920                 if (v->port == port && v->vid == vid) {
2921                         list_del(&v->list);
2922                         kfree(v);
2923                         return 1;
2924                 }
2925         }
2926
2927         return 0;
2928 }
2929
2930 static int sja1105_vlan_add(struct dsa_switch *ds, int port,
2931                             const struct switchdev_obj_port_vlan *vlan,
2932                             struct netlink_ext_ack *extack)
2933 {
2934         struct sja1105_private *priv = ds->priv;
2935         bool vlan_table_changed = false;
2936         int rc;
2937
2938         /* If the user wants best-effort VLAN filtering (aka vlan_filtering
2939          * bridge plus tagging), be sure to at least deny alterations to the
2940          * configuration done by dsa_8021q.
2941          */
2942         if (priv->vlan_state != SJA1105_VLAN_FILTERING_FULL &&
2943             vid_is_dsa_8021q(vlan->vid)) {
2944                 NL_SET_ERR_MSG_MOD(extack,
2945                                    "Range 1024-3071 reserved for dsa_8021q operation");
2946                 return -EBUSY;
2947         }
2948
2949         rc = sja1105_vlan_add_one(ds, port, vlan->vid, vlan->flags,
2950                                   &priv->bridge_vlans);
2951         if (rc < 0)
2952                 return rc;
2953         if (rc > 0)
2954                 vlan_table_changed = true;
2955
2956         if (!vlan_table_changed)
2957                 return 0;
2958
2959         return sja1105_build_vlan_table(priv, true);
2960 }
2961
2962 static int sja1105_vlan_del(struct dsa_switch *ds, int port,
2963                             const struct switchdev_obj_port_vlan *vlan)
2964 {
2965         struct sja1105_private *priv = ds->priv;
2966         bool vlan_table_changed = false;
2967         int rc;
2968
2969         rc = sja1105_vlan_del_one(ds, port, vlan->vid, &priv->bridge_vlans);
2970         if (rc > 0)
2971                 vlan_table_changed = true;
2972
2973         if (!vlan_table_changed)
2974                 return 0;
2975
2976         return sja1105_build_vlan_table(priv, true);
2977 }
2978
2979 static int sja1105_dsa_8021q_vlan_add(struct dsa_switch *ds, int port, u16 vid,
2980                                       u16 flags)
2981 {
2982         struct sja1105_private *priv = ds->priv;
2983         int rc;
2984
2985         rc = sja1105_vlan_add_one(ds, port, vid, flags, &priv->dsa_8021q_vlans);
2986         if (rc <= 0)
2987                 return rc;
2988
2989         return sja1105_build_vlan_table(priv, true);
2990 }
2991
2992 static int sja1105_dsa_8021q_vlan_del(struct dsa_switch *ds, int port, u16 vid)
2993 {
2994         struct sja1105_private *priv = ds->priv;
2995         int rc;
2996
2997         rc = sja1105_vlan_del_one(ds, port, vid, &priv->dsa_8021q_vlans);
2998         if (!rc)
2999                 return 0;
3000
3001         return sja1105_build_vlan_table(priv, true);
3002 }
3003
3004 static const struct dsa_8021q_ops sja1105_dsa_8021q_ops = {
3005         .vlan_add       = sja1105_dsa_8021q_vlan_add,
3006         .vlan_del       = sja1105_dsa_8021q_vlan_del,
3007 };
3008
3009 /* The programming model for the SJA1105 switch is "all-at-once" via static
3010  * configuration tables. Some of these can be dynamically modified at runtime,
3011  * but not the xMII mode parameters table.
3012  * Furthermode, some PHYs may not have crystals for generating their clocks
3013  * (e.g. RMII). Instead, their 50MHz clock is supplied via the SJA1105 port's
3014  * ref_clk pin. So port clocking needs to be initialized early, before
3015  * connecting to PHYs is attempted, otherwise they won't respond through MDIO.
3016  * Setting correct PHY link speed does not matter now.
3017  * But dsa_slave_phy_setup is called later than sja1105_setup, so the PHY
3018  * bindings are not yet parsed by DSA core. We need to parse early so that we
3019  * can populate the xMII mode parameters table.
3020  */
3021 static int sja1105_setup(struct dsa_switch *ds)
3022 {
3023         struct sja1105_private *priv = ds->priv;
3024         int rc;
3025
3026         rc = sja1105_parse_dt(priv);
3027         if (rc < 0) {
3028                 dev_err(ds->dev, "Failed to parse DT: %d\n", rc);
3029                 return rc;
3030         }
3031
3032         /* Error out early if internal delays are required through DT
3033          * and we can't apply them.
3034          */
3035         rc = sja1105_parse_rgmii_delays(priv);
3036         if (rc < 0) {
3037                 dev_err(ds->dev, "RGMII delay not supported\n");
3038                 return rc;
3039         }
3040
3041         rc = sja1105_ptp_clock_register(ds);
3042         if (rc < 0) {
3043                 dev_err(ds->dev, "Failed to register PTP clock: %d\n", rc);
3044                 return rc;
3045         }
3046
3047         rc = sja1105_mdiobus_register(ds);
3048         if (rc < 0) {
3049                 dev_err(ds->dev, "Failed to register MDIO bus: %pe\n",
3050                         ERR_PTR(rc));
3051                 goto out_ptp_clock_unregister;
3052         }
3053
3054         if (priv->info->disable_microcontroller) {
3055                 rc = priv->info->disable_microcontroller(priv);
3056                 if (rc < 0) {
3057                         dev_err(ds->dev,
3058                                 "Failed to disable microcontroller: %pe\n",
3059                                 ERR_PTR(rc));
3060                         goto out_mdiobus_unregister;
3061                 }
3062         }
3063
3064         /* Create and send configuration down to device */
3065         rc = sja1105_static_config_load(priv);
3066         if (rc < 0) {
3067                 dev_err(ds->dev, "Failed to load static config: %d\n", rc);
3068                 goto out_mdiobus_unregister;
3069         }
3070
3071         /* Configure the CGU (PHY link modes and speeds) */
3072         if (priv->info->clocking_setup) {
3073                 rc = priv->info->clocking_setup(priv);
3074                 if (rc < 0) {
3075                         dev_err(ds->dev,
3076                                 "Failed to configure MII clocking: %pe\n",
3077                                 ERR_PTR(rc));
3078                         goto out_static_config_free;
3079                 }
3080         }
3081
3082         /* On SJA1105, VLAN filtering per se is always enabled in hardware.
3083          * The only thing we can do to disable it is lie about what the 802.1Q
3084          * EtherType is.
3085          * So it will still try to apply VLAN filtering, but all ingress
3086          * traffic (except frames received with EtherType of ETH_P_SJA1105)
3087          * will be internally tagged with a distorted VLAN header where the
3088          * TPID is ETH_P_SJA1105, and the VLAN ID is the port pvid.
3089          */
3090         ds->vlan_filtering_is_global = true;
3091
3092         /* Advertise the 8 egress queues */
3093         ds->num_tx_queues = SJA1105_NUM_TC;
3094
3095         ds->mtu_enforcement_ingress = true;
3096
3097         priv->best_effort_vlan_filtering = true;
3098
3099         rc = sja1105_devlink_setup(ds);
3100         if (rc < 0)
3101                 goto out_static_config_free;
3102
3103         /* The DSA/switchdev model brings up switch ports in standalone mode by
3104          * default, and that means vlan_filtering is 0 since they're not under
3105          * a bridge, so it's safe to set up switch tagging at this time.
3106          */
3107         rtnl_lock();
3108         rc = sja1105_setup_8021q_tagging(ds, true);
3109         rtnl_unlock();
3110         if (rc)
3111                 goto out_devlink_teardown;
3112
3113         return 0;
3114
3115 out_devlink_teardown:
3116         sja1105_devlink_teardown(ds);
3117 out_mdiobus_unregister:
3118         sja1105_mdiobus_unregister(ds);
3119 out_ptp_clock_unregister:
3120         sja1105_ptp_clock_unregister(ds);
3121 out_static_config_free:
3122         sja1105_static_config_free(&priv->static_config);
3123
3124         return rc;
3125 }
3126
3127 static void sja1105_teardown(struct dsa_switch *ds)
3128 {
3129         struct sja1105_private *priv = ds->priv;
3130         struct sja1105_bridge_vlan *v, *n;
3131         int port;
3132
3133         for (port = 0; port < ds->num_ports; port++) {
3134                 struct sja1105_port *sp = &priv->ports[port];
3135
3136                 if (!dsa_is_user_port(ds, port))
3137                         continue;
3138
3139                 if (sp->xmit_worker)
3140                         kthread_destroy_worker(sp->xmit_worker);
3141         }
3142
3143         sja1105_devlink_teardown(ds);
3144         sja1105_flower_teardown(ds);
3145         sja1105_tas_teardown(ds);
3146         sja1105_ptp_clock_unregister(ds);
3147         sja1105_static_config_free(&priv->static_config);
3148
3149         list_for_each_entry_safe(v, n, &priv->dsa_8021q_vlans, list) {
3150                 list_del(&v->list);
3151                 kfree(v);
3152         }
3153
3154         list_for_each_entry_safe(v, n, &priv->bridge_vlans, list) {
3155                 list_del(&v->list);
3156                 kfree(v);
3157         }
3158 }
3159
3160 static void sja1105_port_disable(struct dsa_switch *ds, int port)
3161 {
3162         struct sja1105_private *priv = ds->priv;
3163         struct sja1105_port *sp = &priv->ports[port];
3164
3165         if (!dsa_is_user_port(ds, port))
3166                 return;
3167
3168         kthread_cancel_work_sync(&sp->xmit_work);
3169         skb_queue_purge(&sp->xmit_queue);
3170 }
3171
3172 static int sja1105_mgmt_xmit(struct dsa_switch *ds, int port, int slot,
3173                              struct sk_buff *skb, bool takets)
3174 {
3175         struct sja1105_mgmt_entry mgmt_route = {0};
3176         struct sja1105_private *priv = ds->priv;
3177         struct ethhdr *hdr;
3178         int timeout = 10;
3179         int rc;
3180
3181         hdr = eth_hdr(skb);
3182
3183         mgmt_route.macaddr = ether_addr_to_u64(hdr->h_dest);
3184         mgmt_route.destports = BIT(port);
3185         mgmt_route.enfport = 1;
3186         mgmt_route.tsreg = 0;
3187         mgmt_route.takets = takets;
3188
3189         rc = sja1105_dynamic_config_write(priv, BLK_IDX_MGMT_ROUTE,
3190                                           slot, &mgmt_route, true);
3191         if (rc < 0) {
3192                 kfree_skb(skb);
3193                 return rc;
3194         }
3195
3196         /* Transfer skb to the host port. */
3197         dsa_enqueue_skb(skb, dsa_to_port(ds, port)->slave);
3198
3199         /* Wait until the switch has processed the frame */
3200         do {
3201                 rc = sja1105_dynamic_config_read(priv, BLK_IDX_MGMT_ROUTE,
3202                                                  slot, &mgmt_route);
3203                 if (rc < 0) {
3204                         dev_err_ratelimited(priv->ds->dev,
3205                                             "failed to poll for mgmt route\n");
3206                         continue;
3207                 }
3208
3209                 /* UM10944: The ENFPORT flag of the respective entry is
3210                  * cleared when a match is found. The host can use this
3211                  * flag as an acknowledgment.
3212                  */
3213                 cpu_relax();
3214         } while (mgmt_route.enfport && --timeout);
3215
3216         if (!timeout) {
3217                 /* Clean up the management route so that a follow-up
3218                  * frame may not match on it by mistake.
3219                  * This is only hardware supported on P/Q/R/S - on E/T it is
3220                  * a no-op and we are silently discarding the -EOPNOTSUPP.
3221                  */
3222                 sja1105_dynamic_config_write(priv, BLK_IDX_MGMT_ROUTE,
3223                                              slot, &mgmt_route, false);
3224                 dev_err_ratelimited(priv->ds->dev, "xmit timed out\n");
3225         }
3226
3227         return NETDEV_TX_OK;
3228 }
3229
3230 #define work_to_port(work) \
3231                 container_of((work), struct sja1105_port, xmit_work)
3232 #define tagger_to_sja1105(t) \
3233                 container_of((t), struct sja1105_private, tagger_data)
3234
3235 /* Deferred work is unfortunately necessary because setting up the management
3236  * route cannot be done from atomit context (SPI transfer takes a sleepable
3237  * lock on the bus)
3238  */
3239 static void sja1105_port_deferred_xmit(struct kthread_work *work)
3240 {
3241         struct sja1105_port *sp = work_to_port(work);
3242         struct sja1105_tagger_data *tagger_data = sp->data;
3243         struct sja1105_private *priv = tagger_to_sja1105(tagger_data);
3244         int port = sp - priv->ports;
3245         struct sk_buff *skb;
3246
3247         while ((skb = skb_dequeue(&sp->xmit_queue)) != NULL) {
3248                 struct sk_buff *clone = SJA1105_SKB_CB(skb)->clone;
3249
3250                 mutex_lock(&priv->mgmt_lock);
3251
3252                 sja1105_mgmt_xmit(priv->ds, port, 0, skb, !!clone);
3253
3254                 /* The clone, if there, was made by dsa_skb_tx_timestamp */
3255                 if (clone)
3256                         sja1105_ptp_txtstamp_skb(priv->ds, port, clone);
3257
3258                 mutex_unlock(&priv->mgmt_lock);
3259         }
3260 }
3261
3262 /* The MAXAGE setting belongs to the L2 Forwarding Parameters table,
3263  * which cannot be reconfigured at runtime. So a switch reset is required.
3264  */
3265 static int sja1105_set_ageing_time(struct dsa_switch *ds,
3266                                    unsigned int ageing_time)
3267 {
3268         struct sja1105_l2_lookup_params_entry *l2_lookup_params;
3269         struct sja1105_private *priv = ds->priv;
3270         struct sja1105_table *table;
3271         unsigned int maxage;
3272
3273         table = &priv->static_config.tables[BLK_IDX_L2_LOOKUP_PARAMS];
3274         l2_lookup_params = table->entries;
3275
3276         maxage = SJA1105_AGEING_TIME_MS(ageing_time);
3277
3278         if (l2_lookup_params->maxage == maxage)
3279                 return 0;
3280
3281         l2_lookup_params->maxage = maxage;
3282
3283         return sja1105_static_config_reload(priv, SJA1105_AGEING_TIME);
3284 }
3285
3286 static int sja1105_change_mtu(struct dsa_switch *ds, int port, int new_mtu)
3287 {
3288         struct sja1105_l2_policing_entry *policing;
3289         struct sja1105_private *priv = ds->priv;
3290
3291         new_mtu += VLAN_ETH_HLEN + ETH_FCS_LEN;
3292
3293         if (dsa_is_cpu_port(ds, port))
3294                 new_mtu += VLAN_HLEN;
3295
3296         policing = priv->static_config.tables[BLK_IDX_L2_POLICING].entries;
3297
3298         if (policing[port].maxlen == new_mtu)
3299                 return 0;
3300
3301         policing[port].maxlen = new_mtu;
3302
3303         return sja1105_static_config_reload(priv, SJA1105_BEST_EFFORT_POLICING);
3304 }
3305
3306 static int sja1105_get_max_mtu(struct dsa_switch *ds, int port)
3307 {
3308         return 2043 - VLAN_ETH_HLEN - ETH_FCS_LEN;
3309 }
3310
3311 static int sja1105_port_setup_tc(struct dsa_switch *ds, int port,
3312                                  enum tc_setup_type type,
3313                                  void *type_data)
3314 {
3315         switch (type) {
3316         case TC_SETUP_QDISC_TAPRIO:
3317                 return sja1105_setup_tc_taprio(ds, port, type_data);
3318         case TC_SETUP_QDISC_CBS:
3319                 return sja1105_setup_tc_cbs(ds, port, type_data);
3320         default:
3321                 return -EOPNOTSUPP;
3322         }
3323 }
3324
3325 /* We have a single mirror (@to) port, but can configure ingress and egress
3326  * mirroring on all other (@from) ports.
3327  * We need to allow mirroring rules only as long as the @to port is always the
3328  * same, and we need to unset the @to port from mirr_port only when there is no
3329  * mirroring rule that references it.
3330  */
3331 static int sja1105_mirror_apply(struct sja1105_private *priv, int from, int to,
3332                                 bool ingress, bool enabled)
3333 {
3334         struct sja1105_general_params_entry *general_params;
3335         struct sja1105_mac_config_entry *mac;
3336         struct dsa_switch *ds = priv->ds;
3337         struct sja1105_table *table;
3338         bool already_enabled;
3339         u64 new_mirr_port;
3340         int rc;
3341
3342         table = &priv->static_config.tables[BLK_IDX_GENERAL_PARAMS];
3343         general_params = table->entries;
3344
3345         mac = priv->static_config.tables[BLK_IDX_MAC_CONFIG].entries;
3346
3347         already_enabled = (general_params->mirr_port != ds->num_ports);
3348         if (already_enabled && enabled && general_params->mirr_port != to) {
3349                 dev_err(priv->ds->dev,
3350                         "Delete mirroring rules towards port %llu first\n",
3351                         general_params->mirr_port);
3352                 return -EBUSY;
3353         }
3354
3355         new_mirr_port = to;
3356         if (!enabled) {
3357                 bool keep = false;
3358                 int port;
3359
3360                 /* Anybody still referencing mirr_port? */
3361                 for (port = 0; port < ds->num_ports; port++) {
3362                         if (mac[port].ing_mirr || mac[port].egr_mirr) {
3363                                 keep = true;
3364                                 break;
3365                         }
3366                 }
3367                 /* Unset already_enabled for next time */
3368                 if (!keep)
3369                         new_mirr_port = ds->num_ports;
3370         }
3371         if (new_mirr_port != general_params->mirr_port) {
3372                 general_params->mirr_port = new_mirr_port;
3373
3374                 rc = sja1105_dynamic_config_write(priv, BLK_IDX_GENERAL_PARAMS,
3375                                                   0, general_params, true);
3376                 if (rc < 0)
3377                         return rc;
3378         }
3379
3380         if (ingress)
3381                 mac[from].ing_mirr = enabled;
3382         else
3383                 mac[from].egr_mirr = enabled;
3384
3385         return sja1105_dynamic_config_write(priv, BLK_IDX_MAC_CONFIG, from,
3386                                             &mac[from], true);
3387 }
3388
3389 static int sja1105_mirror_add(struct dsa_switch *ds, int port,
3390                               struct dsa_mall_mirror_tc_entry *mirror,
3391                               bool ingress)
3392 {
3393         return sja1105_mirror_apply(ds->priv, port, mirror->to_local_port,
3394                                     ingress, true);
3395 }
3396
3397 static void sja1105_mirror_del(struct dsa_switch *ds, int port,
3398                                struct dsa_mall_mirror_tc_entry *mirror)
3399 {
3400         sja1105_mirror_apply(ds->priv, port, mirror->to_local_port,
3401                              mirror->ingress, false);
3402 }
3403
3404 static int sja1105_port_policer_add(struct dsa_switch *ds, int port,
3405                                     struct dsa_mall_policer_tc_entry *policer)
3406 {
3407         struct sja1105_l2_policing_entry *policing;
3408         struct sja1105_private *priv = ds->priv;
3409
3410         policing = priv->static_config.tables[BLK_IDX_L2_POLICING].entries;
3411
3412         /* In hardware, every 8 microseconds the credit level is incremented by
3413          * the value of RATE bytes divided by 64, up to a maximum of SMAX
3414          * bytes.
3415          */
3416         policing[port].rate = div_u64(512 * policer->rate_bytes_per_sec,
3417                                       1000000);
3418         policing[port].smax = policer->burst;
3419
3420         return sja1105_static_config_reload(priv, SJA1105_BEST_EFFORT_POLICING);
3421 }
3422
3423 static void sja1105_port_policer_del(struct dsa_switch *ds, int port)
3424 {
3425         struct sja1105_l2_policing_entry *policing;
3426         struct sja1105_private *priv = ds->priv;
3427
3428         policing = priv->static_config.tables[BLK_IDX_L2_POLICING].entries;
3429
3430         policing[port].rate = SJA1105_RATE_MBPS(1000);
3431         policing[port].smax = 65535;
3432
3433         sja1105_static_config_reload(priv, SJA1105_BEST_EFFORT_POLICING);
3434 }
3435
3436 static int sja1105_port_set_learning(struct sja1105_private *priv, int port,
3437                                      bool enabled)
3438 {
3439         struct sja1105_mac_config_entry *mac;
3440         int rc;
3441
3442         mac = priv->static_config.tables[BLK_IDX_MAC_CONFIG].entries;
3443
3444         mac[port].dyn_learn = enabled;
3445
3446         rc = sja1105_dynamic_config_write(priv, BLK_IDX_MAC_CONFIG, port,
3447                                           &mac[port], true);
3448         if (rc)
3449                 return rc;
3450
3451         if (enabled)
3452                 priv->learn_ena |= BIT(port);
3453         else
3454                 priv->learn_ena &= ~BIT(port);
3455
3456         return 0;
3457 }
3458
3459 static int sja1105_port_ucast_bcast_flood(struct sja1105_private *priv, int to,
3460                                           struct switchdev_brport_flags flags)
3461 {
3462         if (flags.mask & BR_FLOOD) {
3463                 if (flags.val & BR_FLOOD)
3464                         priv->ucast_egress_floods |= BIT(to);
3465                 else
3466                         priv->ucast_egress_floods &= ~BIT(to);
3467         }
3468
3469         if (flags.mask & BR_BCAST_FLOOD) {
3470                 if (flags.val & BR_BCAST_FLOOD)
3471                         priv->bcast_egress_floods |= BIT(to);
3472                 else
3473                         priv->bcast_egress_floods &= ~BIT(to);
3474         }
3475
3476         return sja1105_manage_flood_domains(priv);
3477 }
3478
3479 static int sja1105_port_mcast_flood(struct sja1105_private *priv, int to,
3480                                     struct switchdev_brport_flags flags,
3481                                     struct netlink_ext_ack *extack)
3482 {
3483         struct sja1105_l2_lookup_entry *l2_lookup;
3484         struct sja1105_table *table;
3485         int match;
3486
3487         table = &priv->static_config.tables[BLK_IDX_L2_LOOKUP];
3488         l2_lookup = table->entries;
3489
3490         for (match = 0; match < table->entry_count; match++)
3491                 if (l2_lookup[match].macaddr == SJA1105_UNKNOWN_MULTICAST &&
3492                     l2_lookup[match].mask_macaddr == SJA1105_UNKNOWN_MULTICAST)
3493                         break;
3494
3495         if (match == table->entry_count) {
3496                 NL_SET_ERR_MSG_MOD(extack,
3497                                    "Could not find FDB entry for unknown multicast");
3498                 return -ENOSPC;
3499         }
3500
3501         if (flags.val & BR_MCAST_FLOOD)
3502                 l2_lookup[match].destports |= BIT(to);
3503         else
3504                 l2_lookup[match].destports &= ~BIT(to);
3505
3506         return sja1105_dynamic_config_write(priv, BLK_IDX_L2_LOOKUP,
3507                                             l2_lookup[match].index,
3508                                             &l2_lookup[match],
3509                                             true);
3510 }
3511
3512 static int sja1105_port_pre_bridge_flags(struct dsa_switch *ds, int port,
3513                                          struct switchdev_brport_flags flags,
3514                                          struct netlink_ext_ack *extack)
3515 {
3516         struct sja1105_private *priv = ds->priv;
3517
3518         if (flags.mask & ~(BR_LEARNING | BR_FLOOD | BR_MCAST_FLOOD |
3519                            BR_BCAST_FLOOD))
3520                 return -EINVAL;
3521
3522         if (flags.mask & (BR_FLOOD | BR_MCAST_FLOOD) &&
3523             !priv->info->can_limit_mcast_flood) {
3524                 bool multicast = !!(flags.val & BR_MCAST_FLOOD);
3525                 bool unicast = !!(flags.val & BR_FLOOD);
3526
3527                 if (unicast != multicast) {
3528                         NL_SET_ERR_MSG_MOD(extack,
3529                                            "This chip cannot configure multicast flooding independently of unicast");
3530                         return -EINVAL;
3531                 }
3532         }
3533
3534         return 0;
3535 }
3536
3537 static int sja1105_port_bridge_flags(struct dsa_switch *ds, int port,
3538                                      struct switchdev_brport_flags flags,
3539                                      struct netlink_ext_ack *extack)
3540 {
3541         struct sja1105_private *priv = ds->priv;
3542         int rc;
3543
3544         if (flags.mask & BR_LEARNING) {
3545                 bool learn_ena = !!(flags.val & BR_LEARNING);
3546
3547                 rc = sja1105_port_set_learning(priv, port, learn_ena);
3548                 if (rc)
3549                         return rc;
3550         }
3551
3552         if (flags.mask & (BR_FLOOD | BR_BCAST_FLOOD)) {
3553                 rc = sja1105_port_ucast_bcast_flood(priv, port, flags);
3554                 if (rc)
3555                         return rc;
3556         }
3557
3558         /* For chips that can't offload BR_MCAST_FLOOD independently, there
3559          * is nothing to do here, we ensured the configuration is in sync by
3560          * offloading BR_FLOOD.
3561          */
3562         if (flags.mask & BR_MCAST_FLOOD && priv->info->can_limit_mcast_flood) {
3563                 rc = sja1105_port_mcast_flood(priv, port, flags,
3564                                               extack);
3565                 if (rc)
3566                         return rc;
3567         }
3568
3569         return 0;
3570 }
3571
3572 static const struct dsa_switch_ops sja1105_switch_ops = {
3573         .get_tag_protocol       = sja1105_get_tag_protocol,
3574         .setup                  = sja1105_setup,
3575         .teardown               = sja1105_teardown,
3576         .set_ageing_time        = sja1105_set_ageing_time,
3577         .port_change_mtu        = sja1105_change_mtu,
3578         .port_max_mtu           = sja1105_get_max_mtu,
3579         .phylink_validate       = sja1105_phylink_validate,
3580         .phylink_mac_config     = sja1105_mac_config,
3581         .phylink_mac_link_up    = sja1105_mac_link_up,
3582         .phylink_mac_link_down  = sja1105_mac_link_down,
3583         .get_strings            = sja1105_get_strings,
3584         .get_ethtool_stats      = sja1105_get_ethtool_stats,
3585         .get_sset_count         = sja1105_get_sset_count,
3586         .get_ts_info            = sja1105_get_ts_info,
3587         .port_disable           = sja1105_port_disable,
3588         .port_fdb_dump          = sja1105_fdb_dump,
3589         .port_fdb_add           = sja1105_fdb_add,
3590         .port_fdb_del           = sja1105_fdb_del,
3591         .port_bridge_join       = sja1105_bridge_join,
3592         .port_bridge_leave      = sja1105_bridge_leave,
3593         .port_pre_bridge_flags  = sja1105_port_pre_bridge_flags,
3594         .port_bridge_flags      = sja1105_port_bridge_flags,
3595         .port_stp_state_set     = sja1105_bridge_stp_state_set,
3596         .port_vlan_filtering    = sja1105_vlan_filtering,
3597         .port_vlan_add          = sja1105_vlan_add,
3598         .port_vlan_del          = sja1105_vlan_del,
3599         .port_mdb_add           = sja1105_mdb_add,
3600         .port_mdb_del           = sja1105_mdb_del,
3601         .port_hwtstamp_get      = sja1105_hwtstamp_get,
3602         .port_hwtstamp_set      = sja1105_hwtstamp_set,
3603         .port_rxtstamp          = sja1105_port_rxtstamp,
3604         .port_txtstamp          = sja1105_port_txtstamp,
3605         .port_setup_tc          = sja1105_port_setup_tc,
3606         .port_mirror_add        = sja1105_mirror_add,
3607         .port_mirror_del        = sja1105_mirror_del,
3608         .port_policer_add       = sja1105_port_policer_add,
3609         .port_policer_del       = sja1105_port_policer_del,
3610         .cls_flower_add         = sja1105_cls_flower_add,
3611         .cls_flower_del         = sja1105_cls_flower_del,
3612         .cls_flower_stats       = sja1105_cls_flower_stats,
3613         .crosschip_bridge_join  = sja1105_crosschip_bridge_join,
3614         .crosschip_bridge_leave = sja1105_crosschip_bridge_leave,
3615         .devlink_param_get      = sja1105_devlink_param_get,
3616         .devlink_param_set      = sja1105_devlink_param_set,
3617         .devlink_info_get       = sja1105_devlink_info_get,
3618 };
3619
3620 static const struct of_device_id sja1105_dt_ids[];
3621
3622 static int sja1105_check_device_id(struct sja1105_private *priv)
3623 {
3624         const struct sja1105_regs *regs = priv->info->regs;
3625         u8 prod_id[SJA1105_SIZE_DEVICE_ID] = {0};
3626         struct device *dev = &priv->spidev->dev;
3627         const struct of_device_id *match;
3628         u32 device_id;
3629         u64 part_no;
3630         int rc;
3631
3632         rc = sja1105_xfer_u32(priv, SPI_READ, regs->device_id, &device_id,
3633                               NULL);
3634         if (rc < 0)
3635                 return rc;
3636
3637         rc = sja1105_xfer_buf(priv, SPI_READ, regs->prod_id, prod_id,
3638                               SJA1105_SIZE_DEVICE_ID);
3639         if (rc < 0)
3640                 return rc;
3641
3642         sja1105_unpack(prod_id, &part_no, 19, 4, SJA1105_SIZE_DEVICE_ID);
3643
3644         for (match = sja1105_dt_ids; match->compatible[0]; match++) {
3645                 const struct sja1105_info *info = match->data;
3646
3647                 /* Is what's been probed in our match table at all? */
3648                 if (info->device_id != device_id || info->part_no != part_no)
3649                         continue;
3650
3651                 /* But is it what's in the device tree? */
3652                 if (priv->info->device_id != device_id ||
3653                     priv->info->part_no != part_no) {
3654                         dev_warn(dev, "Device tree specifies chip %s but found %s, please fix it!\n",
3655                                  priv->info->name, info->name);
3656                         /* It isn't. No problem, pick that up. */
3657                         priv->info = info;
3658                 }
3659
3660                 return 0;
3661         }
3662
3663         dev_err(dev, "Unexpected {device ID, part number}: 0x%x 0x%llx\n",
3664                 device_id, part_no);
3665
3666         return -ENODEV;
3667 }
3668
3669 static int sja1105_probe(struct spi_device *spi)
3670 {
3671         struct sja1105_tagger_data *tagger_data;
3672         struct device *dev = &spi->dev;
3673         struct sja1105_private *priv;
3674         size_t max_xfer, max_msg;
3675         struct dsa_switch *ds;
3676         int rc, port;
3677
3678         if (!dev->of_node) {
3679                 dev_err(dev, "No DTS bindings for SJA1105 driver\n");
3680                 return -EINVAL;
3681         }
3682
3683         priv = devm_kzalloc(dev, sizeof(struct sja1105_private), GFP_KERNEL);
3684         if (!priv)
3685                 return -ENOMEM;
3686
3687         /* Configure the optional reset pin and bring up switch */
3688         priv->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
3689         if (IS_ERR(priv->reset_gpio))
3690                 dev_dbg(dev, "reset-gpios not defined, ignoring\n");
3691         else
3692                 sja1105_hw_reset(priv->reset_gpio, 1, 1);
3693
3694         /* Populate our driver private structure (priv) based on
3695          * the device tree node that was probed (spi)
3696          */
3697         priv->spidev = spi;
3698         spi_set_drvdata(spi, priv);
3699
3700         /* Configure the SPI bus */
3701         spi->bits_per_word = 8;
3702         rc = spi_setup(spi);
3703         if (rc < 0) {
3704                 dev_err(dev, "Could not init SPI\n");
3705                 return rc;
3706         }
3707
3708         /* In sja1105_xfer, we send spi_messages composed of two spi_transfers:
3709          * a small one for the message header and another one for the current
3710          * chunk of the packed buffer.
3711          * Check that the restrictions imposed by the SPI controller are
3712          * respected: the chunk buffer is smaller than the max transfer size,
3713          * and the total length of the chunk plus its message header is smaller
3714          * than the max message size.
3715          * We do that during probe time since the maximum transfer size is a
3716          * runtime invariant.
3717          */
3718         max_xfer = spi_max_transfer_size(spi);
3719         max_msg = spi_max_message_size(spi);
3720
3721         /* We need to send at least one 64-bit word of SPI payload per message
3722          * in order to be able to make useful progress.
3723          */
3724         if (max_msg < SJA1105_SIZE_SPI_MSG_HEADER + 8) {
3725                 dev_err(dev, "SPI master cannot send large enough buffers, aborting\n");
3726                 return -EINVAL;
3727         }
3728
3729         priv->max_xfer_len = SJA1105_SIZE_SPI_MSG_MAXLEN;
3730         if (priv->max_xfer_len > max_xfer)
3731                 priv->max_xfer_len = max_xfer;
3732         if (priv->max_xfer_len > max_msg - SJA1105_SIZE_SPI_MSG_HEADER)
3733                 priv->max_xfer_len = max_msg - SJA1105_SIZE_SPI_MSG_HEADER;
3734
3735         priv->info = of_device_get_match_data(dev);
3736
3737         /* Detect hardware device */
3738         rc = sja1105_check_device_id(priv);
3739         if (rc < 0) {
3740                 dev_err(dev, "Device ID check failed: %d\n", rc);
3741                 return rc;
3742         }
3743
3744         dev_info(dev, "Probed switch chip: %s\n", priv->info->name);
3745
3746         ds = devm_kzalloc(dev, sizeof(*ds), GFP_KERNEL);
3747         if (!ds)
3748                 return -ENOMEM;
3749
3750         ds->dev = dev;
3751         ds->num_ports = priv->info->num_ports;
3752         ds->ops = &sja1105_switch_ops;
3753         ds->priv = priv;
3754         priv->ds = ds;
3755
3756         tagger_data = &priv->tagger_data;
3757
3758         mutex_init(&priv->ptp_data.lock);
3759         mutex_init(&priv->mgmt_lock);
3760
3761         priv->dsa_8021q_ctx = devm_kzalloc(dev, sizeof(*priv->dsa_8021q_ctx),
3762                                            GFP_KERNEL);
3763         if (!priv->dsa_8021q_ctx)
3764                 return -ENOMEM;
3765
3766         priv->dsa_8021q_ctx->ops = &sja1105_dsa_8021q_ops;
3767         priv->dsa_8021q_ctx->proto = htons(ETH_P_8021Q);
3768         priv->dsa_8021q_ctx->ds = ds;
3769
3770         INIT_LIST_HEAD(&priv->dsa_8021q_ctx->crosschip_links);
3771         INIT_LIST_HEAD(&priv->bridge_vlans);
3772         INIT_LIST_HEAD(&priv->dsa_8021q_vlans);
3773
3774         sja1105_tas_setup(ds);
3775         sja1105_flower_setup(ds);
3776
3777         rc = dsa_register_switch(priv->ds);
3778         if (rc)
3779                 return rc;
3780
3781         if (IS_ENABLED(CONFIG_NET_SCH_CBS)) {
3782                 priv->cbs = devm_kcalloc(dev, priv->info->num_cbs_shapers,
3783                                          sizeof(struct sja1105_cbs_entry),
3784                                          GFP_KERNEL);
3785                 if (!priv->cbs) {
3786                         rc = -ENOMEM;
3787                         goto out_unregister_switch;
3788                 }
3789         }
3790
3791         /* Connections between dsa_port and sja1105_port */
3792         for (port = 0; port < ds->num_ports; port++) {
3793                 struct sja1105_port *sp = &priv->ports[port];
3794                 struct dsa_port *dp = dsa_to_port(ds, port);
3795                 struct net_device *slave;
3796                 int subvlan;
3797
3798                 if (!dsa_is_user_port(ds, port))
3799                         continue;
3800
3801                 dp->priv = sp;
3802                 sp->dp = dp;
3803                 sp->data = tagger_data;
3804                 slave = dp->slave;
3805                 kthread_init_work(&sp->xmit_work, sja1105_port_deferred_xmit);
3806                 sp->xmit_worker = kthread_create_worker(0, "%s_xmit",
3807                                                         slave->name);
3808                 if (IS_ERR(sp->xmit_worker)) {
3809                         rc = PTR_ERR(sp->xmit_worker);
3810                         dev_err(ds->dev,
3811                                 "failed to create deferred xmit thread: %d\n",
3812                                 rc);
3813                         goto out_destroy_workers;
3814                 }
3815                 skb_queue_head_init(&sp->xmit_queue);
3816                 sp->xmit_tpid = ETH_P_SJA1105;
3817
3818                 for (subvlan = 0; subvlan < DSA_8021Q_N_SUBVLAN; subvlan++)
3819                         sp->subvlan_map[subvlan] = VLAN_N_VID;
3820         }
3821
3822         return 0;
3823
3824 out_destroy_workers:
3825         while (port-- > 0) {
3826                 struct sja1105_port *sp = &priv->ports[port];
3827
3828                 if (!dsa_is_user_port(ds, port))
3829                         continue;
3830
3831                 kthread_destroy_worker(sp->xmit_worker);
3832         }
3833
3834 out_unregister_switch:
3835         dsa_unregister_switch(ds);
3836
3837         return rc;
3838 }
3839
3840 static int sja1105_remove(struct spi_device *spi)
3841 {
3842         struct sja1105_private *priv = spi_get_drvdata(spi);
3843
3844         dsa_unregister_switch(priv->ds);
3845         return 0;
3846 }
3847
3848 static const struct of_device_id sja1105_dt_ids[] = {
3849         { .compatible = "nxp,sja1105e", .data = &sja1105e_info },
3850         { .compatible = "nxp,sja1105t", .data = &sja1105t_info },
3851         { .compatible = "nxp,sja1105p", .data = &sja1105p_info },
3852         { .compatible = "nxp,sja1105q", .data = &sja1105q_info },
3853         { .compatible = "nxp,sja1105r", .data = &sja1105r_info },
3854         { .compatible = "nxp,sja1105s", .data = &sja1105s_info },
3855         { .compatible = "nxp,sja1110a", .data = &sja1110a_info },
3856         { .compatible = "nxp,sja1110b", .data = &sja1110b_info },
3857         { .compatible = "nxp,sja1110c", .data = &sja1110c_info },
3858         { .compatible = "nxp,sja1110d", .data = &sja1110d_info },
3859         { /* sentinel */ },
3860 };
3861 MODULE_DEVICE_TABLE(of, sja1105_dt_ids);
3862
3863 static struct spi_driver sja1105_driver = {
3864         .driver = {
3865                 .name  = "sja1105",
3866                 .owner = THIS_MODULE,
3867                 .of_match_table = of_match_ptr(sja1105_dt_ids),
3868         },
3869         .probe  = sja1105_probe,
3870         .remove = sja1105_remove,
3871 };
3872
3873 module_spi_driver(sja1105_driver);
3874
3875 MODULE_AUTHOR("Vladimir Oltean <olteanv@gmail.com>");
3876 MODULE_AUTHOR("Georg Waibel <georg.waibel@sensor-technik.de>");
3877 MODULE_DESCRIPTION("SJA1105 Driver");
3878 MODULE_LICENSE("GPL v2");