drivers/net/dsa/sja1105/sja1105_main.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /* Copyright (c) 2018, Sensor-Technik Wiedemann GmbH
   3  * Copyright (c) 2018-2019, Vladimir Oltean <olteanv@gmail.com>
   4  */
   5
   6 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
   7
   8 #include <linux/delay.h>
   9 #include <linux/module.h>
  10 #include <linux/printk.h>
  11 #include <linux/spi/spi.h>
  12 #include <linux/errno.h>
  13 #include <linux/gpio/consumer.h>
  14 #include <linux/phylink.h>
  15 #include <linux/of.h>
  16 #include <linux/of_net.h>
  17 #include <linux/of_mdio.h>
  18 #include <linux/of_device.h>
  19 #include <linux/netdev_features.h>
  20 #include <linux/netdevice.h>
  21 #include <linux/if_bridge.h>
  22 #include <linux/if_ether.h>
  23 #include <linux/dsa/8021q.h>
  24 #include "sja1105.h"
  25
  26 static void sja1105_hw_reset(struct gpio_desc *gpio, unsigned int pulse_len,
  27                              unsigned int startup_delay)
  28 {
  29         gpiod_set_value_cansleep(gpio, 1);
  30         /* Wait for minimum reset pulse length */
  31         msleep(pulse_len);
  32         gpiod_set_value_cansleep(gpio, 0);
  33         /* Wait until chip is ready after reset */
  34         msleep(startup_delay);
  35 }
  36
  37 static void
  38 sja1105_port_allow_traffic(struct sja1105_l2_forwarding_entry *l2_fwd,
  39                            int from, int to, bool allow)
  40 {
  41         if (allow) {
  42                 l2_fwd[from].bc_domain  |= BIT(to);
  43                 l2_fwd[from].reach_port |= BIT(to);
  44                 l2_fwd[from].fl_domain  |= BIT(to);
  45         } else {
  46                 l2_fwd[from].bc_domain  &= ~BIT(to);
  47                 l2_fwd[from].reach_port &= ~BIT(to);
  48                 l2_fwd[from].fl_domain  &= ~BIT(to);
  49         }
  50 }
  51
  52 /* Structure used to temporarily transport device tree
  53  * settings into sja1105_setup
  54  */
  55 struct sja1105_dt_port {
  56         phy_interface_t phy_mode;
  57         sja1105_mii_role_t role;
  58 };
  59
  60 static int sja1105_init_mac_settings(struct sja1105_private *priv)
  61 {
  62         struct sja1105_mac_config_entry default_mac = {
  63                 /* Enable all 8 priority queues on egress.
  64                  * Every queue i holds top[i] - base[i] frames.
  65                  * Sum of top[i] - base[i] is 511 (max hardware limit).
  66                  */
  67                 .top  = {0x3F, 0x7F, 0xBF, 0xFF, 0x13F, 0x17F, 0x1BF, 0x1FF},
  68                 .base = {0x0, 0x40, 0x80, 0xC0, 0x100, 0x140, 0x180, 0x1C0},
  69                 .enabled = {true, true, true, true, true, true, true, true},
  70                 /* Keep standard IFG of 12 bytes on egress. */
  71                 .ifg = 0,
  72                 /* Always put the MAC speed in automatic mode, where it can be
  73                  * adjusted at runtime by PHYLINK.
  74                  */
  75                 .speed = SJA1105_SPEED_AUTO,
  76                 /* No static correction for 1-step 1588 events */
  77                 .tp_delin = 0,
  78                 .tp_delout = 0,
  79                 /* Disable aging for critical TTEthernet traffic */
  80                 .maxage = 0xFF,
  81                 /* Internal VLAN (pvid) to apply to untagged ingress */
  82                 .vlanprio = 0,
  83                 .vlanid = 1,
  84                 .ing_mirr = false,
  85                 .egr_mirr = false,
  86                 /* Don't drop traffic with other EtherType than ETH_P_IP */
  87                 .drpnona664 = false,
  88                 /* Don't drop double-tagged traffic */
  89                 .drpdtag = false,
  90                 /* Don't drop untagged traffic */
  91                 .drpuntag = false,
  92                 /* Don't retag 802.1p (VID 0) traffic with the pvid */
  93                 .retag = false,
  94                 /* Disable learning and I/O on user ports by default -
  95                  * STP will enable it.
  96                  */
  97                 .dyn_learn = false,
  98                 .egress = false,
  99                 .ingress = false,
 100         };
 101         struct sja1105_mac_config_entry *mac;
 102         struct sja1105_table *table;
 103         int i;
 104
 105         table = &priv->static_config.tables[BLK_IDX_MAC_CONFIG];
 106
 107         /* Discard previous MAC Configuration Table */
 108         if (table->entry_count) {
 109                 kfree(table->entries);
 110                 table->entry_count = 0;
 111         }
 112
 113         table->entries = kcalloc(SJA1105_NUM_PORTS,
 114                                  table->ops->unpacked_entry_size, GFP_KERNEL);
 115         if (!table->entries)
 116                 return -ENOMEM;
 117
 118         table->entry_count = SJA1105_NUM_PORTS;
 119
 120         mac = table->entries;
 121
 122         for (i = 0; i < SJA1105_NUM_PORTS; i++) {
 123                 mac[i] = default_mac;
 124                 if (i == dsa_upstream_port(priv->ds, i)) {
 125                         /* STP doesn't get called for CPU port, so we need to
 126                          * set the I/O parameters statically.
 127                          */
 128                         mac[i].dyn_learn = true;
 129                         mac[i].ingress = true;
 130                         mac[i].egress = true;
 131                 }
 132         }
 133
 134         return 0;
 135 }
 136
 137 static int sja1105_init_mii_settings(struct sja1105_private *priv,
 138                                      struct sja1105_dt_port *ports)
 139 {
 140         struct device *dev = &priv->spidev->dev;
 141         struct sja1105_xmii_params_entry *mii;
 142         struct sja1105_table *table;
 143         int i;
 144
 145         table = &priv->static_config.tables[BLK_IDX_XMII_PARAMS];
 146
 147         /* Discard previous xMII Mode Parameters Table */
 148         if (table->entry_count) {
 149                 kfree(table->entries);
 150                 table->entry_count = 0;
 151         }
 152
 153         table->entries = kcalloc(SJA1105_MAX_XMII_PARAMS_COUNT,
 154                                  table->ops->unpacked_entry_size, GFP_KERNEL);
 155         if (!table->entries)
 156                 return -ENOMEM;
 157
 158         /* Override table based on PHYLINK DT bindings */
 159         table->entry_count = SJA1105_MAX_XMII_PARAMS_COUNT;
 160
 161         mii = table->entries;
 162
 163         for (i = 0; i < SJA1105_NUM_PORTS; i++) {
 164                 switch (ports[i].phy_mode) {
 165                 case PHY_INTERFACE_MODE_MII:
 166                         mii->xmii_mode[i] = XMII_MODE_MII;
 167                         break;
 168                 case PHY_INTERFACE_MODE_RMII:
 169                         mii->xmii_mode[i] = XMII_MODE_RMII;
 170                         break;
 171                 case PHY_INTERFACE_MODE_RGMII:
 172                 case PHY_INTERFACE_MODE_RGMII_ID:
 173                 case PHY_INTERFACE_MODE_RGMII_RXID:
 174                 case PHY_INTERFACE_MODE_RGMII_TXID:
 175                         mii->xmii_mode[i] = XMII_MODE_RGMII;
 176                         break;
 177                 default:
 178                         dev_err(dev, "Unsupported PHY mode %s!\n",
 179                                 phy_modes(ports[i].phy_mode));
 180                 }
 181
 182                 mii->phy_mac[i] = ports[i].role;
 183         }
 184         return 0;
 185 }
 186
 187 static int sja1105_init_static_fdb(struct sja1105_private *priv)
 188 {
 189         struct sja1105_table *table;
 190
 191         table = &priv->static_config.tables[BLK_IDX_L2_LOOKUP];
 192
 193         /* We only populate the FDB table through dynamic
 194          * L2 Address Lookup entries
 195          */
 196         if (table->entry_count) {
 197                 kfree(table->entries);
 198                 table->entry_count = 0;
 199         }
 200         return 0;
 201 }
 202
 203 static int sja1105_init_l2_lookup_params(struct sja1105_private *priv)
 204 {
 205         struct sja1105_table *table;
 206         u64 max_fdb_entries = SJA1105_MAX_L2_LOOKUP_COUNT / SJA1105_NUM_PORTS;
 207         struct sja1105_l2_lookup_params_entry default_l2_lookup_params = {
 208                 /* Learned FDB entries are forgotten after 300 seconds */
 209                 .maxage = SJA1105_AGEING_TIME_MS(300000),
 210                 /* All entries within a FDB bin are available for learning */
 211                 .dyn_tbsz = SJA1105ET_FDB_BIN_SIZE,
 212                 /* And the P/Q/R/S equivalent setting: */
 213                 .start_dynspc = 0,
 214                 .maxaddrp = {max_fdb_entries, max_fdb_entries, max_fdb_entries,
 215                              max_fdb_entries, max_fdb_entries, },
 216                 /* 2^8 + 2^5 + 2^3 + 2^2 + 2^1 + 1 in Koopman notation */
 217                 .poly = 0x97,
 218                 /* This selects between Independent VLAN Learning (IVL) and
 219                  * Shared VLAN Learning (SVL)
 220                  */
 221                 .shared_learn = false,
 222                 /* Don't discard management traffic based on ENFPORT -
 223                  * we don't perform SMAC port enforcement anyway, so
 224                  * what we are setting here doesn't matter.
 225                  */
 226                 .no_enf_hostprt = false,
 227                 /* Don't learn SMAC for mac_fltres1 and mac_fltres0.
 228                  * Maybe correlate with no_linklocal_learn from bridge driver?
 229                  */
 230                 .no_mgmt_learn = true,
 231                 /* P/Q/R/S only */
 232                 .use_static = true,
 233                 /* Dynamically learned FDB entries can overwrite other (older)
 234                  * dynamic FDB entries
 235                  */
 236                 .owr_dyn = true,
 237                 .drpnolearn = true,
 238         };
 239
 240         table = &priv->static_config.tables[BLK_IDX_L2_LOOKUP_PARAMS];
 241
 242         if (table->entry_count) {
 243                 kfree(table->entries);
 244                 table->entry_count = 0;
 245         }
 246
 247         table->entries = kcalloc(SJA1105_MAX_L2_LOOKUP_PARAMS_COUNT,
 248                                  table->ops->unpacked_entry_size, GFP_KERNEL);
 249         if (!table->entries)
 250                 return -ENOMEM;
 251
 252         table->entry_count = SJA1105_MAX_L2_LOOKUP_PARAMS_COUNT;
 253
 254         /* This table only has a single entry */
 255         ((struct sja1105_l2_lookup_params_entry *)table->entries)[0] =
 256                                 default_l2_lookup_params;
 257
 258         return 0;
 259 }
 260
 261 static int sja1105_init_static_vlan(struct sja1105_private *priv)
 262 {
 263         struct sja1105_table *table;
 264         struct sja1105_vlan_lookup_entry pvid = {
 265                 .ving_mirr = 0,
 266                 .vegr_mirr = 0,
 267                 .vmemb_port = 0,
 268                 .vlan_bc = 0,
 269                 .tag_port = 0,
 270                 .vlanid = 1,
 271         };
 272         int i;
 273
 274         table = &priv->static_config.tables[BLK_IDX_VLAN_LOOKUP];
 275
 276         /* The static VLAN table will only contain the initial pvid of 1.
 277          * All other VLANs are to be configured through dynamic entries,
 278          * and kept in the static configuration table as backing memory.
 279          */
 280         if (table->entry_count) {
 281                 kfree(table->entries);
 282                 table->entry_count = 0;
 283         }
 284
 285         table->entries = kcalloc(1, table->ops->unpacked_entry_size,
 286                                  GFP_KERNEL);
 287         if (!table->entries)
 288                 return -ENOMEM;
 289
 290         table->entry_count = 1;
 291
 292         /* VLAN 1: all DT-defined ports are members; no restrictions on
 293          * forwarding; always transmit priority-tagged frames as untagged.
 294          */
 295         for (i = 0; i < SJA1105_NUM_PORTS; i++) {
 296                 pvid.vmemb_port |= BIT(i);
 297                 pvid.vlan_bc |= BIT(i);
 298                 pvid.tag_port &= ~BIT(i);
 299         }
 300
 301         ((struct sja1105_vlan_lookup_entry *)table->entries)[0] = pvid;
 302         return 0;
 303 }
 304
 305 static int sja1105_init_l2_forwarding(struct sja1105_private *priv)
 306 {
 307         struct sja1105_l2_forwarding_entry *l2fwd;
 308         struct sja1105_table *table;
 309         int i, j;
 310
 311         table = &priv->static_config.tables[BLK_IDX_L2_FORWARDING];
 312
 313         if (table->entry_count) {
 314                 kfree(table->entries);
 315                 table->entry_count = 0;
 316         }
 317
 318         table->entries = kcalloc(SJA1105_MAX_L2_FORWARDING_COUNT,
 319                                  table->ops->unpacked_entry_size, GFP_KERNEL);
 320         if (!table->entries)
 321                 return -ENOMEM;
 322
 323         table->entry_count = SJA1105_MAX_L2_FORWARDING_COUNT;
 324
 325         l2fwd = table->entries;
 326
 327         /* First 5 entries define the forwarding rules */
 328         for (i = 0; i < SJA1105_NUM_PORTS; i++) {
 329                 unsigned int upstream = dsa_upstream_port(priv->ds, i);
 330
 331                 for (j = 0; j < SJA1105_NUM_TC; j++)
 332                         l2fwd[i].vlan_pmap[j] = j;
 333
 334                 if (i == upstream)
 335                         continue;
 336
 337                 sja1105_port_allow_traffic(l2fwd, i, upstream, true);
 338                 sja1105_port_allow_traffic(l2fwd, upstream, i, true);
 339         }
 340         /* Next 8 entries define VLAN PCP mapping from ingress to egress.
 341          * Create a one-to-one mapping.
 342          */
 343         for (i = 0; i < SJA1105_NUM_TC; i++)
 344                 for (j = 0; j < SJA1105_NUM_PORTS; j++)
 345                         l2fwd[SJA1105_NUM_PORTS + i].vlan_pmap[j] = i;
 346
 347         return 0;
 348 }
 349
 350 static int sja1105_init_l2_forwarding_params(struct sja1105_private *priv)
 351 {
 352         struct sja1105_l2_forwarding_params_entry default_l2fwd_params = {
 353                 /* Disallow dynamic reconfiguration of vlan_pmap */
 354                 .max_dynp = 0,
 355                 /* Use a single memory partition for all ingress queues */
 356                 .part_spc = { SJA1105_MAX_FRAME_MEMORY, 0, 0, 0, 0, 0, 0, 0 },
 357         };
 358         struct sja1105_table *table;
 359
 360         table = &priv->static_config.tables[BLK_IDX_L2_FORWARDING_PARAMS];
 361
 362         if (table->entry_count) {
 363                 kfree(table->entries);
 364                 table->entry_count = 0;
 365         }
 366
 367         table->entries = kcalloc(SJA1105_MAX_L2_FORWARDING_PARAMS_COUNT,
 368                                  table->ops->unpacked_entry_size, GFP_KERNEL);
 369         if (!table->entries)
 370                 return -ENOMEM;
 371
 372         table->entry_count = SJA1105_MAX_L2_FORWARDING_PARAMS_COUNT;
 373
 374         /* This table only has a single entry */
 375         ((struct sja1105_l2_forwarding_params_entry *)table->entries)[0] =
 376                                 default_l2fwd_params;
 377
 378         return 0;
 379 }
 380
 381 static int sja1105_init_general_params(struct sja1105_private *priv)
 382 {
 383         struct sja1105_general_params_entry default_general_params = {
 384                 /* Disallow dynamic changing of the mirror port */
 385                 .mirr_ptacu = 0,
 386                 .switchid = priv->ds->index,
 387                 /* Priority queue for link-local frames trapped to CPU */
 388                 .hostprio = 7,
 389                 .mac_fltres1 = SJA1105_LINKLOCAL_FILTER_A,
 390                 .mac_flt1    = SJA1105_LINKLOCAL_FILTER_A_MASK,
 391                 .incl_srcpt1 = false,
 392                 .send_meta1  = false,
 393                 .mac_fltres0 = SJA1105_LINKLOCAL_FILTER_B,
 394                 .mac_flt0    = SJA1105_LINKLOCAL_FILTER_B_MASK,
 395                 .incl_srcpt0 = false,
 396                 .send_meta0  = false,
 397                 /* The destination for traffic matching mac_fltres1 and
 398                  * mac_fltres0 on all ports except host_port. Such traffic
 399                  * receieved on host_port itself would be dropped, except
 400                  * by installing a temporary 'management route'
 401                  */
 402                 .host_port = dsa_upstream_port(priv->ds, 0),
 403                 /* Same as host port */
 404                 .mirr_port = dsa_upstream_port(priv->ds, 0),
 405                 /* Link-local traffic received on casc_port will be forwarded
 406                  * to host_port without embedding the source port and device ID
 407                  * info in the destination MAC address (presumably because it
 408                  * is a cascaded port and a downstream SJA switch already did
 409                  * that). Default to an invalid port (to disable the feature)
 410                  * and overwrite this if we find any DSA (cascaded) ports.
 411                  */
 412                 .casc_port = SJA1105_NUM_PORTS,
 413                 /* No TTEthernet */
 414                 .vllupformat = 0,
 415                 .vlmarker = 0,
 416                 .vlmask = 0,
 417                 /* Only update correctionField for 1-step PTP (L2 transport) */
 418                 .ignore2stf = 0,
 419                 /* Forcefully disable VLAN filtering by telling
 420                  * the switch that VLAN has a different EtherType.
 421                  */
 422                 .tpid = ETH_P_SJA1105,
 423                 .tpid2 = ETH_P_SJA1105,
 424         };
 425         struct sja1105_table *table;
 426         int i, k = 0;
 427
 428         for (i = 0; i < SJA1105_NUM_PORTS; i++) {
 429                 if (dsa_is_dsa_port(priv->ds, i))
 430                         default_general_params.casc_port = i;
 431                 else if (dsa_is_user_port(priv->ds, i))
 432                         priv->ports[i].mgmt_slot = k++;
 433         }
 434
 435         table = &priv->static_config.tables[BLK_IDX_GENERAL_PARAMS];
 436
 437         if (table->entry_count) {
 438                 kfree(table->entries);
 439                 table->entry_count = 0;
 440         }
 441
 442         table->entries = kcalloc(SJA1105_MAX_GENERAL_PARAMS_COUNT,
 443                                  table->ops->unpacked_entry_size, GFP_KERNEL);
 444         if (!table->entries)
 445                 return -ENOMEM;
 446
 447         table->entry_count = SJA1105_MAX_GENERAL_PARAMS_COUNT;
 448
 449         /* This table only has a single entry */
 450         ((struct sja1105_general_params_entry *)table->entries)[0] =
 451                                 default_general_params;
 452
 453         return 0;
 454 }
 455
 456 #define SJA1105_RATE_MBPS(speed) (((speed) * 64000) / 1000)
 457
 458 static inline void
 459 sja1105_setup_policer(struct sja1105_l2_policing_entry *policing,
 460                       int index)
 461 {
 462         policing[index].sharindx = index;
 463         policing[index].smax = 65535; /* Burst size in bytes */
 464         policing[index].rate = SJA1105_RATE_MBPS(1000);
 465         policing[index].maxlen = ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN;
 466         policing[index].partition = 0;
 467 }
 468
 469 static int sja1105_init_l2_policing(struct sja1105_private *priv)
 470 {
 471         struct sja1105_l2_policing_entry *policing;
 472         struct sja1105_table *table;
 473         int i, j, k;
 474
 475         table = &priv->static_config.tables[BLK_IDX_L2_POLICING];
 476
 477         /* Discard previous L2 Policing Table */
 478         if (table->entry_count) {
 479                 kfree(table->entries);
 480                 table->entry_count = 0;
 481         }
 482
 483         table->entries = kcalloc(SJA1105_MAX_L2_POLICING_COUNT,
 484                                  table->ops->unpacked_entry_size, GFP_KERNEL);
 485         if (!table->entries)
 486                 return -ENOMEM;
 487
 488         table->entry_count = SJA1105_MAX_L2_POLICING_COUNT;
 489
 490         policing = table->entries;
 491
 492         /* k sweeps through all unicast policers (0-39).
 493          * bcast sweeps through policers 40-44.
 494          */
 495         for (i = 0, k = 0; i < SJA1105_NUM_PORTS; i++) {
 496                 int bcast = (SJA1105_NUM_PORTS * SJA1105_NUM_TC) + i;
 497
 498                 for (j = 0; j < SJA1105_NUM_TC; j++, k++)
 499                         sja1105_setup_policer(policing, k);
 500
 501                 /* Set up this port's policer for broadcast traffic */
 502                 sja1105_setup_policer(policing, bcast);
 503         }
 504         return 0;
 505 }
 506
 507 static int sja1105_init_avb_params(struct sja1105_private *priv,
 508                                    bool on)
 509 {
 510         struct sja1105_avb_params_entry *avb;
 511         struct sja1105_table *table;
 512
 513         table = &priv->static_config.tables[BLK_IDX_AVB_PARAMS];
 514
 515         /* Discard previous AVB Parameters Table */
 516         if (table->entry_count) {
 517                 kfree(table->entries);
 518                 table->entry_count = 0;
 519         }
 520
 521         /* Configure the reception of meta frames only if requested */
 522         if (!on)
 523                 return 0;
 524
 525         table->entries = kcalloc(SJA1105_MAX_AVB_PARAMS_COUNT,
 526                                  table->ops->unpacked_entry_size, GFP_KERNEL);
 527         if (!table->entries)
 528                 return -ENOMEM;
 529
 530         table->entry_count = SJA1105_MAX_AVB_PARAMS_COUNT;
 531
 532         avb = table->entries;
 533
 534         avb->destmeta = SJA1105_META_DMAC;
 535         avb->srcmeta  = SJA1105_META_SMAC;
 536
 537         return 0;
 538 }
 539
 540 static int sja1105_static_config_load(struct sja1105_private *priv,
 541                                       struct sja1105_dt_port *ports)
 542 {
 543         int rc;
 544
 545         sja1105_static_config_free(&priv->static_config);
 546         rc = sja1105_static_config_init(&priv->static_config,
 547                                         priv->info->static_ops,
 548                                         priv->info->device_id);
 549         if (rc)
 550                 return rc;
 551
 552         /* Build static configuration */
 553         rc = sja1105_init_mac_settings(priv);
 554         if (rc < 0)
 555                 return rc;
 556         rc = sja1105_init_mii_settings(priv, ports);
 557         if (rc < 0)
 558                 return rc;
 559         rc = sja1105_init_static_fdb(priv);
 560         if (rc < 0)
 561                 return rc;
 562         rc = sja1105_init_static_vlan(priv);
 563         if (rc < 0)
 564                 return rc;
 565         rc = sja1105_init_l2_lookup_params(priv);
 566         if (rc < 0)
 567                 return rc;
 568         rc = sja1105_init_l2_forwarding(priv);
 569         if (rc < 0)
 570                 return rc;
 571         rc = sja1105_init_l2_forwarding_params(priv);
 572         if (rc < 0)
 573                 return rc;
 574         rc = sja1105_init_l2_policing(priv);
 575         if (rc < 0)
 576                 return rc;
 577         rc = sja1105_init_general_params(priv);
 578         if (rc < 0)
 579                 return rc;
 580         rc = sja1105_init_avb_params(priv, false);
 581         if (rc < 0)
 582                 return rc;
 583
 584         /* Send initial configuration to hardware via SPI */
 585         return sja1105_static_config_upload(priv);
 586 }
 587
 588 static int sja1105_parse_rgmii_delays(struct sja1105_private *priv,
 589                                       const struct sja1105_dt_port *ports)
 590 {
 591         int i;
 592
 593         for (i = 0; i < SJA1105_NUM_PORTS; i++) {
 594                 if (ports->role == XMII_MAC)
 595                         continue;
 596
 597                 if (ports->phy_mode == PHY_INTERFACE_MODE_RGMII_RXID ||
 598                     ports->phy_mode == PHY_INTERFACE_MODE_RGMII_ID)
 599                         priv->rgmii_rx_delay[i] = true;
 600
 601                 if (ports->phy_mode == PHY_INTERFACE_MODE_RGMII_TXID ||
 602                     ports->phy_mode == PHY_INTERFACE_MODE_RGMII_ID)
 603                         priv->rgmii_tx_delay[i] = true;
 604
 605                 if ((priv->rgmii_rx_delay[i] || priv->rgmii_tx_delay[i]) &&
 606                      !priv->info->setup_rgmii_delay)
 607                         return -EINVAL;
 608         }
 609         return 0;
 610 }
 611
 612 static int sja1105_parse_ports_node(struct sja1105_private *priv,
 613                                     struct sja1105_dt_port *ports,
 614                                     struct device_node *ports_node)
 615 {
 616         struct device *dev = &priv->spidev->dev;
 617         struct device_node *child;
 618
 619         for_each_child_of_node(ports_node, child) {
 620                 struct device_node *phy_node;
 621                 int phy_mode;
 622                 u32 index;
 623
 624                 /* Get switch port number from DT */
 625                 if (of_property_read_u32(child, "reg", &index) < 0) {
 626                         dev_err(dev, "Port number not defined in device tree "
 627                                 "(property \"reg\")\n");
 628                         return -ENODEV;
 629                 }
 630
 631                 /* Get PHY mode from DT */
 632                 phy_mode = of_get_phy_mode(child);
 633                 if (phy_mode < 0) {
 634                         dev_err(dev, "Failed to read phy-mode or "
 635                                 "phy-interface-type property for port %d\n",
 636                                 index);
 637                         return -ENODEV;
 638                 }
 639                 ports[index].phy_mode = phy_mode;
 640
 641                 phy_node = of_parse_phandle(child, "phy-handle", 0);
 642                 if (!phy_node) {
 643                         if (!of_phy_is_fixed_link(child)) {
 644                                 dev_err(dev, "phy-handle or fixed-link "
 645                                         "properties missing!\n");
 646                                 return -ENODEV;
 647                         }
 648                         /* phy-handle is missing, but fixed-link isn't.
 649                          * So it's a fixed link. Default to PHY role.
 650                          */
 651                         ports[index].role = XMII_PHY;
 652                 } else {
 653                         /* phy-handle present => put port in MAC role */
 654                         ports[index].role = XMII_MAC;
 655                         of_node_put(phy_node);
 656                 }
 657
 658                 /* The MAC/PHY role can be overridden with explicit bindings */
 659                 if (of_property_read_bool(child, "sja1105,role-mac"))
 660                         ports[index].role = XMII_MAC;
 661                 else if (of_property_read_bool(child, "sja1105,role-phy"))
 662                         ports[index].role = XMII_PHY;
 663         }
 664
 665         return 0;
 666 }
 667
 668 static int sja1105_parse_dt(struct sja1105_private *priv,
 669                             struct sja1105_dt_port *ports)
 670 {
 671         struct device *dev = &priv->spidev->dev;
 672         struct device_node *switch_node = dev->of_node;
 673         struct device_node *ports_node;
 674         int rc;
 675
 676         ports_node = of_get_child_by_name(switch_node, "ports");
 677         if (!ports_node) {
 678                 dev_err(dev, "Incorrect bindings: absent \"ports\" node\n");
 679                 return -ENODEV;
 680         }
 681
 682         rc = sja1105_parse_ports_node(priv, ports, ports_node);
 683         of_node_put(ports_node);
 684
 685         return rc;
 686 }
 687
 688 /* Convert link speed from SJA1105 to ethtool encoding */
 689 static int sja1105_speed[] = {
 690         [SJA1105_SPEED_AUTO]            = SPEED_UNKNOWN,
 691         [SJA1105_SPEED_10MBPS]          = SPEED_10,
 692         [SJA1105_SPEED_100MBPS]         = SPEED_100,
 693         [SJA1105_SPEED_1000MBPS]        = SPEED_1000,
 694 };
 695
 696 /* Set link speed in the MAC configuration for a specific port. */
 697 static int sja1105_adjust_port_config(struct sja1105_private *priv, int port,
 698                                       int speed_mbps)
 699 {
 700         struct sja1105_xmii_params_entry *mii;
 701         struct sja1105_mac_config_entry *mac;
 702         struct device *dev = priv->ds->dev;
 703         sja1105_phy_interface_t phy_mode;
 704         sja1105_speed_t speed;
 705         int rc;
 706
 707         /* On P/Q/R/S, one can read from the device via the MAC reconfiguration
 708          * tables. On E/T, MAC reconfig tables are not readable, only writable.
 709          * We have to *know* what the MAC looks like.  For the sake of keeping
 710          * the code common, we'll use the static configuration tables as a
 711          * reasonable approximation for both E/T and P/Q/R/S.
 712          */
 713         mac = priv->static_config.tables[BLK_IDX_MAC_CONFIG].entries;
 714         mii = priv->static_config.tables[BLK_IDX_XMII_PARAMS].entries;
 715
 716         switch (speed_mbps) {
 717         case SPEED_UNKNOWN:
 718                 /* No speed update requested */
 719                 speed = SJA1105_SPEED_AUTO;
 720                 break;
 721         case SPEED_10:
 722                 speed = SJA1105_SPEED_10MBPS;
 723                 break;
 724         case SPEED_100:
 725                 speed = SJA1105_SPEED_100MBPS;
 726                 break;
 727         case SPEED_1000:
 728                 speed = SJA1105_SPEED_1000MBPS;
 729                 break;
 730         default:
 731                 dev_err(dev, "Invalid speed %iMbps\n", speed_mbps);
 732                 return -EINVAL;
 733         }
 734
 735         /* Overwrite SJA1105_SPEED_AUTO from the static MAC configuration
 736          * table, since this will be used for the clocking setup, and we no
 737          * longer need to store it in the static config (already told hardware
 738          * we want auto during upload phase).
 739          */
 740         mac[port].speed = speed;
 741
 742         /* Write to the dynamic reconfiguration tables */
 743         rc = sja1105_dynamic_config_write(priv, BLK_IDX_MAC_CONFIG, port,
 744                                           &mac[port], true);
 745         if (rc < 0) {
 746                 dev_err(dev, "Failed to write MAC config: %d\n", rc);
 747                 return rc;
 748         }
 749
 750         /* Reconfigure the PLLs for the RGMII interfaces (required 125 MHz at
 751          * gigabit, 25 MHz at 100 Mbps and 2.5 MHz at 10 Mbps). For MII and
 752          * RMII no change of the clock setup is required. Actually, changing
 753          * the clock setup does interrupt the clock signal for a certain time
 754          * which causes trouble for all PHYs relying on this signal.
 755          */
 756         phy_mode = mii->xmii_mode[port];
 757         if (phy_mode != XMII_MODE_RGMII)
 758                 return 0;
 759
 760         return sja1105_clocking_setup_port(priv, port);
 761 }
 762
 763 static void sja1105_mac_config(struct dsa_switch *ds, int port,
 764                                unsigned int link_an_mode,
 765                                const struct phylink_link_state *state)
 766 {
 767         struct sja1105_private *priv = ds->priv;
 768
 769         if (!state->link)
 770                 return;
 771
 772         sja1105_adjust_port_config(priv, port, state->speed);
 773 }
 774
 775 static void sja1105_mac_link_down(struct dsa_switch *ds, int port,
 776                                   unsigned int mode,
 777                                   phy_interface_t interface)
 778 {
 779         sja1105_inhibit_tx(ds->priv, BIT(port), true);
 780 }
 781
 782 static void sja1105_mac_link_up(struct dsa_switch *ds, int port,
 783                                 unsigned int mode,
 784                                 phy_interface_t interface,
 785                                 struct phy_device *phydev)
 786 {
 787         sja1105_inhibit_tx(ds->priv, BIT(port), false);
 788 }
 789
 790 static void sja1105_phylink_validate(struct dsa_switch *ds, int port,
 791                                      unsigned long *supported,
 792                                      struct phylink_link_state *state)
 793 {
 794         /* Construct a new mask which exhaustively contains all link features
 795          * supported by the MAC, and then apply that (logical AND) to what will
 796          * be sent to the PHY for "marketing".
 797          */
 798         __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
 799         struct sja1105_private *priv = ds->priv;
 800         struct sja1105_xmii_params_entry *mii;
 801
 802         mii = priv->static_config.tables[BLK_IDX_XMII_PARAMS].entries;
 803
 804         /* The MAC does not support pause frames, and also doesn't
 805          * support half-duplex traffic modes.
 806          */
 807         phylink_set(mask, Autoneg);
 808         phylink_set(mask, MII);
 809         phylink_set(mask, 10baseT_Full);
 810         phylink_set(mask, 100baseT_Full);
 811         if (mii->xmii_mode[port] == XMII_MODE_RGMII)
 812                 phylink_set(mask, 1000baseT_Full);
 813
 814         bitmap_and(supported, supported, mask, __ETHTOOL_LINK_MODE_MASK_NBITS);
 815         bitmap_and(state->advertising, state->advertising, mask,
 816                    __ETHTOOL_LINK_MODE_MASK_NBITS);
 817 }
 818
 819 static int
 820 sja1105_find_static_fdb_entry(struct sja1105_private *priv, int port,
 821                               const struct sja1105_l2_lookup_entry *requested)
 822 {
 823         struct sja1105_l2_lookup_entry *l2_lookup;
 824         struct sja1105_table *table;
 825         int i;
 826
 827         table = &priv->static_config.tables[BLK_IDX_L2_LOOKUP];
 828         l2_lookup = table->entries;
 829
 830         for (i = 0; i < table->entry_count; i++)
 831                 if (l2_lookup[i].macaddr == requested->macaddr &&
 832                     l2_lookup[i].vlanid == requested->vlanid &&
 833                     l2_lookup[i].destports & BIT(port))
 834                         return i;
 835
 836         return -1;
 837 }
 838
 839 /* We want FDB entries added statically through the bridge command to persist
 840  * across switch resets, which are a common thing during normal SJA1105
 841  * operation. So we have to back them up in the static configuration tables
 842  * and hence apply them on next static config upload... yay!
 843  */
 844 static int
 845 sja1105_static_fdb_change(struct sja1105_private *priv, int port,
 846                           const struct sja1105_l2_lookup_entry *requested,
 847                           bool keep)
 848 {
 849         struct sja1105_l2_lookup_entry *l2_lookup;
 850         struct sja1105_table *table;
 851         int rc, match;
 852
 853         table = &priv->static_config.tables[BLK_IDX_L2_LOOKUP];
 854
 855         match = sja1105_find_static_fdb_entry(priv, port, requested);
 856         if (match < 0) {
 857                 /* Can't delete a missing entry. */
 858                 if (!keep)
 859                         return 0;
 860
 861                 /* No match => new entry */
 862                 rc = sja1105_table_resize(table, table->entry_count + 1);
 863                 if (rc)
 864                         return rc;
 865
 866                 match = table->entry_count - 1;
 867         }
 868
 869         /* Assign pointer after the resize (it may be new memory) */
 870         l2_lookup = table->entries;
 871
 872         /* We have a match.
 873          * If the job was to add this FDB entry, it's already done (mostly
 874          * anyway, since the port forwarding mask may have changed, case in
 875          * which we update it).
 876          * Otherwise we have to delete it.
 877          */
 878         if (keep) {
 879                 l2_lookup[match] = *requested;
 880                 return 0;
 881         }
 882
 883         /* To remove, the strategy is to overwrite the element with
 884          * the last one, and then reduce the array size by 1
 885          */
 886         l2_lookup[match] = l2_lookup[table->entry_count - 1];
 887         return sja1105_table_resize(table, table->entry_count - 1);
 888 }
 889
 890 /* First-generation switches have a 4-way set associative TCAM that
 891  * holds the FDB entries. An FDB index spans from 0 to 1023 and is comprised of
 892  * a "bin" (grouping of 4 entries) and a "way" (an entry within a bin).
 893  * For the placement of a newly learnt FDB entry, the switch selects the bin
 894  * based on a hash function, and the way within that bin incrementally.
 895  */
 896 static inline int sja1105et_fdb_index(int bin, int way)
 897 {
 898         return bin * SJA1105ET_FDB_BIN_SIZE + way;
 899 }
 900
 901 static int sja1105et_is_fdb_entry_in_bin(struct sja1105_private *priv, int bin,
 902                                          const u8 *addr, u16 vid,
 903                                          struct sja1105_l2_lookup_entry *match,
 904                                          int *last_unused)
 905 {
 906         int way;
 907
 908         for (way = 0; way < SJA1105ET_FDB_BIN_SIZE; way++) {
 909                 struct sja1105_l2_lookup_entry l2_lookup = {0};
 910                 int index = sja1105et_fdb_index(bin, way);
 911
 912                 /* Skip unused entries, optionally marking them
 913                  * into the return value
 914                  */
 915                 if (sja1105_dynamic_config_read(priv, BLK_IDX_L2_LOOKUP,
 916                                                 index, &l2_lookup)) {
 917                         if (last_unused)
 918                                 *last_unused = way;
 919                         continue;
 920                 }
 921
 922                 if (l2_lookup.macaddr == ether_addr_to_u64(addr) &&
 923                     l2_lookup.vlanid == vid) {
 924                         if (match)
 925                                 *match = l2_lookup;
 926                         return way;
 927                 }
 928         }
 929         /* Return an invalid entry index if not found */
 930         return -1;
 931 }
 932
 933 int sja1105et_fdb_add(struct dsa_switch *ds, int port,
 934                       const unsigned char *addr, u16 vid)
 935 {
 936         struct sja1105_l2_lookup_entry l2_lookup = {0};
 937         struct sja1105_private *priv = ds->priv;
 938         struct device *dev = ds->dev;
 939         int last_unused = -1;
 940         int bin, way, rc;
 941
 942         bin = sja1105et_fdb_hash(priv, addr, vid);
 943
 944         way = sja1105et_is_fdb_entry_in_bin(priv, bin, addr, vid,
 945                                             &l2_lookup, &last_unused);
 946         if (way >= 0) {
 947                 /* We have an FDB entry. Is our port in the destination
 948                  * mask? If yes, we need to do nothing. If not, we need
 949                  * to rewrite the entry by adding this port to it.
 950                  */
 951                 if (l2_lookup.destports & BIT(port))
 952                         return 0;
 953                 l2_lookup.destports |= BIT(port);
 954         } else {
 955                 int index = sja1105et_fdb_index(bin, way);
 956
 957                 /* We don't have an FDB entry. We construct a new one and
 958                  * try to find a place for it within the FDB table.
 959                  */
 960                 l2_lookup.macaddr = ether_addr_to_u64(addr);
 961                 l2_lookup.destports = BIT(port);
 962                 l2_lookup.vlanid = vid;
 963
 964                 if (last_unused >= 0) {
 965                         way = last_unused;
 966                 } else {
 967                         /* Bin is full, need to evict somebody.
 968                          * Choose victim at random. If you get these messages
 969                          * often, you may need to consider changing the
 970                          * distribution function:
 971                          * static_config[BLK_IDX_L2_LOOKUP_PARAMS].entries->poly
 972                          */
 973                         get_random_bytes(&way, sizeof(u8));
 974                         way %= SJA1105ET_FDB_BIN_SIZE;
 975                         dev_warn(dev, "Warning, FDB bin %d full while adding entry for %pM. Evicting entry %u.\n",
 976                                  bin, addr, way);
 977                         /* Evict entry */
 978                         sja1105_dynamic_config_write(priv, BLK_IDX_L2_LOOKUP,
 979                                                      index, NULL, false);
 980                 }
 981         }
 982         l2_lookup.index = sja1105et_fdb_index(bin, way);
 983
 984         rc = sja1105_dynamic_config_write(priv, BLK_IDX_L2_LOOKUP,
 985                                           l2_lookup.index, &l2_lookup,
 986                                           true);
 987         if (rc < 0)
 988                 return rc;
 989
 990         return sja1105_static_fdb_change(priv, port, &l2_lookup, true);
 991 }
 992
 993 int sja1105et_fdb_del(struct dsa_switch *ds, int port,
 994                       const unsigned char *addr, u16 vid)
 995 {
 996         struct sja1105_l2_lookup_entry l2_lookup = {0};
 997         struct sja1105_private *priv = ds->priv;
 998         int index, bin, way, rc;
 999         bool keep;
1000
1001         bin = sja1105et_fdb_hash(priv, addr, vid);
1002         way = sja1105et_is_fdb_entry_in_bin(priv, bin, addr, vid,
1003                                             &l2_lookup, NULL);
1004         if (way < 0)
1005                 return 0;
1006         index = sja1105et_fdb_index(bin, way);
1007
1008         /* We have an FDB entry. Is our port in the destination mask? If yes,
1009          * we need to remove it. If the resulting port mask becomes empty, we
1010          * need to completely evict the FDB entry.
1011          * Otherwise we just write it back.
1012          */
1013         l2_lookup.destports &= ~BIT(port);
1014
1015         if (l2_lookup.destports)
1016                 keep = true;
1017         else
1018                 keep = false;
1019
1020         rc = sja1105_dynamic_config_write(priv, BLK_IDX_L2_LOOKUP,
1021                                           index, &l2_lookup, keep);
1022         if (rc < 0)
1023                 return rc;
1024
1025         return sja1105_static_fdb_change(priv, port, &l2_lookup, keep);
1026 }
1027
1028 int sja1105pqrs_fdb_add(struct dsa_switch *ds, int port,
1029                         const unsigned char *addr, u16 vid)
1030 {
1031         struct sja1105_l2_lookup_entry l2_lookup = {0};
1032         struct sja1105_private *priv = ds->priv;
1033         int rc, i;
1034
1035         /* Search for an existing entry in the FDB table */
1036         l2_lookup.macaddr = ether_addr_to_u64(addr);
1037         l2_lookup.vlanid = vid;
1038         l2_lookup.iotag = SJA1105_S_TAG;
1039         l2_lookup.mask_macaddr = GENMASK_ULL(ETH_ALEN * 8 - 1, 0);
1040         l2_lookup.mask_vlanid = VLAN_VID_MASK;
1041         l2_lookup.mask_iotag = BIT(0);
1042         l2_lookup.destports = BIT(port);
1043
1044         rc = sja1105_dynamic_config_read(priv, BLK_IDX_L2_LOOKUP,
1045                                          SJA1105_SEARCH, &l2_lookup);
1046         if (rc == 0) {
1047                 /* Found and this port is already in the entry's
1048                  * port mask => job done
1049                  */
1050                 if (l2_lookup.destports & BIT(port))
1051                         return 0;
1052                 /* l2_lookup.index is populated by the switch in case it
1053                  * found something.
1054                  */
1055                 l2_lookup.destports |= BIT(port);
1056                 goto skip_finding_an_index;
1057         }
1058
1059         /* Not found, so try to find an unused spot in the FDB.
1060          * This is slightly inefficient because the strategy is knock-knock at
1061          * every possible position from 0 to 1023.
1062          */
1063         for (i = 0; i < SJA1105_MAX_L2_LOOKUP_COUNT; i++) {
1064                 rc = sja1105_dynamic_config_read(priv, BLK_IDX_L2_LOOKUP,
1065                                                  i, NULL);
1066                 if (rc < 0)
1067                         break;
1068         }
1069         if (i == SJA1105_MAX_L2_LOOKUP_COUNT) {
1070                 dev_err(ds->dev, "FDB is full, cannot add entry.\n");
1071                 return -EINVAL;
1072         }
1073         l2_lookup.index = i;
1074
1075 skip_finding_an_index:
1076         rc = sja1105_dynamic_config_write(priv, BLK_IDX_L2_LOOKUP,
1077                                           l2_lookup.index, &l2_lookup,
1078                                           true);
1079         if (rc < 0)
1080                 return rc;
1081
1082         return sja1105_static_fdb_change(priv, port, &l2_lookup, true);
1083 }
1084
1085 int sja1105pqrs_fdb_del(struct dsa_switch *ds, int port,
1086                         const unsigned char *addr, u16 vid)
1087 {
1088         struct sja1105_l2_lookup_entry l2_lookup = {0};
1089         struct sja1105_private *priv = ds->priv;
1090         bool keep;
1091         int rc;
1092
1093         l2_lookup.macaddr = ether_addr_to_u64(addr);
1094         l2_lookup.vlanid = vid;
1095         l2_lookup.iotag = SJA1105_S_TAG;
1096         l2_lookup.mask_macaddr = GENMASK_ULL(ETH_ALEN * 8 - 1, 0);
1097         l2_lookup.mask_vlanid = VLAN_VID_MASK;
1098         l2_lookup.mask_iotag = BIT(0);
1099         l2_lookup.destports = BIT(port);
1100
1101         rc = sja1105_dynamic_config_read(priv, BLK_IDX_L2_LOOKUP,
1102                                          SJA1105_SEARCH, &l2_lookup);
1103         if (rc < 0)
1104                 return 0;
1105
1106         l2_lookup.destports &= ~BIT(port);
1107
1108         /* Decide whether we remove just this port from the FDB entry,
1109          * or if we remove it completely.
1110          */
1111         if (l2_lookup.destports)
1112                 keep = true;
1113         else
1114                 keep = false;
1115
1116         rc = sja1105_dynamic_config_write(priv, BLK_IDX_L2_LOOKUP,
1117                                           l2_lookup.index, &l2_lookup, keep);
1118         if (rc < 0)
1119                 return rc;
1120
1121         return sja1105_static_fdb_change(priv, port, &l2_lookup, keep);
1122 }
1123
1124 static int sja1105_fdb_add(struct dsa_switch *ds, int port,
1125                            const unsigned char *addr, u16 vid)
1126 {
1127         struct sja1105_private *priv = ds->priv;
1128         int rc;
1129
1130         /* Since we make use of VLANs even when the bridge core doesn't tell us
1131          * to, translate these FDB entries into the correct dsa_8021q ones.
1132          */
1133         if (!dsa_port_is_vlan_filtering(&ds->ports[port])) {
1134                 unsigned int upstream = dsa_upstream_port(priv->ds, port);
1135                 u16 tx_vid = dsa_8021q_tx_vid(ds, port);
1136                 u16 rx_vid = dsa_8021q_rx_vid(ds, port);
1137
1138                 rc = priv->info->fdb_add_cmd(ds, port, addr, tx_vid);
1139                 if (rc < 0)
1140                         return rc;
1141                 return priv->info->fdb_add_cmd(ds, upstream, addr, rx_vid);
1142         }
1143         return priv->info->fdb_add_cmd(ds, port, addr, vid);
1144 }
1145
1146 static int sja1105_fdb_del(struct dsa_switch *ds, int port,
1147                            const unsigned char *addr, u16 vid)
1148 {
1149         struct sja1105_private *priv = ds->priv;
1150         int rc;
1151
1152         /* Since we make use of VLANs even when the bridge core doesn't tell us
1153          * to, translate these FDB entries into the correct dsa_8021q ones.
1154          */
1155         if (!dsa_port_is_vlan_filtering(&ds->ports[port])) {
1156                 unsigned int upstream = dsa_upstream_port(priv->ds, port);
1157                 u16 tx_vid = dsa_8021q_tx_vid(ds, port);
1158                 u16 rx_vid = dsa_8021q_rx_vid(ds, port);
1159
1160                 rc = priv->info->fdb_del_cmd(ds, port, addr, tx_vid);
1161                 if (rc < 0)
1162                         return rc;
1163                 return priv->info->fdb_del_cmd(ds, upstream, addr, rx_vid);
1164         }
1165         return priv->info->fdb_del_cmd(ds, port, addr, vid);
1166 }
1167
1168 static int sja1105_fdb_dump(struct dsa_switch *ds, int port,
1169                             dsa_fdb_dump_cb_t *cb, void *data)
1170 {
1171         struct sja1105_private *priv = ds->priv;
1172         struct device *dev = ds->dev;
1173         int i;
1174
1175         for (i = 0; i < SJA1105_MAX_L2_LOOKUP_COUNT; i++) {
1176                 struct sja1105_l2_lookup_entry l2_lookup = {0};
1177                 u8 macaddr[ETH_ALEN];
1178                 int rc;
1179
1180                 rc = sja1105_dynamic_config_read(priv, BLK_IDX_L2_LOOKUP,
1181                                                  i, &l2_lookup);
1182                 /* No fdb entry at i, not an issue */
1183                 if (rc == -ENOENT)
1184                         continue;
1185                 if (rc) {
1186                         dev_err(dev, "Failed to dump FDB: %d\n", rc);
1187                         return rc;
1188                 }
1189
1190                 /* FDB dump callback is per port. This means we have to
1191                  * disregard a valid entry if it's not for this port, even if
1192                  * only to revisit it later. This is inefficient because the
1193                  * 1024-sized FDB table needs to be traversed 4 times through
1194                  * SPI during a 'bridge fdb show' command.
1195                  */
1196                 if (!(l2_lookup.destports & BIT(port)))
1197                         continue;
1198                 u64_to_ether_addr(l2_lookup.macaddr, macaddr);
1199
1200                 /* We need to hide the dsa_8021q VLAN from the user.
1201                  * Convert the TX VID into the pvid that is active in
1202                  * standalone and non-vlan_filtering modes, aka 1.
1203                  * The RX VID is applied on the CPU port, which is not seen by
1204                  * the bridge core anyway, so there's nothing to hide.
1205                  */
1206                 if (!dsa_port_is_vlan_filtering(&ds->ports[port]))
1207                         l2_lookup.vlanid = 1;
1208                 cb(macaddr, l2_lookup.vlanid, false, data);
1209         }
1210         return 0;
1211 }
1212
1213 /* This callback needs to be present */
1214 static int sja1105_mdb_prepare(struct dsa_switch *ds, int port,
1215                                const struct switchdev_obj_port_mdb *mdb)
1216 {
1217         return 0;
1218 }
1219
1220 static void sja1105_mdb_add(struct dsa_switch *ds, int port,
1221                             const struct switchdev_obj_port_mdb *mdb)
1222 {
1223         sja1105_fdb_add(ds, port, mdb->addr, mdb->vid);
1224 }
1225
1226 static int sja1105_mdb_del(struct dsa_switch *ds, int port,
1227                            const struct switchdev_obj_port_mdb *mdb)
1228 {
1229         return sja1105_fdb_del(ds, port, mdb->addr, mdb->vid);
1230 }
1231
1232 static int sja1105_bridge_member(struct dsa_switch *ds, int port,
1233                                  struct net_device *br, bool member)
1234 {
1235         struct sja1105_l2_forwarding_entry *l2_fwd;
1236         struct sja1105_private *priv = ds->priv;
1237         int i, rc;
1238
1239         l2_fwd = priv->static_config.tables[BLK_IDX_L2_FORWARDING].entries;
1240
1241         for (i = 0; i < SJA1105_NUM_PORTS; i++) {
1242                 /* Add this port to the forwarding matrix of the
1243                  * other ports in the same bridge, and viceversa.
1244                  */
1245                 if (!dsa_is_user_port(ds, i))
1246                         continue;
1247                 /* For the ports already under the bridge, only one thing needs
1248                  * to be done, and that is to add this port to their
1249                  * reachability domain. So we can perform the SPI write for
1250                  * them immediately. However, for this port itself (the one
1251                  * that is new to the bridge), we need to add all other ports
1252                  * to its reachability domain. So we do that incrementally in
1253                  * this loop, and perform the SPI write only at the end, once
1254                  * the domain contains all other bridge ports.
1255                  */
1256                 if (i == port)
1257                         continue;
1258                 if (dsa_to_port(ds, i)->bridge_dev != br)
1259                         continue;
1260                 sja1105_port_allow_traffic(l2_fwd, i, port, member);
1261                 sja1105_port_allow_traffic(l2_fwd, port, i, member);
1262
1263                 rc = sja1105_dynamic_config_write(priv, BLK_IDX_L2_FORWARDING,
1264                                                   i, &l2_fwd[i], true);
1265                 if (rc < 0)
1266                         return rc;
1267         }
1268
1269         return sja1105_dynamic_config_write(priv, BLK_IDX_L2_FORWARDING,
1270                                             port, &l2_fwd[port], true);
1271 }
1272
1273 static void sja1105_bridge_stp_state_set(struct dsa_switch *ds, int port,
1274                                          u8 state)
1275 {
1276         struct sja1105_private *priv = ds->priv;
1277         struct sja1105_mac_config_entry *mac;
1278
1279         mac = priv->static_config.tables[BLK_IDX_MAC_CONFIG].entries;
1280
1281         switch (state) {
1282         case BR_STATE_DISABLED:
1283         case BR_STATE_BLOCKING:
1284                 /* From UM10944 description of DRPDTAG (why put this there?):
1285                  * "Management traffic flows to the port regardless of the state
1286                  * of the INGRESS flag". So BPDUs are still be allowed to pass.
1287                  * At the moment no difference between DISABLED and BLOCKING.
1288                  */
1289                 mac[port].ingress   = false;
1290                 mac[port].egress    = false;
1291                 mac[port].dyn_learn = false;
1292                 break;
1293         case BR_STATE_LISTENING:
1294                 mac[port].ingress   = true;
1295                 mac[port].egress    = false;
1296                 mac[port].dyn_learn = false;
1297                 break;
1298         case BR_STATE_LEARNING:
1299                 mac[port].ingress   = true;
1300                 mac[port].egress    = false;
1301                 mac[port].dyn_learn = true;
1302                 break;
1303         case BR_STATE_FORWARDING:
1304                 mac[port].ingress   = true;
1305                 mac[port].egress    = true;
1306                 mac[port].dyn_learn = true;
1307                 break;
1308         default:
1309                 dev_err(ds->dev, "invalid STP state: %d\n", state);
1310                 return;
1311         }
1312
1313         sja1105_dynamic_config_write(priv, BLK_IDX_MAC_CONFIG, port,
1314                                      &mac[port], true);
1315 }
1316
1317 static int sja1105_bridge_join(struct dsa_switch *ds, int port,
1318                                struct net_device *br)
1319 {
1320         return sja1105_bridge_member(ds, port, br, true);
1321 }
1322
1323 static void sja1105_bridge_leave(struct dsa_switch *ds, int port,
1324                                  struct net_device *br)
1325 {
1326         sja1105_bridge_member(ds, port, br, false);
1327 }
1328
1329 /* For situations where we need to change a setting at runtime that is only
1330  * available through the static configuration, resetting the switch in order
1331  * to upload the new static config is unavoidable. Back up the settings we
1332  * modify at runtime (currently only MAC) and restore them after uploading,
1333  * such that this operation is relatively seamless.
1334  */
1335 static int sja1105_static_config_reload(struct sja1105_private *priv)
1336 {
1337         struct sja1105_mac_config_entry *mac;
1338         int speed_mbps[SJA1105_NUM_PORTS];
1339         int rc, i;
1340
1341         mac = priv->static_config.tables[BLK_IDX_MAC_CONFIG].entries;
1342
1343         /* Back up the dynamic link speed changed by sja1105_adjust_port_config
1344          * in order to temporarily restore it to SJA1105_SPEED_AUTO - which the
1345          * switch wants to see in the static config in order to allow us to
1346          * change it through the dynamic interface later.
1347          */
1348         for (i = 0; i < SJA1105_NUM_PORTS; i++) {
1349                 speed_mbps[i] = sja1105_speed[mac[i].speed];
1350                 mac[i].speed = SJA1105_SPEED_AUTO;
1351         }
1352
1353         /* Reset switch and send updated static configuration */
1354         rc = sja1105_static_config_upload(priv);
1355         if (rc < 0)
1356                 goto out;
1357
1358         /* Configure the CGU (PLLs) for MII and RMII PHYs.
1359          * For these interfaces there is no dynamic configuration
1360          * needed, since PLLs have same settings at all speeds.
1361          */
1362         rc = sja1105_clocking_setup(priv);
1363         if (rc < 0)
1364                 goto out;
1365
1366         for (i = 0; i < SJA1105_NUM_PORTS; i++) {
1367                 rc = sja1105_adjust_port_config(priv, i, speed_mbps[i]);
1368                 if (rc < 0)
1369                         goto out;
1370         }
1371 out:
1372         return rc;
1373 }
1374
1375 static int sja1105_pvid_apply(struct sja1105_private *priv, int port, u16 pvid)
1376 {
1377         struct sja1105_mac_config_entry *mac;
1378
1379         mac = priv->static_config.tables[BLK_IDX_MAC_CONFIG].entries;
1380
1381         mac[port].vlanid = pvid;
1382
1383         return sja1105_dynamic_config_write(priv, BLK_IDX_MAC_CONFIG, port,
1384                                            &mac[port], true);
1385 }
1386
1387 static int sja1105_is_vlan_configured(struct sja1105_private *priv, u16 vid)
1388 {
1389         struct sja1105_vlan_lookup_entry *vlan;
1390         int count, i;
1391
1392         vlan = priv->static_config.tables[BLK_IDX_VLAN_LOOKUP].entries;
1393         count = priv->static_config.tables[BLK_IDX_VLAN_LOOKUP].entry_count;
1394
1395         for (i = 0; i < count; i++)
1396                 if (vlan[i].vlanid == vid)
1397                         return i;
1398
1399         /* Return an invalid entry index if not found */
1400         return -1;
1401 }
1402
1403 static int sja1105_vlan_apply(struct sja1105_private *priv, int port, u16 vid,
1404                               bool enabled, bool untagged)
1405 {
1406         struct sja1105_vlan_lookup_entry *vlan;
1407         struct sja1105_table *table;
1408         bool keep = true;
1409         int match, rc;
1410
1411         table = &priv->static_config.tables[BLK_IDX_VLAN_LOOKUP];
1412
1413         match = sja1105_is_vlan_configured(priv, vid);
1414         if (match < 0) {
1415                 /* Can't delete a missing entry. */
1416                 if (!enabled)
1417                         return 0;
1418                 rc = sja1105_table_resize(table, table->entry_count + 1);
1419                 if (rc)
1420                         return rc;
1421                 match = table->entry_count - 1;
1422         }
1423         /* Assign pointer after the resize (it's new memory) */
1424         vlan = table->entries;
1425         vlan[match].vlanid = vid;
1426         if (enabled) {
1427                 vlan[match].vlan_bc |= BIT(port);
1428                 vlan[match].vmemb_port |= BIT(port);
1429         } else {
1430                 vlan[match].vlan_bc &= ~BIT(port);
1431                 vlan[match].vmemb_port &= ~BIT(port);
1432         }
1433         /* Also unset tag_port if removing this VLAN was requested,
1434          * just so we don't have a confusing bitmap (no practical purpose).
1435          */
1436         if (untagged || !enabled)
1437                 vlan[match].tag_port &= ~BIT(port);
1438         else
1439                 vlan[match].tag_port |= BIT(port);
1440         /* If there's no port left as member of this VLAN,
1441          * it's time for it to go.
1442          */
1443         if (!vlan[match].vmemb_port)
1444                 keep = false;
1445
1446         dev_dbg(priv->ds->dev,
1447                 "%s: port %d, vid %llu, broadcast domain 0x%llx, "
1448                 "port members 0x%llx, tagged ports 0x%llx, keep %d\n",
1449                 __func__, port, vlan[match].vlanid, vlan[match].vlan_bc,
1450                 vlan[match].vmemb_port, vlan[match].tag_port, keep);
1451
1452         rc = sja1105_dynamic_config_write(priv, BLK_IDX_VLAN_LOOKUP, vid,
1453                                           &vlan[match], keep);
1454         if (rc < 0)
1455                 return rc;
1456
1457         if (!keep)
1458                 return sja1105_table_delete_entry(table, match);
1459
1460         return 0;
1461 }
1462
1463 static int sja1105_setup_8021q_tagging(struct dsa_switch *ds, bool enabled)
1464 {
1465         int rc, i;
1466
1467         for (i = 0; i < SJA1105_NUM_PORTS; i++) {
1468                 rc = dsa_port_setup_8021q_tagging(ds, i, enabled);
1469                 if (rc < 0) {
1470                         dev_err(ds->dev, "Failed to setup VLAN tagging for port %d: %d\n",
1471                                 i, rc);
1472                         return rc;
1473                 }
1474         }
1475         dev_info(ds->dev, "%s switch tagging\n",
1476                  enabled ? "Enabled" : "Disabled");
1477         return 0;
1478 }
1479
1480 static enum dsa_tag_protocol
1481 sja1105_get_tag_protocol(struct dsa_switch *ds, int port)
1482 {
1483         return DSA_TAG_PROTO_SJA1105;
1484 }
1485
1486 /* This callback needs to be present */
1487 static int sja1105_vlan_prepare(struct dsa_switch *ds, int port,
1488                                 const struct switchdev_obj_port_vlan *vlan)
1489 {
1490         return 0;
1491 }
1492
1493 /* The TPID setting belongs to the General Parameters table,
1494  * which can only be partially reconfigured at runtime (and not the TPID).
1495  * So a switch reset is required.
1496  */
1497 static int sja1105_vlan_filtering(struct dsa_switch *ds, int port, bool enabled)
1498 {
1499         struct sja1105_general_params_entry *general_params;
1500         struct sja1105_private *priv = ds->priv;
1501         struct sja1105_table *table;
1502         u16 tpid, tpid2;
1503         int rc;
1504
1505         if (enabled) {
1506                 /* Enable VLAN filtering. */
1507                 tpid  = ETH_P_8021AD;
1508                 tpid2 = ETH_P_8021Q;
1509         } else {
1510                 /* Disable VLAN filtering. */
1511                 tpid  = ETH_P_SJA1105;
1512                 tpid2 = ETH_P_SJA1105;
1513         }
1514
1515         table = &priv->static_config.tables[BLK_IDX_GENERAL_PARAMS];
1516         general_params = table->entries;
1517         /* EtherType used to identify outer tagged (S-tag) VLAN traffic */
1518         general_params->tpid = tpid;
1519         /* EtherType used to identify inner tagged (C-tag) VLAN traffic */
1520         general_params->tpid2 = tpid2;
1521         /* When VLAN filtering is on, we need to at least be able to
1522          * decode management traffic through the "backup plan".
1523          */
1524         general_params->incl_srcpt1 = enabled;
1525         general_params->incl_srcpt0 = enabled;
1526
1527         rc = sja1105_static_config_reload(priv);
1528         if (rc)
1529                 dev_err(ds->dev, "Failed to change VLAN Ethertype\n");
1530
1531         /* Switch port identification based on 802.1Q is only passable
1532          * if we are not under a vlan_filtering bridge. So make sure
1533          * the two configurations are mutually exclusive.
1534          */
1535         return sja1105_setup_8021q_tagging(ds, !enabled);
1536 }
1537
1538 static void sja1105_vlan_add(struct dsa_switch *ds, int port,
1539                              const struct switchdev_obj_port_vlan *vlan)
1540 {
1541         struct sja1105_private *priv = ds->priv;
1542         u16 vid;
1543         int rc;
1544
1545         for (vid = vlan->vid_begin; vid <= vlan->vid_end; vid++) {
1546                 rc = sja1105_vlan_apply(priv, port, vid, true, vlan->flags &
1547                                         BRIDGE_VLAN_INFO_UNTAGGED);
1548                 if (rc < 0) {
1549                         dev_err(ds->dev, "Failed to add VLAN %d to port %d: %d\n",
1550                                 vid, port, rc);
1551                         return;
1552                 }
1553                 if (vlan->flags & BRIDGE_VLAN_INFO_PVID) {
1554                         rc = sja1105_pvid_apply(ds->priv, port, vid);
1555                         if (rc < 0) {
1556                                 dev_err(ds->dev, "Failed to set pvid %d on port %d: %d\n",
1557                                         vid, port, rc);
1558                                 return;
1559                         }
1560                 }
1561         }
1562 }
1563
1564 static int sja1105_vlan_del(struct dsa_switch *ds, int port,
1565                             const struct switchdev_obj_port_vlan *vlan)
1566 {
1567         struct sja1105_private *priv = ds->priv;
1568         u16 vid;
1569         int rc;
1570
1571         for (vid = vlan->vid_begin; vid <= vlan->vid_end; vid++) {
1572                 rc = sja1105_vlan_apply(priv, port, vid, false, vlan->flags &
1573                                         BRIDGE_VLAN_INFO_UNTAGGED);
1574                 if (rc < 0) {
1575                         dev_err(ds->dev, "Failed to remove VLAN %d from port %d: %d\n",
1576                                 vid, port, rc);
1577                         return rc;
1578                 }
1579         }
1580         return 0;
1581 }
1582
1583 /* The programming model for the SJA1105 switch is "all-at-once" via static
1584  * configuration tables. Some of these can be dynamically modified at runtime,
1585  * but not the xMII mode parameters table.
1586  * Furthermode, some PHYs may not have crystals for generating their clocks
1587  * (e.g. RMII). Instead, their 50MHz clock is supplied via the SJA1105 port's
1588  * ref_clk pin. So port clocking needs to be initialized early, before
1589  * connecting to PHYs is attempted, otherwise they won't respond through MDIO.
1590  * Setting correct PHY link speed does not matter now.
1591  * But dsa_slave_phy_setup is called later than sja1105_setup, so the PHY
1592  * bindings are not yet parsed by DSA core. We need to parse early so that we
1593  * can populate the xMII mode parameters table.
1594  */
1595 static int sja1105_setup(struct dsa_switch *ds)
1596 {
1597         struct sja1105_dt_port ports[SJA1105_NUM_PORTS];
1598         struct sja1105_private *priv = ds->priv;
1599         int rc;
1600
1601         rc = sja1105_parse_dt(priv, ports);
1602         if (rc < 0) {
1603                 dev_err(ds->dev, "Failed to parse DT: %d\n", rc);
1604                 return rc;
1605         }
1606
1607         /* Error out early if internal delays are required through DT
1608          * and we can't apply them.
1609          */
1610         rc = sja1105_parse_rgmii_delays(priv, ports);
1611         if (rc < 0) {
1612                 dev_err(ds->dev, "RGMII delay not supported\n");
1613                 return rc;
1614         }
1615
1616         rc = sja1105_ptp_clock_register(priv);
1617         if (rc < 0) {
1618                 dev_err(ds->dev, "Failed to register PTP clock: %d\n", rc);
1619                 return rc;
1620         }
1621         /* Create and send configuration down to device */
1622         rc = sja1105_static_config_load(priv, ports);
1623         if (rc < 0) {
1624                 dev_err(ds->dev, "Failed to load static config: %d\n", rc);
1625                 return rc;
1626         }
1627         /* Configure the CGU (PHY link modes and speeds) */
1628         rc = sja1105_clocking_setup(priv);
1629         if (rc < 0) {
1630                 dev_err(ds->dev, "Failed to configure MII clocking: %d\n", rc);
1631                 return rc;
1632         }
1633         /* On SJA1105, VLAN filtering per se is always enabled in hardware.
1634          * The only thing we can do to disable it is lie about what the 802.1Q
1635          * EtherType is.
1636          * So it will still try to apply VLAN filtering, but all ingress
1637          * traffic (except frames received with EtherType of ETH_P_SJA1105)
1638          * will be internally tagged with a distorted VLAN header where the
1639          * TPID is ETH_P_SJA1105, and the VLAN ID is the port pvid.
1640          */
1641         ds->vlan_filtering_is_global = true;
1642
1643         /* The DSA/switchdev model brings up switch ports in standalone mode by
1644          * default, and that means vlan_filtering is 0 since they're not under
1645          * a bridge, so it's safe to set up switch tagging at this time.
1646          */
1647         return sja1105_setup_8021q_tagging(ds, true);
1648 }
1649
1650 static void sja1105_teardown(struct dsa_switch *ds)
1651 {
1652         struct sja1105_private *priv = ds->priv;
1653
1654         cancel_work_sync(&priv->tagger_data.rxtstamp_work);
1655         skb_queue_purge(&priv->tagger_data.skb_rxtstamp_queue);
1656 }
1657
1658 static int sja1105_mgmt_xmit(struct dsa_switch *ds, int port, int slot,
1659                              struct sk_buff *skb, bool takets)
1660 {
1661         struct sja1105_mgmt_entry mgmt_route = {0};
1662         struct sja1105_private *priv = ds->priv;
1663         struct ethhdr *hdr;
1664         int timeout = 10;
1665         int rc;
1666
1667         hdr = eth_hdr(skb);
1668
1669         mgmt_route.macaddr = ether_addr_to_u64(hdr->h_dest);
1670         mgmt_route.destports = BIT(port);
1671         mgmt_route.enfport = 1;
1672         mgmt_route.tsreg = 0;
1673         mgmt_route.takets = takets;
1674
1675         rc = sja1105_dynamic_config_write(priv, BLK_IDX_MGMT_ROUTE,
1676                                           slot, &mgmt_route, true);
1677         if (rc < 0) {
1678                 kfree_skb(skb);
1679                 return rc;
1680         }
1681
1682         /* Transfer skb to the host port. */
1683         dsa_enqueue_skb(skb, ds->ports[port].slave);
1684
1685         /* Wait until the switch has processed the frame */
1686         do {
1687                 rc = sja1105_dynamic_config_read(priv, BLK_IDX_MGMT_ROUTE,
1688                                                  slot, &mgmt_route);
1689                 if (rc < 0) {
1690                         dev_err_ratelimited(priv->ds->dev,
1691                                             "failed to poll for mgmt route\n");
1692                         continue;
1693                 }
1694
1695                 /* UM10944: The ENFPORT flag of the respective entry is
1696                  * cleared when a match is found. The host can use this
1697                  * flag as an acknowledgment.
1698                  */
1699                 cpu_relax();
1700         } while (mgmt_route.enfport && --timeout);
1701
1702         if (!timeout) {
1703                 /* Clean up the management route so that a follow-up
1704                  * frame may not match on it by mistake.
1705                  * This is only hardware supported on P/Q/R/S - on E/T it is
1706                  * a no-op and we are silently discarding the -EOPNOTSUPP.
1707                  */
1708                 sja1105_dynamic_config_write(priv, BLK_IDX_MGMT_ROUTE,
1709                                              slot, &mgmt_route, false);
1710                 dev_err_ratelimited(priv->ds->dev, "xmit timed out\n");
1711         }
1712
1713         return NETDEV_TX_OK;
1714 }
1715
1716 /* Deferred work is unfortunately necessary because setting up the management
1717  * route cannot be done from atomit context (SPI transfer takes a sleepable
1718  * lock on the bus)
1719  */
1720 static netdev_tx_t sja1105_port_deferred_xmit(struct dsa_switch *ds, int port,
1721                                               struct sk_buff *skb)
1722 {
1723         struct sja1105_private *priv = ds->priv;
1724         struct sja1105_port *sp = &priv->ports[port];
1725         struct skb_shared_hwtstamps shwt = {0};
1726         int slot = sp->mgmt_slot;
1727         struct sk_buff *clone;
1728         u64 now, ts;
1729         int rc;
1730
1731         /* The tragic fact about the switch having 4x2 slots for installing
1732          * management routes is that all of them except one are actually
1733          * useless.
1734          * If 2 slots are simultaneously configured for two BPDUs sent to the
1735          * same (multicast) DMAC but on different egress ports, the switch
1736          * would confuse them and redirect first frame it receives on the CPU
1737          * port towards the port configured on the numerically first slot
1738          * (therefore wrong port), then second received frame on second slot
1739          * (also wrong port).
1740          * So for all practical purposes, there needs to be a lock that
1741          * prevents that from happening. The slot used here is utterly useless
1742          * (could have simply been 0 just as fine), but we are doing it
1743          * nonetheless, in case a smarter idea ever comes up in the future.
1744          */
1745         mutex_lock(&priv->mgmt_lock);
1746
1747         /* The clone, if there, was made by dsa_skb_tx_timestamp */
1748         clone = DSA_SKB_CB(skb)->clone;
1749
1750         sja1105_mgmt_xmit(ds, port, slot, skb, !!clone);
1751
1752         if (!clone)
1753                 goto out;
1754
1755         skb_shinfo(clone)->tx_flags |= SKBTX_IN_PROGRESS;
1756
1757         mutex_lock(&priv->ptp_lock);
1758
1759         now = priv->tstamp_cc.read(&priv->tstamp_cc);
1760
1761         rc = sja1105_ptpegr_ts_poll(priv, slot, &ts);
1762         if (rc < 0) {
1763                 dev_err(ds->dev, "xmit: timed out polling for tstamp\n");
1764                 kfree_skb(clone);
1765                 goto out_unlock_ptp;
1766         }
1767
1768         ts = sja1105_tstamp_reconstruct(priv, now, ts);
1769         ts = timecounter_cyc2time(&priv->tstamp_tc, ts);
1770
1771         shwt.hwtstamp = ns_to_ktime(ts);
1772         skb_complete_tx_timestamp(clone, &shwt);
1773
1774 out_unlock_ptp:
1775         mutex_unlock(&priv->ptp_lock);
1776 out:
1777         mutex_unlock(&priv->mgmt_lock);
1778         return NETDEV_TX_OK;
1779 }
1780
1781 /* The MAXAGE setting belongs to the L2 Forwarding Parameters table,
1782  * which cannot be reconfigured at runtime. So a switch reset is required.
1783  */
1784 static int sja1105_set_ageing_time(struct dsa_switch *ds,
1785                                    unsigned int ageing_time)
1786 {
1787         struct sja1105_l2_lookup_params_entry *l2_lookup_params;
1788         struct sja1105_private *priv = ds->priv;
1789         struct sja1105_table *table;
1790         unsigned int maxage;
1791
1792         table = &priv->static_config.tables[BLK_IDX_L2_LOOKUP_PARAMS];
1793         l2_lookup_params = table->entries;
1794
1795         maxage = SJA1105_AGEING_TIME_MS(ageing_time);
1796
1797         if (l2_lookup_params->maxage == maxage)
1798                 return 0;
1799
1800         l2_lookup_params->maxage = maxage;
1801
1802         return sja1105_static_config_reload(priv);
1803 }
1804
1805 /* Caller must hold priv->tagger_data.meta_lock */
1806 static int sja1105_change_rxtstamping(struct sja1105_private *priv,
1807                                       bool on)
1808 {
1809         struct sja1105_general_params_entry *general_params;
1810         struct sja1105_table *table;
1811         int rc;
1812
1813         table = &priv->static_config.tables[BLK_IDX_GENERAL_PARAMS];
1814         general_params = table->entries;
1815         general_params->send_meta1 = on;
1816         general_params->send_meta0 = on;
1817
1818         rc = sja1105_init_avb_params(priv, on);
1819         if (rc < 0)
1820                 return rc;
1821
1822         /* Initialize the meta state machine to a known state */
1823         if (priv->tagger_data.stampable_skb) {
1824                 kfree_skb(priv->tagger_data.stampable_skb);
1825                 priv->tagger_data.stampable_skb = NULL;
1826         }
1827
1828         return sja1105_static_config_reload(priv);
1829 }
1830
1831 static int sja1105_hwtstamp_set(struct dsa_switch *ds, int port,
1832                                 struct ifreq *ifr)
1833 {
1834         struct sja1105_private *priv = ds->priv;
1835         struct hwtstamp_config config;
1836         bool rx_on;
1837         int rc;
1838
1839         if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
1840                 return -EFAULT;
1841
1842         switch (config.tx_type) {
1843         case HWTSTAMP_TX_OFF:
1844                 priv->ports[port].hwts_tx_en = false;
1845                 break;
1846         case HWTSTAMP_TX_ON:
1847                 priv->ports[port].hwts_tx_en = true;
1848                 break;
1849         default:
1850                 return -ERANGE;
1851         }
1852
1853         switch (config.rx_filter) {
1854         case HWTSTAMP_FILTER_NONE:
1855                 rx_on = false;
1856                 break;
1857         default:
1858                 rx_on = true;
1859                 break;
1860         }
1861
1862         if (rx_on != priv->tagger_data.hwts_rx_en) {
1863                 spin_lock(&priv->tagger_data.meta_lock);
1864                 rc = sja1105_change_rxtstamping(priv, rx_on);
1865                 spin_unlock(&priv->tagger_data.meta_lock);
1866                 if (rc < 0) {
1867                         dev_err(ds->dev,
1868                                 "Failed to change RX timestamping: %d\n", rc);
1869                         return -EFAULT;
1870                 }
1871                 priv->tagger_data.hwts_rx_en = rx_on;
1872         }
1873
1874         if (copy_to_user(ifr->ifr_data, &config, sizeof(config)))
1875                 return -EFAULT;
1876         return 0;
1877 }
1878
1879 static int sja1105_hwtstamp_get(struct dsa_switch *ds, int port,
1880                                 struct ifreq *ifr)
1881 {
1882         struct sja1105_private *priv = ds->priv;
1883         struct hwtstamp_config config;
1884
1885         config.flags = 0;
1886         if (priv->ports[port].hwts_tx_en)
1887                 config.tx_type = HWTSTAMP_TX_ON;
1888         else
1889                 config.tx_type = HWTSTAMP_TX_OFF;
1890         if (priv->tagger_data.hwts_rx_en)
1891                 config.rx_filter = HWTSTAMP_FILTER_PTP_V2_L2_EVENT;
1892         else
1893                 config.rx_filter = HWTSTAMP_FILTER_NONE;
1894
1895         return copy_to_user(ifr->ifr_data, &config, sizeof(config)) ?
1896                 -EFAULT : 0;
1897 }
1898
1899 #define to_tagger(d) \
1900         container_of((d), struct sja1105_tagger_data, rxtstamp_work)
1901 #define to_sja1105(d) \
1902         container_of((d), struct sja1105_private, tagger_data)
1903
1904 static void sja1105_rxtstamp_work(struct work_struct *work)
1905 {
1906         struct sja1105_tagger_data *data = to_tagger(work);
1907         struct sja1105_private *priv = to_sja1105(data);
1908         struct sk_buff *skb;
1909         u64 now;
1910
1911         mutex_lock(&priv->ptp_lock);
1912
1913         now = priv->tstamp_cc.read(&priv->tstamp_cc);
1914
1915         while ((skb = skb_dequeue(&data->skb_rxtstamp_queue)) != NULL) {
1916                 struct skb_shared_hwtstamps *shwt = skb_hwtstamps(skb);
1917                 u64 ts;
1918
1919                 *shwt = (struct skb_shared_hwtstamps) {0};
1920
1921                 ts = SJA1105_SKB_CB(skb)->meta_tstamp;
1922                 ts = sja1105_tstamp_reconstruct(priv, now, ts);
1923                 ts = timecounter_cyc2time(&priv->tstamp_tc, ts);
1924
1925                 shwt->hwtstamp = ns_to_ktime(ts);
1926                 netif_rx_ni(skb);
1927         }
1928
1929         mutex_unlock(&priv->ptp_lock);
1930 }
1931
1932 /* Called from dsa_skb_defer_rx_timestamp */
1933 static bool sja1105_port_rxtstamp(struct dsa_switch *ds, int port,
1934                                   struct sk_buff *skb, unsigned int type)
1935 {
1936         struct sja1105_private *priv = ds->priv;
1937         struct sja1105_tagger_data *data = &priv->tagger_data;
1938
1939         if (!data->hwts_rx_en)
1940                 return false;
1941
1942         /* We need to read the full PTP clock to reconstruct the Rx
1943          * timestamp. For that we need a sleepable context.
1944          */
1945         skb_queue_tail(&data->skb_rxtstamp_queue, skb);
1946         schedule_work(&data->rxtstamp_work);
1947         return true;
1948 }
1949
1950 /* Called from dsa_skb_tx_timestamp. This callback is just to make DSA clone
1951  * the skb and have it available in DSA_SKB_CB in the .port_deferred_xmit
1952  * callback, where we will timestamp it synchronously.
1953  */
1954 static bool sja1105_port_txtstamp(struct dsa_switch *ds, int port,
1955                                   struct sk_buff *skb, unsigned int type)
1956 {
1957         struct sja1105_private *priv = ds->priv;
1958         struct sja1105_port *sp = &priv->ports[port];
1959
1960         if (!sp->hwts_tx_en)
1961                 return false;
1962
1963         return true;
1964 }
1965
1966 static const struct dsa_switch_ops sja1105_switch_ops = {
1967         .get_tag_protocol       = sja1105_get_tag_protocol,
1968         .setup                  = sja1105_setup,
1969         .teardown               = sja1105_teardown,
1970         .set_ageing_time        = sja1105_set_ageing_time,
1971         .phylink_validate       = sja1105_phylink_validate,
1972         .phylink_mac_config     = sja1105_mac_config,
1973         .phylink_mac_link_up    = sja1105_mac_link_up,
1974         .phylink_mac_link_down  = sja1105_mac_link_down,
1975         .get_strings            = sja1105_get_strings,
1976         .get_ethtool_stats      = sja1105_get_ethtool_stats,
1977         .get_sset_count         = sja1105_get_sset_count,
1978         .get_ts_info            = sja1105_get_ts_info,
1979         .port_fdb_dump          = sja1105_fdb_dump,
1980         .port_fdb_add           = sja1105_fdb_add,
1981         .port_fdb_del           = sja1105_fdb_del,
1982         .port_bridge_join       = sja1105_bridge_join,
1983         .port_bridge_leave      = sja1105_bridge_leave,
1984         .port_stp_state_set     = sja1105_bridge_stp_state_set,
1985         .port_vlan_prepare      = sja1105_vlan_prepare,
1986         .port_vlan_filtering    = sja1105_vlan_filtering,
1987         .port_vlan_add          = sja1105_vlan_add,
1988         .port_vlan_del          = sja1105_vlan_del,
1989         .port_mdb_prepare       = sja1105_mdb_prepare,
1990         .port_mdb_add           = sja1105_mdb_add,
1991         .port_mdb_del           = sja1105_mdb_del,
1992         .port_deferred_xmit     = sja1105_port_deferred_xmit,
1993         .port_hwtstamp_get      = sja1105_hwtstamp_get,
1994         .port_hwtstamp_set      = sja1105_hwtstamp_set,
1995         .port_rxtstamp          = sja1105_port_rxtstamp,
1996         .port_txtstamp          = sja1105_port_txtstamp,
1997 };
1998
1999 static int sja1105_check_device_id(struct sja1105_private *priv)
2000 {
2001         const struct sja1105_regs *regs = priv->info->regs;
2002         u8 prod_id[SJA1105_SIZE_DEVICE_ID] = {0};
2003         struct device *dev = &priv->spidev->dev;
2004         u64 device_id;
2005         u64 part_no;
2006         int rc;
2007
2008         rc = sja1105_spi_send_int(priv, SPI_READ, regs->device_id,
2009                                   &device_id, SJA1105_SIZE_DEVICE_ID);
2010         if (rc < 0)
2011                 return rc;
2012
2013         if (device_id != priv->info->device_id) {
2014                 dev_err(dev, "Expected device ID 0x%llx but read 0x%llx\n",
2015                         priv->info->device_id, device_id);
2016                 return -ENODEV;
2017         }
2018
2019         rc = sja1105_spi_send_packed_buf(priv, SPI_READ, regs->prod_id,
2020                                          prod_id, SJA1105_SIZE_DEVICE_ID);
2021         if (rc < 0)
2022                 return rc;
2023
2024         sja1105_unpack(prod_id, &part_no, 19, 4, SJA1105_SIZE_DEVICE_ID);
2025
2026         if (part_no != priv->info->part_no) {
2027                 dev_err(dev, "Expected part number 0x%llx but read 0x%llx\n",
2028                         priv->info->part_no, part_no);
2029                 return -ENODEV;
2030         }
2031
2032         return 0;
2033 }
2034
2035 static int sja1105_probe(struct spi_device *spi)
2036 {
2037         struct sja1105_tagger_data *tagger_data;
2038         struct device *dev = &spi->dev;
2039         struct sja1105_private *priv;
2040         struct dsa_switch *ds;
2041         int rc, i;
2042
2043         if (!dev->of_node) {
2044                 dev_err(dev, "No DTS bindings for SJA1105 driver\n");
2045                 return -EINVAL;
2046         }
2047
2048         priv = devm_kzalloc(dev, sizeof(struct sja1105_private), GFP_KERNEL);
2049         if (!priv)
2050                 return -ENOMEM;
2051
2052         /* Configure the optional reset pin and bring up switch */
2053         priv->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
2054         if (IS_ERR(priv->reset_gpio))
2055                 dev_dbg(dev, "reset-gpios not defined, ignoring\n");
2056         else
2057                 sja1105_hw_reset(priv->reset_gpio, 1, 1);
2058
2059         /* Populate our driver private structure (priv) based on
2060          * the device tree node that was probed (spi)
2061          */
2062         priv->spidev = spi;
2063         spi_set_drvdata(spi, priv);
2064
2065         /* Configure the SPI bus */
2066         spi->bits_per_word = 8;
2067         rc = spi_setup(spi);
2068         if (rc < 0) {
2069                 dev_err(dev, "Could not init SPI\n");
2070                 return rc;
2071         }
2072
2073         priv->info = of_device_get_match_data(dev);
2074
2075         /* Detect hardware device */
2076         rc = sja1105_check_device_id(priv);
2077         if (rc < 0) {
2078                 dev_err(dev, "Device ID check failed: %d\n", rc);
2079                 return rc;
2080         }
2081
2082         dev_info(dev, "Probed switch chip: %s\n", priv->info->name);
2083
2084         ds = dsa_switch_alloc(dev, SJA1105_NUM_PORTS);
2085         if (!ds)
2086                 return -ENOMEM;
2087
2088         ds->ops = &sja1105_switch_ops;
2089         ds->priv = priv;
2090         priv->ds = ds;
2091
2092         tagger_data = &priv->tagger_data;
2093         skb_queue_head_init(&tagger_data->skb_rxtstamp_queue);
2094         INIT_WORK(&tagger_data->rxtstamp_work, sja1105_rxtstamp_work);
2095
2096         /* Connections between dsa_port and sja1105_port */
2097         for (i = 0; i < SJA1105_NUM_PORTS; i++) {
2098                 struct sja1105_port *sp = &priv->ports[i];
2099
2100                 ds->ports[i].priv = sp;
2101                 sp->dp = &ds->ports[i];
2102                 sp->data = tagger_data;
2103         }
2104         mutex_init(&priv->mgmt_lock);
2105
2106         return dsa_register_switch(priv->ds);
2107 }
2108
2109 static int sja1105_remove(struct spi_device *spi)
2110 {
2111         struct sja1105_private *priv = spi_get_drvdata(spi);
2112
2113         sja1105_ptp_clock_unregister(priv);
2114         dsa_unregister_switch(priv->ds);
2115         sja1105_static_config_free(&priv->static_config);
2116         return 0;
2117 }
2118
2119 static const struct of_device_id sja1105_dt_ids[] = {
2120         { .compatible = "nxp,sja1105e", .data = &sja1105e_info },
2121         { .compatible = "nxp,sja1105t", .data = &sja1105t_info },
2122         { .compatible = "nxp,sja1105p", .data = &sja1105p_info },
2123         { .compatible = "nxp,sja1105q", .data = &sja1105q_info },
2124         { .compatible = "nxp,sja1105r", .data = &sja1105r_info },
2125         { .compatible = "nxp,sja1105s", .data = &sja1105s_info },
2126         { /* sentinel */ },
2127 };
2128 MODULE_DEVICE_TABLE(of, sja1105_dt_ids);
2129
2130 static struct spi_driver sja1105_driver = {
2131         .driver = {
2132                 .name  = "sja1105",
2133                 .owner = THIS_MODULE,
2134                 .of_match_table = of_match_ptr(sja1105_dt_ids),
2135         },
2136         .probe  = sja1105_probe,
2137         .remove = sja1105_remove,
2138 };
2139
2140 module_spi_driver(sja1105_driver);
2141
2142 MODULE_AUTHOR("Vladimir Oltean <olteanv@gmail.com>");
2143 MODULE_AUTHOR("Georg Waibel <georg.waibel@sensor-technik.de>");
2144 MODULE_DESCRIPTION("SJA1105 Driver");
2145 MODULE_LICENSE("GPL v2");