drivers/net/dsa/sja1105/sja1105.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /* Copyright (c) 2018, Sensor-Technik Wiedemann GmbH
   3  * Copyright (c) 2018-2019, Vladimir Oltean <olteanv@gmail.com>
   4  */
   5 #ifndef _SJA1105_H
   6 #define _SJA1105_H
   7
   8 #include <linux/ptp_clock_kernel.h>
   9 #include <linux/timecounter.h>
  10 #include <linux/dsa/sja1105.h>
  11 #include <linux/dsa/8021q.h>
  12 #include <net/dsa.h>
  13 #include <linux/mutex.h>
  14 #include "sja1105_static_config.h"
  15
  16 #define SJA1105_NUM_PORTS               5
  17 #define SJA1105_MAX_NUM_PORTS           SJA1105_NUM_PORTS
  18 #define SJA1105_NUM_TC                  8
  19 #define SJA1105ET_FDB_BIN_SIZE          4
  20 /* The hardware value is in multiples of 10 ms.
  21  * The passed parameter is in multiples of 1 ms.
  22  */
  23 #define SJA1105_AGEING_TIME_MS(ms)      ((ms) / 10)
  24 #define SJA1105_NUM_L2_POLICERS         45
  25
  26 typedef enum {
  27         SPI_READ = 0,
  28         SPI_WRITE = 1,
  29 } sja1105_spi_rw_mode_t;
  30
  31 #include "sja1105_tas.h"
  32 #include "sja1105_ptp.h"
  33
  34 enum sja1105_stats_area {
  35         MAC,
  36         HL1,
  37         HL2,
  38         ETHER,
  39         __MAX_SJA1105_STATS_AREA,
  40 };
  41
  42 /* Keeps the different addresses between E/T and P/Q/R/S */
  43 struct sja1105_regs {
  44         u64 device_id;
  45         u64 prod_id;
  46         u64 status;
  47         u64 port_control;
  48         u64 rgu;
  49         u64 vl_status;
  50         u64 config;
  51         u64 rmii_pll1;
  52         u64 ptppinst;
  53         u64 ptppindur;
  54         u64 ptp_control;
  55         u64 ptpclkval;
  56         u64 ptpclkrate;
  57         u64 ptpclkcorp;
  58         u64 ptpsyncts;
  59         u64 ptpschtm;
  60         u64 ptpegr_ts[SJA1105_MAX_NUM_PORTS];
  61         u64 pad_mii_tx[SJA1105_MAX_NUM_PORTS];
  62         u64 pad_mii_rx[SJA1105_MAX_NUM_PORTS];
  63         u64 pad_mii_id[SJA1105_MAX_NUM_PORTS];
  64         u64 cgu_idiv[SJA1105_MAX_NUM_PORTS];
  65         u64 mii_tx_clk[SJA1105_MAX_NUM_PORTS];
  66         u64 mii_rx_clk[SJA1105_MAX_NUM_PORTS];
  67         u64 mii_ext_tx_clk[SJA1105_MAX_NUM_PORTS];
  68         u64 mii_ext_rx_clk[SJA1105_MAX_NUM_PORTS];
  69         u64 rgmii_tx_clk[SJA1105_MAX_NUM_PORTS];
  70         u64 rmii_ref_clk[SJA1105_MAX_NUM_PORTS];
  71         u64 rmii_ext_tx_clk[SJA1105_MAX_NUM_PORTS];
  72         u64 stats[__MAX_SJA1105_STATS_AREA][SJA1105_MAX_NUM_PORTS];
  73 };
  74
  75 struct sja1105_info {
  76         u64 device_id;
  77         /* Needed for distinction between P and R, and between Q and S
  78          * (since the parts with/without SGMII share the same
  79          * switch core and device_id)
  80          */
  81         u64 part_no;
  82         /* E/T and P/Q/R/S have partial timestamps of different sizes.
  83          * They must be reconstructed on both families anyway to get the full
  84          * 64-bit values back.
  85          */
  86         int ptp_ts_bits;
  87         /* Also SPI commands are of different sizes to retrieve
  88          * the egress timestamps.
  89          */
  90         int ptpegr_ts_bytes;
  91         int num_cbs_shapers;
  92         int max_frame_mem;
  93         const struct sja1105_dynamic_table_ops *dyn_ops;
  94         const struct sja1105_table_ops *static_ops;
  95         const struct sja1105_regs *regs;
  96         /* Both E/T and P/Q/R/S have quirks when it comes to popping the S-Tag
  97          * from double-tagged frames. E/T will pop it only when it's equal to
  98          * TPID from the General Parameters Table, while P/Q/R/S will only
  99          * pop it when it's equal to TPID2.
 100          */
 101         u16 qinq_tpid;
 102         bool can_limit_mcast_flood;
 103         int (*reset_cmd)(struct dsa_switch *ds);
 104         int (*setup_rgmii_delay)(const void *ctx, int port);
 105         /* Prototypes from include/net/dsa.h */
 106         int (*fdb_add_cmd)(struct dsa_switch *ds, int port,
 107                            const unsigned char *addr, u16 vid);
 108         int (*fdb_del_cmd)(struct dsa_switch *ds, int port,
 109                            const unsigned char *addr, u16 vid);
 110         void (*ptp_cmd_packing)(u8 *buf, struct sja1105_ptp_cmd *cmd,
 111                                 enum packing_op op);
 112         int (*clocking_setup)(struct sja1105_private *priv);
 113         const char *name;
 114         bool supports_mii[SJA1105_MAX_NUM_PORTS];
 115         bool supports_rmii[SJA1105_MAX_NUM_PORTS];
 116         bool supports_rgmii[SJA1105_MAX_NUM_PORTS];
 117         bool supports_sgmii[SJA1105_MAX_NUM_PORTS];
 118         bool supports_2500basex[SJA1105_MAX_NUM_PORTS];
 119 };
 120
 121 enum sja1105_key_type {
 122         SJA1105_KEY_BCAST,
 123         SJA1105_KEY_TC,
 124         SJA1105_KEY_VLAN_UNAWARE_VL,
 125         SJA1105_KEY_VLAN_AWARE_VL,
 126 };
 127
 128 struct sja1105_key {
 129         enum sja1105_key_type type;
 130
 131         union {
 132                 /* SJA1105_KEY_TC */
 133                 struct {
 134                         int pcp;
 135                 } tc;
 136
 137                 /* SJA1105_KEY_VLAN_UNAWARE_VL */
 138                 /* SJA1105_KEY_VLAN_AWARE_VL */
 139                 struct {
 140                         u64 dmac;
 141                         u16 vid;
 142                         u16 pcp;
 143                 } vl;
 144         };
 145 };
 146
 147 enum sja1105_rule_type {
 148         SJA1105_RULE_BCAST_POLICER,
 149         SJA1105_RULE_TC_POLICER,
 150         SJA1105_RULE_VL,
 151 };
 152
 153 enum sja1105_vl_type {
 154         SJA1105_VL_NONCRITICAL,
 155         SJA1105_VL_RATE_CONSTRAINED,
 156         SJA1105_VL_TIME_TRIGGERED,
 157 };
 158
 159 struct sja1105_rule {
 160         struct list_head list;
 161         unsigned long cookie;
 162         unsigned long port_mask;
 163         struct sja1105_key key;
 164         enum sja1105_rule_type type;
 165
 166         /* Action */
 167         union {
 168                 /* SJA1105_RULE_BCAST_POLICER */
 169                 struct {
 170                         int sharindx;
 171                 } bcast_pol;
 172
 173                 /* SJA1105_RULE_TC_POLICER */
 174                 struct {
 175                         int sharindx;
 176                 } tc_pol;
 177
 178                 /* SJA1105_RULE_VL */
 179                 struct {
 180                         enum sja1105_vl_type type;
 181                         unsigned long destports;
 182                         int sharindx;
 183                         int maxlen;
 184                         int ipv;
 185                         u64 base_time;
 186                         u64 cycle_time;
 187                         int num_entries;
 188                         struct action_gate_entry *entries;
 189                         struct flow_stats stats;
 190                 } vl;
 191         };
 192 };
 193
 194 struct sja1105_flow_block {
 195         struct list_head rules;
 196         bool l2_policer_used[SJA1105_NUM_L2_POLICERS];
 197         int num_virtual_links;
 198 };
 199
 200 struct sja1105_bridge_vlan {
 201         struct list_head list;
 202         int port;
 203         u16 vid;
 204         bool pvid;
 205         bool untagged;
 206 };
 207
 208 enum sja1105_vlan_state {
 209         SJA1105_VLAN_UNAWARE,
 210         SJA1105_VLAN_BEST_EFFORT,
 211         SJA1105_VLAN_FILTERING_FULL,
 212 };
 213
 214 struct sja1105_private {
 215         struct sja1105_static_config static_config;
 216         bool rgmii_rx_delay[SJA1105_MAX_NUM_PORTS];
 217         bool rgmii_tx_delay[SJA1105_MAX_NUM_PORTS];
 218         phy_interface_t phy_mode[SJA1105_MAX_NUM_PORTS];
 219         bool best_effort_vlan_filtering;
 220         unsigned long learn_ena;
 221         unsigned long ucast_egress_floods;
 222         unsigned long bcast_egress_floods;
 223         const struct sja1105_info *info;
 224         size_t max_xfer_len;
 225         struct gpio_desc *reset_gpio;
 226         struct spi_device *spidev;
 227         struct dsa_switch *ds;
 228         struct list_head dsa_8021q_vlans;
 229         struct list_head bridge_vlans;
 230         struct sja1105_flow_block flow_block;
 231         struct sja1105_port ports[SJA1105_MAX_NUM_PORTS];
 232         /* Serializes transmission of management frames so that
 233          * the switch doesn't confuse them with one another.
 234          */
 235         struct mutex mgmt_lock;
 236         struct dsa_8021q_context *dsa_8021q_ctx;
 237         enum sja1105_vlan_state vlan_state;
 238         struct devlink_region **regions;
 239         struct sja1105_cbs_entry *cbs;
 240         struct sja1105_tagger_data tagger_data;
 241         struct sja1105_ptp_data ptp_data;
 242         struct sja1105_tas_data tas_data;
 243 };
 244
 245 #include "sja1105_dynamic_config.h"
 246
 247 struct sja1105_spi_message {
 248         u64 access;
 249         u64 read_count;
 250         u64 address;
 251 };
 252
 253 /* From sja1105_main.c */
 254 enum sja1105_reset_reason {
 255         SJA1105_VLAN_FILTERING = 0,
 256         SJA1105_RX_HWTSTAMPING,
 257         SJA1105_AGEING_TIME,
 258         SJA1105_SCHEDULING,
 259         SJA1105_BEST_EFFORT_POLICING,
 260         SJA1105_VIRTUAL_LINKS,
 261 };
 262
 263 int sja1105_static_config_reload(struct sja1105_private *priv,
 264                                  enum sja1105_reset_reason reason);
 265 int sja1105_vlan_filtering(struct dsa_switch *ds, int port, bool enabled,
 266                            struct netlink_ext_ack *extack);
 267 void sja1105_frame_memory_partitioning(struct sja1105_private *priv);
 268
 269 /* From sja1105_devlink.c */
 270 int sja1105_devlink_setup(struct dsa_switch *ds);
 271 void sja1105_devlink_teardown(struct dsa_switch *ds);
 272 int sja1105_devlink_param_get(struct dsa_switch *ds, u32 id,
 273                               struct devlink_param_gset_ctx *ctx);
 274 int sja1105_devlink_param_set(struct dsa_switch *ds, u32 id,
 275                               struct devlink_param_gset_ctx *ctx);
 276 int sja1105_devlink_info_get(struct dsa_switch *ds,
 277                              struct devlink_info_req *req,
 278                              struct netlink_ext_ack *extack);
 279
 280 /* From sja1105_spi.c */
 281 int sja1105_xfer_buf(const struct sja1105_private *priv,
 282                      sja1105_spi_rw_mode_t rw, u64 reg_addr,
 283                      u8 *buf, size_t len);
 284 int sja1105_xfer_u32(const struct sja1105_private *priv,
 285                      sja1105_spi_rw_mode_t rw, u64 reg_addr, u32 *value,
 286                      struct ptp_system_timestamp *ptp_sts);
 287 int sja1105_xfer_u64(const struct sja1105_private *priv,
 288                      sja1105_spi_rw_mode_t rw, u64 reg_addr, u64 *value,
 289                      struct ptp_system_timestamp *ptp_sts);
 290 int static_config_buf_prepare_for_upload(struct sja1105_private *priv,
 291                                          void *config_buf, int buf_len);
 292 int sja1105_static_config_upload(struct sja1105_private *priv);
 293 int sja1105_inhibit_tx(const struct sja1105_private *priv,
 294                        unsigned long port_bitmap, bool tx_inhibited);
 295
 296 extern const struct sja1105_info sja1105e_info;
 297 extern const struct sja1105_info sja1105t_info;
 298 extern const struct sja1105_info sja1105p_info;
 299 extern const struct sja1105_info sja1105q_info;
 300 extern const struct sja1105_info sja1105r_info;
 301 extern const struct sja1105_info sja1105s_info;
 302
 303 /* From sja1105_clocking.c */
 304
 305 typedef enum {
 306         XMII_MAC = 0,
 307         XMII_PHY = 1,
 308 } sja1105_mii_role_t;
 309
 310 typedef enum {
 311         XMII_MODE_MII           = 0,
 312         XMII_MODE_RMII          = 1,
 313         XMII_MODE_RGMII         = 2,
 314         XMII_MODE_SGMII         = 3,
 315 } sja1105_phy_interface_t;
 316
 317 typedef enum {
 318         SJA1105_SPEED_10MBPS    = 3,
 319         SJA1105_SPEED_100MBPS   = 2,
 320         SJA1105_SPEED_1000MBPS  = 1,
 321         SJA1105_SPEED_AUTO      = 0,
 322 } sja1105_speed_t;
 323
 324 int sja1105pqrs_setup_rgmii_delay(const void *ctx, int port);
 325 int sja1105_clocking_setup_port(struct sja1105_private *priv, int port);
 326 int sja1105_clocking_setup(struct sja1105_private *priv);
 327
 328 /* From sja1105_ethtool.c */
 329 void sja1105_get_ethtool_stats(struct dsa_switch *ds, int port, u64 *data);
 330 void sja1105_get_strings(struct dsa_switch *ds, int port,
 331                          u32 stringset, u8 *data);
 332 int sja1105_get_sset_count(struct dsa_switch *ds, int port, int sset);
 333
 334 /* From sja1105_dynamic_config.c */
 335 int sja1105_dynamic_config_read(struct sja1105_private *priv,
 336                                 enum sja1105_blk_idx blk_idx,
 337                                 int index, void *entry);
 338 int sja1105_dynamic_config_write(struct sja1105_private *priv,
 339                                  enum sja1105_blk_idx blk_idx,
 340                                  int index, void *entry, bool keep);
 341
 342 enum sja1105_iotag {
 343         SJA1105_C_TAG = 0, /* Inner VLAN header */
 344         SJA1105_S_TAG = 1, /* Outer VLAN header */
 345 };
 346
 347 u8 sja1105et_fdb_hash(struct sja1105_private *priv, const u8 *addr, u16 vid);
 348 int sja1105et_fdb_add(struct dsa_switch *ds, int port,
 349                       const unsigned char *addr, u16 vid);
 350 int sja1105et_fdb_del(struct dsa_switch *ds, int port,
 351                       const unsigned char *addr, u16 vid);
 352 int sja1105pqrs_fdb_add(struct dsa_switch *ds, int port,
 353                         const unsigned char *addr, u16 vid);
 354 int sja1105pqrs_fdb_del(struct dsa_switch *ds, int port,
 355                         const unsigned char *addr, u16 vid);
 356
 357 /* From sja1105_flower.c */
 358 int sja1105_cls_flower_del(struct dsa_switch *ds, int port,
 359                            struct flow_cls_offload *cls, bool ingress);
 360 int sja1105_cls_flower_add(struct dsa_switch *ds, int port,
 361                            struct flow_cls_offload *cls, bool ingress);
 362 int sja1105_cls_flower_stats(struct dsa_switch *ds, int port,
 363                              struct flow_cls_offload *cls, bool ingress);
 364 void sja1105_flower_setup(struct dsa_switch *ds);
 365 void sja1105_flower_teardown(struct dsa_switch *ds);
 366 struct sja1105_rule *sja1105_rule_find(struct sja1105_private *priv,
 367                                        unsigned long cookie);
 368
 369 #endif