1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Microchip switch driver common header
4 * Copyright (C) 2017-2019 Microchip Technology Inc.
10 #include <linux/etherdevice.h>
11 #include <linux/kernel.h>
12 #include <linux/mutex.h>
13 #include <linux/phy.h>
14 #include <linux/regmap.h>
22 struct mutex cnt_mutex; /* structure access */
31 struct phy_device phydev;
33 u32 on:1; /* port is not disabled by hardware */
34 u32 phy:1; /* port has a PHY */
35 u32 fiber:1; /* port is fiber */
36 u32 sgmii:1; /* port is SGMII */
38 u32 read:1; /* read MIB counters in background */
39 u32 freeze:1; /* MIB counter freeze is enabled */
41 struct ksz_port_mib mib;
42 phy_interface_t interface;
46 struct dsa_switch *ds;
47 struct ksz_platform_data *pdata;
50 struct mutex dev_mutex; /* device access */
51 struct mutex regmap_mutex; /* regmap access */
52 struct mutex alu_mutex; /* ALU access */
53 struct mutex vlan_mutex; /* vlan access */
54 const struct ksz_dev_ops *dev_ops;
57 struct regmap *regmap[3];
61 struct gpio_desc *reset_gpio; /* Optional reset GPIO */
63 /* chip specific data */
68 int cpu_port; /* port connected to CPU */
69 int cpu_ports; /* port bitmap can be cpu port */
74 const struct mib_names *mib_names;
75 phy_interface_t compat_interface;
80 struct vlan_table *vlan_cache;
82 struct ksz_port *ports;
83 struct delayed_work mib_read;
84 unsigned long mib_read_interval;
89 u32 features; /* chip specific features */
90 u32 overrides; /* chip functions set by user */
115 u32 (*get_port_addr)(int port, int offset);
116 void (*cfg_port_member)(struct ksz_device *dev, int port, u8 member);
117 void (*flush_dyn_mac_table)(struct ksz_device *dev, int port);
118 void (*port_cleanup)(struct ksz_device *dev, int port);
119 void (*port_setup)(struct ksz_device *dev, int port, bool cpu_port);
120 void (*r_phy)(struct ksz_device *dev, u16 phy, u16 reg, u16 *val);
121 void (*w_phy)(struct ksz_device *dev, u16 phy, u16 reg, u16 val);
122 int (*r_dyn_mac_table)(struct ksz_device *dev, u16 addr, u8 *mac_addr,
123 u8 *fid, u8 *src_port, u8 *timestamp,
125 int (*r_sta_mac_table)(struct ksz_device *dev, u16 addr,
126 struct alu_struct *alu);
127 void (*w_sta_mac_table)(struct ksz_device *dev, u16 addr,
128 struct alu_struct *alu);
129 void (*r_mib_cnt)(struct ksz_device *dev, int port, u16 addr,
131 void (*r_mib_pkt)(struct ksz_device *dev, int port, u16 addr,
132 u64 *dropped, u64 *cnt);
133 void (*freeze_mib)(struct ksz_device *dev, int port, bool freeze);
134 void (*port_init_cnt)(struct ksz_device *dev, int port);
135 int (*shutdown)(struct ksz_device *dev);
136 int (*detect)(struct ksz_device *dev);
137 int (*init)(struct ksz_device *dev);
138 void (*exit)(struct ksz_device *dev);
141 struct ksz_device *ksz_switch_alloc(struct device *base, void *priv);
142 int ksz_switch_register(struct ksz_device *dev,
143 const struct ksz_dev_ops *ops);
144 void ksz_switch_remove(struct ksz_device *dev);
146 int ksz8_switch_register(struct ksz_device *dev);
147 int ksz9477_switch_register(struct ksz_device *dev);
149 void ksz_update_port_member(struct ksz_device *dev, int port);
150 void ksz_init_mib_timer(struct ksz_device *dev);
152 /* Common DSA access functions */
154 int ksz_phy_read16(struct dsa_switch *ds, int addr, int reg);
155 int ksz_phy_write16(struct dsa_switch *ds, int addr, int reg, u16 val);
156 void ksz_mac_link_down(struct dsa_switch *ds, int port, unsigned int mode,
157 phy_interface_t interface);
158 int ksz_sset_count(struct dsa_switch *ds, int port, int sset);
159 void ksz_get_ethtool_stats(struct dsa_switch *ds, int port, uint64_t *buf);
160 int ksz_port_bridge_join(struct dsa_switch *ds, int port,
161 struct net_device *br);
162 void ksz_port_bridge_leave(struct dsa_switch *ds, int port,
163 struct net_device *br);
164 void ksz_port_fast_age(struct dsa_switch *ds, int port);
165 int ksz_port_fdb_dump(struct dsa_switch *ds, int port, dsa_fdb_dump_cb_t *cb,
167 int ksz_port_mdb_add(struct dsa_switch *ds, int port,
168 const struct switchdev_obj_port_mdb *mdb);
169 int ksz_port_mdb_del(struct dsa_switch *ds, int port,
170 const struct switchdev_obj_port_mdb *mdb);
171 int ksz_enable_port(struct dsa_switch *ds, int port, struct phy_device *phy);
173 /* Common register access functions */
175 static inline int ksz_read8(struct ksz_device *dev, u32 reg, u8 *val)
178 int ret = regmap_read(dev->regmap[0], reg, &value);
184 static inline int ksz_read16(struct ksz_device *dev, u32 reg, u16 *val)
187 int ret = regmap_read(dev->regmap[1], reg, &value);
193 static inline int ksz_read32(struct ksz_device *dev, u32 reg, u32 *val)
196 int ret = regmap_read(dev->regmap[2], reg, &value);
202 static inline int ksz_read64(struct ksz_device *dev, u32 reg, u64 *val)
207 ret = regmap_bulk_read(dev->regmap[2], reg, value, 2);
209 /* Ick! ToDo: Add 64bit R/W to regmap on 32bit systems */
210 value[0] = swab32(value[0]);
211 value[1] = swab32(value[1]);
212 *val = swab64((u64)*value);
218 static inline int ksz_write8(struct ksz_device *dev, u32 reg, u8 value)
220 return regmap_write(dev->regmap[0], reg, value);
223 static inline int ksz_write16(struct ksz_device *dev, u32 reg, u16 value)
225 return regmap_write(dev->regmap[1], reg, value);
228 static inline int ksz_write32(struct ksz_device *dev, u32 reg, u32 value)
230 return regmap_write(dev->regmap[2], reg, value);
233 static inline int ksz_write64(struct ksz_device *dev, u32 reg, u64 value)
237 /* Ick! ToDo: Add 64bit R/W to regmap on 32bit systems */
238 value = swab64(value);
239 val[0] = swab32(value & 0xffffffffULL);
240 val[1] = swab32(value >> 32ULL);
242 return regmap_bulk_write(dev->regmap[2], reg, val, 2);
245 static inline void ksz_pread8(struct ksz_device *dev, int port, int offset,
248 ksz_read8(dev, dev->dev_ops->get_port_addr(port, offset), data);
251 static inline void ksz_pread16(struct ksz_device *dev, int port, int offset,
254 ksz_read16(dev, dev->dev_ops->get_port_addr(port, offset), data);
257 static inline void ksz_pread32(struct ksz_device *dev, int port, int offset,
260 ksz_read32(dev, dev->dev_ops->get_port_addr(port, offset), data);
263 static inline void ksz_pwrite8(struct ksz_device *dev, int port, int offset,
266 ksz_write8(dev, dev->dev_ops->get_port_addr(port, offset), data);
269 static inline void ksz_pwrite16(struct ksz_device *dev, int port, int offset,
272 ksz_write16(dev, dev->dev_ops->get_port_addr(port, offset), data);
275 static inline void ksz_pwrite32(struct ksz_device *dev, int port, int offset,
278 ksz_write32(dev, dev->dev_ops->get_port_addr(port, offset), data);
281 static inline void ksz_regmap_lock(void *__mtx)
283 struct mutex *mtx = __mtx;
287 static inline void ksz_regmap_unlock(void *__mtx)
289 struct mutex *mtx = __mtx;
293 /* Regmap tables generation */
294 #define KSZ_SPI_OP_RD 3
295 #define KSZ_SPI_OP_WR 2
297 #define swabnot_used(x) 0
299 #define KSZ_SPI_OP_FLAG_MASK(opcode, swp, regbits, regpad) \
300 swab##swp((opcode) << ((regbits) + (regpad)))
302 #define KSZ_REGMAP_ENTRY(width, swp, regbits, regpad, regalign) \
305 .val_bits = (width), \
307 .reg_bits = (regbits) + (regalign), \
308 .pad_bits = (regpad), \
309 .max_register = BIT(regbits) - 1, \
310 .cache_type = REGCACHE_NONE, \
312 KSZ_SPI_OP_FLAG_MASK(KSZ_SPI_OP_RD, swp, \
315 KSZ_SPI_OP_FLAG_MASK(KSZ_SPI_OP_WR, swp, \
317 .lock = ksz_regmap_lock, \
318 .unlock = ksz_regmap_unlock, \
319 .reg_format_endian = REGMAP_ENDIAN_BIG, \
320 .val_format_endian = REGMAP_ENDIAN_BIG \
323 #define KSZ_REGMAP_TABLE(ksz, swp, regbits, regpad, regalign) \
324 static const struct regmap_config ksz##_regmap_config[] = { \
325 KSZ_REGMAP_ENTRY(8, swp, (regbits), (regpad), (regalign)), \
326 KSZ_REGMAP_ENTRY(16, swp, (regbits), (regpad), (regalign)), \
327 KSZ_REGMAP_ENTRY(32, swp, (regbits), (regpad), (regalign)), \