drivers/net/dsa/microchip/ksz8795.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Microchip KSZ8795 switch driver
   4  *
   5  * Copyright (C) 2017 Microchip Technology Inc.
   6  *      Tristram Ha <Tristram.Ha@microchip.com>
   7  */
   8
   9 #include <linux/bitfield.h>
  10 #include <linux/delay.h>
  11 #include <linux/export.h>
  12 #include <linux/gpio.h>
  13 #include <linux/if_vlan.h>
  14 #include <linux/kernel.h>
  15 #include <linux/module.h>
  16 #include <linux/platform_data/microchip-ksz.h>
  17 #include <linux/phy.h>
  18 #include <linux/etherdevice.h>
  19 #include <linux/if_bridge.h>
  20 #include <linux/micrel_phy.h>
  21 #include <net/dsa.h>
  22 #include <net/switchdev.h>
  23 #include <linux/phylink.h>
  24
  25 #include "ksz_common.h"
  26 #include "ksz8795_reg.h"
  27 #include "ksz8.h"
  28
  29 static const u8 ksz8795_regs[] = {
  30         [REG_IND_CTRL_0]                = 0x6E,
  31         [REG_IND_DATA_8]                = 0x70,
  32         [REG_IND_DATA_CHECK]            = 0x72,
  33         [REG_IND_DATA_HI]               = 0x71,
  34         [REG_IND_DATA_LO]               = 0x75,
  35         [REG_IND_MIB_CHECK]             = 0x74,
  36         [P_FORCE_CTRL]                  = 0x0C,
  37         [P_LINK_STATUS]                 = 0x0E,
  38         [P_LOCAL_CTRL]                  = 0x07,
  39         [P_NEG_RESTART_CTRL]            = 0x0D,
  40         [P_REMOTE_STATUS]               = 0x08,
  41         [P_SPEED_STATUS]                = 0x09,
  42         [S_TAIL_TAG_CTRL]               = 0x0C,
  43 };
  44
  45 static const u32 ksz8795_masks[] = {
  46         [PORT_802_1P_REMAPPING]         = BIT(7),
  47         [SW_TAIL_TAG_ENABLE]            = BIT(1),
  48         [MIB_COUNTER_OVERFLOW]          = BIT(6),
  49         [MIB_COUNTER_VALID]             = BIT(5),
  50         [VLAN_TABLE_FID]                = GENMASK(6, 0),
  51         [VLAN_TABLE_MEMBERSHIP]         = GENMASK(11, 7),
  52         [VLAN_TABLE_VALID]              = BIT(12),
  53         [STATIC_MAC_TABLE_VALID]        = BIT(21),
  54         [STATIC_MAC_TABLE_USE_FID]      = BIT(23),
  55         [STATIC_MAC_TABLE_FID]          = GENMASK(30, 24),
  56         [STATIC_MAC_TABLE_OVERRIDE]     = BIT(26),
  57         [STATIC_MAC_TABLE_FWD_PORTS]    = GENMASK(24, 20),
  58         [DYNAMIC_MAC_TABLE_ENTRIES_H]   = GENMASK(6, 0),
  59         [DYNAMIC_MAC_TABLE_MAC_EMPTY]   = BIT(8),
  60         [DYNAMIC_MAC_TABLE_NOT_READY]   = BIT(7),
  61         [DYNAMIC_MAC_TABLE_ENTRIES]     = GENMASK(31, 29),
  62         [DYNAMIC_MAC_TABLE_FID]         = GENMASK(26, 20),
  63         [DYNAMIC_MAC_TABLE_SRC_PORT]    = GENMASK(26, 24),
  64         [DYNAMIC_MAC_TABLE_TIMESTAMP]   = GENMASK(28, 27),
  65 };
  66
  67 static const u8 ksz8795_shifts[] = {
  68         [VLAN_TABLE_MEMBERSHIP_S]       = 7,
  69         [VLAN_TABLE]                    = 16,
  70         [STATIC_MAC_FWD_PORTS]          = 16,
  71         [STATIC_MAC_FID]                = 24,
  72         [DYNAMIC_MAC_ENTRIES_H]         = 3,
  73         [DYNAMIC_MAC_ENTRIES]           = 29,
  74         [DYNAMIC_MAC_FID]               = 16,
  75         [DYNAMIC_MAC_TIMESTAMP]         = 27,
  76         [DYNAMIC_MAC_SRC_PORT]          = 24,
  77 };
  78
  79 static const u8 ksz8863_regs[] = {
  80         [REG_IND_CTRL_0]                = 0x79,
  81         [REG_IND_DATA_8]                = 0x7B,
  82         [REG_IND_DATA_CHECK]            = 0x7B,
  83         [REG_IND_DATA_HI]               = 0x7C,
  84         [REG_IND_DATA_LO]               = 0x80,
  85         [REG_IND_MIB_CHECK]             = 0x80,
  86         [P_FORCE_CTRL]                  = 0x0C,
  87         [P_LINK_STATUS]                 = 0x0E,
  88         [P_LOCAL_CTRL]                  = 0x0C,
  89         [P_NEG_RESTART_CTRL]            = 0x0D,
  90         [P_REMOTE_STATUS]               = 0x0E,
  91         [P_SPEED_STATUS]                = 0x0F,
  92         [S_TAIL_TAG_CTRL]               = 0x03,
  93 };
  94
  95 static const u32 ksz8863_masks[] = {
  96         [PORT_802_1P_REMAPPING]         = BIT(3),
  97         [SW_TAIL_TAG_ENABLE]            = BIT(6),
  98         [MIB_COUNTER_OVERFLOW]          = BIT(7),
  99         [MIB_COUNTER_VALID]             = BIT(6),
 100         [VLAN_TABLE_FID]                = GENMASK(15, 12),
 101         [VLAN_TABLE_MEMBERSHIP]         = GENMASK(18, 16),
 102         [VLAN_TABLE_VALID]              = BIT(19),
 103         [STATIC_MAC_TABLE_VALID]        = BIT(19),
 104         [STATIC_MAC_TABLE_USE_FID]      = BIT(21),
 105         [STATIC_MAC_TABLE_FID]          = GENMASK(29, 26),
 106         [STATIC_MAC_TABLE_OVERRIDE]     = BIT(20),
 107         [STATIC_MAC_TABLE_FWD_PORTS]    = GENMASK(18, 16),
 108         [DYNAMIC_MAC_TABLE_ENTRIES_H]   = GENMASK(5, 0),
 109         [DYNAMIC_MAC_TABLE_MAC_EMPTY]   = BIT(7),
 110         [DYNAMIC_MAC_TABLE_NOT_READY]   = BIT(7),
 111         [DYNAMIC_MAC_TABLE_ENTRIES]     = GENMASK(31, 28),
 112         [DYNAMIC_MAC_TABLE_FID]         = GENMASK(19, 16),
 113         [DYNAMIC_MAC_TABLE_SRC_PORT]    = GENMASK(21, 20),
 114         [DYNAMIC_MAC_TABLE_TIMESTAMP]   = GENMASK(23, 22),
 115 };
 116
 117 static u8 ksz8863_shifts[] = {
 118         [VLAN_TABLE_MEMBERSHIP_S]       = 16,
 119         [STATIC_MAC_FWD_PORTS]          = 16,
 120         [STATIC_MAC_FID]                = 22,
 121         [DYNAMIC_MAC_ENTRIES_H]         = 3,
 122         [DYNAMIC_MAC_ENTRIES]           = 24,
 123         [DYNAMIC_MAC_FID]               = 16,
 124         [DYNAMIC_MAC_TIMESTAMP]         = 24,
 125         [DYNAMIC_MAC_SRC_PORT]          = 20,
 126 };
 127
 128 struct mib_names {
 129         char string[ETH_GSTRING_LEN];
 130 };
 131
 132 static const struct mib_names ksz87xx_mib_names[] = {
 133         { "rx_hi" },
 134         { "rx_undersize" },
 135         { "rx_fragments" },
 136         { "rx_oversize" },
 137         { "rx_jabbers" },
 138         { "rx_symbol_err" },
 139         { "rx_crc_err" },
 140         { "rx_align_err" },
 141         { "rx_mac_ctrl" },
 142         { "rx_pause" },
 143         { "rx_bcast" },
 144         { "rx_mcast" },
 145         { "rx_ucast" },
 146         { "rx_64_or_less" },
 147         { "rx_65_127" },
 148         { "rx_128_255" },
 149         { "rx_256_511" },
 150         { "rx_512_1023" },
 151         { "rx_1024_1522" },
 152         { "rx_1523_2000" },
 153         { "rx_2001" },
 154         { "tx_hi" },
 155         { "tx_late_col" },
 156         { "tx_pause" },
 157         { "tx_bcast" },
 158         { "tx_mcast" },
 159         { "tx_ucast" },
 160         { "tx_deferred" },
 161         { "tx_total_col" },
 162         { "tx_exc_col" },
 163         { "tx_single_col" },
 164         { "tx_mult_col" },
 165         { "rx_total" },
 166         { "tx_total" },
 167         { "rx_discards" },
 168         { "tx_discards" },
 169 };
 170
 171 static const struct mib_names ksz88xx_mib_names[] = {
 172         { "rx" },
 173         { "rx_hi" },
 174         { "rx_undersize" },
 175         { "rx_fragments" },
 176         { "rx_oversize" },
 177         { "rx_jabbers" },
 178         { "rx_symbol_err" },
 179         { "rx_crc_err" },
 180         { "rx_align_err" },
 181         { "rx_mac_ctrl" },
 182         { "rx_pause" },
 183         { "rx_bcast" },
 184         { "rx_mcast" },
 185         { "rx_ucast" },
 186         { "rx_64_or_less" },
 187         { "rx_65_127" },
 188         { "rx_128_255" },
 189         { "rx_256_511" },
 190         { "rx_512_1023" },
 191         { "rx_1024_1522" },
 192         { "tx" },
 193         { "tx_hi" },
 194         { "tx_late_col" },
 195         { "tx_pause" },
 196         { "tx_bcast" },
 197         { "tx_mcast" },
 198         { "tx_ucast" },
 199         { "tx_deferred" },
 200         { "tx_total_col" },
 201         { "tx_exc_col" },
 202         { "tx_single_col" },
 203         { "tx_mult_col" },
 204         { "rx_discards" },
 205         { "tx_discards" },
 206 };
 207
 208 static bool ksz_is_ksz88x3(struct ksz_device *dev)
 209 {
 210         return dev->chip_id == 0x8830;
 211 }
 212
 213 static void ksz_cfg(struct ksz_device *dev, u32 addr, u8 bits, bool set)
 214 {
 215         regmap_update_bits(dev->regmap[0], addr, bits, set ? bits : 0);
 216 }
 217
 218 static void ksz_port_cfg(struct ksz_device *dev, int port, int offset, u8 bits,
 219                          bool set)
 220 {
 221         regmap_update_bits(dev->regmap[0], PORT_CTRL_ADDR(port, offset),
 222                            bits, set ? bits : 0);
 223 }
 224
 225 static int ksz8_reset_switch(struct ksz_device *dev)
 226 {
 227         if (ksz_is_ksz88x3(dev)) {
 228                 /* reset switch */
 229                 ksz_cfg(dev, KSZ8863_REG_SW_RESET,
 230                         KSZ8863_GLOBAL_SOFTWARE_RESET | KSZ8863_PCS_RESET, true);
 231                 ksz_cfg(dev, KSZ8863_REG_SW_RESET,
 232                         KSZ8863_GLOBAL_SOFTWARE_RESET | KSZ8863_PCS_RESET, false);
 233         } else {
 234                 /* reset switch */
 235                 ksz_write8(dev, REG_POWER_MANAGEMENT_1,
 236                            SW_SOFTWARE_POWER_DOWN << SW_POWER_MANAGEMENT_MODE_S);
 237                 ksz_write8(dev, REG_POWER_MANAGEMENT_1, 0);
 238         }
 239
 240         return 0;
 241 }
 242
 243 static void ksz8795_set_prio_queue(struct ksz_device *dev, int port, int queue)
 244 {
 245         u8 hi, lo;
 246
 247         /* Number of queues can only be 1, 2, or 4. */
 248         switch (queue) {
 249         case 4:
 250         case 3:
 251                 queue = PORT_QUEUE_SPLIT_4;
 252                 break;
 253         case 2:
 254                 queue = PORT_QUEUE_SPLIT_2;
 255                 break;
 256         default:
 257                 queue = PORT_QUEUE_SPLIT_1;
 258         }
 259         ksz_pread8(dev, port, REG_PORT_CTRL_0, &lo);
 260         ksz_pread8(dev, port, P_DROP_TAG_CTRL, &hi);
 261         lo &= ~PORT_QUEUE_SPLIT_L;
 262         if (queue & PORT_QUEUE_SPLIT_2)
 263                 lo |= PORT_QUEUE_SPLIT_L;
 264         hi &= ~PORT_QUEUE_SPLIT_H;
 265         if (queue & PORT_QUEUE_SPLIT_4)
 266                 hi |= PORT_QUEUE_SPLIT_H;
 267         ksz_pwrite8(dev, port, REG_PORT_CTRL_0, lo);
 268         ksz_pwrite8(dev, port, P_DROP_TAG_CTRL, hi);
 269
 270         /* Default is port based for egress rate limit. */
 271         if (queue != PORT_QUEUE_SPLIT_1)
 272                 ksz_cfg(dev, REG_SW_CTRL_19, SW_OUT_RATE_LIMIT_QUEUE_BASED,
 273                         true);
 274 }
 275
 276 static void ksz8_r_mib_cnt(struct ksz_device *dev, int port, u16 addr, u64 *cnt)
 277 {
 278         struct ksz8 *ksz8 = dev->priv;
 279         const u32 *masks;
 280         const u8 *regs;
 281         u16 ctrl_addr;
 282         u32 data;
 283         u8 check;
 284         int loop;
 285
 286         masks = ksz8->masks;
 287         regs = ksz8->regs;
 288
 289         ctrl_addr = addr + dev->reg_mib_cnt * port;
 290         ctrl_addr |= IND_ACC_TABLE(TABLE_MIB | TABLE_READ);
 291
 292         mutex_lock(&dev->alu_mutex);
 293         ksz_write16(dev, regs[REG_IND_CTRL_0], ctrl_addr);
 294
 295         /* It is almost guaranteed to always read the valid bit because of
 296          * slow SPI speed.
 297          */
 298         for (loop = 2; loop > 0; loop--) {
 299                 ksz_read8(dev, regs[REG_IND_MIB_CHECK], &check);
 300
 301                 if (check & masks[MIB_COUNTER_VALID]) {
 302                         ksz_read32(dev, regs[REG_IND_DATA_LO], &data);
 303                         if (check & masks[MIB_COUNTER_OVERFLOW])
 304                                 *cnt += MIB_COUNTER_VALUE + 1;
 305                         *cnt += data & MIB_COUNTER_VALUE;
 306                         break;
 307                 }
 308         }
 309         mutex_unlock(&dev->alu_mutex);
 310 }
 311
 312 static void ksz8795_r_mib_pkt(struct ksz_device *dev, int port, u16 addr,
 313                               u64 *dropped, u64 *cnt)
 314 {
 315         struct ksz8 *ksz8 = dev->priv;
 316         const u32 *masks;
 317         const u8 *regs;
 318         u16 ctrl_addr;
 319         u32 data;
 320         u8 check;
 321         int loop;
 322
 323         masks = ksz8->masks;
 324         regs = ksz8->regs;
 325
 326         addr -= dev->reg_mib_cnt;
 327         ctrl_addr = (KSZ8795_MIB_TOTAL_RX_1 - KSZ8795_MIB_TOTAL_RX_0) * port;
 328         ctrl_addr += addr + KSZ8795_MIB_TOTAL_RX_0;
 329         ctrl_addr |= IND_ACC_TABLE(TABLE_MIB | TABLE_READ);
 330
 331         mutex_lock(&dev->alu_mutex);
 332         ksz_write16(dev, regs[REG_IND_CTRL_0], ctrl_addr);
 333
 334         /* It is almost guaranteed to always read the valid bit because of
 335          * slow SPI speed.
 336          */
 337         for (loop = 2; loop > 0; loop--) {
 338                 ksz_read8(dev, regs[REG_IND_MIB_CHECK], &check);
 339
 340                 if (check & masks[MIB_COUNTER_VALID]) {
 341                         ksz_read32(dev, regs[REG_IND_DATA_LO], &data);
 342                         if (addr < 2) {
 343                                 u64 total;
 344
 345                                 total = check & MIB_TOTAL_BYTES_H;
 346                                 total <<= 32;
 347                                 *cnt += total;
 348                                 *cnt += data;
 349                                 if (check & masks[MIB_COUNTER_OVERFLOW]) {
 350                                         total = MIB_TOTAL_BYTES_H + 1;
 351                                         total <<= 32;
 352                                         *cnt += total;
 353                                 }
 354                         } else {
 355                                 if (check & masks[MIB_COUNTER_OVERFLOW])
 356                                         *cnt += MIB_PACKET_DROPPED + 1;
 357                                 *cnt += data & MIB_PACKET_DROPPED;
 358                         }
 359                         break;
 360                 }
 361         }
 362         mutex_unlock(&dev->alu_mutex);
 363 }
 364
 365 static void ksz8863_r_mib_pkt(struct ksz_device *dev, int port, u16 addr,
 366                               u64 *dropped, u64 *cnt)
 367 {
 368         struct ksz8 *ksz8 = dev->priv;
 369         const u8 *regs = ksz8->regs;
 370         u32 *last = (u32 *)dropped;
 371         u16 ctrl_addr;
 372         u32 data;
 373         u32 cur;
 374
 375         addr -= dev->reg_mib_cnt;
 376         ctrl_addr = addr ? KSZ8863_MIB_PACKET_DROPPED_TX_0 :
 377                            KSZ8863_MIB_PACKET_DROPPED_RX_0;
 378         ctrl_addr += port;
 379         ctrl_addr |= IND_ACC_TABLE(TABLE_MIB | TABLE_READ);
 380
 381         mutex_lock(&dev->alu_mutex);
 382         ksz_write16(dev, regs[REG_IND_CTRL_0], ctrl_addr);
 383         ksz_read32(dev, regs[REG_IND_DATA_LO], &data);
 384         mutex_unlock(&dev->alu_mutex);
 385
 386         data &= MIB_PACKET_DROPPED;
 387         cur = last[addr];
 388         if (data != cur) {
 389                 last[addr] = data;
 390                 if (data < cur)
 391                         data += MIB_PACKET_DROPPED + 1;
 392                 data -= cur;
 393                 *cnt += data;
 394         }
 395 }
 396
 397 static void ksz8_r_mib_pkt(struct ksz_device *dev, int port, u16 addr,
 398                            u64 *dropped, u64 *cnt)
 399 {
 400         if (ksz_is_ksz88x3(dev))
 401                 ksz8863_r_mib_pkt(dev, port, addr, dropped, cnt);
 402         else
 403                 ksz8795_r_mib_pkt(dev, port, addr, dropped, cnt);
 404 }
 405
 406 static void ksz8_freeze_mib(struct ksz_device *dev, int port, bool freeze)
 407 {
 408         if (ksz_is_ksz88x3(dev))
 409                 return;
 410
 411         /* enable the port for flush/freeze function */
 412         if (freeze)
 413                 ksz_cfg(dev, REG_SW_CTRL_6, BIT(port), true);
 414         ksz_cfg(dev, REG_SW_CTRL_6, SW_MIB_COUNTER_FREEZE, freeze);
 415
 416         /* disable the port after freeze is done */
 417         if (!freeze)
 418                 ksz_cfg(dev, REG_SW_CTRL_6, BIT(port), false);
 419 }
 420
 421 static void ksz8_port_init_cnt(struct ksz_device *dev, int port)
 422 {
 423         struct ksz_port_mib *mib = &dev->ports[port].mib;
 424         u64 *dropped;
 425
 426         if (!ksz_is_ksz88x3(dev)) {
 427                 /* flush all enabled port MIB counters */
 428                 ksz_cfg(dev, REG_SW_CTRL_6, BIT(port), true);
 429                 ksz_cfg(dev, REG_SW_CTRL_6, SW_MIB_COUNTER_FLUSH, true);
 430                 ksz_cfg(dev, REG_SW_CTRL_6, BIT(port), false);
 431         }
 432
 433         mib->cnt_ptr = 0;
 434
 435         /* Some ports may not have MIB counters before SWITCH_COUNTER_NUM. */
 436         while (mib->cnt_ptr < dev->reg_mib_cnt) {
 437                 dev->dev_ops->r_mib_cnt(dev, port, mib->cnt_ptr,
 438                                         &mib->counters[mib->cnt_ptr]);
 439                 ++mib->cnt_ptr;
 440         }
 441
 442         /* last one in storage */
 443         dropped = &mib->counters[dev->mib_cnt];
 444
 445         /* Some ports may not have MIB counters after SWITCH_COUNTER_NUM. */
 446         while (mib->cnt_ptr < dev->mib_cnt) {
 447                 dev->dev_ops->r_mib_pkt(dev, port, mib->cnt_ptr,
 448                                         dropped, &mib->counters[mib->cnt_ptr]);
 449                 ++mib->cnt_ptr;
 450         }
 451         mib->cnt_ptr = 0;
 452         memset(mib->counters, 0, dev->mib_cnt * sizeof(u64));
 453 }
 454
 455 static void ksz8_r_table(struct ksz_device *dev, int table, u16 addr, u64 *data)
 456 {
 457         struct ksz8 *ksz8 = dev->priv;
 458         const u8 *regs = ksz8->regs;
 459         u16 ctrl_addr;
 460
 461         ctrl_addr = IND_ACC_TABLE(table | TABLE_READ) | addr;
 462
 463         mutex_lock(&dev->alu_mutex);
 464         ksz_write16(dev, regs[REG_IND_CTRL_0], ctrl_addr);
 465         ksz_read64(dev, regs[REG_IND_DATA_HI], data);
 466         mutex_unlock(&dev->alu_mutex);
 467 }
 468
 469 static void ksz8_w_table(struct ksz_device *dev, int table, u16 addr, u64 data)
 470 {
 471         struct ksz8 *ksz8 = dev->priv;
 472         const u8 *regs = ksz8->regs;
 473         u16 ctrl_addr;
 474
 475         ctrl_addr = IND_ACC_TABLE(table) | addr;
 476
 477         mutex_lock(&dev->alu_mutex);
 478         ksz_write64(dev, regs[REG_IND_DATA_HI], data);
 479         ksz_write16(dev, regs[REG_IND_CTRL_0], ctrl_addr);
 480         mutex_unlock(&dev->alu_mutex);
 481 }
 482
 483 static int ksz8_valid_dyn_entry(struct ksz_device *dev, u8 *data)
 484 {
 485         struct ksz8 *ksz8 = dev->priv;
 486         int timeout = 100;
 487         const u32 *masks;
 488         const u8 *regs;
 489
 490         masks = ksz8->masks;
 491         regs = ksz8->regs;
 492
 493         do {
 494                 ksz_read8(dev, regs[REG_IND_DATA_CHECK], data);
 495                 timeout--;
 496         } while ((*data & masks[DYNAMIC_MAC_TABLE_NOT_READY]) && timeout);
 497
 498         /* Entry is not ready for accessing. */
 499         if (*data & masks[DYNAMIC_MAC_TABLE_NOT_READY]) {
 500                 return -EAGAIN;
 501         /* Entry is ready for accessing. */
 502         } else {
 503                 ksz_read8(dev, regs[REG_IND_DATA_8], data);
 504
 505                 /* There is no valid entry in the table. */
 506                 if (*data & masks[DYNAMIC_MAC_TABLE_MAC_EMPTY])
 507                         return -ENXIO;
 508         }
 509         return 0;
 510 }
 511
 512 static int ksz8_r_dyn_mac_table(struct ksz_device *dev, u16 addr,
 513                                 u8 *mac_addr, u8 *fid, u8 *src_port,
 514                                 u8 *timestamp, u16 *entries)
 515 {
 516         struct ksz8 *ksz8 = dev->priv;
 517         u32 data_hi, data_lo;
 518         const u8 *shifts;
 519         const u32 *masks;
 520         const u8 *regs;
 521         u16 ctrl_addr;
 522         u8 data;
 523         int rc;
 524
 525         shifts = ksz8->shifts;
 526         masks = ksz8->masks;
 527         regs = ksz8->regs;
 528
 529         ctrl_addr = IND_ACC_TABLE(TABLE_DYNAMIC_MAC | TABLE_READ) | addr;
 530
 531         mutex_lock(&dev->alu_mutex);
 532         ksz_write16(dev, regs[REG_IND_CTRL_0], ctrl_addr);
 533
 534         rc = ksz8_valid_dyn_entry(dev, &data);
 535         if (rc == -EAGAIN) {
 536                 if (addr == 0)
 537                         *entries = 0;
 538         } else if (rc == -ENXIO) {
 539                 *entries = 0;
 540         /* At least one valid entry in the table. */
 541         } else {
 542                 u64 buf = 0;
 543                 int cnt;
 544
 545                 ksz_read64(dev, regs[REG_IND_DATA_HI], &buf);
 546                 data_hi = (u32)(buf >> 32);
 547                 data_lo = (u32)buf;
 548
 549                 /* Check out how many valid entry in the table. */
 550                 cnt = data & masks[DYNAMIC_MAC_TABLE_ENTRIES_H];
 551                 cnt <<= shifts[DYNAMIC_MAC_ENTRIES_H];
 552                 cnt |= (data_hi & masks[DYNAMIC_MAC_TABLE_ENTRIES]) >>
 553                         shifts[DYNAMIC_MAC_ENTRIES];
 554                 *entries = cnt + 1;
 555
 556                 *fid = (data_hi & masks[DYNAMIC_MAC_TABLE_FID]) >>
 557                         shifts[DYNAMIC_MAC_FID];
 558                 *src_port = (data_hi & masks[DYNAMIC_MAC_TABLE_SRC_PORT]) >>
 559                         shifts[DYNAMIC_MAC_SRC_PORT];
 560                 *timestamp = (data_hi & masks[DYNAMIC_MAC_TABLE_TIMESTAMP]) >>
 561                         shifts[DYNAMIC_MAC_TIMESTAMP];
 562
 563                 mac_addr[5] = (u8)data_lo;
 564                 mac_addr[4] = (u8)(data_lo >> 8);
 565                 mac_addr[3] = (u8)(data_lo >> 16);
 566                 mac_addr[2] = (u8)(data_lo >> 24);
 567
 568                 mac_addr[1] = (u8)data_hi;
 569                 mac_addr[0] = (u8)(data_hi >> 8);
 570                 rc = 0;
 571         }
 572         mutex_unlock(&dev->alu_mutex);
 573
 574         return rc;
 575 }
 576
 577 static int ksz8_r_sta_mac_table(struct ksz_device *dev, u16 addr,
 578                                 struct alu_struct *alu)
 579 {
 580         struct ksz8 *ksz8 = dev->priv;
 581         u32 data_hi, data_lo;
 582         const u8 *shifts;
 583         const u32 *masks;
 584         u64 data;
 585
 586         shifts = ksz8->shifts;
 587         masks = ksz8->masks;
 588
 589         ksz8_r_table(dev, TABLE_STATIC_MAC, addr, &data);
 590         data_hi = data >> 32;
 591         data_lo = (u32)data;
 592         if (data_hi & (masks[STATIC_MAC_TABLE_VALID] |
 593                         masks[STATIC_MAC_TABLE_OVERRIDE])) {
 594                 alu->mac[5] = (u8)data_lo;
 595                 alu->mac[4] = (u8)(data_lo >> 8);
 596                 alu->mac[3] = (u8)(data_lo >> 16);
 597                 alu->mac[2] = (u8)(data_lo >> 24);
 598                 alu->mac[1] = (u8)data_hi;
 599                 alu->mac[0] = (u8)(data_hi >> 8);
 600                 alu->port_forward =
 601                         (data_hi & masks[STATIC_MAC_TABLE_FWD_PORTS]) >>
 602                                 shifts[STATIC_MAC_FWD_PORTS];
 603                 alu->is_override =
 604                         (data_hi & masks[STATIC_MAC_TABLE_OVERRIDE]) ? 1 : 0;
 605                 data_hi >>= 1;
 606                 alu->is_static = true;
 607                 alu->is_use_fid =
 608                         (data_hi & masks[STATIC_MAC_TABLE_USE_FID]) ? 1 : 0;
 609                 alu->fid = (data_hi & masks[STATIC_MAC_TABLE_FID]) >>
 610                                 shifts[STATIC_MAC_FID];
 611                 return 0;
 612         }
 613         return -ENXIO;
 614 }
 615
 616 static void ksz8_w_sta_mac_table(struct ksz_device *dev, u16 addr,
 617                                  struct alu_struct *alu)
 618 {
 619         struct ksz8 *ksz8 = dev->priv;
 620         u32 data_hi, data_lo;
 621         const u8 *shifts;
 622         const u32 *masks;
 623         u64 data;
 624
 625         shifts = ksz8->shifts;
 626         masks = ksz8->masks;
 627
 628         data_lo = ((u32)alu->mac[2] << 24) |
 629                 ((u32)alu->mac[3] << 16) |
 630                 ((u32)alu->mac[4] << 8) | alu->mac[5];
 631         data_hi = ((u32)alu->mac[0] << 8) | alu->mac[1];
 632         data_hi |= (u32)alu->port_forward << shifts[STATIC_MAC_FWD_PORTS];
 633
 634         if (alu->is_override)
 635                 data_hi |= masks[STATIC_MAC_TABLE_OVERRIDE];
 636         if (alu->is_use_fid) {
 637                 data_hi |= masks[STATIC_MAC_TABLE_USE_FID];
 638                 data_hi |= (u32)alu->fid << shifts[STATIC_MAC_FID];
 639         }
 640         if (alu->is_static)
 641                 data_hi |= masks[STATIC_MAC_TABLE_VALID];
 642         else
 643                 data_hi &= ~masks[STATIC_MAC_TABLE_OVERRIDE];
 644
 645         data = (u64)data_hi << 32 | data_lo;
 646         ksz8_w_table(dev, TABLE_STATIC_MAC, addr, data);
 647 }
 648
 649 static void ksz8_from_vlan(struct ksz_device *dev, u32 vlan, u8 *fid,
 650                            u8 *member, u8 *valid)
 651 {
 652         struct ksz8 *ksz8 = dev->priv;
 653         const u8 *shifts;
 654         const u32 *masks;
 655
 656         shifts = ksz8->shifts;
 657         masks = ksz8->masks;
 658
 659         *fid = vlan & masks[VLAN_TABLE_FID];
 660         *member = (vlan & masks[VLAN_TABLE_MEMBERSHIP]) >>
 661                         shifts[VLAN_TABLE_MEMBERSHIP_S];
 662         *valid = !!(vlan & masks[VLAN_TABLE_VALID]);
 663 }
 664
 665 static void ksz8_to_vlan(struct ksz_device *dev, u8 fid, u8 member, u8 valid,
 666                          u16 *vlan)
 667 {
 668         struct ksz8 *ksz8 = dev->priv;
 669         const u8 *shifts;
 670         const u32 *masks;
 671
 672         shifts = ksz8->shifts;
 673         masks = ksz8->masks;
 674
 675         *vlan = fid;
 676         *vlan |= (u16)member << shifts[VLAN_TABLE_MEMBERSHIP_S];
 677         if (valid)
 678                 *vlan |= masks[VLAN_TABLE_VALID];
 679 }
 680
 681 static void ksz8_r_vlan_entries(struct ksz_device *dev, u16 addr)
 682 {
 683         struct ksz8 *ksz8 = dev->priv;
 684         const u8 *shifts;
 685         u64 data;
 686         int i;
 687
 688         shifts = ksz8->shifts;
 689
 690         ksz8_r_table(dev, TABLE_VLAN, addr, &data);
 691         addr *= 4;
 692         for (i = 0; i < 4; i++) {
 693                 dev->vlan_cache[addr + i].table[0] = (u16)data;
 694                 data >>= shifts[VLAN_TABLE];
 695         }
 696 }
 697
 698 static void ksz8_r_vlan_table(struct ksz_device *dev, u16 vid, u16 *vlan)
 699 {
 700         int index;
 701         u16 *data;
 702         u16 addr;
 703         u64 buf;
 704
 705         data = (u16 *)&buf;
 706         addr = vid / 4;
 707         index = vid & 3;
 708         ksz8_r_table(dev, TABLE_VLAN, addr, &buf);
 709         *vlan = data[index];
 710 }
 711
 712 static void ksz8_w_vlan_table(struct ksz_device *dev, u16 vid, u16 vlan)
 713 {
 714         int index;
 715         u16 *data;
 716         u16 addr;
 717         u64 buf;
 718
 719         data = (u16 *)&buf;
 720         addr = vid / 4;
 721         index = vid & 3;
 722         ksz8_r_table(dev, TABLE_VLAN, addr, &buf);
 723         data[index] = vlan;
 724         dev->vlan_cache[vid].table[0] = vlan;
 725         ksz8_w_table(dev, TABLE_VLAN, addr, buf);
 726 }
 727
 728 static void ksz8_r_phy(struct ksz_device *dev, u16 phy, u16 reg, u16 *val)
 729 {
 730         struct ksz8 *ksz8 = dev->priv;
 731         u8 restart, speed, ctrl, link;
 732         const u8 *regs = ksz8->regs;
 733         int processed = true;
 734         u8 val1, val2;
 735         u16 data = 0;
 736         u8 p = phy;
 737
 738         switch (reg) {
 739         case MII_BMCR:
 740                 ksz_pread8(dev, p, regs[P_NEG_RESTART_CTRL], &restart);
 741                 ksz_pread8(dev, p, regs[P_SPEED_STATUS], &speed);
 742                 ksz_pread8(dev, p, regs[P_FORCE_CTRL], &ctrl);
 743                 if (restart & PORT_PHY_LOOPBACK)
 744                         data |= BMCR_LOOPBACK;
 745                 if (ctrl & PORT_FORCE_100_MBIT)
 746                         data |= BMCR_SPEED100;
 747                 if (ksz_is_ksz88x3(dev)) {
 748                         if ((ctrl & PORT_AUTO_NEG_ENABLE))
 749                                 data |= BMCR_ANENABLE;
 750                 } else {
 751                         if (!(ctrl & PORT_AUTO_NEG_DISABLE))
 752                                 data |= BMCR_ANENABLE;
 753                 }
 754                 if (restart & PORT_POWER_DOWN)
 755                         data |= BMCR_PDOWN;
 756                 if (restart & PORT_AUTO_NEG_RESTART)
 757                         data |= BMCR_ANRESTART;
 758                 if (ctrl & PORT_FORCE_FULL_DUPLEX)
 759                         data |= BMCR_FULLDPLX;
 760                 if (speed & PORT_HP_MDIX)
 761                         data |= KSZ886X_BMCR_HP_MDIX;
 762                 if (restart & PORT_FORCE_MDIX)
 763                         data |= KSZ886X_BMCR_FORCE_MDI;
 764                 if (restart & PORT_AUTO_MDIX_DISABLE)
 765                         data |= KSZ886X_BMCR_DISABLE_AUTO_MDIX;
 766                 if (restart & PORT_TX_DISABLE)
 767                         data |= KSZ886X_BMCR_DISABLE_TRANSMIT;
 768                 if (restart & PORT_LED_OFF)
 769                         data |= KSZ886X_BMCR_DISABLE_LED;
 770                 break;
 771         case MII_BMSR:
 772                 ksz_pread8(dev, p, regs[P_LINK_STATUS], &link);
 773                 data = BMSR_100FULL |
 774                        BMSR_100HALF |
 775                        BMSR_10FULL |
 776                        BMSR_10HALF |
 777                        BMSR_ANEGCAPABLE;
 778                 if (link & PORT_AUTO_NEG_COMPLETE)
 779                         data |= BMSR_ANEGCOMPLETE;
 780                 if (link & PORT_STAT_LINK_GOOD)
 781                         data |= BMSR_LSTATUS;
 782                 break;
 783         case MII_PHYSID1:
 784                 data = KSZ8795_ID_HI;
 785                 break;
 786         case MII_PHYSID2:
 787                 if (ksz_is_ksz88x3(dev))
 788                         data = KSZ8863_ID_LO;
 789                 else
 790                         data = KSZ8795_ID_LO;
 791                 break;
 792         case MII_ADVERTISE:
 793                 ksz_pread8(dev, p, regs[P_LOCAL_CTRL], &ctrl);
 794                 data = ADVERTISE_CSMA;
 795                 if (ctrl & PORT_AUTO_NEG_SYM_PAUSE)
 796                         data |= ADVERTISE_PAUSE_CAP;
 797                 if (ctrl & PORT_AUTO_NEG_100BTX_FD)
 798                         data |= ADVERTISE_100FULL;
 799                 if (ctrl & PORT_AUTO_NEG_100BTX)
 800                         data |= ADVERTISE_100HALF;
 801                 if (ctrl & PORT_AUTO_NEG_10BT_FD)
 802                         data |= ADVERTISE_10FULL;
 803                 if (ctrl & PORT_AUTO_NEG_10BT)
 804                         data |= ADVERTISE_10HALF;
 805                 break;
 806         case MII_LPA:
 807                 ksz_pread8(dev, p, regs[P_REMOTE_STATUS], &link);
 808                 data = LPA_SLCT;
 809                 if (link & PORT_REMOTE_SYM_PAUSE)
 810                         data |= LPA_PAUSE_CAP;
 811                 if (link & PORT_REMOTE_100BTX_FD)
 812                         data |= LPA_100FULL;
 813                 if (link & PORT_REMOTE_100BTX)
 814                         data |= LPA_100HALF;
 815                 if (link & PORT_REMOTE_10BT_FD)
 816                         data |= LPA_10FULL;
 817                 if (link & PORT_REMOTE_10BT)
 818                         data |= LPA_10HALF;
 819                 if (data & ~LPA_SLCT)
 820                         data |= LPA_LPACK;
 821                 break;
 822         case PHY_REG_LINK_MD:
 823                 ksz_pread8(dev, p, REG_PORT_LINK_MD_CTRL, &val1);
 824                 ksz_pread8(dev, p, REG_PORT_LINK_MD_RESULT, &val2);
 825                 if (val1 & PORT_START_CABLE_DIAG)
 826                         data |= PHY_START_CABLE_DIAG;
 827
 828                 if (val1 & PORT_CABLE_10M_SHORT)
 829                         data |= PHY_CABLE_10M_SHORT;
 830
 831                 data |= FIELD_PREP(PHY_CABLE_DIAG_RESULT_M,
 832                                 FIELD_GET(PORT_CABLE_DIAG_RESULT_M, val1));
 833
 834                 data |= FIELD_PREP(PHY_CABLE_FAULT_COUNTER_M,
 835                                 (FIELD_GET(PORT_CABLE_FAULT_COUNTER_H, val1) << 8) |
 836                                 FIELD_GET(PORT_CABLE_FAULT_COUNTER_L, val2));
 837                 break;
 838         case PHY_REG_PHY_CTRL:
 839                 ksz_pread8(dev, p, regs[P_LINK_STATUS], &link);
 840                 if (link & PORT_MDIX_STATUS)
 841                         data |= KSZ886X_CTRL_MDIX_STAT;
 842                 break;
 843         default:
 844                 processed = false;
 845                 break;
 846         }
 847         if (processed)
 848                 *val = data;
 849 }
 850
 851 static void ksz8_w_phy(struct ksz_device *dev, u16 phy, u16 reg, u16 val)
 852 {
 853         struct ksz8 *ksz8 = dev->priv;
 854         u8 restart, speed, ctrl, data;
 855         const u8 *regs = ksz8->regs;
 856         u8 p = phy;
 857
 858         switch (reg) {
 859         case MII_BMCR:
 860
 861                 /* Do not support PHY reset function. */
 862                 if (val & BMCR_RESET)
 863                         break;
 864                 ksz_pread8(dev, p, regs[P_SPEED_STATUS], &speed);
 865                 data = speed;
 866                 if (val & KSZ886X_BMCR_HP_MDIX)
 867                         data |= PORT_HP_MDIX;
 868                 else
 869                         data &= ~PORT_HP_MDIX;
 870                 if (data != speed)
 871                         ksz_pwrite8(dev, p, regs[P_SPEED_STATUS], data);
 872                 ksz_pread8(dev, p, regs[P_FORCE_CTRL], &ctrl);
 873                 data = ctrl;
 874                 if (ksz_is_ksz88x3(dev)) {
 875                         if ((val & BMCR_ANENABLE))
 876                                 data |= PORT_AUTO_NEG_ENABLE;
 877                         else
 878                                 data &= ~PORT_AUTO_NEG_ENABLE;
 879                 } else {
 880                         if (!(val & BMCR_ANENABLE))
 881                                 data |= PORT_AUTO_NEG_DISABLE;
 882                         else
 883                                 data &= ~PORT_AUTO_NEG_DISABLE;
 884
 885                         /* Fiber port does not support auto-negotiation. */
 886                         if (dev->ports[p].fiber)
 887                                 data |= PORT_AUTO_NEG_DISABLE;
 888                 }
 889
 890                 if (val & BMCR_SPEED100)
 891                         data |= PORT_FORCE_100_MBIT;
 892                 else
 893                         data &= ~PORT_FORCE_100_MBIT;
 894                 if (val & BMCR_FULLDPLX)
 895                         data |= PORT_FORCE_FULL_DUPLEX;
 896                 else
 897                         data &= ~PORT_FORCE_FULL_DUPLEX;
 898                 if (data != ctrl)
 899                         ksz_pwrite8(dev, p, regs[P_FORCE_CTRL], data);
 900                 ksz_pread8(dev, p, regs[P_NEG_RESTART_CTRL], &restart);
 901                 data = restart;
 902                 if (val & KSZ886X_BMCR_DISABLE_LED)
 903                         data |= PORT_LED_OFF;
 904                 else
 905                         data &= ~PORT_LED_OFF;
 906                 if (val & KSZ886X_BMCR_DISABLE_TRANSMIT)
 907                         data |= PORT_TX_DISABLE;
 908                 else
 909                         data &= ~PORT_TX_DISABLE;
 910                 if (val & BMCR_ANRESTART)
 911                         data |= PORT_AUTO_NEG_RESTART;
 912                 else
 913                         data &= ~(PORT_AUTO_NEG_RESTART);
 914                 if (val & BMCR_PDOWN)
 915                         data |= PORT_POWER_DOWN;
 916                 else
 917                         data &= ~PORT_POWER_DOWN;
 918                 if (val & KSZ886X_BMCR_DISABLE_AUTO_MDIX)
 919                         data |= PORT_AUTO_MDIX_DISABLE;
 920                 else
 921                         data &= ~PORT_AUTO_MDIX_DISABLE;
 922                 if (val & KSZ886X_BMCR_FORCE_MDI)
 923                         data |= PORT_FORCE_MDIX;
 924                 else
 925                         data &= ~PORT_FORCE_MDIX;
 926                 if (val & BMCR_LOOPBACK)
 927                         data |= PORT_PHY_LOOPBACK;
 928                 else
 929                         data &= ~PORT_PHY_LOOPBACK;
 930                 if (data != restart)
 931                         ksz_pwrite8(dev, p, regs[P_NEG_RESTART_CTRL], data);
 932                 break;
 933         case MII_ADVERTISE:
 934                 ksz_pread8(dev, p, regs[P_LOCAL_CTRL], &ctrl);
 935                 data = ctrl;
 936                 data &= ~(PORT_AUTO_NEG_SYM_PAUSE |
 937                           PORT_AUTO_NEG_100BTX_FD |
 938                           PORT_AUTO_NEG_100BTX |
 939                           PORT_AUTO_NEG_10BT_FD |
 940                           PORT_AUTO_NEG_10BT);
 941                 if (val & ADVERTISE_PAUSE_CAP)
 942                         data |= PORT_AUTO_NEG_SYM_PAUSE;
 943                 if (val & ADVERTISE_100FULL)
 944                         data |= PORT_AUTO_NEG_100BTX_FD;
 945                 if (val & ADVERTISE_100HALF)
 946                         data |= PORT_AUTO_NEG_100BTX;
 947                 if (val & ADVERTISE_10FULL)
 948                         data |= PORT_AUTO_NEG_10BT_FD;
 949                 if (val & ADVERTISE_10HALF)
 950                         data |= PORT_AUTO_NEG_10BT;
 951                 if (data != ctrl)
 952                         ksz_pwrite8(dev, p, regs[P_LOCAL_CTRL], data);
 953                 break;
 954         case PHY_REG_LINK_MD:
 955                 if (val & PHY_START_CABLE_DIAG)
 956                         ksz_port_cfg(dev, p, REG_PORT_LINK_MD_CTRL, PORT_START_CABLE_DIAG, true);
 957                 break;
 958         default:
 959                 break;
 960         }
 961 }
 962
 963 static enum dsa_tag_protocol ksz8_get_tag_protocol(struct dsa_switch *ds,
 964                                                    int port,
 965                                                    enum dsa_tag_protocol mp)
 966 {
 967         struct ksz_device *dev = ds->priv;
 968
 969         /* ksz88x3 uses the same tag schema as KSZ9893 */
 970         return ksz_is_ksz88x3(dev) ?
 971                 DSA_TAG_PROTO_KSZ9893 : DSA_TAG_PROTO_KSZ8795;
 972 }
 973
 974 static u32 ksz8_sw_get_phy_flags(struct dsa_switch *ds, int port)
 975 {
 976         /* Silicon Errata Sheet (DS80000830A):
 977          * Port 1 does not work with LinkMD Cable-Testing.
 978          * Port 1 does not respond to received PAUSE control frames.
 979          */
 980         if (!port)
 981                 return MICREL_KSZ8_P1_ERRATA;
 982
 983         return 0;
 984 }
 985
 986 static void ksz8_get_strings(struct dsa_switch *ds, int port,
 987                              u32 stringset, uint8_t *buf)
 988 {
 989         struct ksz_device *dev = ds->priv;
 990         int i;
 991
 992         for (i = 0; i < dev->mib_cnt; i++) {
 993                 memcpy(buf + i * ETH_GSTRING_LEN,
 994                        dev->mib_names[i].string, ETH_GSTRING_LEN);
 995         }
 996 }
 997
 998 static void ksz8_cfg_port_member(struct ksz_device *dev, int port, u8 member)
 999 {
1000         u8 data;
1001
1002         ksz_pread8(dev, port, P_MIRROR_CTRL, &data);
1003         data &= ~PORT_VLAN_MEMBERSHIP;
1004         data |= (member & dev->port_mask);
1005         ksz_pwrite8(dev, port, P_MIRROR_CTRL, data);
1006 }
1007
1008 static void ksz8_port_stp_state_set(struct dsa_switch *ds, int port, u8 state)
1009 {
1010         struct ksz_device *dev = ds->priv;
1011         struct ksz_port *p;
1012         u8 data;
1013
1014         ksz_pread8(dev, port, P_STP_CTRL, &data);
1015         data &= ~(PORT_TX_ENABLE | PORT_RX_ENABLE | PORT_LEARN_DISABLE);
1016
1017         switch (state) {
1018         case BR_STATE_DISABLED:
1019                 data |= PORT_LEARN_DISABLE;
1020                 break;
1021         case BR_STATE_LISTENING:
1022                 data |= (PORT_RX_ENABLE | PORT_LEARN_DISABLE);
1023                 break;
1024         case BR_STATE_LEARNING:
1025                 data |= PORT_RX_ENABLE;
1026                 break;
1027         case BR_STATE_FORWARDING:
1028                 data |= (PORT_TX_ENABLE | PORT_RX_ENABLE);
1029                 break;
1030         case BR_STATE_BLOCKING:
1031                 data |= PORT_LEARN_DISABLE;
1032                 break;
1033         default:
1034                 dev_err(ds->dev, "invalid STP state: %d\n", state);
1035                 return;
1036         }
1037
1038         ksz_pwrite8(dev, port, P_STP_CTRL, data);
1039
1040         p = &dev->ports[port];
1041         p->stp_state = state;
1042
1043         ksz_update_port_member(dev, port);
1044 }
1045
1046 static void ksz8_flush_dyn_mac_table(struct ksz_device *dev, int port)
1047 {
1048         u8 learn[DSA_MAX_PORTS];
1049         int first, index, cnt;
1050         struct ksz_port *p;
1051
1052         if ((uint)port < dev->port_cnt) {
1053                 first = port;
1054                 cnt = port + 1;
1055         } else {
1056                 /* Flush all ports. */
1057                 first = 0;
1058                 cnt = dev->port_cnt;
1059         }
1060         for (index = first; index < cnt; index++) {
1061                 p = &dev->ports[index];
1062                 if (!p->on)
1063                         continue;
1064                 ksz_pread8(dev, index, P_STP_CTRL, &learn[index]);
1065                 if (!(learn[index] & PORT_LEARN_DISABLE))
1066                         ksz_pwrite8(dev, index, P_STP_CTRL,
1067                                     learn[index] | PORT_LEARN_DISABLE);
1068         }
1069         ksz_cfg(dev, S_FLUSH_TABLE_CTRL, SW_FLUSH_DYN_MAC_TABLE, true);
1070         for (index = first; index < cnt; index++) {
1071                 p = &dev->ports[index];
1072                 if (!p->on)
1073                         continue;
1074                 if (!(learn[index] & PORT_LEARN_DISABLE))
1075                         ksz_pwrite8(dev, index, P_STP_CTRL, learn[index]);
1076         }
1077 }
1078
1079 static int ksz8_port_vlan_filtering(struct dsa_switch *ds, int port, bool flag,
1080                                     struct netlink_ext_ack *extack)
1081 {
1082         struct ksz_device *dev = ds->priv;
1083
1084         if (ksz_is_ksz88x3(dev))
1085                 return -ENOTSUPP;
1086
1087         /* Discard packets with VID not enabled on the switch */
1088         ksz_cfg(dev, S_MIRROR_CTRL, SW_VLAN_ENABLE, flag);
1089
1090         /* Discard packets with VID not enabled on the ingress port */
1091         for (port = 0; port < dev->phy_port_cnt; ++port)
1092                 ksz_port_cfg(dev, port, REG_PORT_CTRL_2, PORT_INGRESS_FILTER,
1093                              flag);
1094
1095         return 0;
1096 }
1097
1098 static void ksz8_port_enable_pvid(struct ksz_device *dev, int port, bool state)
1099 {
1100         if (ksz_is_ksz88x3(dev)) {
1101                 ksz_cfg(dev, REG_SW_INSERT_SRC_PVID,
1102                         0x03 << (4 - 2 * port), state);
1103         } else {
1104                 ksz_pwrite8(dev, port, REG_PORT_CTRL_12, state ? 0x0f : 0x00);
1105         }
1106 }
1107
1108 static int ksz8_port_vlan_add(struct dsa_switch *ds, int port,
1109                               const struct switchdev_obj_port_vlan *vlan,
1110                               struct netlink_ext_ack *extack)
1111 {
1112         bool untagged = vlan->flags & BRIDGE_VLAN_INFO_UNTAGGED;
1113         struct ksz_device *dev = ds->priv;
1114         struct ksz_port *p = &dev->ports[port];
1115         u16 data, new_pvid = 0;
1116         u8 fid, member, valid;
1117
1118         if (ksz_is_ksz88x3(dev))
1119                 return -ENOTSUPP;
1120
1121         /* If a VLAN is added with untagged flag different from the
1122          * port's Remove Tag flag, we need to change the latter.
1123          * Ignore VID 0, which is always untagged.
1124          * Ignore CPU port, which will always be tagged.
1125          */
1126         if (untagged != p->remove_tag && vlan->vid != 0 &&
1127             port != dev->cpu_port) {
1128                 unsigned int vid;
1129
1130                 /* Reject attempts to add a VLAN that requires the
1131                  * Remove Tag flag to be changed, unless there are no
1132                  * other VLANs currently configured.
1133                  */
1134                 for (vid = 1; vid < dev->num_vlans; ++vid) {
1135                         /* Skip the VID we are going to add or reconfigure */
1136                         if (vid == vlan->vid)
1137                                 continue;
1138
1139                         ksz8_from_vlan(dev, dev->vlan_cache[vid].table[0],
1140                                        &fid, &member, &valid);
1141                         if (valid && (member & BIT(port)))
1142                                 return -EINVAL;
1143                 }
1144
1145                 ksz_port_cfg(dev, port, P_TAG_CTRL, PORT_REMOVE_TAG, untagged);
1146                 p->remove_tag = untagged;
1147         }
1148
1149         ksz8_r_vlan_table(dev, vlan->vid, &data);
1150         ksz8_from_vlan(dev, data, &fid, &member, &valid);
1151
1152         /* First time to setup the VLAN entry. */
1153         if (!valid) {
1154                 /* Need to find a way to map VID to FID. */
1155                 fid = 1;
1156                 valid = 1;
1157         }
1158         member |= BIT(port);
1159
1160         ksz8_to_vlan(dev, fid, member, valid, &data);
1161         ksz8_w_vlan_table(dev, vlan->vid, data);
1162
1163         /* change PVID */
1164         if (vlan->flags & BRIDGE_VLAN_INFO_PVID)
1165                 new_pvid = vlan->vid;
1166
1167         if (new_pvid) {
1168                 u16 vid;
1169
1170                 ksz_pread16(dev, port, REG_PORT_CTRL_VID, &vid);
1171                 vid &= ~VLAN_VID_MASK;
1172                 vid |= new_pvid;
1173                 ksz_pwrite16(dev, port, REG_PORT_CTRL_VID, vid);
1174
1175                 ksz8_port_enable_pvid(dev, port, true);
1176         }
1177
1178         return 0;
1179 }
1180
1181 static int ksz8_port_vlan_del(struct dsa_switch *ds, int port,
1182                               const struct switchdev_obj_port_vlan *vlan)
1183 {
1184         struct ksz_device *dev = ds->priv;
1185         u16 data, pvid;
1186         u8 fid, member, valid;
1187
1188         if (ksz_is_ksz88x3(dev))
1189                 return -ENOTSUPP;
1190
1191         ksz_pread16(dev, port, REG_PORT_CTRL_VID, &pvid);
1192         pvid = pvid & 0xFFF;
1193
1194         ksz8_r_vlan_table(dev, vlan->vid, &data);
1195         ksz8_from_vlan(dev, data, &fid, &member, &valid);
1196
1197         member &= ~BIT(port);
1198
1199         /* Invalidate the entry if no more member. */
1200         if (!member) {
1201                 fid = 0;
1202                 valid = 0;
1203         }
1204
1205         ksz8_to_vlan(dev, fid, member, valid, &data);
1206         ksz8_w_vlan_table(dev, vlan->vid, data);
1207
1208         if (pvid == vlan->vid)
1209                 ksz8_port_enable_pvid(dev, port, false);
1210
1211         return 0;
1212 }
1213
1214 static int ksz8_port_mirror_add(struct dsa_switch *ds, int port,
1215                                 struct dsa_mall_mirror_tc_entry *mirror,
1216                                 bool ingress)
1217 {
1218         struct ksz_device *dev = ds->priv;
1219
1220         if (ingress) {
1221                 ksz_port_cfg(dev, port, P_MIRROR_CTRL, PORT_MIRROR_RX, true);
1222                 dev->mirror_rx |= BIT(port);
1223         } else {
1224                 ksz_port_cfg(dev, port, P_MIRROR_CTRL, PORT_MIRROR_TX, true);
1225                 dev->mirror_tx |= BIT(port);
1226         }
1227
1228         ksz_port_cfg(dev, port, P_MIRROR_CTRL, PORT_MIRROR_SNIFFER, false);
1229
1230         /* configure mirror port */
1231         if (dev->mirror_rx || dev->mirror_tx)
1232                 ksz_port_cfg(dev, mirror->to_local_port, P_MIRROR_CTRL,
1233                              PORT_MIRROR_SNIFFER, true);
1234
1235         return 0;
1236 }
1237
1238 static void ksz8_port_mirror_del(struct dsa_switch *ds, int port,
1239                                  struct dsa_mall_mirror_tc_entry *mirror)
1240 {
1241         struct ksz_device *dev = ds->priv;
1242         u8 data;
1243
1244         if (mirror->ingress) {
1245                 ksz_port_cfg(dev, port, P_MIRROR_CTRL, PORT_MIRROR_RX, false);
1246                 dev->mirror_rx &= ~BIT(port);
1247         } else {
1248                 ksz_port_cfg(dev, port, P_MIRROR_CTRL, PORT_MIRROR_TX, false);
1249                 dev->mirror_tx &= ~BIT(port);
1250         }
1251
1252         ksz_pread8(dev, port, P_MIRROR_CTRL, &data);
1253
1254         if (!dev->mirror_rx && !dev->mirror_tx)
1255                 ksz_port_cfg(dev, mirror->to_local_port, P_MIRROR_CTRL,
1256                              PORT_MIRROR_SNIFFER, false);
1257 }
1258
1259 static void ksz8795_cpu_interface_select(struct ksz_device *dev, int port)
1260 {
1261         struct ksz_port *p = &dev->ports[port];
1262         u8 data8;
1263
1264         if (!p->interface && dev->compat_interface) {
1265                 dev_warn(dev->dev,
1266                          "Using legacy switch \"phy-mode\" property, because it is missing on port %d node. "
1267                          "Please update your device tree.\n",
1268                          port);
1269                 p->interface = dev->compat_interface;
1270         }
1271
1272         /* Configure MII interface for proper network communication. */
1273         ksz_read8(dev, REG_PORT_5_CTRL_6, &data8);
1274         data8 &= ~PORT_INTERFACE_TYPE;
1275         data8 &= ~PORT_GMII_1GPS_MODE;
1276         switch (p->interface) {
1277         case PHY_INTERFACE_MODE_MII:
1278                 p->phydev.speed = SPEED_100;
1279                 break;
1280         case PHY_INTERFACE_MODE_RMII:
1281                 data8 |= PORT_INTERFACE_RMII;
1282                 p->phydev.speed = SPEED_100;
1283                 break;
1284         case PHY_INTERFACE_MODE_GMII:
1285                 data8 |= PORT_GMII_1GPS_MODE;
1286                 data8 |= PORT_INTERFACE_GMII;
1287                 p->phydev.speed = SPEED_1000;
1288                 break;
1289         default:
1290                 data8 &= ~PORT_RGMII_ID_IN_ENABLE;
1291                 data8 &= ~PORT_RGMII_ID_OUT_ENABLE;
1292                 if (p->interface == PHY_INTERFACE_MODE_RGMII_ID ||
1293                     p->interface == PHY_INTERFACE_MODE_RGMII_RXID)
1294                         data8 |= PORT_RGMII_ID_IN_ENABLE;
1295                 if (p->interface == PHY_INTERFACE_MODE_RGMII_ID ||
1296                     p->interface == PHY_INTERFACE_MODE_RGMII_TXID)
1297                         data8 |= PORT_RGMII_ID_OUT_ENABLE;
1298                 data8 |= PORT_GMII_1GPS_MODE;
1299                 data8 |= PORT_INTERFACE_RGMII;
1300                 p->phydev.speed = SPEED_1000;
1301                 break;
1302         }
1303         ksz_write8(dev, REG_PORT_5_CTRL_6, data8);
1304         p->phydev.duplex = 1;
1305 }
1306
1307 static void ksz8_port_setup(struct ksz_device *dev, int port, bool cpu_port)
1308 {
1309         struct dsa_switch *ds = dev->ds;
1310         struct ksz8 *ksz8 = dev->priv;
1311         const u32 *masks;
1312         u8 member;
1313
1314         masks = ksz8->masks;
1315
1316         /* enable broadcast storm limit */
1317         ksz_port_cfg(dev, port, P_BCAST_STORM_CTRL, PORT_BROADCAST_STORM, true);
1318
1319         if (!ksz_is_ksz88x3(dev))
1320                 ksz8795_set_prio_queue(dev, port, 4);
1321
1322         /* disable DiffServ priority */
1323         ksz_port_cfg(dev, port, P_PRIO_CTRL, PORT_DIFFSERV_ENABLE, false);
1324
1325         /* replace priority */
1326         ksz_port_cfg(dev, port, P_802_1P_CTRL,
1327                      masks[PORT_802_1P_REMAPPING], false);
1328
1329         /* enable 802.1p priority */
1330         ksz_port_cfg(dev, port, P_PRIO_CTRL, PORT_802_1P_ENABLE, true);
1331
1332         if (cpu_port) {
1333                 if (!ksz_is_ksz88x3(dev))
1334                         ksz8795_cpu_interface_select(dev, port);
1335
1336                 member = dsa_user_ports(ds);
1337         } else {
1338                 member = BIT(dsa_upstream_port(ds, port));
1339         }
1340
1341         ksz8_cfg_port_member(dev, port, member);
1342 }
1343
1344 static void ksz8_config_cpu_port(struct dsa_switch *ds)
1345 {
1346         struct ksz_device *dev = ds->priv;
1347         struct ksz8 *ksz8 = dev->priv;
1348         const u8 *regs = ksz8->regs;
1349         struct ksz_port *p;
1350         const u32 *masks;
1351         u8 remote;
1352         int i;
1353
1354         masks = ksz8->masks;
1355
1356         /* Switch marks the maximum frame with extra byte as oversize. */
1357         ksz_cfg(dev, REG_SW_CTRL_2, SW_LEGAL_PACKET_DISABLE, true);
1358         ksz_cfg(dev, regs[S_TAIL_TAG_CTRL], masks[SW_TAIL_TAG_ENABLE], true);
1359
1360         p = &dev->ports[dev->cpu_port];
1361         p->on = 1;
1362
1363         ksz8_port_setup(dev, dev->cpu_port, true);
1364
1365         for (i = 0; i < dev->phy_port_cnt; i++) {
1366                 p = &dev->ports[i];
1367
1368                 ksz8_port_stp_state_set(ds, i, BR_STATE_DISABLED);
1369
1370                 /* Last port may be disabled. */
1371                 if (i == dev->phy_port_cnt)
1372                         break;
1373                 p->on = 1;
1374                 p->phy = 1;
1375         }
1376         for (i = 0; i < dev->phy_port_cnt; i++) {
1377                 p = &dev->ports[i];
1378                 if (!p->on)
1379                         continue;
1380                 if (!ksz_is_ksz88x3(dev)) {
1381                         ksz_pread8(dev, i, regs[P_REMOTE_STATUS], &remote);
1382                         if (remote & PORT_FIBER_MODE)
1383                                 p->fiber = 1;
1384                 }
1385                 if (p->fiber)
1386                         ksz_port_cfg(dev, i, P_STP_CTRL, PORT_FORCE_FLOW_CTRL,
1387                                      true);
1388                 else
1389                         ksz_port_cfg(dev, i, P_STP_CTRL, PORT_FORCE_FLOW_CTRL,
1390                                      false);
1391         }
1392 }
1393
1394 static int ksz8_setup(struct dsa_switch *ds)
1395 {
1396         struct ksz_device *dev = ds->priv;
1397         struct alu_struct alu;
1398         int i, ret = 0;
1399
1400         dev->vlan_cache = devm_kcalloc(dev->dev, sizeof(struct vlan_table),
1401                                        dev->num_vlans, GFP_KERNEL);
1402         if (!dev->vlan_cache)
1403                 return -ENOMEM;
1404
1405         ret = ksz8_reset_switch(dev);
1406         if (ret) {
1407                 dev_err(ds->dev, "failed to reset switch\n");
1408                 return ret;
1409         }
1410
1411         ksz_cfg(dev, S_REPLACE_VID_CTRL, SW_FLOW_CTRL, true);
1412
1413         /* Enable automatic fast aging when link changed detected. */
1414         ksz_cfg(dev, S_LINK_AGING_CTRL, SW_LINK_AUTO_AGING, true);
1415
1416         /* Enable aggressive back off algorithm in half duplex mode. */
1417         regmap_update_bits(dev->regmap[0], REG_SW_CTRL_1,
1418                            SW_AGGR_BACKOFF, SW_AGGR_BACKOFF);
1419
1420         /*
1421          * Make sure unicast VLAN boundary is set as default and
1422          * enable no excessive collision drop.
1423          */
1424         regmap_update_bits(dev->regmap[0], REG_SW_CTRL_2,
1425                            UNICAST_VLAN_BOUNDARY | NO_EXC_COLLISION_DROP,
1426                            UNICAST_VLAN_BOUNDARY | NO_EXC_COLLISION_DROP);
1427
1428         ksz8_config_cpu_port(ds);
1429
1430         ksz_cfg(dev, REG_SW_CTRL_2, MULTICAST_STORM_DISABLE, true);
1431
1432         ksz_cfg(dev, S_REPLACE_VID_CTRL, SW_REPLACE_VID, false);
1433
1434         ksz_cfg(dev, S_MIRROR_CTRL, SW_MIRROR_RX_TX, false);
1435
1436         if (!ksz_is_ksz88x3(dev))
1437                 ksz_cfg(dev, REG_SW_CTRL_19, SW_INS_TAG_ENABLE, true);
1438
1439         /* set broadcast storm protection 10% rate */
1440         regmap_update_bits(dev->regmap[1], S_REPLACE_VID_CTRL,
1441                            BROADCAST_STORM_RATE,
1442                            (BROADCAST_STORM_VALUE *
1443                            BROADCAST_STORM_PROT_RATE) / 100);
1444
1445         for (i = 0; i < (dev->num_vlans / 4); i++)
1446                 ksz8_r_vlan_entries(dev, i);
1447
1448         /* Setup STP address for STP operation. */
1449         memset(&alu, 0, sizeof(alu));
1450         ether_addr_copy(alu.mac, eth_stp_addr);
1451         alu.is_static = true;
1452         alu.is_override = true;
1453         alu.port_forward = dev->host_mask;
1454
1455         ksz8_w_sta_mac_table(dev, 0, &alu);
1456
1457         ksz_init_mib_timer(dev);
1458
1459         ds->configure_vlan_while_not_filtering = false;
1460
1461         return 0;
1462 }
1463
1464 static void ksz8_validate(struct dsa_switch *ds, int port,
1465                           unsigned long *supported,
1466                           struct phylink_link_state *state)
1467 {
1468         __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
1469         struct ksz_device *dev = ds->priv;
1470
1471         if (port == dev->cpu_port) {
1472                 if (state->interface != PHY_INTERFACE_MODE_RMII &&
1473                     state->interface != PHY_INTERFACE_MODE_MII &&
1474                     state->interface != PHY_INTERFACE_MODE_NA)
1475                         goto unsupported;
1476         } else {
1477                 if (state->interface != PHY_INTERFACE_MODE_INTERNAL &&
1478                     state->interface != PHY_INTERFACE_MODE_NA)
1479                         goto unsupported;
1480         }
1481
1482         /* Allow all the expected bits */
1483         phylink_set_port_modes(mask);
1484         phylink_set(mask, Autoneg);
1485
1486         /* Silicon Errata Sheet (DS80000830A):
1487          * "Port 1 does not respond to received flow control PAUSE frames"
1488          * So, disable Pause support on "Port 1" (port == 0) for all ksz88x3
1489          * switches.
1490          */
1491         if (!ksz_is_ksz88x3(dev) || port)
1492                 phylink_set(mask, Pause);
1493
1494         /* Asym pause is not supported on KSZ8863 and KSZ8873 */
1495         if (!ksz_is_ksz88x3(dev))
1496                 phylink_set(mask, Asym_Pause);
1497
1498         /* 10M and 100M are only supported */
1499         phylink_set(mask, 10baseT_Half);
1500         phylink_set(mask, 10baseT_Full);
1501         phylink_set(mask, 100baseT_Half);
1502         phylink_set(mask, 100baseT_Full);
1503
1504         linkmode_and(supported, supported, mask);
1505         linkmode_and(state->advertising, state->advertising, mask);
1506
1507         return;
1508
1509 unsupported:
1510         linkmode_zero(supported);
1511         dev_err(ds->dev, "Unsupported interface: %s, port: %d\n",
1512                 phy_modes(state->interface), port);
1513 }
1514
1515 static const struct dsa_switch_ops ksz8_switch_ops = {
1516         .get_tag_protocol       = ksz8_get_tag_protocol,
1517         .get_phy_flags          = ksz8_sw_get_phy_flags,
1518         .setup                  = ksz8_setup,
1519         .phy_read               = ksz_phy_read16,
1520         .phy_write              = ksz_phy_write16,
1521         .phylink_validate       = ksz8_validate,
1522         .phylink_mac_link_down  = ksz_mac_link_down,
1523         .port_enable            = ksz_enable_port,
1524         .get_strings            = ksz8_get_strings,
1525         .get_ethtool_stats      = ksz_get_ethtool_stats,
1526         .get_sset_count         = ksz_sset_count,
1527         .port_bridge_join       = ksz_port_bridge_join,
1528         .port_bridge_leave      = ksz_port_bridge_leave,
1529         .port_stp_state_set     = ksz8_port_stp_state_set,
1530         .port_fast_age          = ksz_port_fast_age,
1531         .port_vlan_filtering    = ksz8_port_vlan_filtering,
1532         .port_vlan_add          = ksz8_port_vlan_add,
1533         .port_vlan_del          = ksz8_port_vlan_del,
1534         .port_fdb_dump          = ksz_port_fdb_dump,
1535         .port_mdb_add           = ksz_port_mdb_add,
1536         .port_mdb_del           = ksz_port_mdb_del,
1537         .port_mirror_add        = ksz8_port_mirror_add,
1538         .port_mirror_del        = ksz8_port_mirror_del,
1539 };
1540
1541 static u32 ksz8_get_port_addr(int port, int offset)
1542 {
1543         return PORT_CTRL_ADDR(port, offset);
1544 }
1545
1546 static int ksz8_switch_detect(struct ksz_device *dev)
1547 {
1548         u8 id1, id2;
1549         u16 id16;
1550         int ret;
1551
1552         /* read chip id */
1553         ret = ksz_read16(dev, REG_CHIP_ID0, &id16);
1554         if (ret)
1555                 return ret;
1556
1557         id1 = id16 >> 8;
1558         id2 = id16 & SW_CHIP_ID_M;
1559
1560         switch (id1) {
1561         case KSZ87_FAMILY_ID:
1562                 if ((id2 != CHIP_ID_94 && id2 != CHIP_ID_95))
1563                         return -ENODEV;
1564
1565                 if (id2 == CHIP_ID_95) {
1566                         u8 val;
1567
1568                         id2 = 0x95;
1569                         ksz_read8(dev, REG_PORT_STATUS_0, &val);
1570                         if (val & PORT_FIBER_MODE)
1571                                 id2 = 0x65;
1572                 } else if (id2 == CHIP_ID_94) {
1573                         id2 = 0x94;
1574                 }
1575                 break;
1576         case KSZ88_FAMILY_ID:
1577                 if (id2 != CHIP_ID_63)
1578                         return -ENODEV;
1579                 break;
1580         default:
1581                 dev_err(dev->dev, "invalid family id: %d\n", id1);
1582                 return -ENODEV;
1583         }
1584         id16 &= ~0xff;
1585         id16 |= id2;
1586         dev->chip_id = id16;
1587
1588         return 0;
1589 }
1590
1591 struct ksz_chip_data {
1592         u16 chip_id;
1593         const char *dev_name;
1594         int num_vlans;
1595         int num_alus;
1596         int num_statics;
1597         int cpu_ports;
1598         int port_cnt;
1599 };
1600
1601 static const struct ksz_chip_data ksz8_switch_chips[] = {
1602         {
1603                 .chip_id = 0x8795,
1604                 .dev_name = "KSZ8795",
1605                 .num_vlans = 4096,
1606                 .num_alus = 0,
1607                 .num_statics = 8,
1608                 .cpu_ports = 0x10,      /* can be configured as cpu port */
1609                 .port_cnt = 5,          /* total cpu and user ports */
1610         },
1611         {
1612                 /*
1613                  * WARNING
1614                  * =======
1615                  * KSZ8794 is similar to KSZ8795, except the port map
1616                  * contains a gap between external and CPU ports, the
1617                  * port map is NOT continuous. The per-port register
1618                  * map is shifted accordingly too, i.e. registers at
1619                  * offset 0x40 are NOT used on KSZ8794 and they ARE
1620                  * used on KSZ8795 for external port 3.
1621                  *           external  cpu
1622                  * KSZ8794   0,1,2      4
1623                  * KSZ8795   0,1,2,3    4
1624                  * KSZ8765   0,1,2,3    4
1625                  */
1626                 .chip_id = 0x8794,
1627                 .dev_name = "KSZ8794",
1628                 .num_vlans = 4096,
1629                 .num_alus = 0,
1630                 .num_statics = 8,
1631                 .cpu_ports = 0x10,      /* can be configured as cpu port */
1632                 .port_cnt = 4,          /* total cpu and user ports */
1633         },
1634         {
1635                 .chip_id = 0x8765,
1636                 .dev_name = "KSZ8765",
1637                 .num_vlans = 4096,
1638                 .num_alus = 0,
1639                 .num_statics = 8,
1640                 .cpu_ports = 0x10,      /* can be configured as cpu port */
1641                 .port_cnt = 5,          /* total cpu and user ports */
1642         },
1643         {
1644                 .chip_id = 0x8830,
1645                 .dev_name = "KSZ8863/KSZ8873",
1646                 .num_vlans = 16,
1647                 .num_alus = 0,
1648                 .num_statics = 8,
1649                 .cpu_ports = 0x4,       /* can be configured as cpu port */
1650                 .port_cnt = 3,
1651         },
1652 };
1653
1654 static int ksz8_switch_init(struct ksz_device *dev)
1655 {
1656         struct ksz8 *ksz8 = dev->priv;
1657         int i;
1658
1659         dev->ds->ops = &ksz8_switch_ops;
1660
1661         for (i = 0; i < ARRAY_SIZE(ksz8_switch_chips); i++) {
1662                 const struct ksz_chip_data *chip = &ksz8_switch_chips[i];
1663
1664                 if (dev->chip_id == chip->chip_id) {
1665                         dev->name = chip->dev_name;
1666                         dev->num_vlans = chip->num_vlans;
1667                         dev->num_alus = chip->num_alus;
1668                         dev->num_statics = chip->num_statics;
1669                         dev->port_cnt = fls(chip->cpu_ports);
1670                         dev->cpu_port = fls(chip->cpu_ports) - 1;
1671                         dev->phy_port_cnt = dev->port_cnt - 1;
1672                         dev->cpu_ports = chip->cpu_ports;
1673                         dev->host_mask = chip->cpu_ports;
1674                         dev->port_mask = (BIT(dev->phy_port_cnt) - 1) |
1675                                          chip->cpu_ports;
1676                         break;
1677                 }
1678         }
1679
1680         /* no switch found */
1681         if (!dev->cpu_ports)
1682                 return -ENODEV;
1683
1684         if (ksz_is_ksz88x3(dev)) {
1685                 ksz8->regs = ksz8863_regs;
1686                 ksz8->masks = ksz8863_masks;
1687                 ksz8->shifts = ksz8863_shifts;
1688                 dev->mib_cnt = ARRAY_SIZE(ksz88xx_mib_names);
1689                 dev->mib_names = ksz88xx_mib_names;
1690         } else {
1691                 ksz8->regs = ksz8795_regs;
1692                 ksz8->masks = ksz8795_masks;
1693                 ksz8->shifts = ksz8795_shifts;
1694                 dev->mib_cnt = ARRAY_SIZE(ksz87xx_mib_names);
1695                 dev->mib_names = ksz87xx_mib_names;
1696         }
1697
1698         dev->reg_mib_cnt = MIB_COUNTER_NUM;
1699
1700         dev->ports = devm_kzalloc(dev->dev,
1701                                   dev->port_cnt * sizeof(struct ksz_port),
1702                                   GFP_KERNEL);
1703         if (!dev->ports)
1704                 return -ENOMEM;
1705         for (i = 0; i < dev->port_cnt; i++) {
1706                 mutex_init(&dev->ports[i].mib.cnt_mutex);
1707                 dev->ports[i].mib.counters =
1708                         devm_kzalloc(dev->dev,
1709                                      sizeof(u64) *
1710                                      (dev->mib_cnt + 1),
1711                                      GFP_KERNEL);
1712                 if (!dev->ports[i].mib.counters)
1713                         return -ENOMEM;
1714         }
1715
1716         /* set the real number of ports */
1717         dev->ds->num_ports = dev->port_cnt;
1718
1719         /* We rely on software untagging on the CPU port, so that we
1720          * can support both tagged and untagged VLANs
1721          */
1722         dev->ds->untag_bridge_pvid = true;
1723
1724         /* VLAN filtering is partly controlled by the global VLAN
1725          * Enable flag
1726          */
1727         dev->ds->vlan_filtering_is_global = true;
1728
1729         return 0;
1730 }
1731
1732 static void ksz8_switch_exit(struct ksz_device *dev)
1733 {
1734         ksz8_reset_switch(dev);
1735 }
1736
1737 static const struct ksz_dev_ops ksz8_dev_ops = {
1738         .get_port_addr = ksz8_get_port_addr,
1739         .cfg_port_member = ksz8_cfg_port_member,
1740         .flush_dyn_mac_table = ksz8_flush_dyn_mac_table,
1741         .port_setup = ksz8_port_setup,
1742         .r_phy = ksz8_r_phy,
1743         .w_phy = ksz8_w_phy,
1744         .r_dyn_mac_table = ksz8_r_dyn_mac_table,
1745         .r_sta_mac_table = ksz8_r_sta_mac_table,
1746         .w_sta_mac_table = ksz8_w_sta_mac_table,
1747         .r_mib_cnt = ksz8_r_mib_cnt,
1748         .r_mib_pkt = ksz8_r_mib_pkt,
1749         .freeze_mib = ksz8_freeze_mib,
1750         .port_init_cnt = ksz8_port_init_cnt,
1751         .shutdown = ksz8_reset_switch,
1752         .detect = ksz8_switch_detect,
1753         .init = ksz8_switch_init,
1754         .exit = ksz8_switch_exit,
1755 };
1756
1757 int ksz8_switch_register(struct ksz_device *dev)
1758 {
1759         return ksz_switch_register(dev, &ksz8_dev_ops);
1760 }
1761 EXPORT_SYMBOL(ksz8_switch_register);
1762
1763 MODULE_AUTHOR("Tristram Ha <Tristram.Ha@microchip.com>");
1764 MODULE_DESCRIPTION("Microchip KSZ8795 Series Switch DSA Driver");
1765 MODULE_LICENSE("GPL");