1 // SPDX-License-Identifier: GPL-2.0
3 * Microchip KSZ8795 switch driver
5 * Copyright (C) 2017 Microchip Technology Inc.
6 * Tristram Ha <Tristram.Ha@microchip.com>
9 #include <linux/delay.h>
10 #include <linux/export.h>
11 #include <linux/gpio.h>
12 #include <linux/kernel.h>
13 #include <linux/module.h>
14 #include <linux/platform_data/microchip-ksz.h>
15 #include <linux/phy.h>
16 #include <linux/etherdevice.h>
17 #include <linux/if_bridge.h>
19 #include <net/switchdev.h>
21 #include "ksz_common.h"
22 #include "ksz8795_reg.h"
25 char string[ETH_GSTRING_LEN];
26 } mib_names[TOTAL_SWITCH_COUNTER_NUM] = {
65 static void ksz_cfg(struct ksz_device *dev, u32 addr, u8 bits, bool set)
67 regmap_update_bits(dev->regmap[0], addr, bits, set ? bits : 0);
70 static void ksz_port_cfg(struct ksz_device *dev, int port, int offset, u8 bits,
73 regmap_update_bits(dev->regmap[0], PORT_CTRL_ADDR(port, offset),
74 bits, set ? bits : 0);
77 static int ksz8795_reset_switch(struct ksz_device *dev)
80 ksz_write8(dev, REG_POWER_MANAGEMENT_1,
81 SW_SOFTWARE_POWER_DOWN << SW_POWER_MANAGEMENT_MODE_S);
82 ksz_write8(dev, REG_POWER_MANAGEMENT_1, 0);
87 static void ksz8795_set_prio_queue(struct ksz_device *dev, int port, int queue)
91 /* Number of queues can only be 1, 2, or 4. */
95 queue = PORT_QUEUE_SPLIT_4;
98 queue = PORT_QUEUE_SPLIT_2;
101 queue = PORT_QUEUE_SPLIT_1;
103 ksz_pread8(dev, port, REG_PORT_CTRL_0, &lo);
104 ksz_pread8(dev, port, P_DROP_TAG_CTRL, &hi);
105 lo &= ~PORT_QUEUE_SPLIT_L;
106 if (queue & PORT_QUEUE_SPLIT_2)
107 lo |= PORT_QUEUE_SPLIT_L;
108 hi &= ~PORT_QUEUE_SPLIT_H;
109 if (queue & PORT_QUEUE_SPLIT_4)
110 hi |= PORT_QUEUE_SPLIT_H;
111 ksz_pwrite8(dev, port, REG_PORT_CTRL_0, lo);
112 ksz_pwrite8(dev, port, P_DROP_TAG_CTRL, hi);
114 /* Default is port based for egress rate limit. */
115 if (queue != PORT_QUEUE_SPLIT_1)
116 ksz_cfg(dev, REG_SW_CTRL_19, SW_OUT_RATE_LIMIT_QUEUE_BASED,
120 static void ksz8795_r_mib_cnt(struct ksz_device *dev, int port, u16 addr,
128 ctrl_addr = addr + SWITCH_COUNTER_NUM * port;
129 ctrl_addr |= IND_ACC_TABLE(TABLE_MIB | TABLE_READ);
131 mutex_lock(&dev->alu_mutex);
132 ksz_write16(dev, REG_IND_CTRL_0, ctrl_addr);
134 /* It is almost guaranteed to always read the valid bit because of
137 for (loop = 2; loop > 0; loop--) {
138 ksz_read8(dev, REG_IND_MIB_CHECK, &check);
140 if (check & MIB_COUNTER_VALID) {
141 ksz_read32(dev, REG_IND_DATA_LO, &data);
142 if (check & MIB_COUNTER_OVERFLOW)
143 *cnt += MIB_COUNTER_VALUE + 1;
144 *cnt += data & MIB_COUNTER_VALUE;
148 mutex_unlock(&dev->alu_mutex);
151 static void ksz8795_r_mib_pkt(struct ksz_device *dev, int port, u16 addr,
152 u64 *dropped, u64 *cnt)
159 addr -= SWITCH_COUNTER_NUM;
160 ctrl_addr = (KS_MIB_TOTAL_RX_1 - KS_MIB_TOTAL_RX_0) * port;
161 ctrl_addr += addr + KS_MIB_TOTAL_RX_0;
162 ctrl_addr |= IND_ACC_TABLE(TABLE_MIB | TABLE_READ);
164 mutex_lock(&dev->alu_mutex);
165 ksz_write16(dev, REG_IND_CTRL_0, ctrl_addr);
167 /* It is almost guaranteed to always read the valid bit because of
170 for (loop = 2; loop > 0; loop--) {
171 ksz_read8(dev, REG_IND_MIB_CHECK, &check);
173 if (check & MIB_COUNTER_VALID) {
174 ksz_read32(dev, REG_IND_DATA_LO, &data);
178 total = check & MIB_TOTAL_BYTES_H;
182 if (check & MIB_COUNTER_OVERFLOW) {
183 total = MIB_TOTAL_BYTES_H + 1;
188 if (check & MIB_COUNTER_OVERFLOW)
189 *cnt += MIB_PACKET_DROPPED + 1;
190 *cnt += data & MIB_PACKET_DROPPED;
195 mutex_unlock(&dev->alu_mutex);
198 static void ksz8795_freeze_mib(struct ksz_device *dev, int port, bool freeze)
200 /* enable the port for flush/freeze function */
202 ksz_cfg(dev, REG_SW_CTRL_6, BIT(port), true);
203 ksz_cfg(dev, REG_SW_CTRL_6, SW_MIB_COUNTER_FREEZE, freeze);
205 /* disable the port after freeze is done */
207 ksz_cfg(dev, REG_SW_CTRL_6, BIT(port), false);
210 static void ksz8795_port_init_cnt(struct ksz_device *dev, int port)
212 struct ksz_port_mib *mib = &dev->ports[port].mib;
214 /* flush all enabled port MIB counters */
215 ksz_cfg(dev, REG_SW_CTRL_6, BIT(port), true);
216 ksz_cfg(dev, REG_SW_CTRL_6, SW_MIB_COUNTER_FLUSH, true);
217 ksz_cfg(dev, REG_SW_CTRL_6, BIT(port), false);
221 /* Some ports may not have MIB counters before SWITCH_COUNTER_NUM. */
222 while (mib->cnt_ptr < dev->reg_mib_cnt) {
223 dev->dev_ops->r_mib_cnt(dev, port, mib->cnt_ptr,
224 &mib->counters[mib->cnt_ptr]);
228 /* Some ports may not have MIB counters after SWITCH_COUNTER_NUM. */
229 while (mib->cnt_ptr < dev->mib_cnt) {
230 dev->dev_ops->r_mib_pkt(dev, port, mib->cnt_ptr,
231 NULL, &mib->counters[mib->cnt_ptr]);
235 memset(mib->counters, 0, dev->mib_cnt * sizeof(u64));
238 static void ksz8795_r_table(struct ksz_device *dev, int table, u16 addr,
243 ctrl_addr = IND_ACC_TABLE(table | TABLE_READ) | addr;
245 mutex_lock(&dev->alu_mutex);
246 ksz_write16(dev, REG_IND_CTRL_0, ctrl_addr);
247 ksz_read64(dev, REG_IND_DATA_HI, data);
248 mutex_unlock(&dev->alu_mutex);
251 static void ksz8795_w_table(struct ksz_device *dev, int table, u16 addr,
256 ctrl_addr = IND_ACC_TABLE(table) | addr;
258 mutex_lock(&dev->alu_mutex);
259 ksz_write64(dev, REG_IND_DATA_HI, data);
260 ksz_write16(dev, REG_IND_CTRL_0, ctrl_addr);
261 mutex_unlock(&dev->alu_mutex);
264 static int ksz8795_valid_dyn_entry(struct ksz_device *dev, u8 *data)
269 ksz_read8(dev, REG_IND_DATA_CHECK, data);
271 } while ((*data & DYNAMIC_MAC_TABLE_NOT_READY) && timeout);
273 /* Entry is not ready for accessing. */
274 if (*data & DYNAMIC_MAC_TABLE_NOT_READY) {
276 /* Entry is ready for accessing. */
278 ksz_read8(dev, REG_IND_DATA_8, data);
280 /* There is no valid entry in the table. */
281 if (*data & DYNAMIC_MAC_TABLE_MAC_EMPTY)
287 static int ksz8795_r_dyn_mac_table(struct ksz_device *dev, u16 addr,
288 u8 *mac_addr, u8 *fid, u8 *src_port,
289 u8 *timestamp, u16 *entries)
291 u32 data_hi, data_lo;
296 ctrl_addr = IND_ACC_TABLE(TABLE_DYNAMIC_MAC | TABLE_READ) | addr;
298 mutex_lock(&dev->alu_mutex);
299 ksz_write16(dev, REG_IND_CTRL_0, ctrl_addr);
301 rc = ksz8795_valid_dyn_entry(dev, &data);
305 } else if (rc == -ENXIO) {
307 /* At least one valid entry in the table. */
312 ksz_read64(dev, REG_IND_DATA_HI, &buf);
313 data_hi = (u32)(buf >> 32);
316 /* Check out how many valid entry in the table. */
317 cnt = data & DYNAMIC_MAC_TABLE_ENTRIES_H;
318 cnt <<= DYNAMIC_MAC_ENTRIES_H_S;
319 cnt |= (data_hi & DYNAMIC_MAC_TABLE_ENTRIES) >>
320 DYNAMIC_MAC_ENTRIES_S;
323 *fid = (data_hi & DYNAMIC_MAC_TABLE_FID) >>
325 *src_port = (data_hi & DYNAMIC_MAC_TABLE_SRC_PORT) >>
326 DYNAMIC_MAC_SRC_PORT_S;
327 *timestamp = (data_hi & DYNAMIC_MAC_TABLE_TIMESTAMP) >>
328 DYNAMIC_MAC_TIMESTAMP_S;
330 mac_addr[5] = (u8)data_lo;
331 mac_addr[4] = (u8)(data_lo >> 8);
332 mac_addr[3] = (u8)(data_lo >> 16);
333 mac_addr[2] = (u8)(data_lo >> 24);
335 mac_addr[1] = (u8)data_hi;
336 mac_addr[0] = (u8)(data_hi >> 8);
339 mutex_unlock(&dev->alu_mutex);
344 static int ksz8795_r_sta_mac_table(struct ksz_device *dev, u16 addr,
345 struct alu_struct *alu)
347 u32 data_hi, data_lo;
350 ksz8795_r_table(dev, TABLE_STATIC_MAC, addr, &data);
351 data_hi = data >> 32;
353 if (data_hi & (STATIC_MAC_TABLE_VALID | STATIC_MAC_TABLE_OVERRIDE)) {
354 alu->mac[5] = (u8)data_lo;
355 alu->mac[4] = (u8)(data_lo >> 8);
356 alu->mac[3] = (u8)(data_lo >> 16);
357 alu->mac[2] = (u8)(data_lo >> 24);
358 alu->mac[1] = (u8)data_hi;
359 alu->mac[0] = (u8)(data_hi >> 8);
360 alu->port_forward = (data_hi & STATIC_MAC_TABLE_FWD_PORTS) >>
361 STATIC_MAC_FWD_PORTS_S;
363 (data_hi & STATIC_MAC_TABLE_OVERRIDE) ? 1 : 0;
365 alu->is_use_fid = (data_hi & STATIC_MAC_TABLE_USE_FID) ? 1 : 0;
366 alu->fid = (data_hi & STATIC_MAC_TABLE_FID) >>
373 static void ksz8795_w_sta_mac_table(struct ksz_device *dev, u16 addr,
374 struct alu_struct *alu)
376 u32 data_hi, data_lo;
379 data_lo = ((u32)alu->mac[2] << 24) |
380 ((u32)alu->mac[3] << 16) |
381 ((u32)alu->mac[4] << 8) | alu->mac[5];
382 data_hi = ((u32)alu->mac[0] << 8) | alu->mac[1];
383 data_hi |= (u32)alu->port_forward << STATIC_MAC_FWD_PORTS_S;
385 if (alu->is_override)
386 data_hi |= STATIC_MAC_TABLE_OVERRIDE;
387 if (alu->is_use_fid) {
388 data_hi |= STATIC_MAC_TABLE_USE_FID;
389 data_hi |= (u32)alu->fid << STATIC_MAC_FID_S;
392 data_hi |= STATIC_MAC_TABLE_VALID;
394 data_hi &= ~STATIC_MAC_TABLE_OVERRIDE;
396 data = (u64)data_hi << 32 | data_lo;
397 ksz8795_w_table(dev, TABLE_STATIC_MAC, addr, data);
400 static void ksz8795_from_vlan(u16 vlan, u8 *fid, u8 *member, u8 *valid)
402 *fid = vlan & VLAN_TABLE_FID;
403 *member = (vlan & VLAN_TABLE_MEMBERSHIP) >> VLAN_TABLE_MEMBERSHIP_S;
404 *valid = !!(vlan & VLAN_TABLE_VALID);
407 static void ksz8795_to_vlan(u8 fid, u8 member, u8 valid, u16 *vlan)
410 *vlan |= (u16)member << VLAN_TABLE_MEMBERSHIP_S;
412 *vlan |= VLAN_TABLE_VALID;
415 static void ksz8795_r_vlan_entries(struct ksz_device *dev, u16 addr)
420 ksz8795_r_table(dev, TABLE_VLAN, addr, &data);
422 for (i = 0; i < 4; i++) {
423 dev->vlan_cache[addr + i].table[0] = (u16)data;
424 data >>= VLAN_TABLE_S;
428 static void ksz8795_r_vlan_table(struct ksz_device *dev, u16 vid, u16 *vlan)
438 ksz8795_r_table(dev, TABLE_VLAN, addr, &buf);
442 static void ksz8795_w_vlan_table(struct ksz_device *dev, u16 vid, u16 vlan)
452 ksz8795_r_table(dev, TABLE_VLAN, addr, &buf);
454 dev->vlan_cache[vid].table[0] = vlan;
455 ksz8795_w_table(dev, TABLE_VLAN, addr, buf);
458 static void ksz8795_r_phy(struct ksz_device *dev, u16 phy, u16 reg, u16 *val)
460 u8 restart, speed, ctrl, link;
461 int processed = true;
467 ksz_pread8(dev, p, P_NEG_RESTART_CTRL, &restart);
468 ksz_pread8(dev, p, P_SPEED_STATUS, &speed);
469 ksz_pread8(dev, p, P_FORCE_CTRL, &ctrl);
470 if (restart & PORT_PHY_LOOPBACK)
471 data |= PHY_LOOPBACK;
472 if (ctrl & PORT_FORCE_100_MBIT)
473 data |= PHY_SPEED_100MBIT;
474 if (!(ctrl & PORT_AUTO_NEG_DISABLE))
475 data |= PHY_AUTO_NEG_ENABLE;
476 if (restart & PORT_POWER_DOWN)
477 data |= PHY_POWER_DOWN;
478 if (restart & PORT_AUTO_NEG_RESTART)
479 data |= PHY_AUTO_NEG_RESTART;
480 if (ctrl & PORT_FORCE_FULL_DUPLEX)
481 data |= PHY_FULL_DUPLEX;
482 if (speed & PORT_HP_MDIX)
484 if (restart & PORT_FORCE_MDIX)
485 data |= PHY_FORCE_MDIX;
486 if (restart & PORT_AUTO_MDIX_DISABLE)
487 data |= PHY_AUTO_MDIX_DISABLE;
488 if (restart & PORT_TX_DISABLE)
489 data |= PHY_TRANSMIT_DISABLE;
490 if (restart & PORT_LED_OFF)
491 data |= PHY_LED_DISABLE;
494 ksz_pread8(dev, p, P_LINK_STATUS, &link);
495 data = PHY_100BTX_FD_CAPABLE |
497 PHY_10BT_FD_CAPABLE |
499 PHY_AUTO_NEG_CAPABLE;
500 if (link & PORT_AUTO_NEG_COMPLETE)
501 data |= PHY_AUTO_NEG_ACKNOWLEDGE;
502 if (link & PORT_STAT_LINK_GOOD)
503 data |= PHY_LINK_STATUS;
506 data = KSZ8795_ID_HI;
509 data = KSZ8795_ID_LO;
511 case PHY_REG_AUTO_NEGOTIATION:
512 ksz_pread8(dev, p, P_LOCAL_CTRL, &ctrl);
513 data = PHY_AUTO_NEG_802_3;
514 if (ctrl & PORT_AUTO_NEG_SYM_PAUSE)
515 data |= PHY_AUTO_NEG_SYM_PAUSE;
516 if (ctrl & PORT_AUTO_NEG_100BTX_FD)
517 data |= PHY_AUTO_NEG_100BTX_FD;
518 if (ctrl & PORT_AUTO_NEG_100BTX)
519 data |= PHY_AUTO_NEG_100BTX;
520 if (ctrl & PORT_AUTO_NEG_10BT_FD)
521 data |= PHY_AUTO_NEG_10BT_FD;
522 if (ctrl & PORT_AUTO_NEG_10BT)
523 data |= PHY_AUTO_NEG_10BT;
525 case PHY_REG_REMOTE_CAPABILITY:
526 ksz_pread8(dev, p, P_REMOTE_STATUS, &link);
527 data = PHY_AUTO_NEG_802_3;
528 if (link & PORT_REMOTE_SYM_PAUSE)
529 data |= PHY_AUTO_NEG_SYM_PAUSE;
530 if (link & PORT_REMOTE_100BTX_FD)
531 data |= PHY_AUTO_NEG_100BTX_FD;
532 if (link & PORT_REMOTE_100BTX)
533 data |= PHY_AUTO_NEG_100BTX;
534 if (link & PORT_REMOTE_10BT_FD)
535 data |= PHY_AUTO_NEG_10BT_FD;
536 if (link & PORT_REMOTE_10BT)
537 data |= PHY_AUTO_NEG_10BT;
538 if (data & ~PHY_AUTO_NEG_802_3)
539 data |= PHY_REMOTE_ACKNOWLEDGE_NOT;
549 static void ksz8795_w_phy(struct ksz_device *dev, u16 phy, u16 reg, u16 val)
552 u8 restart, speed, ctrl, data;
557 /* Do not support PHY reset function. */
560 ksz_pread8(dev, p, P_SPEED_STATUS, &speed);
562 if (val & PHY_HP_MDIX)
563 data |= PORT_HP_MDIX;
565 data &= ~PORT_HP_MDIX;
567 ksz_pwrite8(dev, p, P_SPEED_STATUS, data);
568 ksz_pread8(dev, p, P_FORCE_CTRL, &ctrl);
570 if (!(val & PHY_AUTO_NEG_ENABLE))
571 data |= PORT_AUTO_NEG_DISABLE;
573 data &= ~PORT_AUTO_NEG_DISABLE;
575 /* Fiber port does not support auto-negotiation. */
576 if (dev->ports[p].fiber)
577 data |= PORT_AUTO_NEG_DISABLE;
578 if (val & PHY_SPEED_100MBIT)
579 data |= PORT_FORCE_100_MBIT;
581 data &= ~PORT_FORCE_100_MBIT;
582 if (val & PHY_FULL_DUPLEX)
583 data |= PORT_FORCE_FULL_DUPLEX;
585 data &= ~PORT_FORCE_FULL_DUPLEX;
587 ksz_pwrite8(dev, p, P_FORCE_CTRL, data);
588 ksz_pread8(dev, p, P_NEG_RESTART_CTRL, &restart);
590 if (val & PHY_LED_DISABLE)
591 data |= PORT_LED_OFF;
593 data &= ~PORT_LED_OFF;
594 if (val & PHY_TRANSMIT_DISABLE)
595 data |= PORT_TX_DISABLE;
597 data &= ~PORT_TX_DISABLE;
598 if (val & PHY_AUTO_NEG_RESTART)
599 data |= PORT_AUTO_NEG_RESTART;
601 data &= ~(PORT_AUTO_NEG_RESTART);
602 if (val & PHY_POWER_DOWN)
603 data |= PORT_POWER_DOWN;
605 data &= ~PORT_POWER_DOWN;
606 if (val & PHY_AUTO_MDIX_DISABLE)
607 data |= PORT_AUTO_MDIX_DISABLE;
609 data &= ~PORT_AUTO_MDIX_DISABLE;
610 if (val & PHY_FORCE_MDIX)
611 data |= PORT_FORCE_MDIX;
613 data &= ~PORT_FORCE_MDIX;
614 if (val & PHY_LOOPBACK)
615 data |= PORT_PHY_LOOPBACK;
617 data &= ~PORT_PHY_LOOPBACK;
619 ksz_pwrite8(dev, p, P_NEG_RESTART_CTRL, data);
621 case PHY_REG_AUTO_NEGOTIATION:
622 ksz_pread8(dev, p, P_LOCAL_CTRL, &ctrl);
624 data &= ~(PORT_AUTO_NEG_SYM_PAUSE |
625 PORT_AUTO_NEG_100BTX_FD |
626 PORT_AUTO_NEG_100BTX |
627 PORT_AUTO_NEG_10BT_FD |
629 if (val & PHY_AUTO_NEG_SYM_PAUSE)
630 data |= PORT_AUTO_NEG_SYM_PAUSE;
631 if (val & PHY_AUTO_NEG_100BTX_FD)
632 data |= PORT_AUTO_NEG_100BTX_FD;
633 if (val & PHY_AUTO_NEG_100BTX)
634 data |= PORT_AUTO_NEG_100BTX;
635 if (val & PHY_AUTO_NEG_10BT_FD)
636 data |= PORT_AUTO_NEG_10BT_FD;
637 if (val & PHY_AUTO_NEG_10BT)
638 data |= PORT_AUTO_NEG_10BT;
640 ksz_pwrite8(dev, p, P_LOCAL_CTRL, data);
647 static enum dsa_tag_protocol ksz8795_get_tag_protocol(struct dsa_switch *ds,
650 return DSA_TAG_PROTO_KSZ8795;
653 static void ksz8795_get_strings(struct dsa_switch *ds, int port,
654 u32 stringset, uint8_t *buf)
658 for (i = 0; i < TOTAL_SWITCH_COUNTER_NUM; i++) {
659 memcpy(buf + i * ETH_GSTRING_LEN, mib_names[i].string,
664 static void ksz8795_cfg_port_member(struct ksz_device *dev, int port,
669 ksz_pread8(dev, port, P_MIRROR_CTRL, &data);
670 data &= ~PORT_VLAN_MEMBERSHIP;
671 data |= (member & dev->port_mask);
672 ksz_pwrite8(dev, port, P_MIRROR_CTRL, data);
673 dev->ports[port].member = member;
676 static void ksz8795_port_stp_state_set(struct dsa_switch *ds, int port,
679 struct ksz_device *dev = ds->priv;
680 int forward = dev->member;
685 p = &dev->ports[port];
687 ksz_pread8(dev, port, P_STP_CTRL, &data);
688 data &= ~(PORT_TX_ENABLE | PORT_RX_ENABLE | PORT_LEARN_DISABLE);
691 case BR_STATE_DISABLED:
692 data |= PORT_LEARN_DISABLE;
693 if (port < SWITCH_PORT_NUM)
696 case BR_STATE_LISTENING:
697 data |= (PORT_RX_ENABLE | PORT_LEARN_DISABLE);
698 if (port < SWITCH_PORT_NUM &&
699 p->stp_state == BR_STATE_DISABLED)
700 member = dev->host_mask | p->vid_member;
702 case BR_STATE_LEARNING:
703 data |= PORT_RX_ENABLE;
705 case BR_STATE_FORWARDING:
706 data |= (PORT_TX_ENABLE | PORT_RX_ENABLE);
708 /* This function is also used internally. */
709 if (port == dev->cpu_port)
712 /* Port is a member of a bridge. */
713 if (dev->br_member & BIT(port)) {
714 dev->member |= BIT(port);
715 member = dev->member;
717 member = dev->host_mask | p->vid_member;
720 case BR_STATE_BLOCKING:
721 data |= PORT_LEARN_DISABLE;
722 if (port < SWITCH_PORT_NUM &&
723 p->stp_state == BR_STATE_DISABLED)
724 member = dev->host_mask | p->vid_member;
727 dev_err(ds->dev, "invalid STP state: %d\n", state);
731 ksz_pwrite8(dev, port, P_STP_CTRL, data);
732 p->stp_state = state;
733 if (data & PORT_RX_ENABLE)
734 dev->rx_ports |= BIT(port);
736 dev->rx_ports &= ~BIT(port);
737 if (data & PORT_TX_ENABLE)
738 dev->tx_ports |= BIT(port);
740 dev->tx_ports &= ~BIT(port);
742 /* Port membership may share register with STP state. */
743 if (member >= 0 && member != p->member)
744 ksz8795_cfg_port_member(dev, port, (u8)member);
746 /* Check if forwarding needs to be updated. */
747 if (state != BR_STATE_FORWARDING) {
748 if (dev->br_member & BIT(port))
749 dev->member &= ~BIT(port);
752 /* When topology has changed the function ksz_update_port_member
753 * should be called to modify port forwarding behavior.
755 if (forward != dev->member)
756 ksz_update_port_member(dev, port);
759 static void ksz8795_flush_dyn_mac_table(struct ksz_device *dev, int port)
761 u8 learn[TOTAL_PORT_NUM];
762 int first, index, cnt;
765 if ((uint)port < TOTAL_PORT_NUM) {
769 /* Flush all ports. */
771 cnt = dev->mib_port_cnt;
773 for (index = first; index < cnt; index++) {
774 p = &dev->ports[index];
777 ksz_pread8(dev, index, P_STP_CTRL, &learn[index]);
778 if (!(learn[index] & PORT_LEARN_DISABLE))
779 ksz_pwrite8(dev, index, P_STP_CTRL,
780 learn[index] | PORT_LEARN_DISABLE);
782 ksz_cfg(dev, S_FLUSH_TABLE_CTRL, SW_FLUSH_DYN_MAC_TABLE, true);
783 for (index = first; index < cnt; index++) {
784 p = &dev->ports[index];
787 if (!(learn[index] & PORT_LEARN_DISABLE))
788 ksz_pwrite8(dev, index, P_STP_CTRL, learn[index]);
792 static int ksz8795_port_vlan_filtering(struct dsa_switch *ds, int port,
795 struct ksz_device *dev = ds->priv;
797 ksz_cfg(dev, S_MIRROR_CTRL, SW_VLAN_ENABLE, flag);
802 static void ksz8795_port_vlan_add(struct dsa_switch *ds, int port,
803 const struct switchdev_obj_port_vlan *vlan)
805 bool untagged = vlan->flags & BRIDGE_VLAN_INFO_UNTAGGED;
806 struct ksz_device *dev = ds->priv;
807 u16 data, vid, new_pvid = 0;
808 u8 fid, member, valid;
810 ksz_port_cfg(dev, port, P_TAG_CTRL, PORT_REMOVE_TAG, untagged);
812 for (vid = vlan->vid_begin; vid <= vlan->vid_end; vid++) {
813 ksz8795_r_vlan_table(dev, vid, &data);
814 ksz8795_from_vlan(data, &fid, &member, &valid);
816 /* First time to setup the VLAN entry. */
818 /* Need to find a way to map VID to FID. */
824 ksz8795_to_vlan(fid, member, valid, &data);
825 ksz8795_w_vlan_table(dev, vid, data);
828 if (vlan->flags & BRIDGE_VLAN_INFO_PVID)
833 ksz_pread16(dev, port, REG_PORT_CTRL_VID, &vid);
836 ksz_pwrite16(dev, port, REG_PORT_CTRL_VID, vid);
840 static int ksz8795_port_vlan_del(struct dsa_switch *ds, int port,
841 const struct switchdev_obj_port_vlan *vlan)
843 bool untagged = vlan->flags & BRIDGE_VLAN_INFO_UNTAGGED;
844 struct ksz_device *dev = ds->priv;
845 u16 data, vid, pvid, new_pvid = 0;
846 u8 fid, member, valid;
848 ksz_pread16(dev, port, REG_PORT_CTRL_VID, &pvid);
851 ksz_port_cfg(dev, port, P_TAG_CTRL, PORT_REMOVE_TAG, untagged);
853 for (vid = vlan->vid_begin; vid <= vlan->vid_end; vid++) {
854 ksz8795_r_vlan_table(dev, vid, &data);
855 ksz8795_from_vlan(data, &fid, &member, &valid);
857 member &= ~BIT(port);
859 /* Invalidate the entry if no more member. */
868 ksz8795_to_vlan(fid, member, valid, &data);
869 ksz8795_w_vlan_table(dev, vid, data);
872 if (new_pvid != pvid)
873 ksz_pwrite16(dev, port, REG_PORT_CTRL_VID, pvid);
878 static int ksz8795_port_mirror_add(struct dsa_switch *ds, int port,
879 struct dsa_mall_mirror_tc_entry *mirror,
882 struct ksz_device *dev = ds->priv;
885 ksz_port_cfg(dev, port, P_MIRROR_CTRL, PORT_MIRROR_RX, true);
886 dev->mirror_rx |= BIT(port);
888 ksz_port_cfg(dev, port, P_MIRROR_CTRL, PORT_MIRROR_TX, true);
889 dev->mirror_tx |= BIT(port);
892 ksz_port_cfg(dev, port, P_MIRROR_CTRL, PORT_MIRROR_SNIFFER, false);
894 /* configure mirror port */
895 if (dev->mirror_rx || dev->mirror_tx)
896 ksz_port_cfg(dev, mirror->to_local_port, P_MIRROR_CTRL,
897 PORT_MIRROR_SNIFFER, true);
902 static void ksz8795_port_mirror_del(struct dsa_switch *ds, int port,
903 struct dsa_mall_mirror_tc_entry *mirror)
905 struct ksz_device *dev = ds->priv;
908 if (mirror->ingress) {
909 ksz_port_cfg(dev, port, P_MIRROR_CTRL, PORT_MIRROR_RX, false);
910 dev->mirror_rx &= ~BIT(port);
912 ksz_port_cfg(dev, port, P_MIRROR_CTRL, PORT_MIRROR_TX, false);
913 dev->mirror_tx &= ~BIT(port);
916 ksz_pread8(dev, port, P_MIRROR_CTRL, &data);
918 if (!dev->mirror_rx && !dev->mirror_tx)
919 ksz_port_cfg(dev, mirror->to_local_port, P_MIRROR_CTRL,
920 PORT_MIRROR_SNIFFER, false);
923 static void ksz8795_port_setup(struct ksz_device *dev, int port, bool cpu_port)
925 struct ksz_port *p = &dev->ports[port];
928 /* enable broadcast storm limit */
929 ksz_port_cfg(dev, port, P_BCAST_STORM_CTRL, PORT_BROADCAST_STORM, true);
931 ksz8795_set_prio_queue(dev, port, 4);
933 /* disable DiffServ priority */
934 ksz_port_cfg(dev, port, P_PRIO_CTRL, PORT_DIFFSERV_ENABLE, false);
936 /* replace priority */
937 ksz_port_cfg(dev, port, P_802_1P_CTRL, PORT_802_1P_REMAPPING, false);
939 /* enable 802.1p priority */
940 ksz_port_cfg(dev, port, P_PRIO_CTRL, PORT_802_1P_ENABLE, true);
943 /* Configure MII interface for proper network communication. */
944 ksz_read8(dev, REG_PORT_5_CTRL_6, &data8);
945 data8 &= ~PORT_INTERFACE_TYPE;
946 data8 &= ~PORT_GMII_1GPS_MODE;
947 switch (dev->interface) {
948 case PHY_INTERFACE_MODE_MII:
949 p->phydev.speed = SPEED_100;
951 case PHY_INTERFACE_MODE_RMII:
952 data8 |= PORT_INTERFACE_RMII;
953 p->phydev.speed = SPEED_100;
955 case PHY_INTERFACE_MODE_GMII:
956 data8 |= PORT_GMII_1GPS_MODE;
957 data8 |= PORT_INTERFACE_GMII;
958 p->phydev.speed = SPEED_1000;
961 data8 &= ~PORT_RGMII_ID_IN_ENABLE;
962 data8 &= ~PORT_RGMII_ID_OUT_ENABLE;
963 if (dev->interface == PHY_INTERFACE_MODE_RGMII_ID ||
964 dev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
965 data8 |= PORT_RGMII_ID_IN_ENABLE;
966 if (dev->interface == PHY_INTERFACE_MODE_RGMII_ID ||
967 dev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
968 data8 |= PORT_RGMII_ID_OUT_ENABLE;
969 data8 |= PORT_GMII_1GPS_MODE;
970 data8 |= PORT_INTERFACE_RGMII;
971 p->phydev.speed = SPEED_1000;
974 ksz_write8(dev, REG_PORT_5_CTRL_6, data8);
975 p->phydev.duplex = 1;
977 member = dev->port_mask;
978 dev->on_ports = dev->host_mask;
979 dev->live_ports = dev->host_mask;
981 member = dev->host_mask | p->vid_member;
982 dev->on_ports |= BIT(port);
984 /* Link was detected before port is enabled. */
986 dev->live_ports |= BIT(port);
988 ksz8795_cfg_port_member(dev, port, member);
991 static void ksz8795_config_cpu_port(struct dsa_switch *ds)
993 struct ksz_device *dev = ds->priv;
998 ds->num_ports = dev->port_cnt + 1;
1000 /* Switch marks the maximum frame with extra byte as oversize. */
1001 ksz_cfg(dev, REG_SW_CTRL_2, SW_LEGAL_PACKET_DISABLE, true);
1002 ksz_cfg(dev, S_TAIL_TAG_CTRL, SW_TAIL_TAG_ENABLE, true);
1004 p = &dev->ports[dev->cpu_port];
1005 p->vid_member = dev->port_mask;
1008 ksz8795_port_setup(dev, dev->cpu_port, true);
1009 dev->member = dev->host_mask;
1011 for (i = 0; i < SWITCH_PORT_NUM; i++) {
1014 /* Initialize to non-zero so that ksz_cfg_port_member() will
1017 p->vid_member = BIT(i);
1018 p->member = dev->port_mask;
1019 ksz8795_port_stp_state_set(ds, i, BR_STATE_DISABLED);
1021 /* Last port may be disabled. */
1022 if (i == dev->port_cnt)
1027 for (i = 0; i < dev->phy_port_cnt; i++) {
1031 ksz_pread8(dev, i, P_REMOTE_STATUS, &remote);
1032 if (remote & PORT_FIBER_MODE)
1035 ksz_port_cfg(dev, i, P_STP_CTRL, PORT_FORCE_FLOW_CTRL,
1038 ksz_port_cfg(dev, i, P_STP_CTRL, PORT_FORCE_FLOW_CTRL,
1043 static int ksz8795_setup(struct dsa_switch *ds)
1045 struct ksz_device *dev = ds->priv;
1046 struct alu_struct alu;
1049 dev->vlan_cache = devm_kcalloc(dev->dev, sizeof(struct vlan_table),
1050 dev->num_vlans, GFP_KERNEL);
1051 if (!dev->vlan_cache)
1054 ret = ksz8795_reset_switch(dev);
1056 dev_err(ds->dev, "failed to reset switch\n");
1060 ksz_cfg(dev, S_REPLACE_VID_CTRL, SW_FLOW_CTRL, true);
1062 /* Enable automatic fast aging when link changed detected. */
1063 ksz_cfg(dev, S_LINK_AGING_CTRL, SW_LINK_AUTO_AGING, true);
1065 /* Enable aggressive back off algorithm in half duplex mode. */
1066 regmap_update_bits(dev->regmap[0], REG_SW_CTRL_1,
1067 SW_AGGR_BACKOFF, SW_AGGR_BACKOFF);
1070 * Make sure unicast VLAN boundary is set as default and
1071 * enable no excessive collision drop.
1073 regmap_update_bits(dev->regmap[0], REG_SW_CTRL_2,
1074 UNICAST_VLAN_BOUNDARY | NO_EXC_COLLISION_DROP,
1075 UNICAST_VLAN_BOUNDARY | NO_EXC_COLLISION_DROP);
1077 ksz8795_config_cpu_port(ds);
1079 ksz_cfg(dev, REG_SW_CTRL_2, MULTICAST_STORM_DISABLE, true);
1081 ksz_cfg(dev, S_REPLACE_VID_CTRL, SW_REPLACE_VID, false);
1083 ksz_cfg(dev, S_MIRROR_CTRL, SW_MIRROR_RX_TX, false);
1085 /* set broadcast storm protection 10% rate */
1086 regmap_update_bits(dev->regmap[1], S_REPLACE_VID_CTRL,
1087 BROADCAST_STORM_RATE,
1088 (BROADCAST_STORM_VALUE *
1089 BROADCAST_STORM_PROT_RATE) / 100);
1091 for (i = 0; i < VLAN_TABLE_ENTRIES; i++)
1092 ksz8795_r_vlan_entries(dev, i);
1094 /* Setup STP address for STP operation. */
1095 memset(&alu, 0, sizeof(alu));
1096 ether_addr_copy(alu.mac, eth_stp_addr);
1097 alu.is_static = true;
1098 alu.is_override = true;
1099 alu.port_forward = dev->host_mask;
1101 ksz8795_w_sta_mac_table(dev, 0, &alu);
1103 ksz_init_mib_timer(dev);
1108 static const struct dsa_switch_ops ksz8795_switch_ops = {
1109 .get_tag_protocol = ksz8795_get_tag_protocol,
1110 .setup = ksz8795_setup,
1111 .phy_read = ksz_phy_read16,
1112 .phy_write = ksz_phy_write16,
1113 .adjust_link = ksz_adjust_link,
1114 .port_enable = ksz_enable_port,
1115 .port_disable = ksz_disable_port,
1116 .get_strings = ksz8795_get_strings,
1117 .get_ethtool_stats = ksz_get_ethtool_stats,
1118 .get_sset_count = ksz_sset_count,
1119 .port_bridge_join = ksz_port_bridge_join,
1120 .port_bridge_leave = ksz_port_bridge_leave,
1121 .port_stp_state_set = ksz8795_port_stp_state_set,
1122 .port_fast_age = ksz_port_fast_age,
1123 .port_vlan_filtering = ksz8795_port_vlan_filtering,
1124 .port_vlan_prepare = ksz_port_vlan_prepare,
1125 .port_vlan_add = ksz8795_port_vlan_add,
1126 .port_vlan_del = ksz8795_port_vlan_del,
1127 .port_fdb_dump = ksz_port_fdb_dump,
1128 .port_mdb_prepare = ksz_port_mdb_prepare,
1129 .port_mdb_add = ksz_port_mdb_add,
1130 .port_mdb_del = ksz_port_mdb_del,
1131 .port_mirror_add = ksz8795_port_mirror_add,
1132 .port_mirror_del = ksz8795_port_mirror_del,
1135 static u32 ksz8795_get_port_addr(int port, int offset)
1137 return PORT_CTRL_ADDR(port, offset);
1140 static int ksz8795_switch_detect(struct ksz_device *dev)
1147 ret = ksz_read16(dev, REG_CHIP_ID0, &id16);
1152 id2 = id16 & SW_CHIP_ID_M;
1153 if (id1 != FAMILY_ID ||
1154 (id2 != CHIP_ID_94 && id2 != CHIP_ID_95))
1157 dev->mib_port_cnt = TOTAL_PORT_NUM;
1158 dev->phy_port_cnt = SWITCH_PORT_NUM;
1159 dev->port_cnt = SWITCH_PORT_NUM;
1161 if (id2 == CHIP_ID_95) {
1165 ksz_read8(dev, REG_PORT_1_STATUS_0, &val);
1166 if (val & PORT_FIBER_MODE)
1168 } else if (id2 == CHIP_ID_94) {
1170 dev->last_port = dev->port_cnt;
1175 dev->chip_id = id16;
1177 dev->cpu_port = dev->mib_port_cnt - 1;
1178 dev->host_mask = BIT(dev->cpu_port);
1183 struct ksz_chip_data {
1185 const char *dev_name;
1193 static const struct ksz_chip_data ksz8795_switch_chips[] = {
1196 .dev_name = "KSZ8795",
1200 .cpu_ports = 0x10, /* can be configured as cpu port */
1201 .port_cnt = 4, /* total physical port count */
1205 .dev_name = "KSZ8794",
1209 .cpu_ports = 0x10, /* can be configured as cpu port */
1210 .port_cnt = 3, /* total physical port count */
1214 .dev_name = "KSZ8765",
1218 .cpu_ports = 0x10, /* can be configured as cpu port */
1219 .port_cnt = 4, /* total physical port count */
1223 static int ksz8795_switch_init(struct ksz_device *dev)
1227 mutex_init(&dev->stats_mutex);
1228 mutex_init(&dev->alu_mutex);
1229 mutex_init(&dev->vlan_mutex);
1231 dev->ds->ops = &ksz8795_switch_ops;
1233 for (i = 0; i < ARRAY_SIZE(ksz8795_switch_chips); i++) {
1234 const struct ksz_chip_data *chip = &ksz8795_switch_chips[i];
1236 if (dev->chip_id == chip->chip_id) {
1237 dev->name = chip->dev_name;
1238 dev->num_vlans = chip->num_vlans;
1239 dev->num_alus = chip->num_alus;
1240 dev->num_statics = chip->num_statics;
1241 dev->port_cnt = chip->port_cnt;
1242 dev->cpu_ports = chip->cpu_ports;
1248 /* no switch found */
1249 if (!dev->cpu_ports)
1252 dev->port_mask = BIT(dev->port_cnt) - 1;
1253 dev->port_mask |= dev->host_mask;
1255 dev->reg_mib_cnt = SWITCH_COUNTER_NUM;
1256 dev->mib_cnt = TOTAL_SWITCH_COUNTER_NUM;
1258 i = dev->mib_port_cnt;
1259 dev->ports = devm_kzalloc(dev->dev, sizeof(struct ksz_port) * i,
1263 for (i = 0; i < dev->mib_port_cnt; i++) {
1264 mutex_init(&dev->ports[i].mib.cnt_mutex);
1265 dev->ports[i].mib.counters =
1266 devm_kzalloc(dev->dev,
1268 (TOTAL_SWITCH_COUNTER_NUM + 1),
1270 if (!dev->ports[i].mib.counters)
1277 static void ksz8795_switch_exit(struct ksz_device *dev)
1279 ksz8795_reset_switch(dev);
1282 static const struct ksz_dev_ops ksz8795_dev_ops = {
1283 .get_port_addr = ksz8795_get_port_addr,
1284 .cfg_port_member = ksz8795_cfg_port_member,
1285 .flush_dyn_mac_table = ksz8795_flush_dyn_mac_table,
1286 .port_setup = ksz8795_port_setup,
1287 .r_phy = ksz8795_r_phy,
1288 .w_phy = ksz8795_w_phy,
1289 .r_dyn_mac_table = ksz8795_r_dyn_mac_table,
1290 .r_sta_mac_table = ksz8795_r_sta_mac_table,
1291 .w_sta_mac_table = ksz8795_w_sta_mac_table,
1292 .r_mib_cnt = ksz8795_r_mib_cnt,
1293 .r_mib_pkt = ksz8795_r_mib_pkt,
1294 .freeze_mib = ksz8795_freeze_mib,
1295 .port_init_cnt = ksz8795_port_init_cnt,
1296 .shutdown = ksz8795_reset_switch,
1297 .detect = ksz8795_switch_detect,
1298 .init = ksz8795_switch_init,
1299 .exit = ksz8795_switch_exit,
1302 int ksz8795_switch_register(struct ksz_device *dev)
1304 return ksz_switch_register(dev, &ksz8795_dev_ops);
1306 EXPORT_SYMBOL(ksz8795_switch_register);
1308 MODULE_AUTHOR("Tristram Ha <Tristram.Ha@microchip.com>");
1309 MODULE_DESCRIPTION("Microchip KSZ8795 Series Switch DSA Driver");
1310 MODULE_LICENSE("GPL");