1 // SPDX-License-Identifier: GPL-2.0-only
2 /* CAN bus driver for Microchip 251x/25625 CAN Controller with SPI Interface
4 * MCP2510 support and bug fixes by Christian Pellegrin
5 * <chripell@evolware.org>
7 * Copyright 2009 Christian Pellegrin EVOL S.r.l.
9 * Copyright 2007 Raymarine UK, Ltd. All Rights Reserved.
10 * Written under contract by:
11 * Chris Elston, Katalix Systems, Ltd.
13 * Based on Microchip MCP251x CAN controller driver written by
14 * David Vrabel, Copyright 2006 Arcom Control Systems Ltd.
16 * Based on CAN bus driver for the CCAN controller written by
17 * - Sascha Hauer, Marc Kleine-Budde, Pengutronix
18 * - Simon Kallweit, intefo AG
21 * Your platform definition file should specify something like:
23 * static struct mcp251x_platform_data mcp251x_info = {
24 * .oscillator_frequency = 8000000,
27 * static struct spi_board_info spi_board_info[] = {
29 * .modalias = "mcp2510",
30 * // "mcp2515" or "mcp25625" depending on your controller
31 * .platform_data = &mcp251x_info,
33 * .max_speed_hz = 2*1000*1000,
38 * Please see mcp251x.h for a description of the fields in
39 * struct mcp251x_platform_data.
42 #include <linux/can/core.h>
43 #include <linux/can/dev.h>
44 #include <linux/can/led.h>
45 #include <linux/can/platform/mcp251x.h>
46 #include <linux/clk.h>
47 #include <linux/completion.h>
48 #include <linux/delay.h>
49 #include <linux/device.h>
50 #include <linux/freezer.h>
51 #include <linux/interrupt.h>
53 #include <linux/kernel.h>
54 #include <linux/module.h>
55 #include <linux/netdevice.h>
57 #include <linux/of_device.h>
58 #include <linux/platform_device.h>
59 #include <linux/slab.h>
60 #include <linux/spi/spi.h>
61 #include <linux/uaccess.h>
62 #include <linux/regulator/consumer.h>
64 /* SPI interface instruction set */
65 #define INSTRUCTION_WRITE 0x02
66 #define INSTRUCTION_READ 0x03
67 #define INSTRUCTION_BIT_MODIFY 0x05
68 #define INSTRUCTION_LOAD_TXB(n) (0x40 + 2 * (n))
69 #define INSTRUCTION_READ_RXB(n) (((n) == 0) ? 0x90 : 0x94)
70 #define INSTRUCTION_RESET 0xC0
74 #define INSTRUCTION_RTS(n) (0x80 | ((n) & 0x07))
76 /* MPC251x registers */
79 # define CANCTRL_REQOP_MASK 0xe0
80 # define CANCTRL_REQOP_CONF 0x80
81 # define CANCTRL_REQOP_LISTEN_ONLY 0x60
82 # define CANCTRL_REQOP_LOOPBACK 0x40
83 # define CANCTRL_REQOP_SLEEP 0x20
84 # define CANCTRL_REQOP_NORMAL 0x00
85 # define CANCTRL_OSM 0x08
86 # define CANCTRL_ABAT 0x10
90 # define CNF1_SJW_SHIFT 6
92 # define CNF2_BTLMODE 0x80
93 # define CNF2_SAM 0x40
94 # define CNF2_PS1_SHIFT 3
96 # define CNF3_SOF 0x08
97 # define CNF3_WAKFIL 0x04
98 # define CNF3_PHSEG2_MASK 0x07
100 # define CANINTE_MERRE 0x80
101 # define CANINTE_WAKIE 0x40
102 # define CANINTE_ERRIE 0x20
103 # define CANINTE_TX2IE 0x10
104 # define CANINTE_TX1IE 0x08
105 # define CANINTE_TX0IE 0x04
106 # define CANINTE_RX1IE 0x02
107 # define CANINTE_RX0IE 0x01
109 # define CANINTF_MERRF 0x80
110 # define CANINTF_WAKIF 0x40
111 # define CANINTF_ERRIF 0x20
112 # define CANINTF_TX2IF 0x10
113 # define CANINTF_TX1IF 0x08
114 # define CANINTF_TX0IF 0x04
115 # define CANINTF_RX1IF 0x02
116 # define CANINTF_RX0IF 0x01
117 # define CANINTF_RX (CANINTF_RX0IF | CANINTF_RX1IF)
118 # define CANINTF_TX (CANINTF_TX2IF | CANINTF_TX1IF | CANINTF_TX0IF)
119 # define CANINTF_ERR (CANINTF_ERRIF)
121 # define EFLG_EWARN 0x01
122 # define EFLG_RXWAR 0x02
123 # define EFLG_TXWAR 0x04
124 # define EFLG_RXEP 0x08
125 # define EFLG_TXEP 0x10
126 # define EFLG_TXBO 0x20
127 # define EFLG_RX0OVR 0x40
128 # define EFLG_RX1OVR 0x80
129 #define TXBCTRL(n) (((n) * 0x10) + 0x30 + TXBCTRL_OFF)
130 # define TXBCTRL_ABTF 0x40
131 # define TXBCTRL_MLOA 0x20
132 # define TXBCTRL_TXERR 0x10
133 # define TXBCTRL_TXREQ 0x08
134 #define TXBSIDH(n) (((n) * 0x10) + 0x30 + TXBSIDH_OFF)
135 # define SIDH_SHIFT 3
136 #define TXBSIDL(n) (((n) * 0x10) + 0x30 + TXBSIDL_OFF)
137 # define SIDL_SID_MASK 7
138 # define SIDL_SID_SHIFT 5
139 # define SIDL_EXIDE_SHIFT 3
140 # define SIDL_EID_SHIFT 16
141 # define SIDL_EID_MASK 3
142 #define TXBEID8(n) (((n) * 0x10) + 0x30 + TXBEID8_OFF)
143 #define TXBEID0(n) (((n) * 0x10) + 0x30 + TXBEID0_OFF)
144 #define TXBDLC(n) (((n) * 0x10) + 0x30 + TXBDLC_OFF)
145 # define DLC_RTR_SHIFT 6
146 #define TXBCTRL_OFF 0
147 #define TXBSIDH_OFF 1
148 #define TXBSIDL_OFF 2
149 #define TXBEID8_OFF 3
150 #define TXBEID0_OFF 4
153 #define RXBCTRL(n) (((n) * 0x10) + 0x60 + RXBCTRL_OFF)
154 # define RXBCTRL_BUKT 0x04
155 # define RXBCTRL_RXM0 0x20
156 # define RXBCTRL_RXM1 0x40
157 #define RXBSIDH(n) (((n) * 0x10) + 0x60 + RXBSIDH_OFF)
158 # define RXBSIDH_SHIFT 3
159 #define RXBSIDL(n) (((n) * 0x10) + 0x60 + RXBSIDL_OFF)
160 # define RXBSIDL_IDE 0x08
161 # define RXBSIDL_SRR 0x10
162 # define RXBSIDL_EID 3
163 # define RXBSIDL_SHIFT 5
164 #define RXBEID8(n) (((n) * 0x10) + 0x60 + RXBEID8_OFF)
165 #define RXBEID0(n) (((n) * 0x10) + 0x60 + RXBEID0_OFF)
166 #define RXBDLC(n) (((n) * 0x10) + 0x60 + RXBDLC_OFF)
167 # define RXBDLC_LEN_MASK 0x0f
168 # define RXBDLC_RTR 0x40
169 #define RXBCTRL_OFF 0
170 #define RXBSIDH_OFF 1
171 #define RXBSIDL_OFF 2
172 #define RXBEID8_OFF 3
173 #define RXBEID0_OFF 4
176 #define RXFSID(n) ((n < 3) ? 0 : 4)
177 #define RXFSIDH(n) ((n) * 4 + RXFSID(n))
178 #define RXFSIDL(n) ((n) * 4 + 1 + RXFSID(n))
179 #define RXFEID8(n) ((n) * 4 + 2 + RXFSID(n))
180 #define RXFEID0(n) ((n) * 4 + 3 + RXFSID(n))
181 #define RXMSIDH(n) ((n) * 4 + 0x20)
182 #define RXMSIDL(n) ((n) * 4 + 0x21)
183 #define RXMEID8(n) ((n) * 4 + 0x22)
184 #define RXMEID0(n) ((n) * 4 + 0x23)
186 #define GET_BYTE(val, byte) \
187 (((val) >> ((byte) * 8)) & 0xff)
188 #define SET_BYTE(val, byte) \
189 (((val) & 0xff) << ((byte) * 8))
191 /* Buffer size required for the largest SPI transfer (i.e., reading a
194 #define CAN_FRAME_MAX_DATA_LEN 8
195 #define SPI_TRANSFER_BUF_LEN (6 + CAN_FRAME_MAX_DATA_LEN)
196 #define CAN_FRAME_MAX_BITS 128
198 #define TX_ECHO_SKB_MAX 1
200 #define MCP251X_OST_DELAY_MS (5)
202 #define DEVICE_NAME "mcp251x"
204 static const struct can_bittiming_const mcp251x_bittiming_const = {
217 CAN_MCP251X_MCP2510 = 0x2510,
218 CAN_MCP251X_MCP2515 = 0x2515,
219 CAN_MCP251X_MCP25625 = 0x25625,
222 struct mcp251x_priv {
224 struct net_device *net;
225 struct spi_device *spi;
226 enum mcp251x_model model;
228 struct mutex mcp_lock; /* SPI device lock */
233 struct sk_buff *tx_skb;
236 struct workqueue_struct *wq;
237 struct work_struct tx_work;
238 struct work_struct restart_work;
242 #define AFTER_SUSPEND_UP 1
243 #define AFTER_SUSPEND_DOWN 2
244 #define AFTER_SUSPEND_POWER 4
245 #define AFTER_SUSPEND_RESTART 8
247 struct regulator *power;
248 struct regulator *transceiver;
252 #define MCP251X_IS(_model) \
253 static inline int mcp251x_is_##_model(struct spi_device *spi) \
255 struct mcp251x_priv *priv = spi_get_drvdata(spi); \
256 return priv->model == CAN_MCP251X_MCP##_model; \
261 static void mcp251x_clean(struct net_device *net)
263 struct mcp251x_priv *priv = netdev_priv(net);
265 if (priv->tx_skb || priv->tx_len)
266 net->stats.tx_errors++;
267 dev_kfree_skb(priv->tx_skb);
269 can_free_echo_skb(priv->net, 0);
274 /* Note about handling of error return of mcp251x_spi_trans: accessing
275 * registers via SPI is not really different conceptually than using
276 * normal I/O assembler instructions, although it's much more
277 * complicated from a practical POV. So it's not advisable to always
278 * check the return value of this function. Imagine that every
279 * read{b,l}, write{b,l} and friends would be bracketed in "if ( < 0)
280 * error();", it would be a great mess (well there are some situation
281 * when exception handling C++ like could be useful after all). So we
282 * just check that transfers are OK at the beginning of our
283 * conversation with the chip and to avoid doing really nasty things
284 * (like injecting bogus packets in the network stack).
286 static int mcp251x_spi_trans(struct spi_device *spi, int len)
288 struct mcp251x_priv *priv = spi_get_drvdata(spi);
289 struct spi_transfer t = {
290 .tx_buf = priv->spi_tx_buf,
291 .rx_buf = priv->spi_rx_buf,
295 struct spi_message m;
298 spi_message_init(&m);
299 spi_message_add_tail(&t, &m);
301 ret = spi_sync(spi, &m);
303 dev_err(&spi->dev, "spi transfer failed: ret = %d\n", ret);
307 static u8 mcp251x_read_reg(struct spi_device *spi, u8 reg)
309 struct mcp251x_priv *priv = spi_get_drvdata(spi);
312 priv->spi_tx_buf[0] = INSTRUCTION_READ;
313 priv->spi_tx_buf[1] = reg;
315 mcp251x_spi_trans(spi, 3);
316 val = priv->spi_rx_buf[2];
321 static void mcp251x_read_2regs(struct spi_device *spi, u8 reg, u8 *v1, u8 *v2)
323 struct mcp251x_priv *priv = spi_get_drvdata(spi);
325 priv->spi_tx_buf[0] = INSTRUCTION_READ;
326 priv->spi_tx_buf[1] = reg;
328 mcp251x_spi_trans(spi, 4);
330 *v1 = priv->spi_rx_buf[2];
331 *v2 = priv->spi_rx_buf[3];
334 static void mcp251x_write_reg(struct spi_device *spi, u8 reg, u8 val)
336 struct mcp251x_priv *priv = spi_get_drvdata(spi);
338 priv->spi_tx_buf[0] = INSTRUCTION_WRITE;
339 priv->spi_tx_buf[1] = reg;
340 priv->spi_tx_buf[2] = val;
342 mcp251x_spi_trans(spi, 3);
345 static void mcp251x_write_bits(struct spi_device *spi, u8 reg,
348 struct mcp251x_priv *priv = spi_get_drvdata(spi);
350 priv->spi_tx_buf[0] = INSTRUCTION_BIT_MODIFY;
351 priv->spi_tx_buf[1] = reg;
352 priv->spi_tx_buf[2] = mask;
353 priv->spi_tx_buf[3] = val;
355 mcp251x_spi_trans(spi, 4);
358 static void mcp251x_hw_tx_frame(struct spi_device *spi, u8 *buf,
359 int len, int tx_buf_idx)
361 struct mcp251x_priv *priv = spi_get_drvdata(spi);
363 if (mcp251x_is_2510(spi)) {
366 for (i = 1; i < TXBDAT_OFF + len; i++)
367 mcp251x_write_reg(spi, TXBCTRL(tx_buf_idx) + i,
370 memcpy(priv->spi_tx_buf, buf, TXBDAT_OFF + len);
371 mcp251x_spi_trans(spi, TXBDAT_OFF + len);
375 static void mcp251x_hw_tx(struct spi_device *spi, struct can_frame *frame,
378 struct mcp251x_priv *priv = spi_get_drvdata(spi);
379 u32 sid, eid, exide, rtr;
380 u8 buf[SPI_TRANSFER_BUF_LEN];
382 exide = (frame->can_id & CAN_EFF_FLAG) ? 1 : 0; /* Extended ID Enable */
384 sid = (frame->can_id & CAN_EFF_MASK) >> 18;
386 sid = frame->can_id & CAN_SFF_MASK; /* Standard ID */
387 eid = frame->can_id & CAN_EFF_MASK; /* Extended ID */
388 rtr = (frame->can_id & CAN_RTR_FLAG) ? 1 : 0; /* Remote transmission */
390 buf[TXBCTRL_OFF] = INSTRUCTION_LOAD_TXB(tx_buf_idx);
391 buf[TXBSIDH_OFF] = sid >> SIDH_SHIFT;
392 buf[TXBSIDL_OFF] = ((sid & SIDL_SID_MASK) << SIDL_SID_SHIFT) |
393 (exide << SIDL_EXIDE_SHIFT) |
394 ((eid >> SIDL_EID_SHIFT) & SIDL_EID_MASK);
395 buf[TXBEID8_OFF] = GET_BYTE(eid, 1);
396 buf[TXBEID0_OFF] = GET_BYTE(eid, 0);
397 buf[TXBDLC_OFF] = (rtr << DLC_RTR_SHIFT) | frame->can_dlc;
398 memcpy(buf + TXBDAT_OFF, frame->data, frame->can_dlc);
399 mcp251x_hw_tx_frame(spi, buf, frame->can_dlc, tx_buf_idx);
401 /* use INSTRUCTION_RTS, to avoid "repeated frame problem" */
402 priv->spi_tx_buf[0] = INSTRUCTION_RTS(1 << tx_buf_idx);
403 mcp251x_spi_trans(priv->spi, 1);
406 static void mcp251x_hw_rx_frame(struct spi_device *spi, u8 *buf,
409 struct mcp251x_priv *priv = spi_get_drvdata(spi);
411 if (mcp251x_is_2510(spi)) {
414 for (i = 1; i < RXBDAT_OFF; i++)
415 buf[i] = mcp251x_read_reg(spi, RXBCTRL(buf_idx) + i);
417 len = get_can_dlc(buf[RXBDLC_OFF] & RXBDLC_LEN_MASK);
418 for (; i < (RXBDAT_OFF + len); i++)
419 buf[i] = mcp251x_read_reg(spi, RXBCTRL(buf_idx) + i);
421 priv->spi_tx_buf[RXBCTRL_OFF] = INSTRUCTION_READ_RXB(buf_idx);
422 mcp251x_spi_trans(spi, SPI_TRANSFER_BUF_LEN);
423 memcpy(buf, priv->spi_rx_buf, SPI_TRANSFER_BUF_LEN);
427 static void mcp251x_hw_rx(struct spi_device *spi, int buf_idx)
429 struct mcp251x_priv *priv = spi_get_drvdata(spi);
431 struct can_frame *frame;
432 u8 buf[SPI_TRANSFER_BUF_LEN];
434 skb = alloc_can_skb(priv->net, &frame);
436 dev_err(&spi->dev, "cannot allocate RX skb\n");
437 priv->net->stats.rx_dropped++;
441 mcp251x_hw_rx_frame(spi, buf, buf_idx);
442 if (buf[RXBSIDL_OFF] & RXBSIDL_IDE) {
443 /* Extended ID format */
444 frame->can_id = CAN_EFF_FLAG;
446 /* Extended ID part */
447 SET_BYTE(buf[RXBSIDL_OFF] & RXBSIDL_EID, 2) |
448 SET_BYTE(buf[RXBEID8_OFF], 1) |
449 SET_BYTE(buf[RXBEID0_OFF], 0) |
450 /* Standard ID part */
451 (((buf[RXBSIDH_OFF] << RXBSIDH_SHIFT) |
452 (buf[RXBSIDL_OFF] >> RXBSIDL_SHIFT)) << 18);
453 /* Remote transmission request */
454 if (buf[RXBDLC_OFF] & RXBDLC_RTR)
455 frame->can_id |= CAN_RTR_FLAG;
457 /* Standard ID format */
459 (buf[RXBSIDH_OFF] << RXBSIDH_SHIFT) |
460 (buf[RXBSIDL_OFF] >> RXBSIDL_SHIFT);
461 if (buf[RXBSIDL_OFF] & RXBSIDL_SRR)
462 frame->can_id |= CAN_RTR_FLAG;
465 frame->can_dlc = get_can_dlc(buf[RXBDLC_OFF] & RXBDLC_LEN_MASK);
466 memcpy(frame->data, buf + RXBDAT_OFF, frame->can_dlc);
468 priv->net->stats.rx_packets++;
469 priv->net->stats.rx_bytes += frame->can_dlc;
471 can_led_event(priv->net, CAN_LED_EVENT_RX);
476 static void mcp251x_hw_sleep(struct spi_device *spi)
478 mcp251x_write_reg(spi, CANCTRL, CANCTRL_REQOP_SLEEP);
481 static netdev_tx_t mcp251x_hard_start_xmit(struct sk_buff *skb,
482 struct net_device *net)
484 struct mcp251x_priv *priv = netdev_priv(net);
485 struct spi_device *spi = priv->spi;
487 if (priv->tx_skb || priv->tx_len) {
488 dev_warn(&spi->dev, "hard_xmit called while tx busy\n");
489 return NETDEV_TX_BUSY;
492 if (can_dropped_invalid_skb(net, skb))
495 netif_stop_queue(net);
497 queue_work(priv->wq, &priv->tx_work);
502 static int mcp251x_do_set_mode(struct net_device *net, enum can_mode mode)
504 struct mcp251x_priv *priv = netdev_priv(net);
509 /* We have to delay work since SPI I/O may sleep */
510 priv->can.state = CAN_STATE_ERROR_ACTIVE;
511 priv->restart_tx = 1;
512 if (priv->can.restart_ms == 0)
513 priv->after_suspend = AFTER_SUSPEND_RESTART;
514 queue_work(priv->wq, &priv->restart_work);
523 static int mcp251x_set_normal_mode(struct spi_device *spi)
525 struct mcp251x_priv *priv = spi_get_drvdata(spi);
526 unsigned long timeout;
528 /* Enable interrupts */
529 mcp251x_write_reg(spi, CANINTE,
530 CANINTE_ERRIE | CANINTE_TX2IE | CANINTE_TX1IE |
531 CANINTE_TX0IE | CANINTE_RX1IE | CANINTE_RX0IE);
533 if (priv->can.ctrlmode & CAN_CTRLMODE_LOOPBACK) {
534 /* Put device into loopback mode */
535 mcp251x_write_reg(spi, CANCTRL, CANCTRL_REQOP_LOOPBACK);
536 } else if (priv->can.ctrlmode & CAN_CTRLMODE_LISTENONLY) {
537 /* Put device into listen-only mode */
538 mcp251x_write_reg(spi, CANCTRL, CANCTRL_REQOP_LISTEN_ONLY);
540 /* Put device into normal mode */
541 mcp251x_write_reg(spi, CANCTRL, CANCTRL_REQOP_NORMAL);
543 /* Wait for the device to enter normal mode */
544 timeout = jiffies + HZ;
545 while (mcp251x_read_reg(spi, CANSTAT) & CANCTRL_REQOP_MASK) {
547 if (time_after(jiffies, timeout)) {
548 dev_err(&spi->dev, "MCP251x didn't enter in normal mode\n");
553 priv->can.state = CAN_STATE_ERROR_ACTIVE;
557 static int mcp251x_do_set_bittiming(struct net_device *net)
559 struct mcp251x_priv *priv = netdev_priv(net);
560 struct can_bittiming *bt = &priv->can.bittiming;
561 struct spi_device *spi = priv->spi;
563 mcp251x_write_reg(spi, CNF1, ((bt->sjw - 1) << CNF1_SJW_SHIFT) |
565 mcp251x_write_reg(spi, CNF2, CNF2_BTLMODE |
566 (priv->can.ctrlmode & CAN_CTRLMODE_3_SAMPLES ?
568 ((bt->phase_seg1 - 1) << CNF2_PS1_SHIFT) |
570 mcp251x_write_bits(spi, CNF3, CNF3_PHSEG2_MASK,
571 (bt->phase_seg2 - 1));
572 dev_dbg(&spi->dev, "CNF: 0x%02x 0x%02x 0x%02x\n",
573 mcp251x_read_reg(spi, CNF1),
574 mcp251x_read_reg(spi, CNF2),
575 mcp251x_read_reg(spi, CNF3));
580 static int mcp251x_setup(struct net_device *net, struct spi_device *spi)
582 mcp251x_do_set_bittiming(net);
584 mcp251x_write_reg(spi, RXBCTRL(0),
585 RXBCTRL_BUKT | RXBCTRL_RXM0 | RXBCTRL_RXM1);
586 mcp251x_write_reg(spi, RXBCTRL(1),
587 RXBCTRL_RXM0 | RXBCTRL_RXM1);
591 static int mcp251x_hw_reset(struct spi_device *spi)
593 struct mcp251x_priv *priv = spi_get_drvdata(spi);
594 unsigned long timeout;
597 /* Wait for oscillator startup timer after power up */
598 mdelay(MCP251X_OST_DELAY_MS);
600 priv->spi_tx_buf[0] = INSTRUCTION_RESET;
601 ret = mcp251x_spi_trans(spi, 1);
605 /* Wait for oscillator startup timer after reset */
606 mdelay(MCP251X_OST_DELAY_MS);
608 /* Wait for reset to finish */
609 timeout = jiffies + HZ;
610 while ((mcp251x_read_reg(spi, CANSTAT) & CANCTRL_REQOP_MASK) !=
611 CANCTRL_REQOP_CONF) {
612 usleep_range(MCP251X_OST_DELAY_MS * 1000,
613 MCP251X_OST_DELAY_MS * 1000 * 2);
615 if (time_after(jiffies, timeout)) {
617 "MCP251x didn't enter in conf mode after reset\n");
624 static int mcp251x_hw_probe(struct spi_device *spi)
629 ret = mcp251x_hw_reset(spi);
633 ctrl = mcp251x_read_reg(spi, CANCTRL);
635 dev_dbg(&spi->dev, "CANCTRL 0x%02x\n", ctrl);
637 /* Check for power up default value */
638 if ((ctrl & 0x17) != 0x07)
644 static int mcp251x_power_enable(struct regulator *reg, int enable)
646 if (IS_ERR_OR_NULL(reg))
650 return regulator_enable(reg);
652 return regulator_disable(reg);
655 static int mcp251x_stop(struct net_device *net)
657 struct mcp251x_priv *priv = netdev_priv(net);
658 struct spi_device *spi = priv->spi;
662 priv->force_quit = 1;
663 free_irq(spi->irq, priv);
664 destroy_workqueue(priv->wq);
667 mutex_lock(&priv->mcp_lock);
669 /* Disable and clear pending interrupts */
670 mcp251x_write_reg(spi, CANINTE, 0x00);
671 mcp251x_write_reg(spi, CANINTF, 0x00);
673 mcp251x_write_reg(spi, TXBCTRL(0), 0);
676 mcp251x_hw_sleep(spi);
678 mcp251x_power_enable(priv->transceiver, 0);
680 priv->can.state = CAN_STATE_STOPPED;
682 mutex_unlock(&priv->mcp_lock);
684 can_led_event(net, CAN_LED_EVENT_STOP);
689 static void mcp251x_error_skb(struct net_device *net, int can_id, int data1)
692 struct can_frame *frame;
694 skb = alloc_can_err_skb(net, &frame);
696 frame->can_id |= can_id;
697 frame->data[1] = data1;
700 netdev_err(net, "cannot allocate error skb\n");
704 static void mcp251x_tx_work_handler(struct work_struct *ws)
706 struct mcp251x_priv *priv = container_of(ws, struct mcp251x_priv,
708 struct spi_device *spi = priv->spi;
709 struct net_device *net = priv->net;
710 struct can_frame *frame;
712 mutex_lock(&priv->mcp_lock);
714 if (priv->can.state == CAN_STATE_BUS_OFF) {
717 frame = (struct can_frame *)priv->tx_skb->data;
719 if (frame->can_dlc > CAN_FRAME_MAX_DATA_LEN)
720 frame->can_dlc = CAN_FRAME_MAX_DATA_LEN;
721 mcp251x_hw_tx(spi, frame, 0);
722 priv->tx_len = 1 + frame->can_dlc;
723 can_put_echo_skb(priv->tx_skb, net, 0);
727 mutex_unlock(&priv->mcp_lock);
730 static void mcp251x_restart_work_handler(struct work_struct *ws)
732 struct mcp251x_priv *priv = container_of(ws, struct mcp251x_priv,
734 struct spi_device *spi = priv->spi;
735 struct net_device *net = priv->net;
737 mutex_lock(&priv->mcp_lock);
738 if (priv->after_suspend) {
739 mcp251x_hw_reset(spi);
740 mcp251x_setup(net, spi);
741 if (priv->after_suspend & AFTER_SUSPEND_RESTART) {
742 mcp251x_set_normal_mode(spi);
743 } else if (priv->after_suspend & AFTER_SUSPEND_UP) {
744 netif_device_attach(net);
746 mcp251x_set_normal_mode(spi);
747 netif_wake_queue(net);
749 mcp251x_hw_sleep(spi);
751 priv->after_suspend = 0;
752 priv->force_quit = 0;
755 if (priv->restart_tx) {
756 priv->restart_tx = 0;
757 mcp251x_write_reg(spi, TXBCTRL(0), 0);
759 netif_wake_queue(net);
760 mcp251x_error_skb(net, CAN_ERR_RESTARTED, 0);
762 mutex_unlock(&priv->mcp_lock);
765 static irqreturn_t mcp251x_can_ist(int irq, void *dev_id)
767 struct mcp251x_priv *priv = dev_id;
768 struct spi_device *spi = priv->spi;
769 struct net_device *net = priv->net;
771 mutex_lock(&priv->mcp_lock);
772 while (!priv->force_quit) {
773 enum can_state new_state;
776 int can_id = 0, data1 = 0;
778 mcp251x_read_2regs(spi, CANINTF, &intf, &eflag);
780 /* mask out flags we don't care about */
781 intf &= CANINTF_RX | CANINTF_TX | CANINTF_ERR;
783 /* receive buffer 0 */
784 if (intf & CANINTF_RX0IF) {
785 mcp251x_hw_rx(spi, 0);
786 /* Free one buffer ASAP
787 * (The MCP2515/25625 does this automatically.)
789 if (mcp251x_is_2510(spi))
790 mcp251x_write_bits(spi, CANINTF,
791 CANINTF_RX0IF, 0x00);
794 /* receive buffer 1 */
795 if (intf & CANINTF_RX1IF) {
796 mcp251x_hw_rx(spi, 1);
797 /* The MCP2515/25625 does this automatically. */
798 if (mcp251x_is_2510(spi))
799 clear_intf |= CANINTF_RX1IF;
802 /* any error or tx interrupt we need to clear? */
803 if (intf & (CANINTF_ERR | CANINTF_TX))
804 clear_intf |= intf & (CANINTF_ERR | CANINTF_TX);
806 mcp251x_write_bits(spi, CANINTF, clear_intf, 0x00);
808 if (eflag & (EFLG_RX0OVR | EFLG_RX1OVR))
809 mcp251x_write_bits(spi, EFLG, eflag, 0x00);
811 /* Update can state */
812 if (eflag & EFLG_TXBO) {
813 new_state = CAN_STATE_BUS_OFF;
814 can_id |= CAN_ERR_BUSOFF;
815 } else if (eflag & EFLG_TXEP) {
816 new_state = CAN_STATE_ERROR_PASSIVE;
817 can_id |= CAN_ERR_CRTL;
818 data1 |= CAN_ERR_CRTL_TX_PASSIVE;
819 } else if (eflag & EFLG_RXEP) {
820 new_state = CAN_STATE_ERROR_PASSIVE;
821 can_id |= CAN_ERR_CRTL;
822 data1 |= CAN_ERR_CRTL_RX_PASSIVE;
823 } else if (eflag & EFLG_TXWAR) {
824 new_state = CAN_STATE_ERROR_WARNING;
825 can_id |= CAN_ERR_CRTL;
826 data1 |= CAN_ERR_CRTL_TX_WARNING;
827 } else if (eflag & EFLG_RXWAR) {
828 new_state = CAN_STATE_ERROR_WARNING;
829 can_id |= CAN_ERR_CRTL;
830 data1 |= CAN_ERR_CRTL_RX_WARNING;
832 new_state = CAN_STATE_ERROR_ACTIVE;
835 /* Update can state statistics */
836 switch (priv->can.state) {
837 case CAN_STATE_ERROR_ACTIVE:
838 if (new_state >= CAN_STATE_ERROR_WARNING &&
839 new_state <= CAN_STATE_BUS_OFF)
840 priv->can.can_stats.error_warning++;
842 case CAN_STATE_ERROR_WARNING:
843 if (new_state >= CAN_STATE_ERROR_PASSIVE &&
844 new_state <= CAN_STATE_BUS_OFF)
845 priv->can.can_stats.error_passive++;
850 priv->can.state = new_state;
852 if (intf & CANINTF_ERRIF) {
853 /* Handle overflow counters */
854 if (eflag & (EFLG_RX0OVR | EFLG_RX1OVR)) {
855 if (eflag & EFLG_RX0OVR) {
856 net->stats.rx_over_errors++;
857 net->stats.rx_errors++;
859 if (eflag & EFLG_RX1OVR) {
860 net->stats.rx_over_errors++;
861 net->stats.rx_errors++;
863 can_id |= CAN_ERR_CRTL;
864 data1 |= CAN_ERR_CRTL_RX_OVERFLOW;
866 mcp251x_error_skb(net, can_id, data1);
869 if (priv->can.state == CAN_STATE_BUS_OFF) {
870 if (priv->can.restart_ms == 0) {
871 priv->force_quit = 1;
872 priv->can.can_stats.bus_off++;
874 mcp251x_hw_sleep(spi);
882 if (intf & CANINTF_TX) {
883 net->stats.tx_packets++;
884 net->stats.tx_bytes += priv->tx_len - 1;
885 can_led_event(net, CAN_LED_EVENT_TX);
887 can_get_echo_skb(net, 0);
890 netif_wake_queue(net);
893 mutex_unlock(&priv->mcp_lock);
897 static int mcp251x_open(struct net_device *net)
899 struct mcp251x_priv *priv = netdev_priv(net);
900 struct spi_device *spi = priv->spi;
901 unsigned long flags = 0;
904 ret = open_candev(net);
906 dev_err(&spi->dev, "unable to set initial baudrate!\n");
910 mutex_lock(&priv->mcp_lock);
911 mcp251x_power_enable(priv->transceiver, 1);
913 priv->force_quit = 0;
917 if (!spi->dev.of_node)
918 flags = IRQF_TRIGGER_FALLING;
920 ret = request_threaded_irq(spi->irq, NULL, mcp251x_can_ist,
921 flags | IRQF_ONESHOT, dev_name(&spi->dev),
924 dev_err(&spi->dev, "failed to acquire irq %d\n", spi->irq);
928 priv->wq = alloc_workqueue("mcp251x_wq", WQ_FREEZABLE | WQ_MEM_RECLAIM,
934 INIT_WORK(&priv->tx_work, mcp251x_tx_work_handler);
935 INIT_WORK(&priv->restart_work, mcp251x_restart_work_handler);
937 ret = mcp251x_hw_reset(spi);
940 ret = mcp251x_setup(net, spi);
943 ret = mcp251x_set_normal_mode(spi);
947 can_led_event(net, CAN_LED_EVENT_OPEN);
949 netif_wake_queue(net);
950 mutex_unlock(&priv->mcp_lock);
955 destroy_workqueue(priv->wq);
957 free_irq(spi->irq, priv);
958 mcp251x_hw_sleep(spi);
960 mcp251x_power_enable(priv->transceiver, 0);
962 mutex_unlock(&priv->mcp_lock);
966 static const struct net_device_ops mcp251x_netdev_ops = {
967 .ndo_open = mcp251x_open,
968 .ndo_stop = mcp251x_stop,
969 .ndo_start_xmit = mcp251x_hard_start_xmit,
970 .ndo_change_mtu = can_change_mtu,
973 static const struct of_device_id mcp251x_of_match[] = {
975 .compatible = "microchip,mcp2510",
976 .data = (void *)CAN_MCP251X_MCP2510,
979 .compatible = "microchip,mcp2515",
980 .data = (void *)CAN_MCP251X_MCP2515,
983 .compatible = "microchip,mcp25625",
984 .data = (void *)CAN_MCP251X_MCP25625,
988 MODULE_DEVICE_TABLE(of, mcp251x_of_match);
990 static const struct spi_device_id mcp251x_id_table[] = {
993 .driver_data = (kernel_ulong_t)CAN_MCP251X_MCP2510,
997 .driver_data = (kernel_ulong_t)CAN_MCP251X_MCP2515,
1001 .driver_data = (kernel_ulong_t)CAN_MCP251X_MCP25625,
1005 MODULE_DEVICE_TABLE(spi, mcp251x_id_table);
1007 static int mcp251x_can_probe(struct spi_device *spi)
1009 const struct of_device_id *of_id = of_match_device(mcp251x_of_match,
1011 struct mcp251x_platform_data *pdata = dev_get_platdata(&spi->dev);
1012 struct net_device *net;
1013 struct mcp251x_priv *priv;
1017 clk = devm_clk_get(&spi->dev, NULL);
1020 freq = pdata->oscillator_frequency;
1022 return PTR_ERR(clk);
1024 freq = clk_get_rate(clk);
1028 if (freq < 1000000 || freq > 25000000)
1031 /* Allocate can/net device */
1032 net = alloc_candev(sizeof(struct mcp251x_priv), TX_ECHO_SKB_MAX);
1037 ret = clk_prepare_enable(clk);
1042 net->netdev_ops = &mcp251x_netdev_ops;
1043 net->flags |= IFF_ECHO;
1045 priv = netdev_priv(net);
1046 priv->can.bittiming_const = &mcp251x_bittiming_const;
1047 priv->can.do_set_mode = mcp251x_do_set_mode;
1048 priv->can.clock.freq = freq / 2;
1049 priv->can.ctrlmode_supported = CAN_CTRLMODE_3_SAMPLES |
1050 CAN_CTRLMODE_LOOPBACK | CAN_CTRLMODE_LISTENONLY;
1052 priv->model = (enum mcp251x_model)of_id->data;
1054 priv->model = spi_get_device_id(spi)->driver_data;
1058 spi_set_drvdata(spi, priv);
1060 /* Configure the SPI bus */
1061 spi->bits_per_word = 8;
1062 if (mcp251x_is_2510(spi))
1063 spi->max_speed_hz = spi->max_speed_hz ? : 5 * 1000 * 1000;
1065 spi->max_speed_hz = spi->max_speed_hz ? : 10 * 1000 * 1000;
1066 ret = spi_setup(spi);
1070 priv->power = devm_regulator_get_optional(&spi->dev, "vdd");
1071 priv->transceiver = devm_regulator_get_optional(&spi->dev, "xceiver");
1072 if ((PTR_ERR(priv->power) == -EPROBE_DEFER) ||
1073 (PTR_ERR(priv->transceiver) == -EPROBE_DEFER)) {
1074 ret = -EPROBE_DEFER;
1078 ret = mcp251x_power_enable(priv->power, 1);
1083 mutex_init(&priv->mcp_lock);
1085 priv->spi_tx_buf = devm_kzalloc(&spi->dev, SPI_TRANSFER_BUF_LEN,
1087 if (!priv->spi_tx_buf) {
1092 priv->spi_rx_buf = devm_kzalloc(&spi->dev, SPI_TRANSFER_BUF_LEN,
1094 if (!priv->spi_rx_buf) {
1099 SET_NETDEV_DEV(net, &spi->dev);
1101 /* Here is OK to not lock the MCP, no one knows about it yet */
1102 ret = mcp251x_hw_probe(spi);
1105 dev_err(&spi->dev, "Cannot initialize MCP%x. Wrong wiring?\n",
1110 mcp251x_hw_sleep(spi);
1112 ret = register_candev(net);
1116 devm_can_led_init(net);
1118 netdev_info(net, "MCP%x successfully initialized.\n", priv->model);
1122 mcp251x_power_enable(priv->power, 0);
1126 clk_disable_unprepare(clk);
1131 dev_err(&spi->dev, "Probe failed, err=%d\n", -ret);
1135 static int mcp251x_can_remove(struct spi_device *spi)
1137 struct mcp251x_priv *priv = spi_get_drvdata(spi);
1138 struct net_device *net = priv->net;
1140 unregister_candev(net);
1142 mcp251x_power_enable(priv->power, 0);
1144 if (!IS_ERR(priv->clk))
1145 clk_disable_unprepare(priv->clk);
1152 static int __maybe_unused mcp251x_can_suspend(struct device *dev)
1154 struct spi_device *spi = to_spi_device(dev);
1155 struct mcp251x_priv *priv = spi_get_drvdata(spi);
1156 struct net_device *net = priv->net;
1158 priv->force_quit = 1;
1159 disable_irq(spi->irq);
1160 /* Note: at this point neither IST nor workqueues are running.
1161 * open/stop cannot be called anyway so locking is not needed
1163 if (netif_running(net)) {
1164 netif_device_detach(net);
1166 mcp251x_hw_sleep(spi);
1167 mcp251x_power_enable(priv->transceiver, 0);
1168 priv->after_suspend = AFTER_SUSPEND_UP;
1170 priv->after_suspend = AFTER_SUSPEND_DOWN;
1173 if (!IS_ERR_OR_NULL(priv->power)) {
1174 regulator_disable(priv->power);
1175 priv->after_suspend |= AFTER_SUSPEND_POWER;
1181 static int __maybe_unused mcp251x_can_resume(struct device *dev)
1183 struct spi_device *spi = to_spi_device(dev);
1184 struct mcp251x_priv *priv = spi_get_drvdata(spi);
1186 if (priv->after_suspend & AFTER_SUSPEND_POWER)
1187 mcp251x_power_enable(priv->power, 1);
1189 if (priv->after_suspend & AFTER_SUSPEND_UP) {
1190 mcp251x_power_enable(priv->transceiver, 1);
1191 queue_work(priv->wq, &priv->restart_work);
1193 priv->after_suspend = 0;
1196 priv->force_quit = 0;
1197 enable_irq(spi->irq);
1201 static SIMPLE_DEV_PM_OPS(mcp251x_can_pm_ops, mcp251x_can_suspend,
1202 mcp251x_can_resume);
1204 static struct spi_driver mcp251x_can_driver = {
1206 .name = DEVICE_NAME,
1207 .of_match_table = mcp251x_of_match,
1208 .pm = &mcp251x_can_pm_ops,
1210 .id_table = mcp251x_id_table,
1211 .probe = mcp251x_can_probe,
1212 .remove = mcp251x_can_remove,
1214 module_spi_driver(mcp251x_can_driver);
1216 MODULE_AUTHOR("Chris Elston <celston@katalix.com>, "
1217 "Christian Pellegrin <chripell@evolware.org>");
1218 MODULE_DESCRIPTION("Microchip 251x/25625 CAN driver");
1219 MODULE_LICENSE("GPL v2");