1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2005, Intec Automation Inc.
4 * Copyright (C) 2014, Freescale Semiconductor, Inc.
7 #include <linux/mtd/spi-nor.h>
11 static const struct flash_info sst_parts[] = {
12 /* SST -- large erase sizes are "overlays", "sectors" are 4K */
13 { "sst25vf040b", INFO(0xbf258d, 0, 64 * 1024, 8,
14 SECT_4K | SST_WRITE | SPI_NOR_HAS_LOCK) },
15 { "sst25vf080b", INFO(0xbf258e, 0, 64 * 1024, 16,
16 SECT_4K | SST_WRITE | SPI_NOR_HAS_LOCK) },
17 { "sst25vf016b", INFO(0xbf2541, 0, 64 * 1024, 32,
18 SECT_4K | SST_WRITE | SPI_NOR_HAS_LOCK) },
19 { "sst25vf032b", INFO(0xbf254a, 0, 64 * 1024, 64,
20 SECT_4K | SST_WRITE | SPI_NOR_HAS_LOCK) },
21 { "sst25vf064c", INFO(0xbf254b, 0, 64 * 1024, 128,
22 SECT_4K | SPI_NOR_4BIT_BP | SPI_NOR_HAS_LOCK) },
23 { "sst25wf512", INFO(0xbf2501, 0, 64 * 1024, 1,
24 SECT_4K | SST_WRITE | SPI_NOR_HAS_LOCK) },
25 { "sst25wf010", INFO(0xbf2502, 0, 64 * 1024, 2,
26 SECT_4K | SST_WRITE | SPI_NOR_HAS_LOCK) },
27 { "sst25wf020", INFO(0xbf2503, 0, 64 * 1024, 4,
28 SECT_4K | SST_WRITE | SPI_NOR_HAS_LOCK) },
29 { "sst25wf020a", INFO(0x621612, 0, 64 * 1024, 4, SECT_4K | SPI_NOR_HAS_LOCK) },
30 { "sst25wf040b", INFO(0x621613, 0, 64 * 1024, 8, SECT_4K | SPI_NOR_HAS_LOCK) },
31 { "sst25wf040", INFO(0xbf2504, 0, 64 * 1024, 8,
32 SECT_4K | SST_WRITE | SPI_NOR_HAS_LOCK) },
33 { "sst25wf080", INFO(0xbf2505, 0, 64 * 1024, 16,
34 SECT_4K | SST_WRITE | SPI_NOR_HAS_LOCK) },
35 { "sst26wf016b", INFO(0xbf2651, 0, 64 * 1024, 32,
36 SECT_4K | SPI_NOR_DUAL_READ |
38 { "sst26vf016b", INFO(0xbf2641, 0, 64 * 1024, 32,
39 SECT_4K | SPI_NOR_DUAL_READ) },
40 { "sst26vf064b", INFO(0xbf2643, 0, 64 * 1024, 128,
41 SECT_4K | SPI_NOR_DUAL_READ |
45 static int sst_write(struct mtd_info *mtd, loff_t to, size_t len,
46 size_t *retlen, const u_char *buf)
48 struct spi_nor *nor = mtd_to_spi_nor(mtd);
52 dev_dbg(nor->dev, "to 0x%08x, len %zd\n", (u32)to, len);
54 ret = spi_nor_lock_and_prep(nor);
58 ret = spi_nor_write_enable(nor);
62 nor->sst_write_second = false;
64 /* Start write from odd address. */
66 nor->program_opcode = SPINOR_OP_BP;
69 ret = spi_nor_write_data(nor, to, 1, buf);
72 WARN(ret != 1, "While writing 1 byte written %i bytes\n", ret);
73 ret = spi_nor_wait_till_ready(nor);
81 /* Write out most of the data here. */
82 for (; actual < len - 1; actual += 2) {
83 nor->program_opcode = SPINOR_OP_AAI_WP;
85 /* write two bytes. */
86 ret = spi_nor_write_data(nor, to, 2, buf + actual);
89 WARN(ret != 2, "While writing 2 bytes written %i bytes\n", ret);
90 ret = spi_nor_wait_till_ready(nor);
94 nor->sst_write_second = true;
96 nor->sst_write_second = false;
98 ret = spi_nor_write_disable(nor);
102 ret = spi_nor_wait_till_ready(nor);
106 /* Write out trailing byte if it exists. */
108 ret = spi_nor_write_enable(nor);
112 nor->program_opcode = SPINOR_OP_BP;
113 ret = spi_nor_write_data(nor, to, 1, buf + actual);
116 WARN(ret != 1, "While writing 1 byte written %i bytes\n", ret);
117 ret = spi_nor_wait_till_ready(nor);
123 ret = spi_nor_write_disable(nor);
127 spi_nor_unlock_and_unprep(nor);
131 static void sst_post_sfdp_fixups(struct spi_nor *nor)
133 if (nor->info->flags & SST_WRITE)
134 nor->mtd._write = sst_write;
137 static const struct spi_nor_fixups sst_fixups = {
138 .post_sfdp = sst_post_sfdp_fixups,
141 const struct spi_nor_manufacturer spi_nor_sst = {
144 .nparts = ARRAY_SIZE(sst_parts),
145 .fixups = &sst_fixups,