1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (C) 2005, Intec Automation Inc.
4 * Copyright (C) 2014, Freescale Semiconductor, Inc.
7 #ifndef __LINUX_MTD_SPI_NOR_INTERNAL_H
8 #define __LINUX_MTD_SPI_NOR_INTERNAL_H
12 #define SPI_NOR_MAX_ID_LEN 6
14 enum spi_nor_option_flags {
15 SNOR_F_USE_FSR = BIT(0),
16 SNOR_F_HAS_SR_TB = BIT(1),
17 SNOR_F_NO_OP_CHIP_ERASE = BIT(2),
18 SNOR_F_READY_XSR_RDY = BIT(3),
19 SNOR_F_USE_CLSR = BIT(4),
20 SNOR_F_BROKEN_RESET = BIT(5),
21 SNOR_F_4B_OPCODES = BIT(6),
22 SNOR_F_HAS_4BAIT = BIT(7),
23 SNOR_F_HAS_LOCK = BIT(8),
24 SNOR_F_HAS_16BIT_SR = BIT(9),
25 SNOR_F_NO_READ_CR = BIT(10),
26 SNOR_F_HAS_SR_TB_BIT6 = BIT(11),
27 SNOR_F_HAS_4BIT_BP = BIT(12),
28 SNOR_F_HAS_SR_BP3_BIT6 = BIT(13),
29 SNOR_F_IO_MODE_EN_VOLATILE = BIT(14),
30 SNOR_F_SOFT_RESET = BIT(15),
33 struct spi_nor_read_command {
37 enum spi_nor_protocol proto;
40 struct spi_nor_pp_command {
42 enum spi_nor_protocol proto;
45 enum spi_nor_read_command_index {
48 SNOR_CMD_READ_1_1_1_DTR,
54 SNOR_CMD_READ_1_2_2_DTR,
60 SNOR_CMD_READ_1_4_4_DTR,
66 SNOR_CMD_READ_1_8_8_DTR,
67 SNOR_CMD_READ_8_8_8_DTR,
72 enum spi_nor_pp_command_index {
84 SNOR_CMD_PP_8_8_8_DTR,
90 * struct spi_nor_erase_type - Structure to describe a SPI NOR erase type
91 * @size: the size of the sector/block erased by the erase type.
92 * JEDEC JESD216B imposes erase sizes to be a power of 2.
93 * @size_shift: @size is a power of 2, the shift is stored in
95 * @size_mask: the size mask based on @size_shift.
96 * @opcode: the SPI command op code to erase the sector/block.
97 * @idx: Erase Type index as sorted in the Basic Flash Parameter
98 * Table. It will be used to synchronize the supported
99 * Erase Types with the ones identified in the SFDP
102 struct spi_nor_erase_type {
111 * struct spi_nor_erase_command - Used for non-uniform erases
112 * The structure is used to describe a list of erase commands to be executed
113 * once we validate that the erase can be performed. The elements in the list
114 * are run-length encoded.
115 * @list: for inclusion into the list of erase commands.
116 * @count: how many times the same erase command should be
117 * consecutively used.
118 * @size: the size of the sector/block erased by the command.
119 * @opcode: the SPI command op code to erase the sector/block.
121 struct spi_nor_erase_command {
122 struct list_head list;
129 * struct spi_nor_erase_region - Structure to describe a SPI NOR erase region
130 * @offset: the offset in the data array of erase region start.
131 * LSB bits are used as a bitmask encoding flags to
132 * determine if this region is overlaid, if this region is
133 * the last in the SPI NOR flash memory and to indicate
134 * all the supported erase commands inside this region.
135 * The erase types are sorted in ascending order with the
136 * smallest Erase Type size being at BIT(0).
137 * @size: the size of the region in bytes.
139 struct spi_nor_erase_region {
144 #define SNOR_ERASE_TYPE_MAX 4
145 #define SNOR_ERASE_TYPE_MASK GENMASK_ULL(SNOR_ERASE_TYPE_MAX - 1, 0)
147 #define SNOR_LAST_REGION BIT(4)
148 #define SNOR_OVERLAID_REGION BIT(5)
150 #define SNOR_ERASE_FLAGS_MAX 6
151 #define SNOR_ERASE_FLAGS_MASK GENMASK_ULL(SNOR_ERASE_FLAGS_MAX - 1, 0)
154 * struct spi_nor_erase_map - Structure to describe the SPI NOR erase map
155 * @regions: array of erase regions. The regions are consecutive in
156 * address space. Walking through the regions is done
158 * @uniform_region: a pre-allocated erase region for SPI NOR with a uniform
159 * sector size (legacy implementation).
160 * @erase_type: an array of erase types shared by all the regions.
161 * The erase types are sorted in ascending order, with the
162 * smallest Erase Type size being the first member in the
164 * @uniform_erase_type: bitmask encoding erase types that can erase the
165 * entire memory. This member is completed at init by
166 * uniform and non-uniform SPI NOR flash memories if they
167 * support at least one erase type that can erase the
170 struct spi_nor_erase_map {
171 struct spi_nor_erase_region *regions;
172 struct spi_nor_erase_region uniform_region;
173 struct spi_nor_erase_type erase_type[SNOR_ERASE_TYPE_MAX];
174 u8 uniform_erase_type;
178 * struct spi_nor_locking_ops - SPI NOR locking methods
179 * @lock: lock a region of the SPI NOR.
180 * @unlock: unlock a region of the SPI NOR.
181 * @is_locked: check if a region of the SPI NOR is completely locked
183 struct spi_nor_locking_ops {
184 int (*lock)(struct spi_nor *nor, loff_t ofs, uint64_t len);
185 int (*unlock)(struct spi_nor *nor, loff_t ofs, uint64_t len);
186 int (*is_locked)(struct spi_nor *nor, loff_t ofs, uint64_t len);
190 * struct spi_nor_flash_parameter - SPI NOR flash parameters and settings.
191 * Includes legacy flash parameters and settings that can be overwritten
192 * by the spi_nor_fixups hooks, or dynamically when parsing the JESD216
193 * Serial Flash Discoverable Parameters (SFDP) tables.
195 * @size: the flash memory density in bytes.
196 * @writesize Minimal writable flash unit size. Defaults to 1. Set to
197 * ECC unit size for ECC-ed flashes.
198 * @page_size: the page size of the SPI NOR flash memory.
199 * @rdsr_dummy: dummy cycles needed for Read Status Register command.
200 * @rdsr_addr_nbytes: dummy address bytes needed for Read Status Register
202 * @hwcaps: describes the read and page program hardware
204 * @reads: read capabilities ordered by priority: the higher index
205 * in the array, the higher priority.
206 * @page_programs: page program capabilities ordered by priority: the
207 * higher index in the array, the higher priority.
208 * @erase_map: the erase map parsed from the SFDP Sector Map Parameter
210 * @octal_dtr_enable: enables SPI NOR octal DTR mode.
211 * @quad_enable: enables SPI NOR quad mode.
212 * @set_4byte_addr_mode: puts the SPI NOR in 4 byte addressing mode.
213 * @convert_addr: converts an absolute address into something the flash
214 * will understand. Particularly useful when pagesize is
216 * @setup: configures the SPI NOR memory. Useful for SPI NOR
217 * flashes that have peculiarities to the SPI NOR standard
218 * e.g. different opcodes, specific address calculation,
220 * @locking_ops: SPI NOR locking methods.
222 struct spi_nor_flash_parameter {
229 struct spi_nor_hwcaps hwcaps;
230 struct spi_nor_read_command reads[SNOR_CMD_READ_MAX];
231 struct spi_nor_pp_command page_programs[SNOR_CMD_PP_MAX];
233 struct spi_nor_erase_map erase_map;
235 int (*octal_dtr_enable)(struct spi_nor *nor, bool enable);
236 int (*quad_enable)(struct spi_nor *nor);
237 int (*set_4byte_addr_mode)(struct spi_nor *nor, bool enable);
238 u32 (*convert_addr)(struct spi_nor *nor, u32 addr);
239 int (*setup)(struct spi_nor *nor, const struct spi_nor_hwcaps *hwcaps);
241 const struct spi_nor_locking_ops *locking_ops;
245 * struct spi_nor_fixups - SPI NOR fixup hooks
246 * @default_init: called after default flash parameters init. Used to tweak
247 * flash parameters when information provided by the flash_info
248 * table is incomplete or wrong.
249 * @post_bfpt: called after the BFPT table has been parsed
250 * @post_sfdp: called after SFDP has been parsed (is also called for SPI NORs
251 * that do not support RDSFDP). Typically used to tweak various
252 * parameters that could not be extracted by other means (i.e.
253 * when information provided by the SFDP/flash_info tables are
254 * incomplete or wrong).
256 * Those hooks can be used to tweak the SPI NOR configuration when the SFDP
257 * table is broken or not available.
259 struct spi_nor_fixups {
260 void (*default_init)(struct spi_nor *nor);
261 int (*post_bfpt)(struct spi_nor *nor,
262 const struct sfdp_parameter_header *bfpt_header,
263 const struct sfdp_bfpt *bfpt,
264 struct spi_nor_flash_parameter *params);
265 void (*post_sfdp)(struct spi_nor *nor);
272 * This array stores the ID bytes.
273 * The first three bytes are the JEDIC ID.
274 * JEDEC ID zero means "no ID" (mostly older chips).
276 u8 id[SPI_NOR_MAX_ID_LEN];
279 /* The size listed here is what works with SPINOR_OP_SE, which isn't
280 * necessarily called a "sector" by the vendor.
282 unsigned sector_size;
289 #define SECT_4K BIT(0) /* SPINOR_OP_BE_4K works uniformly */
290 #define SPI_NOR_NO_ERASE BIT(1) /* No erase command needed */
291 #define SST_WRITE BIT(2) /* use SST byte programming */
292 #define SPI_NOR_NO_FR BIT(3) /* Can't do fastread */
293 #define SECT_4K_PMC BIT(4) /* SPINOR_OP_BE_4K_PMC works uniformly */
294 #define SPI_NOR_DUAL_READ BIT(5) /* Flash supports Dual Read */
295 #define SPI_NOR_QUAD_READ BIT(6) /* Flash supports Quad Read */
296 #define USE_FSR BIT(7) /* use flag status register */
297 #define SPI_NOR_HAS_LOCK BIT(8) /* Flash supports lock/unlock via SR */
298 #define SPI_NOR_HAS_TB BIT(9) /*
299 * Flash SR has Top/Bottom (TB) protect
300 * bit. Must be used with
303 #define SPI_NOR_XSR_RDY BIT(10) /*
304 * S3AN flashes have specific opcode to
305 * read the status register.
307 #define SPI_NOR_4B_OPCODES BIT(11) /*
308 * Use dedicated 4byte address op codes
309 * to support memory size above 128Mib.
311 #define NO_CHIP_ERASE BIT(12) /* Chip does not support chip erase */
312 #define SPI_NOR_SKIP_SFDP BIT(13) /* Skip parsing of SFDP tables */
313 #define USE_CLSR BIT(14) /* use CLSR command */
314 #define SPI_NOR_OCTAL_READ BIT(15) /* Flash supports Octal Read */
315 #define SPI_NOR_TB_SR_BIT6 BIT(16) /*
316 * Top/Bottom (TB) is bit 6 of
317 * status register. Must be used with
320 #define SPI_NOR_4BIT_BP BIT(17) /*
321 * Flash SR has 4 bit fields (BP0-3)
322 * for block protection.
324 #define SPI_NOR_BP3_SR_BIT6 BIT(18) /*
325 * BP3 is bit 6 of status register.
326 * Must be used with SPI_NOR_4BIT_BP.
328 #define SPI_NOR_OCTAL_DTR_READ BIT(19) /* Flash supports octal DTR Read. */
329 #define SPI_NOR_OCTAL_DTR_PP BIT(20) /* Flash supports Octal DTR Page Program */
330 #define SPI_NOR_IO_MODE_EN_VOLATILE BIT(21) /*
331 * Flash enables the best
332 * available I/O mode via a
336 /* Part specific fixup hooks. */
337 const struct spi_nor_fixups *fixups;
340 /* Used when the "_ext_id" is two bytes at most */
341 #define INFO(_jedec_id, _ext_id, _sector_size, _n_sectors, _flags) \
343 ((_jedec_id) >> 16) & 0xff, \
344 ((_jedec_id) >> 8) & 0xff, \
345 (_jedec_id) & 0xff, \
346 ((_ext_id) >> 8) & 0xff, \
349 .id_len = (!(_jedec_id) ? 0 : (3 + ((_ext_id) ? 2 : 0))), \
350 .sector_size = (_sector_size), \
351 .n_sectors = (_n_sectors), \
355 #define INFO6(_jedec_id, _ext_id, _sector_size, _n_sectors, _flags) \
357 ((_jedec_id) >> 16) & 0xff, \
358 ((_jedec_id) >> 8) & 0xff, \
359 (_jedec_id) & 0xff, \
360 ((_ext_id) >> 16) & 0xff, \
361 ((_ext_id) >> 8) & 0xff, \
365 .sector_size = (_sector_size), \
366 .n_sectors = (_n_sectors), \
370 #define CAT25_INFO(_sector_size, _n_sectors, _page_size, _addr_width, _flags) \
371 .sector_size = (_sector_size), \
372 .n_sectors = (_n_sectors), \
373 .page_size = (_page_size), \
374 .addr_width = (_addr_width), \
377 #define S3AN_INFO(_jedec_id, _n_sectors, _page_size) \
379 ((_jedec_id) >> 16) & 0xff, \
380 ((_jedec_id) >> 8) & 0xff, \
384 .sector_size = (8*_page_size), \
385 .n_sectors = (_n_sectors), \
386 .page_size = _page_size, \
388 .flags = SPI_NOR_NO_FR | SPI_NOR_XSR_RDY,
391 * struct spi_nor_manufacturer - SPI NOR manufacturer object
392 * @name: manufacturer name
393 * @parts: array of parts supported by this manufacturer
394 * @nparts: number of entries in the parts array
395 * @fixups: hooks called at various points in time during spi_nor_scan()
397 struct spi_nor_manufacturer {
399 const struct flash_info *parts;
401 const struct spi_nor_fixups *fixups;
404 /* Manufacturer drivers. */
405 extern const struct spi_nor_manufacturer spi_nor_atmel;
406 extern const struct spi_nor_manufacturer spi_nor_catalyst;
407 extern const struct spi_nor_manufacturer spi_nor_eon;
408 extern const struct spi_nor_manufacturer spi_nor_esmt;
409 extern const struct spi_nor_manufacturer spi_nor_everspin;
410 extern const struct spi_nor_manufacturer spi_nor_fujitsu;
411 extern const struct spi_nor_manufacturer spi_nor_gigadevice;
412 extern const struct spi_nor_manufacturer spi_nor_intel;
413 extern const struct spi_nor_manufacturer spi_nor_issi;
414 extern const struct spi_nor_manufacturer spi_nor_macronix;
415 extern const struct spi_nor_manufacturer spi_nor_micron;
416 extern const struct spi_nor_manufacturer spi_nor_st;
417 extern const struct spi_nor_manufacturer spi_nor_spansion;
418 extern const struct spi_nor_manufacturer spi_nor_sst;
419 extern const struct spi_nor_manufacturer spi_nor_winbond;
420 extern const struct spi_nor_manufacturer spi_nor_xilinx;
421 extern const struct spi_nor_manufacturer spi_nor_xmc;
423 void spi_nor_spimem_setup_op(const struct spi_nor *nor,
424 struct spi_mem_op *op,
425 const enum spi_nor_protocol proto);
426 int spi_nor_write_enable(struct spi_nor *nor);
427 int spi_nor_write_disable(struct spi_nor *nor);
428 int spi_nor_set_4byte_addr_mode(struct spi_nor *nor, bool enable);
429 int spi_nor_write_ear(struct spi_nor *nor, u8 ear);
430 int spi_nor_wait_till_ready(struct spi_nor *nor);
431 int spi_nor_lock_and_prep(struct spi_nor *nor);
432 void spi_nor_unlock_and_unprep(struct spi_nor *nor);
433 int spi_nor_sr1_bit6_quad_enable(struct spi_nor *nor);
434 int spi_nor_sr2_bit1_quad_enable(struct spi_nor *nor);
435 int spi_nor_sr2_bit7_quad_enable(struct spi_nor *nor);
436 int spi_nor_write_sr_and_check(struct spi_nor *nor, u8 sr1);
438 int spi_nor_xread_sr(struct spi_nor *nor, u8 *sr);
439 ssize_t spi_nor_read_data(struct spi_nor *nor, loff_t from, size_t len,
441 ssize_t spi_nor_write_data(struct spi_nor *nor, loff_t to, size_t len,
444 int spi_nor_hwcaps_read2cmd(u32 hwcaps);
445 u8 spi_nor_convert_3to4_read(u8 opcode);
446 void spi_nor_set_read_settings(struct spi_nor_read_command *read,
450 enum spi_nor_protocol proto);
451 void spi_nor_set_pp_settings(struct spi_nor_pp_command *pp, u8 opcode,
452 enum spi_nor_protocol proto);
454 void spi_nor_set_erase_type(struct spi_nor_erase_type *erase, u32 size,
456 struct spi_nor_erase_region *
457 spi_nor_region_next(struct spi_nor_erase_region *region);
458 void spi_nor_init_uniform_erase_map(struct spi_nor_erase_map *map,
459 u8 erase_mask, u64 flash_size);
461 int spi_nor_post_bfpt_fixups(struct spi_nor *nor,
462 const struct sfdp_parameter_header *bfpt_header,
463 const struct sfdp_bfpt *bfpt,
464 struct spi_nor_flash_parameter *params);
466 static struct spi_nor __maybe_unused *mtd_to_spi_nor(struct mtd_info *mtd)
471 #endif /* __LINUX_MTD_SPI_NOR_INTERNAL_H */