1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (C) 2005, Intec Automation Inc.
4 * Copyright (C) 2014, Freescale Semiconductor, Inc.
7 #ifndef __LINUX_MTD_SPI_NOR_INTERNAL_H
8 #define __LINUX_MTD_SPI_NOR_INTERNAL_H
12 #define SPI_NOR_MAX_ID_LEN 6
14 enum spi_nor_option_flags {
15 SNOR_F_USE_FSR = BIT(0),
16 SNOR_F_HAS_SR_TB = BIT(1),
17 SNOR_F_NO_OP_CHIP_ERASE = BIT(2),
18 SNOR_F_READY_XSR_RDY = BIT(3),
19 SNOR_F_USE_CLSR = BIT(4),
20 SNOR_F_BROKEN_RESET = BIT(5),
21 SNOR_F_4B_OPCODES = BIT(6),
22 SNOR_F_HAS_4BAIT = BIT(7),
23 SNOR_F_HAS_LOCK = BIT(8),
24 SNOR_F_HAS_16BIT_SR = BIT(9),
25 SNOR_F_NO_READ_CR = BIT(10),
26 SNOR_F_HAS_SR_TB_BIT6 = BIT(11),
27 SNOR_F_HAS_4BIT_BP = BIT(12),
28 SNOR_F_HAS_SR_BP3_BIT6 = BIT(13),
29 SNOR_F_IO_MODE_EN_VOLATILE = BIT(14),
30 SNOR_F_SOFT_RESET = BIT(15),
31 SNOR_F_SWP_IS_VOLATILE = BIT(16),
34 struct spi_nor_read_command {
38 enum spi_nor_protocol proto;
41 struct spi_nor_pp_command {
43 enum spi_nor_protocol proto;
46 enum spi_nor_read_command_index {
49 SNOR_CMD_READ_1_1_1_DTR,
55 SNOR_CMD_READ_1_2_2_DTR,
61 SNOR_CMD_READ_1_4_4_DTR,
67 SNOR_CMD_READ_1_8_8_DTR,
68 SNOR_CMD_READ_8_8_8_DTR,
73 enum spi_nor_pp_command_index {
85 SNOR_CMD_PP_8_8_8_DTR,
91 * struct spi_nor_erase_type - Structure to describe a SPI NOR erase type
92 * @size: the size of the sector/block erased by the erase type.
93 * JEDEC JESD216B imposes erase sizes to be a power of 2.
94 * @size_shift: @size is a power of 2, the shift is stored in
96 * @size_mask: the size mask based on @size_shift.
97 * @opcode: the SPI command op code to erase the sector/block.
98 * @idx: Erase Type index as sorted in the Basic Flash Parameter
99 * Table. It will be used to synchronize the supported
100 * Erase Types with the ones identified in the SFDP
103 struct spi_nor_erase_type {
112 * struct spi_nor_erase_command - Used for non-uniform erases
113 * The structure is used to describe a list of erase commands to be executed
114 * once we validate that the erase can be performed. The elements in the list
115 * are run-length encoded.
116 * @list: for inclusion into the list of erase commands.
117 * @count: how many times the same erase command should be
118 * consecutively used.
119 * @size: the size of the sector/block erased by the command.
120 * @opcode: the SPI command op code to erase the sector/block.
122 struct spi_nor_erase_command {
123 struct list_head list;
130 * struct spi_nor_erase_region - Structure to describe a SPI NOR erase region
131 * @offset: the offset in the data array of erase region start.
132 * LSB bits are used as a bitmask encoding flags to
133 * determine if this region is overlaid, if this region is
134 * the last in the SPI NOR flash memory and to indicate
135 * all the supported erase commands inside this region.
136 * The erase types are sorted in ascending order with the
137 * smallest Erase Type size being at BIT(0).
138 * @size: the size of the region in bytes.
140 struct spi_nor_erase_region {
145 #define SNOR_ERASE_TYPE_MAX 4
146 #define SNOR_ERASE_TYPE_MASK GENMASK_ULL(SNOR_ERASE_TYPE_MAX - 1, 0)
148 #define SNOR_LAST_REGION BIT(4)
149 #define SNOR_OVERLAID_REGION BIT(5)
151 #define SNOR_ERASE_FLAGS_MAX 6
152 #define SNOR_ERASE_FLAGS_MASK GENMASK_ULL(SNOR_ERASE_FLAGS_MAX - 1, 0)
155 * struct spi_nor_erase_map - Structure to describe the SPI NOR erase map
156 * @regions: array of erase regions. The regions are consecutive in
157 * address space. Walking through the regions is done
159 * @uniform_region: a pre-allocated erase region for SPI NOR with a uniform
160 * sector size (legacy implementation).
161 * @erase_type: an array of erase types shared by all the regions.
162 * The erase types are sorted in ascending order, with the
163 * smallest Erase Type size being the first member in the
165 * @uniform_erase_type: bitmask encoding erase types that can erase the
166 * entire memory. This member is completed at init by
167 * uniform and non-uniform SPI NOR flash memories if they
168 * support at least one erase type that can erase the
171 struct spi_nor_erase_map {
172 struct spi_nor_erase_region *regions;
173 struct spi_nor_erase_region uniform_region;
174 struct spi_nor_erase_type erase_type[SNOR_ERASE_TYPE_MAX];
175 u8 uniform_erase_type;
179 * struct spi_nor_locking_ops - SPI NOR locking methods
180 * @lock: lock a region of the SPI NOR.
181 * @unlock: unlock a region of the SPI NOR.
182 * @is_locked: check if a region of the SPI NOR is completely locked
184 struct spi_nor_locking_ops {
185 int (*lock)(struct spi_nor *nor, loff_t ofs, uint64_t len);
186 int (*unlock)(struct spi_nor *nor, loff_t ofs, uint64_t len);
187 int (*is_locked)(struct spi_nor *nor, loff_t ofs, uint64_t len);
191 * struct spi_nor_otp_organization - Structure to describe the SPI NOR OTP regions
192 * @len: size of one OTP region in bytes.
193 * @base: start address of the OTP area.
194 * @offset: offset between consecutive OTP regions if there are more
196 * @n_regions: number of individual OTP regions.
198 struct spi_nor_otp_organization {
202 unsigned int n_regions;
206 * struct spi_nor_otp_ops - SPI NOR OTP methods
207 * @read: read from the SPI NOR OTP area.
208 * @write: write to the SPI NOR OTP area.
209 * @lock: lock an OTP region.
210 * @erase: erase an OTP region.
211 * @is_locked: check if an OTP region of the SPI NOR is locked.
213 struct spi_nor_otp_ops {
214 int (*read)(struct spi_nor *nor, loff_t addr, size_t len, u8 *buf);
215 int (*write)(struct spi_nor *nor, loff_t addr, size_t len,
217 int (*lock)(struct spi_nor *nor, unsigned int region);
218 int (*erase)(struct spi_nor *nor, loff_t addr);
219 int (*is_locked)(struct spi_nor *nor, unsigned int region);
223 * struct spi_nor_otp - SPI NOR OTP grouping structure
224 * @org: OTP region organization
225 * @ops: OTP access ops
228 const struct spi_nor_otp_organization *org;
229 const struct spi_nor_otp_ops *ops;
233 * struct spi_nor_flash_parameter - SPI NOR flash parameters and settings.
234 * Includes legacy flash parameters and settings that can be overwritten
235 * by the spi_nor_fixups hooks, or dynamically when parsing the JESD216
236 * Serial Flash Discoverable Parameters (SFDP) tables.
238 * @size: the flash memory density in bytes.
239 * @writesize Minimal writable flash unit size. Defaults to 1. Set to
240 * ECC unit size for ECC-ed flashes.
241 * @page_size: the page size of the SPI NOR flash memory.
242 * @rdsr_dummy: dummy cycles needed for Read Status Register command.
243 * @rdsr_addr_nbytes: dummy address bytes needed for Read Status Register
245 * @hwcaps: describes the read and page program hardware
247 * @reads: read capabilities ordered by priority: the higher index
248 * in the array, the higher priority.
249 * @page_programs: page program capabilities ordered by priority: the
250 * higher index in the array, the higher priority.
251 * @erase_map: the erase map parsed from the SFDP Sector Map Parameter
253 * @otp: SPI NOR OTP info.
254 * @octal_dtr_enable: enables SPI NOR octal DTR mode.
255 * @quad_enable: enables SPI NOR quad mode.
256 * @set_4byte_addr_mode: puts the SPI NOR in 4 byte addressing mode.
257 * @convert_addr: converts an absolute address into something the flash
258 * will understand. Particularly useful when pagesize is
260 * @setup: configures the SPI NOR memory. Useful for SPI NOR
261 * flashes that have peculiarities to the SPI NOR standard
262 * e.g. different opcodes, specific address calculation,
264 * @locking_ops: SPI NOR locking methods.
266 struct spi_nor_flash_parameter {
273 struct spi_nor_hwcaps hwcaps;
274 struct spi_nor_read_command reads[SNOR_CMD_READ_MAX];
275 struct spi_nor_pp_command page_programs[SNOR_CMD_PP_MAX];
277 struct spi_nor_erase_map erase_map;
278 struct spi_nor_otp otp;
280 int (*octal_dtr_enable)(struct spi_nor *nor, bool enable);
281 int (*quad_enable)(struct spi_nor *nor);
282 int (*set_4byte_addr_mode)(struct spi_nor *nor, bool enable);
283 u32 (*convert_addr)(struct spi_nor *nor, u32 addr);
284 int (*setup)(struct spi_nor *nor, const struct spi_nor_hwcaps *hwcaps);
286 const struct spi_nor_locking_ops *locking_ops;
290 * struct spi_nor_fixups - SPI NOR fixup hooks
291 * @default_init: called after default flash parameters init. Used to tweak
292 * flash parameters when information provided by the flash_info
293 * table is incomplete or wrong.
294 * @post_bfpt: called after the BFPT table has been parsed
295 * @post_sfdp: called after SFDP has been parsed (is also called for SPI NORs
296 * that do not support RDSFDP). Typically used to tweak various
297 * parameters that could not be extracted by other means (i.e.
298 * when information provided by the SFDP/flash_info tables are
299 * incomplete or wrong).
300 * @late_init: used to initialize flash parameters that are not declared in the
301 * JESD216 SFDP standard, or where SFDP tables not defined at all.
302 * Will replace the default_init() hook.
304 * Those hooks can be used to tweak the SPI NOR configuration when the SFDP
305 * table is broken or not available.
307 struct spi_nor_fixups {
308 void (*default_init)(struct spi_nor *nor);
309 int (*post_bfpt)(struct spi_nor *nor,
310 const struct sfdp_parameter_header *bfpt_header,
311 const struct sfdp_bfpt *bfpt);
312 void (*post_sfdp)(struct spi_nor *nor);
313 void (*late_init)(struct spi_nor *nor);
317 * struct flash_info - SPI NOR flash_info entry.
318 * @name: the name of the flash.
319 * @id: the flash's ID bytes. The first three bytes are the
320 * JEDIC ID. JEDEC ID zero means "no ID" (mostly older chips).
321 * @id_len: the number of bytes of ID.
322 * @sector_size: the size listed here is what works with SPINOR_OP_SE, which
323 * isn't necessarily called a "sector" by the vendor.
324 * @n_sectors: the number of sectors.
325 * @page_size: the flash's page size.
326 * @addr_width: the flash's address width.
328 * @parse_sfdp: true when flash supports SFDP tables. The false value has no
329 * meaning. If one wants to skip the SFDP tables, one should
330 * instead use the SPI_NOR_SKIP_SFDP sfdp_flag.
331 * @flags: flags that indicate support that is not defined by the
332 * JESD216 standard in its SFDP tables. Flag meanings:
333 * SPI_NOR_HAS_LOCK: flash supports lock/unlock via SR
334 * SPI_NOR_HAS_TB: flash SR has Top/Bottom (TB) protect bit. Must be
335 * used with SPI_NOR_HAS_LOCK.
336 * SPI_NOR_TB_SR_BIT6: Top/Bottom (TB) is bit 6 of status register.
337 * Must be used with SPI_NOR_HAS_TB.
338 * SPI_NOR_4BIT_BP: flash SR has 4 bit fields (BP0-3) for block
340 * SPI_NOR_BP3_SR_BIT6: BP3 is bit 6 of status register. Must be used with
342 * SPI_NOR_SWP_IS_VOLATILE: flash has volatile software write protection bits.
343 * Usually these will power-up in a write-protected
345 * SPI_NOR_NO_ERASE: no erase command needed.
346 * NO_CHIP_ERASE: chip does not support chip erase.
347 * SPI_NOR_NO_FR: can't do fastread.
348 * USE_CLSR: use CLSR command.
349 * USE_FSR: use flag status register
350 * SPI_NOR_XSR_RDY: S3AN flashes have specific opcode to read the
353 * @no_sfdp_flags: flags that indicate support that can be discovered via SFDP.
354 * Used when SFDP tables are not defined in the flash. These
355 * flags are used together with the SPI_NOR_SKIP_SFDP flag.
356 * SPI_NOR_SKIP_SFDP: skip parsing of SFDP tables.
357 * SECT_4K: SPINOR_OP_BE_4K works uniformly.
358 * SECT_4K_PMC: SPINOR_OP_BE_4K_PMC works uniformly.
359 * SPI_NOR_DUAL_READ: flash supports Dual Read.
360 * SPI_NOR_QUAD_READ: flash supports Quad Read.
361 * SPI_NOR_OCTAL_READ: flash supports Octal Read.
362 * SPI_NOR_OCTAL_DTR_READ: flash supports octal DTR Read.
363 * SPI_NOR_OCTAL_DTR_PP: flash supports Octal DTR Page Program.
365 * @fixup_flags: flags that indicate support that can be discovered via SFDP
366 * ideally, but can not be discovered for this particular flash
367 * because the SFDP table that indicates this support is not
368 * defined by the flash. In case the table for this support is
369 * defined but has wrong values, one should instead use a
370 * post_sfdp() hook to set the SNOR_F equivalent flag.
372 * SPI_NOR_4B_OPCODES: use dedicated 4byte address op codes to support
373 * memory size above 128Mib.
374 * SPI_NOR_IO_MODE_EN_VOLATILE: flash enables the best available I/O mode
375 * via a volatile bit.
376 * @mfr_flags: manufacturer private flags. Used in the manufacturer fixup
377 * hooks to differentiate support between flashes of the same
379 * @otp_org: flash's OTP organization.
380 * @fixups: part specific fixup hooks.
384 u8 id[SPI_NOR_MAX_ID_LEN];
386 unsigned sector_size;
393 #define SPI_NOR_HAS_LOCK BIT(0)
394 #define SPI_NOR_HAS_TB BIT(1)
395 #define SPI_NOR_TB_SR_BIT6 BIT(2)
396 #define SPI_NOR_4BIT_BP BIT(3)
397 #define SPI_NOR_BP3_SR_BIT6 BIT(4)
398 #define SPI_NOR_SWP_IS_VOLATILE BIT(5)
399 #define SPI_NOR_NO_ERASE BIT(6)
400 #define NO_CHIP_ERASE BIT(7)
401 #define SPI_NOR_NO_FR BIT(8)
402 #define USE_CLSR BIT(9)
403 #define USE_FSR BIT(10)
404 #define SPI_NOR_XSR_RDY BIT(11)
407 #define SPI_NOR_SKIP_SFDP BIT(0)
408 #define SECT_4K BIT(1)
409 #define SECT_4K_PMC BIT(2)
410 #define SPI_NOR_DUAL_READ BIT(3)
411 #define SPI_NOR_QUAD_READ BIT(4)
412 #define SPI_NOR_OCTAL_READ BIT(5)
413 #define SPI_NOR_OCTAL_DTR_READ BIT(6)
414 #define SPI_NOR_OCTAL_DTR_PP BIT(7)
417 #define SPI_NOR_4B_OPCODES BIT(0)
418 #define SPI_NOR_IO_MODE_EN_VOLATILE BIT(1)
422 const struct spi_nor_otp_organization otp_org;
423 const struct spi_nor_fixups *fixups;
426 /* Used when the "_ext_id" is two bytes at most */
427 #define INFO(_jedec_id, _ext_id, _sector_size, _n_sectors) \
429 ((_jedec_id) >> 16) & 0xff, \
430 ((_jedec_id) >> 8) & 0xff, \
431 (_jedec_id) & 0xff, \
432 ((_ext_id) >> 8) & 0xff, \
435 .id_len = (!(_jedec_id) ? 0 : (3 + ((_ext_id) ? 2 : 0))), \
436 .sector_size = (_sector_size), \
437 .n_sectors = (_n_sectors), \
440 #define INFO6(_jedec_id, _ext_id, _sector_size, _n_sectors) \
442 ((_jedec_id) >> 16) & 0xff, \
443 ((_jedec_id) >> 8) & 0xff, \
444 (_jedec_id) & 0xff, \
445 ((_ext_id) >> 16) & 0xff, \
446 ((_ext_id) >> 8) & 0xff, \
450 .sector_size = (_sector_size), \
451 .n_sectors = (_n_sectors), \
454 #define CAT25_INFO(_sector_size, _n_sectors, _page_size, _addr_width) \
455 .sector_size = (_sector_size), \
456 .n_sectors = (_n_sectors), \
457 .page_size = (_page_size), \
458 .addr_width = (_addr_width), \
459 .flags = SPI_NOR_NO_ERASE | SPI_NOR_NO_FR, \
461 #define S3AN_INFO(_jedec_id, _n_sectors, _page_size) \
463 ((_jedec_id) >> 16) & 0xff, \
464 ((_jedec_id) >> 8) & 0xff, \
468 .sector_size = (8*_page_size), \
469 .n_sectors = (_n_sectors), \
470 .page_size = _page_size, \
472 .flags = SPI_NOR_NO_FR | SPI_NOR_XSR_RDY,
474 #define OTP_INFO(_len, _n_regions, _base, _offset) \
478 .offset = (_offset), \
479 .n_regions = (_n_regions), \
483 .parse_sfdp = true, \
485 #define FLAGS(_flags) \
488 #define NO_SFDP_FLAGS(_no_sfdp_flags) \
489 .no_sfdp_flags = (_no_sfdp_flags), \
491 #define FIXUP_FLAGS(_fixup_flags) \
492 .fixup_flags = (_fixup_flags), \
494 #define MFR_FLAGS(_mfr_flags) \
495 .mfr_flags = (_mfr_flags), \
498 * struct spi_nor_manufacturer - SPI NOR manufacturer object
499 * @name: manufacturer name
500 * @parts: array of parts supported by this manufacturer
501 * @nparts: number of entries in the parts array
502 * @fixups: hooks called at various points in time during spi_nor_scan()
504 struct spi_nor_manufacturer {
506 const struct flash_info *parts;
508 const struct spi_nor_fixups *fixups;
512 * struct sfdp - SFDP data
513 * @num_dwords: number of entries in the dwords array
514 * @dwords: array of double words of the SFDP data
521 /* Manufacturer drivers. */
522 extern const struct spi_nor_manufacturer spi_nor_atmel;
523 extern const struct spi_nor_manufacturer spi_nor_catalyst;
524 extern const struct spi_nor_manufacturer spi_nor_eon;
525 extern const struct spi_nor_manufacturer spi_nor_esmt;
526 extern const struct spi_nor_manufacturer spi_nor_everspin;
527 extern const struct spi_nor_manufacturer spi_nor_fujitsu;
528 extern const struct spi_nor_manufacturer spi_nor_gigadevice;
529 extern const struct spi_nor_manufacturer spi_nor_intel;
530 extern const struct spi_nor_manufacturer spi_nor_issi;
531 extern const struct spi_nor_manufacturer spi_nor_macronix;
532 extern const struct spi_nor_manufacturer spi_nor_micron;
533 extern const struct spi_nor_manufacturer spi_nor_st;
534 extern const struct spi_nor_manufacturer spi_nor_spansion;
535 extern const struct spi_nor_manufacturer spi_nor_sst;
536 extern const struct spi_nor_manufacturer spi_nor_winbond;
537 extern const struct spi_nor_manufacturer spi_nor_xilinx;
538 extern const struct spi_nor_manufacturer spi_nor_xmc;
540 extern const struct attribute_group *spi_nor_sysfs_groups[];
542 void spi_nor_spimem_setup_op(const struct spi_nor *nor,
543 struct spi_mem_op *op,
544 const enum spi_nor_protocol proto);
545 int spi_nor_write_enable(struct spi_nor *nor);
546 int spi_nor_write_disable(struct spi_nor *nor);
547 int spi_nor_set_4byte_addr_mode(struct spi_nor *nor, bool enable);
548 int spi_nor_write_ear(struct spi_nor *nor, u8 ear);
549 int spi_nor_wait_till_ready(struct spi_nor *nor);
550 int spi_nor_global_block_unlock(struct spi_nor *nor);
551 int spi_nor_lock_and_prep(struct spi_nor *nor);
552 void spi_nor_unlock_and_unprep(struct spi_nor *nor);
553 int spi_nor_sr1_bit6_quad_enable(struct spi_nor *nor);
554 int spi_nor_sr2_bit1_quad_enable(struct spi_nor *nor);
555 int spi_nor_sr2_bit7_quad_enable(struct spi_nor *nor);
556 int spi_nor_read_sr(struct spi_nor *nor, u8 *sr);
557 int spi_nor_read_cr(struct spi_nor *nor, u8 *cr);
558 int spi_nor_write_sr(struct spi_nor *nor, const u8 *sr, size_t len);
559 int spi_nor_write_sr_and_check(struct spi_nor *nor, u8 sr1);
560 int spi_nor_write_16bit_cr_and_check(struct spi_nor *nor, u8 cr);
562 int spi_nor_xread_sr(struct spi_nor *nor, u8 *sr);
563 ssize_t spi_nor_read_data(struct spi_nor *nor, loff_t from, size_t len,
565 ssize_t spi_nor_write_data(struct spi_nor *nor, loff_t to, size_t len,
567 int spi_nor_erase_sector(struct spi_nor *nor, u32 addr);
569 int spi_nor_otp_read_secr(struct spi_nor *nor, loff_t addr, size_t len, u8 *buf);
570 int spi_nor_otp_write_secr(struct spi_nor *nor, loff_t addr, size_t len,
572 int spi_nor_otp_erase_secr(struct spi_nor *nor, loff_t addr);
573 int spi_nor_otp_lock_sr2(struct spi_nor *nor, unsigned int region);
574 int spi_nor_otp_is_locked_sr2(struct spi_nor *nor, unsigned int region);
576 int spi_nor_hwcaps_read2cmd(u32 hwcaps);
577 u8 spi_nor_convert_3to4_read(u8 opcode);
578 void spi_nor_set_read_settings(struct spi_nor_read_command *read,
582 enum spi_nor_protocol proto);
583 void spi_nor_set_pp_settings(struct spi_nor_pp_command *pp, u8 opcode,
584 enum spi_nor_protocol proto);
586 void spi_nor_set_erase_type(struct spi_nor_erase_type *erase, u32 size,
588 struct spi_nor_erase_region *
589 spi_nor_region_next(struct spi_nor_erase_region *region);
590 void spi_nor_init_uniform_erase_map(struct spi_nor_erase_map *map,
591 u8 erase_mask, u64 flash_size);
593 int spi_nor_post_bfpt_fixups(struct spi_nor *nor,
594 const struct sfdp_parameter_header *bfpt_header,
595 const struct sfdp_bfpt *bfpt);
597 void spi_nor_init_default_locking_ops(struct spi_nor *nor);
598 void spi_nor_try_unlock_all(struct spi_nor *nor);
599 void spi_nor_set_mtd_locking_ops(struct spi_nor *nor);
600 void spi_nor_set_mtd_otp_ops(struct spi_nor *nor);
602 static inline struct spi_nor *mtd_to_spi_nor(struct mtd_info *mtd)
604 return container_of(mtd, struct spi_nor, mtd);
607 #endif /* __LINUX_MTD_SPI_NOR_INTERNAL_H */