2 * Copyright (C) 2004 Richard Purdie
3 * Copyright (C) 2008 Dmitry Baryshkov
5 * Based on Sharp's NAND driver sharp_sl.c
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
13 #include <linux/genhd.h>
14 #include <linux/slab.h>
15 #include <linux/module.h>
16 #include <linux/delay.h>
17 #include <linux/mtd/mtd.h>
18 #include <linux/mtd/rawnand.h>
19 #include <linux/mtd/nand_ecc.h>
20 #include <linux/mtd/partitions.h>
21 #include <linux/mtd/sharpsl.h>
22 #include <linux/interrupt.h>
23 #include <linux/platform_device.h>
26 #include <mach/hardware.h>
27 #include <asm/mach-types.h>
30 struct nand_chip chip;
35 static inline struct sharpsl_nand *mtd_to_sharpsl(struct mtd_info *mtd)
37 return container_of(mtd_to_nand(mtd), struct sharpsl_nand, chip);
41 #define ECCLPLB 0x00 /* line parity 7 - 0 bit */
42 #define ECCLPUB 0x04 /* line parity 15 - 8 bit */
43 #define ECCCP 0x08 /* column parity 5 - 0 bit */
44 #define ECCCNTR 0x0C /* ECC byte counter */
45 #define ECCCLRR 0x10 /* cleare ECC */
46 #define FLASHIO 0x14 /* Flash I/O */
47 #define FLASHCTL 0x18 /* Flash Control */
49 /* Flash control bit */
50 #define FLRYBY (1 << 5)
51 #define FLCE1 (1 << 4)
53 #define FLALE (1 << 2)
54 #define FLCLE (1 << 1)
55 #define FLCE0 (1 << 0)
58 * hardware specific access to control-lines
60 * NAND_CNE: bit 0 -> ! bit 0 & 4
61 * NAND_CLE: bit 1 -> bit 1
62 * NAND_ALE: bit 2 -> bit 2
65 static void sharpsl_nand_hwcontrol(struct mtd_info *mtd, int cmd,
68 struct sharpsl_nand *sharpsl = mtd_to_sharpsl(mtd);
69 struct nand_chip *chip = mtd_to_nand(mtd);
71 if (ctrl & NAND_CTRL_CHANGE) {
72 unsigned char bits = ctrl & 0x07;
74 bits |= (ctrl & 0x01) << 4;
78 writeb((readb(sharpsl->io + FLASHCTL) & ~0x17) | bits, sharpsl->io + FLASHCTL);
81 if (cmd != NAND_CMD_NONE)
82 writeb(cmd, chip->IO_ADDR_W);
85 static int sharpsl_nand_dev_ready(struct mtd_info *mtd)
87 struct sharpsl_nand *sharpsl = mtd_to_sharpsl(mtd);
88 return !((readb(sharpsl->io + FLASHCTL) & FLRYBY) == 0);
91 static void sharpsl_nand_enable_hwecc(struct mtd_info *mtd, int mode)
93 struct sharpsl_nand *sharpsl = mtd_to_sharpsl(mtd);
94 writeb(0, sharpsl->io + ECCCLRR);
97 static int sharpsl_nand_calculate_ecc(struct mtd_info *mtd, const u_char * dat, u_char * ecc_code)
99 struct sharpsl_nand *sharpsl = mtd_to_sharpsl(mtd);
100 ecc_code[0] = ~readb(sharpsl->io + ECCLPUB);
101 ecc_code[1] = ~readb(sharpsl->io + ECCLPLB);
102 ecc_code[2] = (~readb(sharpsl->io + ECCCP) << 2) | 0x03;
103 return readb(sharpsl->io + ECCCNTR) != 0;
107 * Main initialization routine
109 static int sharpsl_nand_probe(struct platform_device *pdev)
111 struct nand_chip *this;
112 struct mtd_info *mtd;
115 struct sharpsl_nand *sharpsl;
116 struct sharpsl_nand_platform_data *data = dev_get_platdata(&pdev->dev);
119 dev_err(&pdev->dev, "no platform data!\n");
123 /* Allocate memory for MTD device structure and private data */
124 sharpsl = kzalloc(sizeof(struct sharpsl_nand), GFP_KERNEL);
128 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
130 dev_err(&pdev->dev, "no io memory resource defined!\n");
135 /* map physical address */
136 sharpsl->io = ioremap(r->start, resource_size(r));
138 dev_err(&pdev->dev, "ioremap to access Sharp SL NAND chip failed\n");
143 /* Get pointer to private data */
144 this = (struct nand_chip *)(&sharpsl->chip);
146 /* Link the private data with the MTD structure */
147 mtd = nand_to_mtd(this);
148 mtd->dev.parent = &pdev->dev;
149 mtd_set_ooblayout(mtd, data->ecc_layout);
151 platform_set_drvdata(pdev, sharpsl);
156 writeb(readb(sharpsl->io + FLASHCTL) | FLWP, sharpsl->io + FLASHCTL);
158 /* Set address of NAND IO lines */
159 this->IO_ADDR_R = sharpsl->io + FLASHIO;
160 this->IO_ADDR_W = sharpsl->io + FLASHIO;
161 /* Set address of hardware control function */
162 this->cmd_ctrl = sharpsl_nand_hwcontrol;
163 this->dev_ready = sharpsl_nand_dev_ready;
164 /* 15 us command delay time */
165 this->chip_delay = 15;
166 /* set eccmode using hardware ECC */
167 this->ecc.mode = NAND_ECC_HW;
168 this->ecc.size = 256;
170 this->ecc.strength = 1;
171 this->badblock_pattern = data->badblock_pattern;
172 this->ecc.hwctl = sharpsl_nand_enable_hwecc;
173 this->ecc.calculate = sharpsl_nand_calculate_ecc;
174 this->ecc.correct = nand_correct_data;
176 /* Scan to find existence of the device */
177 err = nand_scan(mtd, 1);
181 /* Register the partitions */
182 mtd->name = "sharpsl-nand";
184 err = mtd_device_parse_register(mtd, data->part_parsers, NULL,
185 data->partitions, data->nr_partitions);
196 iounmap(sharpsl->io);
206 static int sharpsl_nand_remove(struct platform_device *pdev)
208 struct sharpsl_nand *sharpsl = platform_get_drvdata(pdev);
210 /* Release resources, unregister device */
211 nand_release(nand_to_mtd(&sharpsl->chip));
213 iounmap(sharpsl->io);
215 /* Free the MTD device structure */
221 static struct platform_driver sharpsl_nand_driver = {
223 .name = "sharpsl-nand",
225 .probe = sharpsl_nand_probe,
226 .remove = sharpsl_nand_remove,
229 module_platform_driver(sharpsl_nand_driver);
231 MODULE_LICENSE("GPL");
232 MODULE_AUTHOR("Richard Purdie <rpurdie@rpsys.net>");
233 MODULE_DESCRIPTION("Device specific logic for NAND flash on Sharp SL-C7xx Series");