1 # SPDX-License-Identifier: GPL-2.0-only
2 menuconfig MTD_RAW_NAND
3 tristate "Raw/Parallel NAND Device Support"
7 This enables support for accessing all type of raw/parallel
8 NAND flash devices. For further information see
9 <http://www.linux-mtd.infradead.org/doc/nand.html>.
13 comment "Raw/parallel NAND flash controllers"
15 config MTD_NAND_DENALI
18 config MTD_NAND_DENALI_PCI
19 tristate "Denali NAND controller on Intel Moorestown"
20 select MTD_NAND_DENALI
23 Enable the driver for NAND flash on Intel Moorestown, using the
24 Denali NAND controller core.
26 config MTD_NAND_DENALI_DT
27 tristate "Denali NAND controller as a DT device"
28 select MTD_NAND_DENALI
29 depends on HAS_DMA && HAVE_CLK && OF && HAS_IOMEM
31 Enable the driver for NAND flash on platforms using a Denali NAND
32 controller as a DT device.
34 config MTD_NAND_AMS_DELTA
35 tristate "Amstrad E3 NAND controller"
36 depends on MACH_AMS_DELTA || COMPILE_TEST
39 Support for NAND flash on Amstrad E3 (Delta).
42 tristate "OMAP2, OMAP3, OMAP4 and Keystone NAND controller"
43 depends on ARCH_OMAP2PLUS || ARCH_KEYSTONE || ARCH_K3 || COMPILE_TEST
48 Support for NAND flash on Texas Instruments OMAP2, OMAP3, OMAP4
49 and Keystone platforms.
51 config MTD_NAND_OMAP_BCH
52 depends on MTD_NAND_OMAP2
53 bool "Support hardware based BCH error correction"
57 This config enables the ELM hardware engine, which can be used to
58 locate and correct errors when using BCH ECC scheme. This offloads
59 the cpu from doing ECC error searching and correction. However some
60 legacy OMAP families like OMAP2xxx, OMAP3xxx do not have ELM engine
61 so this is optional for them.
63 config MTD_NAND_OMAP_BCH_BUILD
64 def_tristate MTD_NAND_OMAP2 && MTD_NAND_OMAP_BCH
66 config MTD_NAND_AU1550
67 tristate "Au1550/1200 NAND support"
68 depends on MIPS_ALCHEMY
70 This enables the driver for the NAND flash controller on the
74 tristate "IBM/MCC 4xx NAND controller"
76 select MTD_NAND_ECC_SW_HAMMING
77 select MTD_NAND_ECC_SW_HAMMING_SMC
79 NDFC Nand Flash Controllers are integrated in IBM/AMCC's 4xx SoCs
81 config MTD_NAND_S3C2410
82 tristate "Samsung S3C NAND controller"
83 depends on ARCH_S3C24XX || ARCH_S3C64XX
85 This enables the NAND flash controller on the S3C24xx and S3C64xx
88 No board specific support is done by this driver, each board
89 must advertise a platform_device for the driver to attach.
91 config MTD_NAND_S3C2410_DEBUG
92 bool "Samsung S3C NAND controller debug"
93 depends on MTD_NAND_S3C2410
95 Enable debugging of the S3C NAND driver
97 config MTD_NAND_S3C2410_CLKSTOP
98 bool "Samsung S3C NAND IDLE clock stop"
99 depends on MTD_NAND_S3C2410
102 Stop the clock to the NAND controller when there is no chip
103 selected to save power. This will mean there is a small delay
104 when the is NAND chip selected or released, but will save
105 approximately 5mA of power when there is nothing happening.
107 config MTD_NAND_SHARPSL
108 tristate "Sharp SL Series (C7xx + others) NAND controller"
109 depends on ARCH_PXA || COMPILE_TEST
113 tristate "OLPC CAFÉ NAND controller"
116 select REED_SOLOMON_DEC16
118 Use NAND flash attached to the CAFÉ chip designed for the OLPC
121 config MTD_NAND_CS553X
122 tristate "CS5535/CS5536 (AMD Geode companion) NAND controller"
124 depends on !UML && HAS_IOMEM
126 The CS553x companion chips for the AMD Geode processor
127 include NAND flash controllers with built-in hardware ECC
128 capabilities; enabling this option will allow you to use
129 these. The driver will check the MSRs to verify that the
130 controller is enabled for NAND, and currently requires that
131 the controller be in MMIO mode.
133 If you say "m", the module will be called cs553x_nand.
135 config MTD_NAND_ATMEL
136 tristate "Atmel AT91 NAND Flash/SmartMedia NAND controller"
137 depends on ARCH_AT91 || COMPILE_TEST
139 select GENERIC_ALLOCATOR
142 Enables support for NAND Flash / Smart Media Card interface
143 on Atmel AT91 processors.
145 config MTD_NAND_ORION
146 tristate "Marvell Orion NAND controller"
147 depends on PLAT_ORION
149 This enables the NAND flash controller on Orion machines.
151 No board specific support is done by this driver, each board
152 must advertise a platform_device for the driver to attach.
154 config MTD_NAND_MARVELL
155 tristate "Marvell EBU NAND controller"
156 depends on PXA3xx || ARCH_MMP || PLAT_ORION || ARCH_MVEBU || \
160 This enables the NAND flash controller driver for Marvell boards,
162 - PXA3xx processors (NFCv1)
163 - 32-bit Armada platforms (XP, 37x, 38x, 39x) (NFCv2)
164 - 64-bit Aramda platforms (7k, 8k) (NFCv2)
166 config MTD_NAND_SLC_LPC32XX
167 tristate "NXP LPC32xx SLC NAND controller"
168 depends on ARCH_LPC32XX || COMPILE_TEST
171 Enables support for NXP's LPC32XX SLC (i.e. for Single Level Cell
172 chips) NAND controller. This is the default for the PHYTEC 3250
173 reference board which contains a NAND256R3A2CZA6 chip.
175 Please check the actual NAND chip connected and its support
176 by the SLC NAND controller.
178 config MTD_NAND_MLC_LPC32XX
179 tristate "NXP LPC32xx MLC NAND controller"
180 depends on ARCH_LPC32XX || COMPILE_TEST
183 Uses the LPC32XX MLC (i.e. for Multi Level Cell chips) NAND
184 controller. This is the default for the WORK92105 controller
187 Please check the actual NAND chip connected and its support
188 by the MLC NAND controller.
190 config MTD_NAND_PASEMI
191 tristate "PA Semi PWRficient NAND controller"
192 depends on PPC_PASEMI
194 Enables support for NAND Flash interface on PA Semi PWRficient
198 tristate "Toshiba Mobile IO NAND controller"
201 Support for NAND flash connected to a Toshiba Mobile IO
202 Controller in some PDAs, including the Sharp SL6000x.
204 config MTD_NAND_BRCMNAND
205 tristate "Broadcom STB NAND controller"
206 depends on ARM || ARM64 || MIPS || COMPILE_TEST
209 Enables the Broadcom NAND controller driver. The controller was
210 originally designed for Set-Top Box but is used on various BCM7xxx,
211 BCM3xxx, BCM63xxx, iProc/Cygnus and more.
213 config MTD_NAND_BCM47XXNFLASH
214 tristate "BCM4706 BCMA NAND controller"
215 depends on BCMA_NFLASH
218 BCMA bus can have various flash memories attached, they are
219 registered by bcma as platform devices. This enables driver for
220 NAND flash memories. For now only BCM4706 is supported.
222 config MTD_NAND_OXNAS
223 tristate "Oxford Semiconductor NAND controller"
224 depends on ARCH_OXNAS || COMPILE_TEST
227 This enables the NAND flash controller on Oxford Semiconductor SoCs.
229 config MTD_NAND_MPC5121_NFC
230 tristate "MPC5121 NAND controller"
231 depends on PPC_MPC512x
233 This enables the driver for the NAND flash controller on the
236 config MTD_NAND_GPMI_NAND
237 tristate "Freescale GPMI NAND controller"
240 Enables NAND Flash support for IMX23, IMX28 or IMX6.
241 The GPMI controller is very powerful, with the help of BCH
242 module, it can do the hardware ECC. The GPMI supports several
243 NAND flashs at the same time.
245 config MTD_NAND_FSL_ELBC
246 tristate "Freescale eLBC NAND controller"
250 Various Freescale chips, including the 8313, include a NAND Flash
251 Controller Module with built-in hardware ECC capabilities.
252 Enabling this option will enable you to use this to control
253 external NAND devices.
255 config MTD_NAND_FSL_IFC
256 tristate "Freescale IFC NAND controller"
257 depends on FSL_SOC || ARCH_LAYERSCAPE || SOC_LS1021A || COMPILE_TEST
262 Various Freescale chips e.g P1010, include a NAND Flash machine
263 with built-in hardware ECC capabilities.
264 Enabling this option will enable you to use this to control
265 external NAND devices.
267 config MTD_NAND_FSL_UPM
268 tristate "Freescale UPM NAND controller"
269 depends on PPC_83xx || PPC_85xx
272 Enables support for NAND Flash chips wired onto Freescale PowerPC
273 processor localbus with User-Programmable Machine support.
275 config MTD_NAND_VF610_NFC
276 tristate "Freescale VF610/MPC5125 NAND controller"
277 depends on (SOC_VF610 || COMPILE_TEST)
280 Enables support for NAND Flash Controller on some Freescale
281 processors like the VF610, MPC5125, MCF54418 or Kinetis K70.
282 The driver supports a maximum 2k page size. With 2k pages and
283 64 bytes or more of OOB, hardware ECC with up to 32-bit error
284 correction is supported. Hardware ECC is only enabled through
288 tristate "Freescale MXC NAND controller"
289 depends on ARCH_MXC || COMPILE_TEST
290 depends on HAS_IOMEM && OF
292 This enables the driver for the NAND flash controller on the
295 config MTD_NAND_SH_FLCTL
296 tristate "Renesas SuperH FLCTL NAND controller"
297 depends on SUPERH || COMPILE_TEST
300 Several Renesas SuperH CPU has FLCTL. This option enables support
301 for NAND Flash using FLCTL.
303 config MTD_NAND_DAVINCI
304 tristate "DaVinci/Keystone NAND controller"
305 depends on ARCH_DAVINCI || (ARCH_KEYSTONE && TI_AEMIF) || COMPILE_TEST
308 Enable the driver for NAND flash chips on Texas Instruments
309 DaVinci/Keystone processors.
311 config MTD_NAND_TXX9NDFMC
312 tristate "TXx9 NAND controller"
313 depends on SOC_TX4938 || COMPILE_TEST
316 This enables the NAND flash controller on the TXx9 SoCs.
318 config MTD_NAND_SOCRATES
319 tristate "Socrates NAND controller"
322 Enables support for NAND Flash chips wired onto Socrates board.
324 source "drivers/mtd/nand/raw/ingenic/Kconfig"
327 tristate "ST Micros FSMC NAND controller"
328 depends on OF && HAS_IOMEM
329 depends on PLAT_SPEAR || ARCH_NOMADIK || ARCH_U8500 || COMPILE_TEST
331 Enables support for NAND Flash chips on the ST Microelectronics
332 Flexible Static Memory Controller (FSMC)
335 bool "Lantiq XWAY NAND controller"
336 depends on LANTIQ && SOC_TYPE_XWAY
338 Enables support for NAND Flash chips on Lantiq XWAY SoCs. NAND is attached
339 to the External Bus Unit (EBU).
341 config MTD_NAND_SUNXI
342 tristate "Allwinner NAND controller"
343 depends on ARCH_SUNXI || COMPILE_TEST
346 Enables support for NAND Flash chips on Allwinner SoCs.
348 config MTD_NAND_HISI504
349 tristate "Hisilicon Hip04 NAND controller"
350 depends on ARCH_HISI || COMPILE_TEST
353 Enables support for NAND controller on Hisilicon SoC Hip04.
356 tristate "QCOM NAND controller"
357 depends on ARCH_QCOM || COMPILE_TEST
360 Enables support for NAND flash chips on SoCs containing the EBI2 NAND
361 controller. This controller is found on IPQ806x SoC.
364 tristate "MTK NAND controller"
365 depends on ARCH_MEDIATEK || COMPILE_TEST
368 Enables support for NAND controller on MTK SoCs.
369 This controller is found on mt27xx, mt81xx, mt65xx SoCs.
372 tristate "Macronix raw NAND controller"
373 depends on HAS_IOMEM || COMPILE_TEST
375 This selects the Macronix raw NAND controller driver.
377 config MTD_NAND_TEGRA
378 tristate "NVIDIA Tegra NAND controller"
379 depends on ARCH_TEGRA || COMPILE_TEST
382 Enables support for NAND flash controller on NVIDIA Tegra SoC.
383 The driver has been developed and tested on a Tegra 2 SoC. DMA
384 support, raw read/write page as well as HW ECC read/write page
385 is supported. Extra OOB bytes when using HW ECC are currently
388 config MTD_NAND_STM32_FMC2
389 tristate "Support for NAND controller on STM32MP SoCs"
390 depends on MACH_STM32MP157 || COMPILE_TEST
393 Enables support for NAND Flash chips on SoCs containing the FMC2
394 NAND controller. This controller is found on STM32MP SoCs.
395 The controller supports a maximum 8k page size and supports
396 a maximum 8-bit correction error per sector of 512 bytes.
398 config MTD_NAND_MESON
399 tristate "Support for NAND controller on Amlogic's Meson SoCs"
400 depends on ARCH_MESON || COMPILE_TEST
403 Enables support for NAND controller on Amlogic's Meson SoCs.
404 This controller is found on Meson SoCs.
407 tristate "GPIO assisted NAND controller"
408 depends on GPIOLIB || COMPILE_TEST
411 This enables a NAND flash driver where control signals are
412 connected to GPIO pins, and commands and data are communicated
413 via a memory mapped interface.
415 config MTD_NAND_PLATFORM
416 tristate "Generic NAND controller"
419 This implements a generic NAND driver for on-SOC platform
420 devices. You will need to provide platform-specific functions
423 config MTD_NAND_CADENCE
424 tristate "Support Cadence NAND (HPNFC) controller"
425 depends on (OF || COMPILE_TEST) && HAS_IOMEM
427 Enable the driver for NAND flash on platforms using a Cadence NAND
430 config MTD_NAND_ARASAN
431 tristate "Support for Arasan NAND flash controller"
432 depends on HAS_IOMEM && HAS_DMA
435 Enables the driver for the Arasan NAND flash controller on
436 Zynq Ultrascale+ MPSoC.
438 config MTD_NAND_INTEL_LGM
439 tristate "Support for NAND controller on Intel LGM SoC"
440 depends on OF || COMPILE_TEST
443 Enables support for NAND Flash chips on Intel's LGM SoC.
444 NAND flash controller interfaced through the External Bus Unit.
446 config MTD_NAND_ROCKCHIP
447 tristate "Rockchip NAND controller"
448 depends on ARCH_ROCKCHIP && HAS_IOMEM
450 Enables support for NAND controller on Rockchip SoCs.
451 There are four different versions of NAND FLASH Controllers,
453 NFC v600: RK2928, RK3066, RK3188
454 NFC v622: RK3036, RK3128
455 NFC v800: RK3308, RV1108
456 NFC v900: PX30, RK3326
458 config MTD_NAND_PL35X
459 tristate "ARM PL35X NAND controller"
460 depends on OF || COMPILE_TEST
463 Enables support for PrimeCell SMC PL351 and PL353 NAND
464 controller found on Zynq7000.
466 config MTD_NAND_RENESAS
467 tristate "Renesas R-Car Gen3 & RZ/N1 NAND controller"
468 depends on ARCH_RENESAS || COMPILE_TEST
470 Enables support for the NAND controller found on Renesas R-Car
471 Gen3 and RZ/N1 SoC families.
479 config MTD_NAND_NANDSIM
480 tristate "Support for NAND Flash Simulator"
482 The simulator may simulate various NAND flash chips for the
485 config MTD_NAND_RICOH
486 tristate "Ricoh xD card reader"
491 Enable support for Ricoh R5C852 xD card reader
492 You also need to enable either
493 NAND SSFDC (SmartMedia) read only translation layer' or new
494 experimental, readwrite
495 'SmartMedia/xD new translation layer'
497 config MTD_NAND_DISKONCHIP
498 tristate "DiskOnChip 2000, Millennium and Millennium Plus (NAND reimplementation)"
501 select REED_SOLOMON_DEC16
503 This is a reimplementation of M-Systems DiskOnChip 2000,
504 Millennium and Millennium Plus as a standard NAND device driver,
505 as opposed to the earlier self-contained MTD device drivers.
506 This should enable, among other things, proper JFFS2 operation on
509 config MTD_NAND_DISKONCHIP_PROBE_ADVANCED
510 bool "Advanced detection options for DiskOnChip"
511 depends on MTD_NAND_DISKONCHIP
513 This option allows you to specify nonstandard address at which to
514 probe for a DiskOnChip, or to change the detection options. You
515 are unlikely to need any of this unless you are using LinuxBIOS.
518 config MTD_NAND_DISKONCHIP_PROBE_ADDRESS
519 hex "Physical address of DiskOnChip" if MTD_NAND_DISKONCHIP_PROBE_ADVANCED
520 depends on MTD_NAND_DISKONCHIP
523 By default, the probe for DiskOnChip devices will look for a
524 DiskOnChip at every multiple of 0x2000 between 0xC8000 and 0xEE000.
525 This option allows you to specify a single address at which to probe
526 for the device, which is useful if you have other devices in that
527 range which get upset when they are probed.
529 (Note that on PowerPC, the normal probe will only check at
532 Normally, you should leave this set to zero, to allow the probe at
533 the normal addresses.
535 config MTD_NAND_DISKONCHIP_PROBE_HIGH
536 bool "Probe high addresses"
537 depends on MTD_NAND_DISKONCHIP_PROBE_ADVANCED
539 By default, the probe for DiskOnChip devices will look for a
540 DiskOnChip at every multiple of 0x2000 between 0xC8000 and 0xEE000.
541 This option changes to make it probe between 0xFFFC8000 and
542 0xFFFEE000. Unless you are using LinuxBIOS, this is unlikely to be
543 useful to you. Say 'N'.
545 config MTD_NAND_DISKONCHIP_BBTWRITE
546 bool "Allow BBT writes on DiskOnChip Millennium and 2000TSOP"
547 depends on MTD_NAND_DISKONCHIP
549 On DiskOnChip devices shipped with the INFTL filesystem (Millennium
550 and 2000 TSOP/Alon), Linux reserves some space at the end of the
551 device for the Bad Block Table (BBT). If you have existing INFTL
552 data on your device (created by non-Linux tools such as M-Systems'
553 DOS drivers), your data might overlap the area Linux wants to use for
554 the BBT. If this is a concern for you, leave this option disabled and
555 Linux will not write BBT data into this area.
556 The downside of leaving this option disabled is that if bad blocks
557 are detected by Linux, they will not be recorded in the BBT, which
558 could cause future problems.
559 Once you enable this option, new filesystems (INFTL or others, created
560 in Linux or other operating systems) will not use the reserved area.
561 The only reason not to enable this option is to prevent damage to
562 preexisting filesystems.
563 Even if you leave this disabled, you can enable BBT writes at module
564 load time (assuming you build diskonchip as a module) with the module
565 parameter "inftl_bbt_write=1".