1 # SPDX-License-Identifier: GPL-2.0-only
2 menuconfig MTD_RAW_NAND
3 tristate "Raw/Parallel NAND Device Support"
7 This enables support for accessing all type of raw/parallel
8 NAND flash devices. For further information see
9 <http://www.linux-mtd.infradead.org/doc/nand.html>.
13 comment "Raw/parallel NAND flash controllers"
15 config MTD_NAND_DENALI
18 config MTD_NAND_DENALI_PCI
19 tristate "Denali NAND controller on Intel Moorestown"
20 select MTD_NAND_DENALI
23 Enable the driver for NAND flash on Intel Moorestown, using the
24 Denali NAND controller core.
26 config MTD_NAND_DENALI_DT
27 tristate "Denali NAND controller as a DT device"
28 select MTD_NAND_DENALI
29 depends on HAS_DMA && HAVE_CLK && OF && HAS_IOMEM
31 Enable the driver for NAND flash on platforms using a Denali NAND
32 controller as a DT device.
34 config MTD_NAND_AMS_DELTA
35 tristate "Amstrad E3 NAND controller"
36 depends on MACH_AMS_DELTA || COMPILE_TEST
39 Support for NAND flash on Amstrad E3 (Delta).
42 tristate "OMAP2, OMAP3, OMAP4 and Keystone NAND controller"
43 depends on ARCH_OMAP2PLUS || ARCH_KEYSTONE || ARCH_K3 || COMPILE_TEST
45 select OMAP_GPMC if ARCH_K3
47 Support for NAND flash on Texas Instruments OMAP2, OMAP3, OMAP4
48 and Keystone platforms.
50 config MTD_NAND_OMAP_BCH
51 depends on MTD_NAND_OMAP2
52 bool "Support hardware based BCH error correction"
56 This config enables the ELM hardware engine, which can be used to
57 locate and correct errors when using BCH ECC scheme. This offloads
58 the cpu from doing ECC error searching and correction. However some
59 legacy OMAP families like OMAP2xxx, OMAP3xxx do not have ELM engine
60 so this is optional for them.
62 config MTD_NAND_OMAP_BCH_BUILD
63 def_tristate MTD_NAND_OMAP2 && MTD_NAND_OMAP_BCH
65 config MTD_NAND_AU1550
66 tristate "Au1550/1200 NAND support"
67 depends on MIPS_ALCHEMY
69 This enables the driver for the NAND flash controller on the
73 tristate "IBM/MCC 4xx NAND controller"
75 select MTD_NAND_ECC_SW_HAMMING
76 select MTD_NAND_ECC_SW_HAMMING_SMC
78 NDFC Nand Flash Controllers are integrated in IBM/AMCC's 4xx SoCs
80 config MTD_NAND_S3C2410
81 tristate "Samsung S3C NAND controller"
82 depends on ARCH_S3C24XX || ARCH_S3C64XX
84 This enables the NAND flash controller on the S3C24xx and S3C64xx
87 No board specific support is done by this driver, each board
88 must advertise a platform_device for the driver to attach.
90 config MTD_NAND_S3C2410_DEBUG
91 bool "Samsung S3C NAND controller debug"
92 depends on MTD_NAND_S3C2410
94 Enable debugging of the S3C NAND driver
96 config MTD_NAND_S3C2410_CLKSTOP
97 bool "Samsung S3C NAND IDLE clock stop"
98 depends on MTD_NAND_S3C2410
101 Stop the clock to the NAND controller when there is no chip
102 selected to save power. This will mean there is a small delay
103 when the is NAND chip selected or released, but will save
104 approximately 5mA of power when there is nothing happening.
106 config MTD_NAND_SHARPSL
107 tristate "Sharp SL Series (C7xx + others) NAND controller"
108 depends on ARCH_PXA || COMPILE_TEST
112 tristate "OLPC CAFÉ NAND controller"
115 select REED_SOLOMON_DEC16
117 Use NAND flash attached to the CAFÉ chip designed for the OLPC
120 config MTD_NAND_CS553X
121 tristate "CS5535/CS5536 (AMD Geode companion) NAND controller"
123 depends on !UML && HAS_IOMEM
125 The CS553x companion chips for the AMD Geode processor
126 include NAND flash controllers with built-in hardware ECC
127 capabilities; enabling this option will allow you to use
128 these. The driver will check the MSRs to verify that the
129 controller is enabled for NAND, and currently requires that
130 the controller be in MMIO mode.
132 If you say "m", the module will be called cs553x_nand.
134 config MTD_NAND_ATMEL
135 tristate "Atmel AT91 NAND Flash/SmartMedia NAND controller"
136 depends on ARCH_AT91 || COMPILE_TEST
138 select GENERIC_ALLOCATOR
141 Enables support for NAND Flash / Smart Media Card interface
142 on Atmel AT91 processors.
144 config MTD_NAND_ORION
145 tristate "Marvell Orion NAND controller"
146 depends on PLAT_ORION
148 This enables the NAND flash controller on Orion machines.
150 No board specific support is done by this driver, each board
151 must advertise a platform_device for the driver to attach.
153 config MTD_NAND_MARVELL
154 tristate "Marvell EBU NAND controller"
155 depends on PXA3xx || ARCH_MMP || PLAT_ORION || ARCH_MVEBU || \
159 This enables the NAND flash controller driver for Marvell boards,
161 - PXA3xx processors (NFCv1)
162 - 32-bit Armada platforms (XP, 37x, 38x, 39x) (NFCv2)
163 - 64-bit Aramda platforms (7k, 8k) (NFCv2)
165 config MTD_NAND_SLC_LPC32XX
166 tristate "NXP LPC32xx SLC NAND controller"
167 depends on ARCH_LPC32XX || COMPILE_TEST
170 Enables support for NXP's LPC32XX SLC (i.e. for Single Level Cell
171 chips) NAND controller. This is the default for the PHYTEC 3250
172 reference board which contains a NAND256R3A2CZA6 chip.
174 Please check the actual NAND chip connected and its support
175 by the SLC NAND controller.
177 config MTD_NAND_MLC_LPC32XX
178 tristate "NXP LPC32xx MLC NAND controller"
179 depends on ARCH_LPC32XX || COMPILE_TEST
182 Uses the LPC32XX MLC (i.e. for Multi Level Cell chips) NAND
183 controller. This is the default for the WORK92105 controller
186 Please check the actual NAND chip connected and its support
187 by the MLC NAND controller.
189 config MTD_NAND_PASEMI
190 tristate "PA Semi PWRficient NAND controller"
191 depends on PPC_PASEMI
193 Enables support for NAND Flash interface on PA Semi PWRficient
197 tristate "Toshiba Mobile IO NAND controller"
200 Support for NAND flash connected to a Toshiba Mobile IO
201 Controller in some PDAs, including the Sharp SL6000x.
203 config MTD_NAND_BRCMNAND
204 tristate "Broadcom STB NAND controller"
205 depends on ARM || ARM64 || MIPS || COMPILE_TEST
208 Enables the Broadcom NAND controller driver. The controller was
209 originally designed for Set-Top Box but is used on various BCM7xxx,
210 BCM3xxx, BCM63xxx, iProc/Cygnus and more.
212 config MTD_NAND_BCM47XXNFLASH
213 tristate "BCM4706 BCMA NAND controller"
214 depends on BCMA_NFLASH
217 BCMA bus can have various flash memories attached, they are
218 registered by bcma as platform devices. This enables driver for
219 NAND flash memories. For now only BCM4706 is supported.
221 config MTD_NAND_OXNAS
222 tristate "Oxford Semiconductor NAND controller"
223 depends on ARCH_OXNAS || COMPILE_TEST
226 This enables the NAND flash controller on Oxford Semiconductor SoCs.
228 config MTD_NAND_MPC5121_NFC
229 tristate "MPC5121 NAND controller"
230 depends on PPC_MPC512x
232 This enables the driver for the NAND flash controller on the
235 config MTD_NAND_GPMI_NAND
236 tristate "Freescale GPMI NAND controller"
239 Enables NAND Flash support for IMX23, IMX28 or IMX6.
240 The GPMI controller is very powerful, with the help of BCH
241 module, it can do the hardware ECC. The GPMI supports several
242 NAND flashs at the same time.
244 config MTD_NAND_FSL_ELBC
245 tristate "Freescale eLBC NAND controller"
249 Various Freescale chips, including the 8313, include a NAND Flash
250 Controller Module with built-in hardware ECC capabilities.
251 Enabling this option will enable you to use this to control
252 external NAND devices.
254 config MTD_NAND_FSL_IFC
255 tristate "Freescale IFC NAND controller"
256 depends on FSL_SOC || ARCH_LAYERSCAPE || SOC_LS1021A || COMPILE_TEST
261 Various Freescale chips e.g P1010, include a NAND Flash machine
262 with built-in hardware ECC capabilities.
263 Enabling this option will enable you to use this to control
264 external NAND devices.
266 config MTD_NAND_FSL_UPM
267 tristate "Freescale UPM NAND controller"
268 depends on PPC_83xx || PPC_85xx
271 Enables support for NAND Flash chips wired onto Freescale PowerPC
272 processor localbus with User-Programmable Machine support.
274 config MTD_NAND_VF610_NFC
275 tristate "Freescale VF610/MPC5125 NAND controller"
276 depends on (SOC_VF610 || COMPILE_TEST)
279 Enables support for NAND Flash Controller on some Freescale
280 processors like the VF610, MPC5125, MCF54418 or Kinetis K70.
281 The driver supports a maximum 2k page size. With 2k pages and
282 64 bytes or more of OOB, hardware ECC with up to 32-bit error
283 correction is supported. Hardware ECC is only enabled through
287 tristate "Freescale MXC NAND controller"
288 depends on ARCH_MXC || COMPILE_TEST
289 depends on HAS_IOMEM && OF
291 This enables the driver for the NAND flash controller on the
294 config MTD_NAND_SH_FLCTL
295 tristate "Renesas SuperH FLCTL NAND controller"
296 depends on SUPERH || COMPILE_TEST
299 Several Renesas SuperH CPU has FLCTL. This option enables support
300 for NAND Flash using FLCTL.
302 config MTD_NAND_DAVINCI
303 tristate "DaVinci/Keystone NAND controller"
304 depends on ARCH_DAVINCI || (ARCH_KEYSTONE && TI_AEMIF) || COMPILE_TEST
307 Enable the driver for NAND flash chips on Texas Instruments
308 DaVinci/Keystone processors.
310 config MTD_NAND_TXX9NDFMC
311 tristate "TXx9 NAND controller"
312 depends on SOC_TX4938 || COMPILE_TEST
315 This enables the NAND flash controller on the TXx9 SoCs.
317 config MTD_NAND_SOCRATES
318 tristate "Socrates NAND controller"
321 Enables support for NAND Flash chips wired onto Socrates board.
323 source "drivers/mtd/nand/raw/ingenic/Kconfig"
326 tristate "ST Micros FSMC NAND controller"
327 depends on OF && HAS_IOMEM
328 depends on PLAT_SPEAR || ARCH_NOMADIK || ARCH_U8500 || COMPILE_TEST
330 Enables support for NAND Flash chips on the ST Microelectronics
331 Flexible Static Memory Controller (FSMC)
334 bool "Lantiq XWAY NAND controller"
335 depends on LANTIQ && SOC_TYPE_XWAY
337 Enables support for NAND Flash chips on Lantiq XWAY SoCs. NAND is attached
338 to the External Bus Unit (EBU).
340 config MTD_NAND_SUNXI
341 tristate "Allwinner NAND controller"
342 depends on ARCH_SUNXI || COMPILE_TEST
345 Enables support for NAND Flash chips on Allwinner SoCs.
347 config MTD_NAND_HISI504
348 tristate "Hisilicon Hip04 NAND controller"
349 depends on ARCH_HISI || COMPILE_TEST
352 Enables support for NAND controller on Hisilicon SoC Hip04.
355 tristate "QCOM NAND controller"
356 depends on ARCH_QCOM || COMPILE_TEST
359 Enables support for NAND flash chips on SoCs containing the EBI2 NAND
360 controller. This controller is found on IPQ806x SoC.
363 tristate "MTK NAND controller"
364 depends on ARCH_MEDIATEK || COMPILE_TEST
367 Enables support for NAND controller on MTK SoCs.
368 This controller is found on mt27xx, mt81xx, mt65xx SoCs.
371 tristate "Macronix raw NAND controller"
372 depends on HAS_IOMEM || COMPILE_TEST
374 This selects the Macronix raw NAND controller driver.
376 config MTD_NAND_TEGRA
377 tristate "NVIDIA Tegra NAND controller"
378 depends on ARCH_TEGRA || COMPILE_TEST
381 Enables support for NAND flash controller on NVIDIA Tegra SoC.
382 The driver has been developed and tested on a Tegra 2 SoC. DMA
383 support, raw read/write page as well as HW ECC read/write page
384 is supported. Extra OOB bytes when using HW ECC are currently
387 config MTD_NAND_STM32_FMC2
388 tristate "Support for NAND controller on STM32MP SoCs"
389 depends on MACH_STM32MP157 || COMPILE_TEST
392 Enables support for NAND Flash chips on SoCs containing the FMC2
393 NAND controller. This controller is found on STM32MP SoCs.
394 The controller supports a maximum 8k page size and supports
395 a maximum 8-bit correction error per sector of 512 bytes.
397 config MTD_NAND_MESON
398 tristate "Support for NAND controller on Amlogic's Meson SoCs"
399 depends on ARCH_MESON || COMPILE_TEST
402 Enables support for NAND controller on Amlogic's Meson SoCs.
403 This controller is found on Meson SoCs.
406 tristate "GPIO assisted NAND controller"
407 depends on GPIOLIB || COMPILE_TEST
410 This enables a NAND flash driver where control signals are
411 connected to GPIO pins, and commands and data are communicated
412 via a memory mapped interface.
414 config MTD_NAND_PLATFORM
415 tristate "Generic NAND controller"
418 This implements a generic NAND driver for on-SOC platform
419 devices. You will need to provide platform-specific functions
422 config MTD_NAND_CADENCE
423 tristate "Support Cadence NAND (HPNFC) controller"
424 depends on (OF || COMPILE_TEST) && HAS_IOMEM
426 Enable the driver for NAND flash on platforms using a Cadence NAND
429 config MTD_NAND_ARASAN
430 tristate "Support for Arasan NAND flash controller"
431 depends on HAS_IOMEM && HAS_DMA
434 Enables the driver for the Arasan NAND flash controller on
435 Zynq Ultrascale+ MPSoC.
437 config MTD_NAND_INTEL_LGM
438 tristate "Support for NAND controller on Intel LGM SoC"
439 depends on OF || COMPILE_TEST
442 Enables support for NAND Flash chips on Intel's LGM SoC.
443 NAND flash controller interfaced through the External Bus Unit.
445 config MTD_NAND_ROCKCHIP
446 tristate "Rockchip NAND controller"
447 depends on ARCH_ROCKCHIP && HAS_IOMEM
449 Enables support for NAND controller on Rockchip SoCs.
450 There are four different versions of NAND FLASH Controllers,
452 NFC v600: RK2928, RK3066, RK3188
453 NFC v622: RK3036, RK3128
454 NFC v800: RK3308, RV1108
455 NFC v900: PX30, RK3326
457 config MTD_NAND_PL35X
458 tristate "ARM PL35X NAND controller"
459 depends on OF || COMPILE_TEST
462 Enables support for PrimeCell SMC PL351 and PL353 NAND
463 controller found on Zynq7000.
465 config MTD_NAND_RENESAS
466 tristate "Renesas R-Car Gen3 & RZ/N1 NAND controller"
467 depends on ARCH_RENESAS || COMPILE_TEST
469 Enables support for the NAND controller found on Renesas R-Car
470 Gen3 and RZ/N1 SoC families.
478 config MTD_NAND_NANDSIM
479 tristate "Support for NAND Flash Simulator"
481 The simulator may simulate various NAND flash chips for the
484 config MTD_NAND_RICOH
485 tristate "Ricoh xD card reader"
490 Enable support for Ricoh R5C852 xD card reader
491 You also need to enable either
492 NAND SSFDC (SmartMedia) read only translation layer' or new
493 experimental, readwrite
494 'SmartMedia/xD new translation layer'
496 config MTD_NAND_DISKONCHIP
497 tristate "DiskOnChip 2000, Millennium and Millennium Plus (NAND reimplementation)"
500 select REED_SOLOMON_DEC16
502 This is a reimplementation of M-Systems DiskOnChip 2000,
503 Millennium and Millennium Plus as a standard NAND device driver,
504 as opposed to the earlier self-contained MTD device drivers.
505 This should enable, among other things, proper JFFS2 operation on
508 config MTD_NAND_DISKONCHIP_PROBE_ADVANCED
509 bool "Advanced detection options for DiskOnChip"
510 depends on MTD_NAND_DISKONCHIP
512 This option allows you to specify nonstandard address at which to
513 probe for a DiskOnChip, or to change the detection options. You
514 are unlikely to need any of this unless you are using LinuxBIOS.
517 config MTD_NAND_DISKONCHIP_PROBE_ADDRESS
518 hex "Physical address of DiskOnChip" if MTD_NAND_DISKONCHIP_PROBE_ADVANCED
519 depends on MTD_NAND_DISKONCHIP
522 By default, the probe for DiskOnChip devices will look for a
523 DiskOnChip at every multiple of 0x2000 between 0xC8000 and 0xEE000.
524 This option allows you to specify a single address at which to probe
525 for the device, which is useful if you have other devices in that
526 range which get upset when they are probed.
528 (Note that on PowerPC, the normal probe will only check at
531 Normally, you should leave this set to zero, to allow the probe at
532 the normal addresses.
534 config MTD_NAND_DISKONCHIP_PROBE_HIGH
535 bool "Probe high addresses"
536 depends on MTD_NAND_DISKONCHIP_PROBE_ADVANCED
538 By default, the probe for DiskOnChip devices will look for a
539 DiskOnChip at every multiple of 0x2000 between 0xC8000 and 0xEE000.
540 This option changes to make it probe between 0xFFFC8000 and
541 0xFFFEE000. Unless you are using LinuxBIOS, this is unlikely to be
542 useful to you. Say 'N'.
544 config MTD_NAND_DISKONCHIP_BBTWRITE
545 bool "Allow BBT writes on DiskOnChip Millennium and 2000TSOP"
546 depends on MTD_NAND_DISKONCHIP
548 On DiskOnChip devices shipped with the INFTL filesystem (Millennium
549 and 2000 TSOP/Alon), Linux reserves some space at the end of the
550 device for the Bad Block Table (BBT). If you have existing INFTL
551 data on your device (created by non-Linux tools such as M-Systems'
552 DOS drivers), your data might overlap the area Linux wants to use for
553 the BBT. If this is a concern for you, leave this option disabled and
554 Linux will not write BBT data into this area.
555 The downside of leaving this option disabled is that if bad blocks
556 are detected by Linux, they will not be recorded in the BBT, which
557 could cause future problems.
558 Once you enable this option, new filesystems (INFTL or others, created
559 in Linux or other operating systems) will not use the reserved area.
560 The only reason not to enable this option is to prevent damage to
561 preexisting filesystems.
562 Even if you leave this disabled, you can enable BBT writes at module
563 load time (assuming you build diskonchip as a module) with the module
564 parameter "inftl_bbt_write=1".