drivers/mtd/nand/nandsim.c

   1 /*
   2  * NAND flash simulator.
   3  *
   4  * Author: Artem B. Bityuckiy <dedekind@oktetlabs.ru>, <dedekind@infradead.org>
   5  *
   6  * Copyright (C) 2004 Nokia Corporation
   7  *
   8  * Note: NS means "NAND Simulator".
   9  * Note: Input means input TO flash chip, output means output FROM chip.
  10  *
  11  * This program is free software; you can redistribute it and/or modify it
  12  * under the terms of the GNU General Public License as published by the
  13  * Free Software Foundation; either version 2, or (at your option) any later
  14  * version.
  15  *
  16  * This program is distributed in the hope that it will be useful, but
  17  * WITHOUT ANY WARRANTY; without even the implied warranty of
  18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General
  19  * Public License for more details.
  20  *
  21  * You should have received a copy of the GNU General Public License
  22  * along with this program; if not, write to the Free Software
  23  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA
  24  */
  25
  26 #include <linux/init.h>
  27 #include <linux/types.h>
  28 #include <linux/module.h>
  29 #include <linux/moduleparam.h>
  30 #include <linux/vmalloc.h>
  31 #include <linux/math64.h>
  32 #include <linux/slab.h>
  33 #include <linux/errno.h>
  34 #include <linux/string.h>
  35 #include <linux/mtd/mtd.h>
  36 #include <linux/mtd/nand.h>
  37 #include <linux/mtd/nand_bch.h>
  38 #include <linux/mtd/partitions.h>
  39 #include <linux/delay.h>
  40 #include <linux/list.h>
  41 #include <linux/random.h>
  42 #include <linux/sched.h>
  43 #include <linux/fs.h>
  44 #include <linux/pagemap.h>
  45 #include <linux/seq_file.h>
  46 #include <linux/debugfs.h>
  47
  48 /* Default simulator parameters values */
  49 #if !defined(CONFIG_NANDSIM_FIRST_ID_BYTE)  || \
  50     !defined(CONFIG_NANDSIM_SECOND_ID_BYTE) || \
  51     !defined(CONFIG_NANDSIM_THIRD_ID_BYTE)  || \
  52     !defined(CONFIG_NANDSIM_FOURTH_ID_BYTE)
  53 #define CONFIG_NANDSIM_FIRST_ID_BYTE  0x98
  54 #define CONFIG_NANDSIM_SECOND_ID_BYTE 0x39
  55 #define CONFIG_NANDSIM_THIRD_ID_BYTE  0xFF /* No byte */
  56 #define CONFIG_NANDSIM_FOURTH_ID_BYTE 0xFF /* No byte */
  57 #endif
  58
  59 #ifndef CONFIG_NANDSIM_ACCESS_DELAY
  60 #define CONFIG_NANDSIM_ACCESS_DELAY 25
  61 #endif
  62 #ifndef CONFIG_NANDSIM_PROGRAMM_DELAY
  63 #define CONFIG_NANDSIM_PROGRAMM_DELAY 200
  64 #endif
  65 #ifndef CONFIG_NANDSIM_ERASE_DELAY
  66 #define CONFIG_NANDSIM_ERASE_DELAY 2
  67 #endif
  68 #ifndef CONFIG_NANDSIM_OUTPUT_CYCLE
  69 #define CONFIG_NANDSIM_OUTPUT_CYCLE 40
  70 #endif
  71 #ifndef CONFIG_NANDSIM_INPUT_CYCLE
  72 #define CONFIG_NANDSIM_INPUT_CYCLE  50
  73 #endif
  74 #ifndef CONFIG_NANDSIM_BUS_WIDTH
  75 #define CONFIG_NANDSIM_BUS_WIDTH  8
  76 #endif
  77 #ifndef CONFIG_NANDSIM_DO_DELAYS
  78 #define CONFIG_NANDSIM_DO_DELAYS  0
  79 #endif
  80 #ifndef CONFIG_NANDSIM_LOG
  81 #define CONFIG_NANDSIM_LOG        0
  82 #endif
  83 #ifndef CONFIG_NANDSIM_DBG
  84 #define CONFIG_NANDSIM_DBG        0
  85 #endif
  86 #ifndef CONFIG_NANDSIM_MAX_PARTS
  87 #define CONFIG_NANDSIM_MAX_PARTS  32
  88 #endif
  89
  90 static uint access_delay   = CONFIG_NANDSIM_ACCESS_DELAY;
  91 static uint programm_delay = CONFIG_NANDSIM_PROGRAMM_DELAY;
  92 static uint erase_delay    = CONFIG_NANDSIM_ERASE_DELAY;
  93 static uint output_cycle   = CONFIG_NANDSIM_OUTPUT_CYCLE;
  94 static uint input_cycle    = CONFIG_NANDSIM_INPUT_CYCLE;
  95 static uint bus_width      = CONFIG_NANDSIM_BUS_WIDTH;
  96 static uint do_delays      = CONFIG_NANDSIM_DO_DELAYS;
  97 static uint log            = CONFIG_NANDSIM_LOG;
  98 static uint dbg            = CONFIG_NANDSIM_DBG;
  99 static unsigned long parts[CONFIG_NANDSIM_MAX_PARTS];
 100 static unsigned int parts_num;
 101 static char *badblocks = NULL;
 102 static char *weakblocks = NULL;
 103 static char *weakpages = NULL;
 104 static unsigned int bitflips = 0;
 105 static char *gravepages = NULL;
 106 static unsigned int overridesize = 0;
 107 static char *cache_file = NULL;
 108 static unsigned int bbt;
 109 static unsigned int bch;
 110 static u_char id_bytes[8] = {
 111         [0] = CONFIG_NANDSIM_FIRST_ID_BYTE,
 112         [1] = CONFIG_NANDSIM_SECOND_ID_BYTE,
 113         [2] = CONFIG_NANDSIM_THIRD_ID_BYTE,
 114         [3] = CONFIG_NANDSIM_FOURTH_ID_BYTE,
 115         [4 ... 7] = 0xFF,
 116 };
 117
 118 module_param_array(id_bytes, byte, NULL, 0400);
 119 module_param_named(first_id_byte, id_bytes[0], byte, 0400);
 120 module_param_named(second_id_byte, id_bytes[1], byte, 0400);
 121 module_param_named(third_id_byte, id_bytes[2], byte, 0400);
 122 module_param_named(fourth_id_byte, id_bytes[3], byte, 0400);
 123 module_param(access_delay,   uint, 0400);
 124 module_param(programm_delay, uint, 0400);
 125 module_param(erase_delay,    uint, 0400);
 126 module_param(output_cycle,   uint, 0400);
 127 module_param(input_cycle,    uint, 0400);
 128 module_param(bus_width,      uint, 0400);
 129 module_param(do_delays,      uint, 0400);
 130 module_param(log,            uint, 0400);
 131 module_param(dbg,            uint, 0400);
 132 module_param_array(parts, ulong, &parts_num, 0400);
 133 module_param(badblocks,      charp, 0400);
 134 module_param(weakblocks,     charp, 0400);
 135 module_param(weakpages,      charp, 0400);
 136 module_param(bitflips,       uint, 0400);
 137 module_param(gravepages,     charp, 0400);
 138 module_param(overridesize,   uint, 0400);
 139 module_param(cache_file,     charp, 0400);
 140 module_param(bbt,            uint, 0400);
 141 module_param(bch,            uint, 0400);
 142
 143 MODULE_PARM_DESC(id_bytes,       "The ID bytes returned by NAND Flash 'read ID' command");
 144 MODULE_PARM_DESC(first_id_byte,  "The first byte returned by NAND Flash 'read ID' command (manufacturer ID) (obsolete)");
 145 MODULE_PARM_DESC(second_id_byte, "The second byte returned by NAND Flash 'read ID' command (chip ID) (obsolete)");
 146 MODULE_PARM_DESC(third_id_byte,  "The third byte returned by NAND Flash 'read ID' command (obsolete)");
 147 MODULE_PARM_DESC(fourth_id_byte, "The fourth byte returned by NAND Flash 'read ID' command (obsolete)");
 148 MODULE_PARM_DESC(access_delay,   "Initial page access delay (microseconds)");
 149 MODULE_PARM_DESC(programm_delay, "Page programm delay (microseconds");
 150 MODULE_PARM_DESC(erase_delay,    "Sector erase delay (milliseconds)");
 151 MODULE_PARM_DESC(output_cycle,   "Word output (from flash) time (nanoseconds)");
 152 MODULE_PARM_DESC(input_cycle,    "Word input (to flash) time (nanoseconds)");
 153 MODULE_PARM_DESC(bus_width,      "Chip's bus width (8- or 16-bit)");
 154 MODULE_PARM_DESC(do_delays,      "Simulate NAND delays using busy-waits if not zero");
 155 MODULE_PARM_DESC(log,            "Perform logging if not zero");
 156 MODULE_PARM_DESC(dbg,            "Output debug information if not zero");
 157 MODULE_PARM_DESC(parts,          "Partition sizes (in erase blocks) separated by commas");
 158 /* Page and erase block positions for the following parameters are independent of any partitions */
 159 MODULE_PARM_DESC(badblocks,      "Erase blocks that are initially marked bad, separated by commas");
 160 MODULE_PARM_DESC(weakblocks,     "Weak erase blocks [: remaining erase cycles (defaults to 3)]"
 161                                  " separated by commas e.g. 113:2 means eb 113"
 162                                  " can be erased only twice before failing");
 163 MODULE_PARM_DESC(weakpages,      "Weak pages [: maximum writes (defaults to 3)]"
 164                                  " separated by commas e.g. 1401:2 means page 1401"
 165                                  " can be written only twice before failing");
 166 MODULE_PARM_DESC(bitflips,       "Maximum number of random bit flips per page (zero by default)");
 167 MODULE_PARM_DESC(gravepages,     "Pages that lose data [: maximum reads (defaults to 3)]"
 168                                  " separated by commas e.g. 1401:2 means page 1401"
 169                                  " can be read only twice before failing");
 170 MODULE_PARM_DESC(overridesize,   "Specifies the NAND Flash size overriding the ID bytes. "
 171                                  "The size is specified in erase blocks and as the exponent of a power of two"
 172                                  " e.g. 5 means a size of 32 erase blocks");
 173 MODULE_PARM_DESC(cache_file,     "File to use to cache nand pages instead of memory");
 174 MODULE_PARM_DESC(bbt,            "0 OOB, 1 BBT with marker in OOB, 2 BBT with marker in data area");
 175 MODULE_PARM_DESC(bch,            "Enable BCH ecc and set how many bits should "
 176                                  "be correctable in 512-byte blocks");
 177
 178 /* The largest possible page size */
 179 #define NS_LARGEST_PAGE_SIZE    4096
 180
 181 /* The prefix for simulator output */
 182 #define NS_OUTPUT_PREFIX "[nandsim]"
 183
 184 /* Simulator's output macros (logging, debugging, warning, error) */
 185 #define NS_LOG(args...) \
 186         do { if (log) printk(KERN_DEBUG NS_OUTPUT_PREFIX " log: " args); } while(0)
 187 #define NS_DBG(args...) \
 188         do { if (dbg) printk(KERN_DEBUG NS_OUTPUT_PREFIX " debug: " args); } while(0)
 189 #define NS_WARN(args...) \
 190         do { printk(KERN_WARNING NS_OUTPUT_PREFIX " warning: " args); } while(0)
 191 #define NS_ERR(args...) \
 192         do { printk(KERN_ERR NS_OUTPUT_PREFIX " error: " args); } while(0)
 193 #define NS_INFO(args...) \
 194         do { printk(KERN_INFO NS_OUTPUT_PREFIX " " args); } while(0)
 195
 196 /* Busy-wait delay macros (microseconds, milliseconds) */
 197 #define NS_UDELAY(us) \
 198         do { if (do_delays) udelay(us); } while(0)
 199 #define NS_MDELAY(us) \
 200         do { if (do_delays) mdelay(us); } while(0)
 201
 202 /* Is the nandsim structure initialized ? */
 203 #define NS_IS_INITIALIZED(ns) ((ns)->geom.totsz != 0)
 204
 205 /* Good operation completion status */
 206 #define NS_STATUS_OK(ns) (NAND_STATUS_READY | (NAND_STATUS_WP * ((ns)->lines.wp == 0)))
 207
 208 /* Operation failed completion status */
 209 #define NS_STATUS_FAILED(ns) (NAND_STATUS_FAIL | NS_STATUS_OK(ns))
 210
 211 /* Calculate the page offset in flash RAM image by (row, column) address */
 212 #define NS_RAW_OFFSET(ns) \
 213         (((ns)->regs.row * (ns)->geom.pgszoob) + (ns)->regs.column)
 214
 215 /* Calculate the OOB offset in flash RAM image by (row, column) address */
 216 #define NS_RAW_OFFSET_OOB(ns) (NS_RAW_OFFSET(ns) + ns->geom.pgsz)
 217
 218 /* After a command is input, the simulator goes to one of the following states */
 219 #define STATE_CMD_READ0        0x00000001 /* read data from the beginning of page */
 220 #define STATE_CMD_READ1        0x00000002 /* read data from the second half of page */
 221 #define STATE_CMD_READSTART    0x00000003 /* read data second command (large page devices) */
 222 #define STATE_CMD_PAGEPROG     0x00000004 /* start page program */
 223 #define STATE_CMD_READOOB      0x00000005 /* read OOB area */
 224 #define STATE_CMD_ERASE1       0x00000006 /* sector erase first command */
 225 #define STATE_CMD_STATUS       0x00000007 /* read status */
 226 #define STATE_CMD_SEQIN        0x00000009 /* sequential data input */
 227 #define STATE_CMD_READID       0x0000000A /* read ID */
 228 #define STATE_CMD_ERASE2       0x0000000B /* sector erase second command */
 229 #define STATE_CMD_RESET        0x0000000C /* reset */
 230 #define STATE_CMD_RNDOUT       0x0000000D /* random output command */
 231 #define STATE_CMD_RNDOUTSTART  0x0000000E /* random output start command */
 232 #define STATE_CMD_MASK         0x0000000F /* command states mask */
 233
 234 /* After an address is input, the simulator goes to one of these states */
 235 #define STATE_ADDR_PAGE        0x00000010 /* full (row, column) address is accepted */
 236 #define STATE_ADDR_SEC         0x00000020 /* sector address was accepted */
 237 #define STATE_ADDR_COLUMN      0x00000030 /* column address was accepted */
 238 #define STATE_ADDR_ZERO        0x00000040 /* one byte zero address was accepted */
 239 #define STATE_ADDR_MASK        0x00000070 /* address states mask */
 240
 241 /* During data input/output the simulator is in these states */
 242 #define STATE_DATAIN           0x00000100 /* waiting for data input */
 243 #define STATE_DATAIN_MASK      0x00000100 /* data input states mask */
 244
 245 #define STATE_DATAOUT          0x00001000 /* waiting for page data output */
 246 #define STATE_DATAOUT_ID       0x00002000 /* waiting for ID bytes output */
 247 #define STATE_DATAOUT_STATUS   0x00003000 /* waiting for status output */
 248 #define STATE_DATAOUT_MASK     0x00007000 /* data output states mask */
 249
 250 /* Previous operation is done, ready to accept new requests */
 251 #define STATE_READY            0x00000000
 252
 253 /* This state is used to mark that the next state isn't known yet */
 254 #define STATE_UNKNOWN          0x10000000
 255
 256 /* Simulator's actions bit masks */
 257 #define ACTION_CPY       0x00100000 /* copy page/OOB to the internal buffer */
 258 #define ACTION_PRGPAGE   0x00200000 /* program the internal buffer to flash */
 259 #define ACTION_SECERASE  0x00300000 /* erase sector */
 260 #define ACTION_ZEROOFF   0x00400000 /* don't add any offset to address */
 261 #define ACTION_HALFOFF   0x00500000 /* add to address half of page */
 262 #define ACTION_OOBOFF    0x00600000 /* add to address OOB offset */
 263 #define ACTION_MASK      0x00700000 /* action mask */
 264
 265 #define NS_OPER_NUM      13 /* Number of operations supported by the simulator */
 266 #define NS_OPER_STATES   6  /* Maximum number of states in operation */
 267
 268 #define OPT_ANY          0xFFFFFFFF /* any chip supports this operation */
 269 #define OPT_PAGE512      0x00000002 /* 512-byte  page chips */
 270 #define OPT_PAGE2048     0x00000008 /* 2048-byte page chips */
 271 #define OPT_PAGE512_8BIT 0x00000040 /* 512-byte page chips with 8-bit bus width */
 272 #define OPT_PAGE4096     0x00000080 /* 4096-byte page chips */
 273 #define OPT_LARGEPAGE    (OPT_PAGE2048 | OPT_PAGE4096) /* 2048 & 4096-byte page chips */
 274 #define OPT_SMALLPAGE    (OPT_PAGE512) /* 512-byte page chips */
 275
 276 /* Remove action bits from state */
 277 #define NS_STATE(x) ((x) & ~ACTION_MASK)
 278
 279 /*
 280  * Maximum previous states which need to be saved. Currently saving is
 281  * only needed for page program operation with preceded read command
 282  * (which is only valid for 512-byte pages).
 283  */
 284 #define NS_MAX_PREVSTATES 1
 285
 286 /* Maximum page cache pages needed to read or write a NAND page to the cache_file */
 287 #define NS_MAX_HELD_PAGES 16
 288
 289 struct nandsim_debug_info {
 290         struct dentry *dfs_root;
 291         struct dentry *dfs_wear_report;
 292 };
 293
 294 /*
 295  * A union to represent flash memory contents and flash buffer.
 296  */
 297 union ns_mem {
 298         u_char *byte;    /* for byte access */
 299         uint16_t *word;  /* for 16-bit word access */
 300 };
 301
 302 /*
 303  * The structure which describes all the internal simulator data.
 304  */
 305 struct nandsim {
 306         struct mtd_partition partitions[CONFIG_NANDSIM_MAX_PARTS];
 307         unsigned int nbparts;
 308
 309         uint busw;              /* flash chip bus width (8 or 16) */
 310         u_char ids[8];          /* chip's ID bytes */
 311         uint32_t options;       /* chip's characteristic bits */
 312         uint32_t state;         /* current chip state */
 313         uint32_t nxstate;       /* next expected state */
 314
 315         uint32_t *op;           /* current operation, NULL operations isn't known yet  */
 316         uint32_t pstates[NS_MAX_PREVSTATES]; /* previous states */
 317         uint16_t npstates;      /* number of previous states saved */
 318         uint16_t stateidx;      /* current state index */
 319
 320         /* The simulated NAND flash pages array */
 321         union ns_mem *pages;
 322
 323         /* Slab allocator for nand pages */
 324         struct kmem_cache *nand_pages_slab;
 325
 326         /* Internal buffer of page + OOB size bytes */
 327         union ns_mem buf;
 328
 329         /* NAND flash "geometry" */
 330         struct {
 331                 uint64_t totsz;     /* total flash size, bytes */
 332                 uint32_t secsz;     /* flash sector (erase block) size, bytes */
 333                 uint pgsz;          /* NAND flash page size, bytes */
 334                 uint oobsz;         /* page OOB area size, bytes */
 335                 uint64_t totszoob;  /* total flash size including OOB, bytes */
 336                 uint pgszoob;       /* page size including OOB , bytes*/
 337                 uint secszoob;      /* sector size including OOB, bytes */
 338                 uint pgnum;         /* total number of pages */
 339                 uint pgsec;         /* number of pages per sector */
 340                 uint secshift;      /* bits number in sector size */
 341                 uint pgshift;       /* bits number in page size */
 342                 uint pgaddrbytes;   /* bytes per page address */
 343                 uint secaddrbytes;  /* bytes per sector address */
 344                 uint idbytes;       /* the number ID bytes that this chip outputs */
 345         } geom;
 346
 347         /* NAND flash internal registers */
 348         struct {
 349                 unsigned command; /* the command register */
 350                 u_char   status;  /* the status register */
 351                 uint     row;     /* the page number */
 352                 uint     column;  /* the offset within page */
 353                 uint     count;   /* internal counter */
 354                 uint     num;     /* number of bytes which must be processed */
 355                 uint     off;     /* fixed page offset */
 356         } regs;
 357
 358         /* NAND flash lines state */
 359         struct {
 360                 int ce;  /* chip Enable */
 361                 int cle; /* command Latch Enable */
 362                 int ale; /* address Latch Enable */
 363                 int wp;  /* write Protect */
 364         } lines;
 365
 366         /* Fields needed when using a cache file */
 367         struct file *cfile; /* Open file */
 368         unsigned long *pages_written; /* Which pages have been written */
 369         void *file_buf;
 370         struct page *held_pages[NS_MAX_HELD_PAGES];
 371         int held_cnt;
 372
 373         struct nandsim_debug_info dbg;
 374 };
 375
 376 /*
 377  * Operations array. To perform any operation the simulator must pass
 378  * through the correspondent states chain.
 379  */
 380 static struct nandsim_operations {
 381         uint32_t reqopts;  /* options which are required to perform the operation */
 382         uint32_t states[NS_OPER_STATES]; /* operation's states */
 383 } ops[NS_OPER_NUM] = {
 384         /* Read page + OOB from the beginning */
 385         {OPT_SMALLPAGE, {STATE_CMD_READ0 | ACTION_ZEROOFF, STATE_ADDR_PAGE | ACTION_CPY,
 386                         STATE_DATAOUT, STATE_READY}},
 387         /* Read page + OOB from the second half */
 388         {OPT_PAGE512_8BIT, {STATE_CMD_READ1 | ACTION_HALFOFF, STATE_ADDR_PAGE | ACTION_CPY,
 389                         STATE_DATAOUT, STATE_READY}},
 390         /* Read OOB */
 391         {OPT_SMALLPAGE, {STATE_CMD_READOOB | ACTION_OOBOFF, STATE_ADDR_PAGE | ACTION_CPY,
 392                         STATE_DATAOUT, STATE_READY}},
 393         /* Program page starting from the beginning */
 394         {OPT_ANY, {STATE_CMD_SEQIN, STATE_ADDR_PAGE, STATE_DATAIN,
 395                         STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
 396         /* Program page starting from the beginning */
 397         {OPT_SMALLPAGE, {STATE_CMD_READ0, STATE_CMD_SEQIN | ACTION_ZEROOFF, STATE_ADDR_PAGE,
 398                               STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
 399         /* Program page starting from the second half */
 400         {OPT_PAGE512, {STATE_CMD_READ1, STATE_CMD_SEQIN | ACTION_HALFOFF, STATE_ADDR_PAGE,
 401                               STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
 402         /* Program OOB */
 403         {OPT_SMALLPAGE, {STATE_CMD_READOOB, STATE_CMD_SEQIN | ACTION_OOBOFF, STATE_ADDR_PAGE,
 404                               STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
 405         /* Erase sector */
 406         {OPT_ANY, {STATE_CMD_ERASE1, STATE_ADDR_SEC, STATE_CMD_ERASE2 | ACTION_SECERASE, STATE_READY}},
 407         /* Read status */
 408         {OPT_ANY, {STATE_CMD_STATUS, STATE_DATAOUT_STATUS, STATE_READY}},
 409         /* Read ID */
 410         {OPT_ANY, {STATE_CMD_READID, STATE_ADDR_ZERO, STATE_DATAOUT_ID, STATE_READY}},
 411         /* Large page devices read page */
 412         {OPT_LARGEPAGE, {STATE_CMD_READ0, STATE_ADDR_PAGE, STATE_CMD_READSTART | ACTION_CPY,
 413                                STATE_DATAOUT, STATE_READY}},
 414         /* Large page devices random page read */
 415         {OPT_LARGEPAGE, {STATE_CMD_RNDOUT, STATE_ADDR_COLUMN, STATE_CMD_RNDOUTSTART | ACTION_CPY,
 416                                STATE_DATAOUT, STATE_READY}},
 417 };
 418
 419 struct weak_block {
 420         struct list_head list;
 421         unsigned int erase_block_no;
 422         unsigned int max_erases;
 423         unsigned int erases_done;
 424 };
 425
 426 static LIST_HEAD(weak_blocks);
 427
 428 struct weak_page {
 429         struct list_head list;
 430         unsigned int page_no;
 431         unsigned int max_writes;
 432         unsigned int writes_done;
 433 };
 434
 435 static LIST_HEAD(weak_pages);
 436
 437 struct grave_page {
 438         struct list_head list;
 439         unsigned int page_no;
 440         unsigned int max_reads;
 441         unsigned int reads_done;
 442 };
 443
 444 static LIST_HEAD(grave_pages);
 445
 446 static unsigned long *erase_block_wear = NULL;
 447 static unsigned int wear_eb_count = 0;
 448 static unsigned long total_wear = 0;
 449
 450 /* MTD structure for NAND controller */
 451 static struct mtd_info *nsmtd;
 452
 453 static int nandsim_debugfs_show(struct seq_file *m, void *private)
 454 {
 455         unsigned long wmin = -1, wmax = 0, avg;
 456         unsigned long deciles[10], decile_max[10], tot = 0;
 457         unsigned int i;
 458
 459         /* Calc wear stats */
 460         for (i = 0; i < wear_eb_count; ++i) {
 461                 unsigned long wear = erase_block_wear[i];
 462                 if (wear < wmin)
 463                         wmin = wear;
 464                 if (wear > wmax)
 465                         wmax = wear;
 466                 tot += wear;
 467         }
 468
 469         for (i = 0; i < 9; ++i) {
 470                 deciles[i] = 0;
 471                 decile_max[i] = (wmax * (i + 1) + 5) / 10;
 472         }
 473         deciles[9] = 0;
 474         decile_max[9] = wmax;
 475         for (i = 0; i < wear_eb_count; ++i) {
 476                 int d;
 477                 unsigned long wear = erase_block_wear[i];
 478                 for (d = 0; d < 10; ++d)
 479                         if (wear <= decile_max[d]) {
 480                                 deciles[d] += 1;
 481                                 break;
 482                         }
 483         }
 484         avg = tot / wear_eb_count;
 485
 486         /* Output wear report */
 487         seq_printf(m, "Total numbers of erases:  %lu\n", tot);
 488         seq_printf(m, "Number of erase blocks:   %u\n", wear_eb_count);
 489         seq_printf(m, "Average number of erases: %lu\n", avg);
 490         seq_printf(m, "Maximum number of erases: %lu\n", wmax);
 491         seq_printf(m, "Minimum number of erases: %lu\n", wmin);
 492         for (i = 0; i < 10; ++i) {
 493                 unsigned long from = (i ? decile_max[i - 1] + 1 : 0);
 494                 if (from > decile_max[i])
 495                         continue;
 496                 seq_printf(m, "Number of ebs with erase counts from %lu to %lu : %lu\n",
 497                         from,
 498                         decile_max[i],
 499                         deciles[i]);
 500         }
 501
 502         return 0;
 503 }
 504
 505 static int nandsim_debugfs_open(struct inode *inode, struct file *file)
 506 {
 507         return single_open(file, nandsim_debugfs_show, inode->i_private);
 508 }
 509
 510 static const struct file_operations dfs_fops = {
 511         .open           = nandsim_debugfs_open,
 512         .read           = seq_read,
 513         .llseek         = seq_lseek,
 514         .release        = single_release,
 515 };
 516
 517 /**
 518  * nandsim_debugfs_create - initialize debugfs
 519  * @dev: nandsim device description object
 520  *
 521  * This function creates all debugfs files for UBI device @ubi. Returns zero in
 522  * case of success and a negative error code in case of failure.
 523  */
 524 static int nandsim_debugfs_create(struct nandsim *dev)
 525 {
 526         struct nandsim_debug_info *dbg = &dev->dbg;
 527         struct dentry *dent;
 528
 529         if (!IS_ENABLED(CONFIG_DEBUG_FS))
 530                 return 0;
 531
 532         dent = debugfs_create_dir("nandsim", NULL);
 533         if (!dent) {
 534                 NS_ERR("cannot create \"nandsim\" debugfs directory\n");
 535                 return -ENODEV;
 536         }
 537         dbg->dfs_root = dent;
 538
 539         dent = debugfs_create_file("wear_report", S_IRUSR,
 540                                    dbg->dfs_root, dev, &dfs_fops);
 541         if (!dent)
 542                 goto out_remove;
 543         dbg->dfs_wear_report = dent;
 544
 545         return 0;
 546
 547 out_remove:
 548         debugfs_remove_recursive(dbg->dfs_root);
 549         return -ENODEV;
 550 }
 551
 552 /**
 553  * nandsim_debugfs_remove - destroy all debugfs files
 554  */
 555 static void nandsim_debugfs_remove(struct nandsim *ns)
 556 {
 557         if (IS_ENABLED(CONFIG_DEBUG_FS))
 558                 debugfs_remove_recursive(ns->dbg.dfs_root);
 559 }
 560
 561 /*
 562  * Allocate array of page pointers, create slab allocation for an array
 563  * and initialize the array by NULL pointers.
 564  *
 565  * RETURNS: 0 if success, -ENOMEM if memory alloc fails.
 566  */
 567 static int __init alloc_device(struct nandsim *ns)
 568 {
 569         struct file *cfile;
 570         int i, err;
 571
 572         if (cache_file) {
 573                 cfile = filp_open(cache_file, O_CREAT | O_RDWR | O_LARGEFILE, 0600);
 574                 if (IS_ERR(cfile))
 575                         return PTR_ERR(cfile);
 576                 if (!(cfile->f_mode & FMODE_CAN_READ)) {
 577                         NS_ERR("alloc_device: cache file not readable\n");
 578                         err = -EINVAL;
 579                         goto err_close;
 580                 }
 581                 if (!(cfile->f_mode & FMODE_CAN_WRITE)) {
 582                         NS_ERR("alloc_device: cache file not writeable\n");
 583                         err = -EINVAL;
 584                         goto err_close;
 585                 }
 586                 ns->pages_written = vzalloc(BITS_TO_LONGS(ns->geom.pgnum) *
 587                                             sizeof(unsigned long));
 588                 if (!ns->pages_written) {
 589                         NS_ERR("alloc_device: unable to allocate pages written array\n");
 590                         err = -ENOMEM;
 591                         goto err_close;
 592                 }
 593                 ns->file_buf = kmalloc(ns->geom.pgszoob, GFP_KERNEL);
 594                 if (!ns->file_buf) {
 595                         NS_ERR("alloc_device: unable to allocate file buf\n");
 596                         err = -ENOMEM;
 597                         goto err_free;
 598                 }
 599                 ns->cfile = cfile;
 600                 return 0;
 601         }
 602
 603         ns->pages = vmalloc(ns->geom.pgnum * sizeof(union ns_mem));
 604         if (!ns->pages) {
 605                 NS_ERR("alloc_device: unable to allocate page array\n");
 606                 return -ENOMEM;
 607         }
 608         for (i = 0; i < ns->geom.pgnum; i++) {
 609                 ns->pages[i].byte = NULL;
 610         }
 611         ns->nand_pages_slab = kmem_cache_create("nandsim",
 612                                                 ns->geom.pgszoob, 0, 0, NULL);
 613         if (!ns->nand_pages_slab) {
 614                 NS_ERR("cache_create: unable to create kmem_cache\n");
 615                 return -ENOMEM;
 616         }
 617
 618         return 0;
 619
 620 err_free:
 621         vfree(ns->pages_written);
 622 err_close:
 623         filp_close(cfile, NULL);
 624         return err;
 625 }
 626
 627 /*
 628  * Free any allocated pages, and free the array of page pointers.
 629  */
 630 static void free_device(struct nandsim *ns)
 631 {
 632         int i;
 633
 634         if (ns->cfile) {
 635                 kfree(ns->file_buf);
 636                 vfree(ns->pages_written);
 637                 filp_close(ns->cfile, NULL);
 638                 return;
 639         }
 640
 641         if (ns->pages) {
 642                 for (i = 0; i < ns->geom.pgnum; i++) {
 643                         if (ns->pages[i].byte)
 644                                 kmem_cache_free(ns->nand_pages_slab,
 645                                                 ns->pages[i].byte);
 646                 }
 647                 kmem_cache_destroy(ns->nand_pages_slab);
 648                 vfree(ns->pages);
 649         }
 650 }
 651
 652 static char __init *get_partition_name(int i)
 653 {
 654         return kasprintf(GFP_KERNEL, "NAND simulator partition %d", i);
 655 }
 656
 657 /*
 658  * Initialize the nandsim structure.
 659  *
 660  * RETURNS: 0 if success, -ERRNO if failure.
 661  */
 662 static int __init init_nandsim(struct mtd_info *mtd)
 663 {
 664         struct nand_chip *chip = mtd_to_nand(mtd);
 665         struct nandsim   *ns   = nand_get_controller_data(chip);
 666         int i, ret = 0;
 667         uint64_t remains;
 668         uint64_t next_offset;
 669
 670         if (NS_IS_INITIALIZED(ns)) {
 671                 NS_ERR("init_nandsim: nandsim is already initialized\n");
 672                 return -EIO;
 673         }
 674
 675         /* Force mtd to not do delays */
 676         chip->chip_delay = 0;
 677
 678         /* Initialize the NAND flash parameters */
 679         ns->busw = chip->options & NAND_BUSWIDTH_16 ? 16 : 8;
 680         ns->geom.totsz    = mtd->size;
 681         ns->geom.pgsz     = mtd->writesize;
 682         ns->geom.oobsz    = mtd->oobsize;
 683         ns->geom.secsz    = mtd->erasesize;
 684         ns->geom.pgszoob  = ns->geom.pgsz + ns->geom.oobsz;
 685         ns->geom.pgnum    = div_u64(ns->geom.totsz, ns->geom.pgsz);
 686         ns->geom.totszoob = ns->geom.totsz + (uint64_t)ns->geom.pgnum * ns->geom.oobsz;
 687         ns->geom.secshift = ffs(ns->geom.secsz) - 1;
 688         ns->geom.pgshift  = chip->page_shift;
 689         ns->geom.pgsec    = ns->geom.secsz / ns->geom.pgsz;
 690         ns->geom.secszoob = ns->geom.secsz + ns->geom.oobsz * ns->geom.pgsec;
 691         ns->options = 0;
 692
 693         if (ns->geom.pgsz == 512) {
 694                 ns->options |= OPT_PAGE512;
 695                 if (ns->busw == 8)
 696                         ns->options |= OPT_PAGE512_8BIT;
 697         } else if (ns->geom.pgsz == 2048) {
 698                 ns->options |= OPT_PAGE2048;
 699         } else if (ns->geom.pgsz == 4096) {
 700                 ns->options |= OPT_PAGE4096;
 701         } else {
 702                 NS_ERR("init_nandsim: unknown page size %u\n", ns->geom.pgsz);
 703                 return -EIO;
 704         }
 705
 706         if (ns->options & OPT_SMALLPAGE) {
 707                 if (ns->geom.totsz <= (32 << 20)) {
 708                         ns->geom.pgaddrbytes  = 3;
 709                         ns->geom.secaddrbytes = 2;
 710                 } else {
 711                         ns->geom.pgaddrbytes  = 4;
 712                         ns->geom.secaddrbytes = 3;
 713                 }
 714         } else {
 715                 if (ns->geom.totsz <= (128 << 20)) {
 716                         ns->geom.pgaddrbytes  = 4;
 717                         ns->geom.secaddrbytes = 2;
 718                 } else {
 719                         ns->geom.pgaddrbytes  = 5;
 720                         ns->geom.secaddrbytes = 3;
 721                 }
 722         }
 723
 724         /* Fill the partition_info structure */
 725         if (parts_num > ARRAY_SIZE(ns->partitions)) {
 726                 NS_ERR("too many partitions.\n");
 727                 return -EINVAL;
 728         }
 729         remains = ns->geom.totsz;
 730         next_offset = 0;
 731         for (i = 0; i < parts_num; ++i) {
 732                 uint64_t part_sz = (uint64_t)parts[i] * ns->geom.secsz;
 733
 734                 if (!part_sz || part_sz > remains) {
 735                         NS_ERR("bad partition size.\n");
 736                         return -EINVAL;
 737                 }
 738                 ns->partitions[i].name   = get_partition_name(i);
 739                 if (!ns->partitions[i].name) {
 740                         NS_ERR("unable to allocate memory.\n");
 741                         return -ENOMEM;
 742                 }
 743                 ns->partitions[i].offset = next_offset;
 744                 ns->partitions[i].size   = part_sz;
 745                 next_offset += ns->partitions[i].size;
 746                 remains -= ns->partitions[i].size;
 747         }
 748         ns->nbparts = parts_num;
 749         if (remains) {
 750                 if (parts_num + 1 > ARRAY_SIZE(ns->partitions)) {
 751                         NS_ERR("too many partitions.\n");
 752                         return -EINVAL;
 753                 }
 754                 ns->partitions[i].name   = get_partition_name(i);
 755                 if (!ns->partitions[i].name) {
 756                         NS_ERR("unable to allocate memory.\n");
 757                         return -ENOMEM;
 758                 }
 759                 ns->partitions[i].offset = next_offset;
 760                 ns->partitions[i].size   = remains;
 761                 ns->nbparts += 1;
 762         }
 763
 764         if (ns->busw == 16)
 765                 NS_WARN("16-bit flashes support wasn't tested\n");
 766
 767         printk("flash size: %llu MiB\n",
 768                         (unsigned long long)ns->geom.totsz >> 20);
 769         printk("page size: %u bytes\n",         ns->geom.pgsz);
 770         printk("OOB area size: %u bytes\n",     ns->geom.oobsz);
 771         printk("sector size: %u KiB\n",         ns->geom.secsz >> 10);
 772         printk("pages number: %u\n",            ns->geom.pgnum);
 773         printk("pages per sector: %u\n",        ns->geom.pgsec);
 774         printk("bus width: %u\n",               ns->busw);
 775         printk("bits in sector size: %u\n",     ns->geom.secshift);
 776         printk("bits in page size: %u\n",       ns->geom.pgshift);
 777         printk("bits in OOB size: %u\n",        ffs(ns->geom.oobsz) - 1);
 778         printk("flash size with OOB: %llu KiB\n",
 779                         (unsigned long long)ns->geom.totszoob >> 10);
 780         printk("page address bytes: %u\n",      ns->geom.pgaddrbytes);
 781         printk("sector address bytes: %u\n",    ns->geom.secaddrbytes);
 782         printk("options: %#x\n",                ns->options);
 783
 784         if ((ret = alloc_device(ns)) != 0)
 785                 return ret;
 786
 787         /* Allocate / initialize the internal buffer */
 788         ns->buf.byte = kmalloc(ns->geom.pgszoob, GFP_KERNEL);
 789         if (!ns->buf.byte) {
 790                 NS_ERR("init_nandsim: unable to allocate %u bytes for the internal buffer\n",
 791                         ns->geom.pgszoob);
 792                 return -ENOMEM;
 793         }
 794         memset(ns->buf.byte, 0xFF, ns->geom.pgszoob);
 795
 796         return 0;
 797 }
 798
 799 /*
 800  * Free the nandsim structure.
 801  */
 802 static void free_nandsim(struct nandsim *ns)
 803 {
 804         kfree(ns->buf.byte);
 805         free_device(ns);
 806
 807         return;
 808 }
 809
 810 static int parse_badblocks(struct nandsim *ns, struct mtd_info *mtd)
 811 {
 812         char *w;
 813         int zero_ok;
 814         unsigned int erase_block_no;
 815         loff_t offset;
 816
 817         if (!badblocks)
 818                 return 0;
 819         w = badblocks;
 820         do {
 821                 zero_ok = (*w == '0' ? 1 : 0);
 822                 erase_block_no = simple_strtoul(w, &w, 0);
 823                 if (!zero_ok && !erase_block_no) {
 824                         NS_ERR("invalid badblocks.\n");
 825                         return -EINVAL;
 826                 }
 827                 offset = (loff_t)erase_block_no * ns->geom.secsz;
 828                 if (mtd_block_markbad(mtd, offset)) {
 829                         NS_ERR("invalid badblocks.\n");
 830                         return -EINVAL;
 831                 }
 832                 if (*w == ',')
 833                         w += 1;
 834         } while (*w);
 835         return 0;
 836 }
 837
 838 static int parse_weakblocks(void)
 839 {
 840         char *w;
 841         int zero_ok;
 842         unsigned int erase_block_no;
 843         unsigned int max_erases;
 844         struct weak_block *wb;
 845
 846         if (!weakblocks)
 847                 return 0;
 848         w = weakblocks;
 849         do {
 850                 zero_ok = (*w == '0' ? 1 : 0);
 851                 erase_block_no = simple_strtoul(w, &w, 0);
 852                 if (!zero_ok && !erase_block_no) {
 853                         NS_ERR("invalid weakblocks.\n");
 854                         return -EINVAL;
 855                 }
 856                 max_erases = 3;
 857                 if (*w == ':') {
 858                         w += 1;
 859                         max_erases = simple_strtoul(w, &w, 0);
 860                 }
 861                 if (*w == ',')
 862                         w += 1;
 863                 wb = kzalloc(sizeof(*wb), GFP_KERNEL);
 864                 if (!wb) {
 865                         NS_ERR("unable to allocate memory.\n");
 866                         return -ENOMEM;
 867                 }
 868                 wb->erase_block_no = erase_block_no;
 869                 wb->max_erases = max_erases;
 870                 list_add(&wb->list, &weak_blocks);
 871         } while (*w);
 872         return 0;
 873 }
 874
 875 static int erase_error(unsigned int erase_block_no)
 876 {
 877         struct weak_block *wb;
 878
 879         list_for_each_entry(wb, &weak_blocks, list)
 880                 if (wb->erase_block_no == erase_block_no) {
 881                         if (wb->erases_done >= wb->max_erases)
 882                                 return 1;
 883                         wb->erases_done += 1;
 884                         return 0;
 885                 }
 886         return 0;
 887 }
 888
 889 static int parse_weakpages(void)
 890 {
 891         char *w;
 892         int zero_ok;
 893         unsigned int page_no;
 894         unsigned int max_writes;
 895         struct weak_page *wp;
 896
 897         if (!weakpages)
 898                 return 0;
 899         w = weakpages;
 900         do {
 901                 zero_ok = (*w == '0' ? 1 : 0);
 902                 page_no = simple_strtoul(w, &w, 0);
 903                 if (!zero_ok && !page_no) {
 904                         NS_ERR("invalid weakpagess.\n");
 905                         return -EINVAL;
 906                 }
 907                 max_writes = 3;
 908                 if (*w == ':') {
 909                         w += 1;
 910                         max_writes = simple_strtoul(w, &w, 0);
 911                 }
 912                 if (*w == ',')
 913                         w += 1;
 914                 wp = kzalloc(sizeof(*wp), GFP_KERNEL);
 915                 if (!wp) {
 916                         NS_ERR("unable to allocate memory.\n");
 917                         return -ENOMEM;
 918                 }
 919                 wp->page_no = page_no;
 920                 wp->max_writes = max_writes;
 921                 list_add(&wp->list, &weak_pages);
 922         } while (*w);
 923         return 0;
 924 }
 925
 926 static int write_error(unsigned int page_no)
 927 {
 928         struct weak_page *wp;
 929
 930         list_for_each_entry(wp, &weak_pages, list)
 931                 if (wp->page_no == page_no) {
 932                         if (wp->writes_done >= wp->max_writes)
 933                                 return 1;
 934                         wp->writes_done += 1;
 935                         return 0;
 936                 }
 937         return 0;
 938 }
 939
 940 static int parse_gravepages(void)
 941 {
 942         char *g;
 943         int zero_ok;
 944         unsigned int page_no;
 945         unsigned int max_reads;
 946         struct grave_page *gp;
 947
 948         if (!gravepages)
 949                 return 0;
 950         g = gravepages;
 951         do {
 952                 zero_ok = (*g == '0' ? 1 : 0);
 953                 page_no = simple_strtoul(g, &g, 0);
 954                 if (!zero_ok && !page_no) {
 955                         NS_ERR("invalid gravepagess.\n");
 956                         return -EINVAL;
 957                 }
 958                 max_reads = 3;
 959                 if (*g == ':') {
 960                         g += 1;
 961                         max_reads = simple_strtoul(g, &g, 0);
 962                 }
 963                 if (*g == ',')
 964                         g += 1;
 965                 gp = kzalloc(sizeof(*gp), GFP_KERNEL);
 966                 if (!gp) {
 967                         NS_ERR("unable to allocate memory.\n");
 968                         return -ENOMEM;
 969                 }
 970                 gp->page_no = page_no;
 971                 gp->max_reads = max_reads;
 972                 list_add(&gp->list, &grave_pages);
 973         } while (*g);
 974         return 0;
 975 }
 976
 977 static int read_error(unsigned int page_no)
 978 {
 979         struct grave_page *gp;
 980
 981         list_for_each_entry(gp, &grave_pages, list)
 982                 if (gp->page_no == page_no) {
 983                         if (gp->reads_done >= gp->max_reads)
 984                                 return 1;
 985                         gp->reads_done += 1;
 986                         return 0;
 987                 }
 988         return 0;
 989 }
 990
 991 static void free_lists(void)
 992 {
 993         struct list_head *pos, *n;
 994         list_for_each_safe(pos, n, &weak_blocks) {
 995                 list_del(pos);
 996                 kfree(list_entry(pos, struct weak_block, list));
 997         }
 998         list_for_each_safe(pos, n, &weak_pages) {
 999                 list_del(pos);
1000                 kfree(list_entry(pos, struct weak_page, list));
1001         }
1002         list_for_each_safe(pos, n, &grave_pages) {
1003                 list_del(pos);
1004                 kfree(list_entry(pos, struct grave_page, list));
1005         }
1006         kfree(erase_block_wear);
1007 }
1008
1009 static int setup_wear_reporting(struct mtd_info *mtd)
1010 {
1011         size_t mem;
1012
1013         wear_eb_count = div_u64(mtd->size, mtd->erasesize);
1014         mem = wear_eb_count * sizeof(unsigned long);
1015         if (mem / sizeof(unsigned long) != wear_eb_count) {
1016                 NS_ERR("Too many erase blocks for wear reporting\n");
1017                 return -ENOMEM;
1018         }
1019         erase_block_wear = kzalloc(mem, GFP_KERNEL);
1020         if (!erase_block_wear) {
1021                 NS_ERR("Too many erase blocks for wear reporting\n");
1022                 return -ENOMEM;
1023         }
1024         return 0;
1025 }
1026
1027 static void update_wear(unsigned int erase_block_no)
1028 {
1029         if (!erase_block_wear)
1030                 return;
1031         total_wear += 1;
1032         /*
1033          * TODO: Notify this through a debugfs entry,
1034          * instead of showing an error message.
1035          */
1036         if (total_wear == 0)
1037                 NS_ERR("Erase counter total overflow\n");
1038         erase_block_wear[erase_block_no] += 1;
1039         if (erase_block_wear[erase_block_no] == 0)
1040                 NS_ERR("Erase counter overflow for erase block %u\n", erase_block_no);
1041 }
1042
1043 /*
1044  * Returns the string representation of 'state' state.
1045  */
1046 static char *get_state_name(uint32_t state)
1047 {
1048         switch (NS_STATE(state)) {
1049                 case STATE_CMD_READ0:
1050                         return "STATE_CMD_READ0";
1051                 case STATE_CMD_READ1:
1052                         return "STATE_CMD_READ1";
1053                 case STATE_CMD_PAGEPROG:
1054                         return "STATE_CMD_PAGEPROG";
1055                 case STATE_CMD_READOOB:
1056                         return "STATE_CMD_READOOB";
1057                 case STATE_CMD_READSTART:
1058                         return "STATE_CMD_READSTART";
1059                 case STATE_CMD_ERASE1:
1060                         return "STATE_CMD_ERASE1";
1061                 case STATE_CMD_STATUS:
1062                         return "STATE_CMD_STATUS";
1063                 case STATE_CMD_SEQIN:
1064                         return "STATE_CMD_SEQIN";
1065                 case STATE_CMD_READID:
1066                         return "STATE_CMD_READID";
1067                 case STATE_CMD_ERASE2:
1068                         return "STATE_CMD_ERASE2";
1069                 case STATE_CMD_RESET:
1070                         return "STATE_CMD_RESET";
1071                 case STATE_CMD_RNDOUT:
1072                         return "STATE_CMD_RNDOUT";
1073                 case STATE_CMD_RNDOUTSTART:
1074                         return "STATE_CMD_RNDOUTSTART";
1075                 case STATE_ADDR_PAGE:
1076                         return "STATE_ADDR_PAGE";
1077                 case STATE_ADDR_SEC:
1078                         return "STATE_ADDR_SEC";
1079                 case STATE_ADDR_ZERO:
1080                         return "STATE_ADDR_ZERO";
1081                 case STATE_ADDR_COLUMN:
1082                         return "STATE_ADDR_COLUMN";
1083                 case STATE_DATAIN:
1084                         return "STATE_DATAIN";
1085                 case STATE_DATAOUT:
1086                         return "STATE_DATAOUT";
1087                 case STATE_DATAOUT_ID:
1088                         return "STATE_DATAOUT_ID";
1089                 case STATE_DATAOUT_STATUS:
1090                         return "STATE_DATAOUT_STATUS";
1091                 case STATE_READY:
1092                         return "STATE_READY";
1093                 case STATE_UNKNOWN:
1094                         return "STATE_UNKNOWN";
1095         }
1096
1097         NS_ERR("get_state_name: unknown state, BUG\n");
1098         return NULL;
1099 }
1100
1101 /*
1102  * Check if command is valid.
1103  *
1104  * RETURNS: 1 if wrong command, 0 if right.
1105  */
1106 static int check_command(int cmd)
1107 {
1108         switch (cmd) {
1109
1110         case NAND_CMD_READ0:
1111         case NAND_CMD_READ1:
1112         case NAND_CMD_READSTART:
1113         case NAND_CMD_PAGEPROG:
1114         case NAND_CMD_READOOB:
1115         case NAND_CMD_ERASE1:
1116         case NAND_CMD_STATUS:
1117         case NAND_CMD_SEQIN:
1118         case NAND_CMD_READID:
1119         case NAND_CMD_ERASE2:
1120         case NAND_CMD_RESET:
1121         case NAND_CMD_RNDOUT:
1122         case NAND_CMD_RNDOUTSTART:
1123                 return 0;
1124
1125         default:
1126                 return 1;
1127         }
1128 }
1129
1130 /*
1131  * Returns state after command is accepted by command number.
1132  */
1133 static uint32_t get_state_by_command(unsigned command)
1134 {
1135         switch (command) {
1136                 case NAND_CMD_READ0:
1137                         return STATE_CMD_READ0;
1138                 case NAND_CMD_READ1:
1139                         return STATE_CMD_READ1;
1140                 case NAND_CMD_PAGEPROG:
1141                         return STATE_CMD_PAGEPROG;
1142                 case NAND_CMD_READSTART:
1143                         return STATE_CMD_READSTART;
1144                 case NAND_CMD_READOOB:
1145                         return STATE_CMD_READOOB;
1146                 case NAND_CMD_ERASE1:
1147                         return STATE_CMD_ERASE1;
1148                 case NAND_CMD_STATUS:
1149                         return STATE_CMD_STATUS;
1150                 case NAND_CMD_SEQIN:
1151                         return STATE_CMD_SEQIN;
1152                 case NAND_CMD_READID:
1153                         return STATE_CMD_READID;
1154                 case NAND_CMD_ERASE2:
1155                         return STATE_CMD_ERASE2;
1156                 case NAND_CMD_RESET:
1157                         return STATE_CMD_RESET;
1158                 case NAND_CMD_RNDOUT:
1159                         return STATE_CMD_RNDOUT;
1160                 case NAND_CMD_RNDOUTSTART:
1161                         return STATE_CMD_RNDOUTSTART;
1162         }
1163
1164         NS_ERR("get_state_by_command: unknown command, BUG\n");
1165         return 0;
1166 }
1167
1168 /*
1169  * Move an address byte to the correspondent internal register.
1170  */
1171 static inline void accept_addr_byte(struct nandsim *ns, u_char bt)
1172 {
1173         uint byte = (uint)bt;
1174
1175         if (ns->regs.count < (ns->geom.pgaddrbytes - ns->geom.secaddrbytes))
1176                 ns->regs.column |= (byte << 8 * ns->regs.count);
1177         else {
1178                 ns->regs.row |= (byte << 8 * (ns->regs.count -
1179                                                 ns->geom.pgaddrbytes +
1180                                                 ns->geom.secaddrbytes));
1181         }
1182
1183         return;
1184 }
1185
1186 /*
1187  * Switch to STATE_READY state.
1188  */
1189 static inline void switch_to_ready_state(struct nandsim *ns, u_char status)
1190 {
1191         NS_DBG("switch_to_ready_state: switch to %s state\n", get_state_name(STATE_READY));
1192
1193         ns->state       = STATE_READY;
1194         ns->nxstate     = STATE_UNKNOWN;
1195         ns->op          = NULL;
1196         ns->npstates    = 0;
1197         ns->stateidx    = 0;
1198         ns->regs.num    = 0;
1199         ns->regs.count  = 0;
1200         ns->regs.off    = 0;
1201         ns->regs.row    = 0;
1202         ns->regs.column = 0;
1203         ns->regs.status = status;
1204 }
1205
1206 /*
1207  * If the operation isn't known yet, try to find it in the global array
1208  * of supported operations.
1209  *
1210  * Operation can be unknown because of the following.
1211  *   1. New command was accepted and this is the first call to find the
1212  *      correspondent states chain. In this case ns->npstates = 0;
1213  *   2. There are several operations which begin with the same command(s)
1214  *      (for example program from the second half and read from the
1215  *      second half operations both begin with the READ1 command). In this
1216  *      case the ns->pstates[] array contains previous states.
1217  *
1218  * Thus, the function tries to find operation containing the following
1219  * states (if the 'flag' parameter is 0):
1220  *    ns->pstates[0], ... ns->pstates[ns->npstates], ns->state
1221  *
1222  * If (one and only one) matching operation is found, it is accepted (
1223  * ns->ops, ns->state, ns->nxstate are initialized, ns->npstate is
1224  * zeroed).
1225  *
1226  * If there are several matches, the current state is pushed to the
1227  * ns->pstates.
1228  *
1229  * The operation can be unknown only while commands are input to the chip.
1230  * As soon as address command is accepted, the operation must be known.
1231  * In such situation the function is called with 'flag' != 0, and the
1232  * operation is searched using the following pattern:
1233  *     ns->pstates[0], ... ns->pstates[ns->npstates], <address input>
1234  *
1235  * It is supposed that this pattern must either match one operation or
1236  * none. There can't be ambiguity in that case.
1237  *
1238  * If no matches found, the function does the following:
1239  *   1. if there are saved states present, try to ignore them and search
1240  *      again only using the last command. If nothing was found, switch
1241  *      to the STATE_READY state.
1242  *   2. if there are no saved states, switch to the STATE_READY state.
1243  *
1244  * RETURNS: -2 - no matched operations found.
1245  *          -1 - several matches.
1246  *           0 - operation is found.
1247  */
1248 static int find_operation(struct nandsim *ns, uint32_t flag)
1249 {
1250         int opsfound = 0;
1251         int i, j, idx = 0;
1252
1253         for (i = 0; i < NS_OPER_NUM; i++) {
1254
1255                 int found = 1;
1256
1257                 if (!(ns->options & ops[i].reqopts))
1258                         /* Ignore operations we can't perform */
1259                         continue;
1260
1261                 if (flag) {
1262                         if (!(ops[i].states[ns->npstates] & STATE_ADDR_MASK))
1263                                 continue;
1264                 } else {
1265                         if (NS_STATE(ns->state) != NS_STATE(ops[i].states[ns->npstates]))
1266                                 continue;
1267                 }
1268
1269                 for (j = 0; j < ns->npstates; j++)
1270                         if (NS_STATE(ops[i].states[j]) != NS_STATE(ns->pstates[j])
1271                                 && (ns->options & ops[idx].reqopts)) {
1272                                 found = 0;
1273                                 break;
1274                         }
1275
1276                 if (found) {
1277                         idx = i;
1278                         opsfound += 1;
1279                 }
1280         }
1281
1282         if (opsfound == 1) {
1283                 /* Exact match */
1284                 ns->op = &ops[idx].states[0];
1285                 if (flag) {
1286                         /*
1287                          * In this case the find_operation function was
1288                          * called when address has just began input. But it isn't
1289                          * yet fully input and the current state must
1290                          * not be one of STATE_ADDR_*, but the STATE_ADDR_*
1291                          * state must be the next state (ns->nxstate).
1292                          */
1293                         ns->stateidx = ns->npstates - 1;
1294                 } else {
1295                         ns->stateidx = ns->npstates;
1296                 }
1297                 ns->npstates = 0;
1298                 ns->state = ns->op[ns->stateidx];
1299                 ns->nxstate = ns->op[ns->stateidx + 1];
1300                 NS_DBG("find_operation: operation found, index: %d, state: %s, nxstate %s\n",
1301                                 idx, get_state_name(ns->state), get_state_name(ns->nxstate));
1302                 return 0;
1303         }
1304
1305         if (opsfound == 0) {
1306                 /* Nothing was found. Try to ignore previous commands (if any) and search again */
1307                 if (ns->npstates != 0) {
1308                         NS_DBG("find_operation: no operation found, try again with state %s\n",
1309                                         get_state_name(ns->state));
1310                         ns->npstates = 0;
1311                         return find_operation(ns, 0);
1312
1313                 }
1314                 NS_DBG("find_operation: no operations found\n");
1315                 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1316                 return -2;
1317         }
1318
1319         if (flag) {
1320                 /* This shouldn't happen */
1321                 NS_DBG("find_operation: BUG, operation must be known if address is input\n");
1322                 return -2;
1323         }
1324
1325         NS_DBG("find_operation: there is still ambiguity\n");
1326
1327         ns->pstates[ns->npstates++] = ns->state;
1328
1329         return -1;
1330 }
1331
1332 static void put_pages(struct nandsim *ns)
1333 {
1334         int i;
1335
1336         for (i = 0; i < ns->held_cnt; i++)
1337                 put_page(ns->held_pages[i]);
1338 }
1339
1340 /* Get page cache pages in advance to provide NOFS memory allocation */
1341 static int get_pages(struct nandsim *ns, struct file *file, size_t count, loff_t pos)
1342 {
1343         pgoff_t index, start_index, end_index;
1344         struct page *page;
1345         struct address_space *mapping = file->f_mapping;
1346
1347         start_index = pos >> PAGE_SHIFT;
1348         end_index = (pos + count - 1) >> PAGE_SHIFT;
1349         if (end_index - start_index + 1 > NS_MAX_HELD_PAGES)
1350                 return -EINVAL;
1351         ns->held_cnt = 0;
1352         for (index = start_index; index <= end_index; index++) {
1353                 page = find_get_page(mapping, index);
1354                 if (page == NULL) {
1355                         page = find_or_create_page(mapping, index, GFP_NOFS);
1356                         if (page == NULL) {
1357                                 write_inode_now(mapping->host, 1);
1358                                 page = find_or_create_page(mapping, index, GFP_NOFS);
1359                         }
1360                         if (page == NULL) {
1361                                 put_pages(ns);
1362                                 return -ENOMEM;
1363                         }
1364                         unlock_page(page);
1365                 }
1366                 ns->held_pages[ns->held_cnt++] = page;
1367         }
1368         return 0;
1369 }
1370
1371 static int set_memalloc(void)
1372 {
1373         if (current->flags & PF_MEMALLOC)
1374                 return 0;
1375         current->flags |= PF_MEMALLOC;
1376         return 1;
1377 }
1378
1379 static void clear_memalloc(int memalloc)
1380 {
1381         if (memalloc)
1382                 current->flags &= ~PF_MEMALLOC;
1383 }
1384
1385 static ssize_t read_file(struct nandsim *ns, struct file *file, void *buf, size_t count, loff_t pos)
1386 {
1387         ssize_t tx;
1388         int err, memalloc;
1389
1390         err = get_pages(ns, file, count, pos);
1391         if (err)
1392                 return err;
1393         memalloc = set_memalloc();
1394         tx = kernel_read(file, pos, buf, count);
1395         clear_memalloc(memalloc);
1396         put_pages(ns);
1397         return tx;
1398 }
1399
1400 static ssize_t write_file(struct nandsim *ns, struct file *file, void *buf, size_t count, loff_t pos)
1401 {
1402         ssize_t tx;
1403         int err, memalloc;
1404
1405         err = get_pages(ns, file, count, pos);
1406         if (err)
1407                 return err;
1408         memalloc = set_memalloc();
1409         tx = kernel_write(file, buf, count, pos);
1410         clear_memalloc(memalloc);
1411         put_pages(ns);
1412         return tx;
1413 }
1414
1415 /*
1416  * Returns a pointer to the current page.
1417  */
1418 static inline union ns_mem *NS_GET_PAGE(struct nandsim *ns)
1419 {
1420         return &(ns->pages[ns->regs.row]);
1421 }
1422
1423 /*
1424  * Retuns a pointer to the current byte, within the current page.
1425  */
1426 static inline u_char *NS_PAGE_BYTE_OFF(struct nandsim *ns)
1427 {
1428         return NS_GET_PAGE(ns)->byte + ns->regs.column + ns->regs.off;
1429 }
1430
1431 static int do_read_error(struct nandsim *ns, int num)
1432 {
1433         unsigned int page_no = ns->regs.row;
1434
1435         if (read_error(page_no)) {
1436                 prandom_bytes(ns->buf.byte, num);
1437                 NS_WARN("simulating read error in page %u\n", page_no);
1438                 return 1;
1439         }
1440         return 0;
1441 }
1442
1443 static void do_bit_flips(struct nandsim *ns, int num)
1444 {
1445         if (bitflips && prandom_u32() < (1 << 22)) {
1446                 int flips = 1;
1447                 if (bitflips > 1)
1448                         flips = (prandom_u32() % (int) bitflips) + 1;
1449                 while (flips--) {
1450                         int pos = prandom_u32() % (num * 8);
1451                         ns->buf.byte[pos / 8] ^= (1 << (pos % 8));
1452                         NS_WARN("read_page: flipping bit %d in page %d "
1453                                 "reading from %d ecc: corrected=%u failed=%u\n",
1454                                 pos, ns->regs.row, ns->regs.column + ns->regs.off,
1455                                 nsmtd->ecc_stats.corrected, nsmtd->ecc_stats.failed);
1456                 }
1457         }
1458 }
1459
1460 /*
1461  * Fill the NAND buffer with data read from the specified page.
1462  */
1463 static void read_page(struct nandsim *ns, int num)
1464 {
1465         union ns_mem *mypage;
1466
1467         if (ns->cfile) {
1468                 if (!test_bit(ns->regs.row, ns->pages_written)) {
1469                         NS_DBG("read_page: page %d not written\n", ns->regs.row);
1470                         memset(ns->buf.byte, 0xFF, num);
1471                 } else {
1472                         loff_t pos;
1473                         ssize_t tx;
1474
1475                         NS_DBG("read_page: page %d written, reading from %d\n",
1476                                 ns->regs.row, ns->regs.column + ns->regs.off);
1477                         if (do_read_error(ns, num))
1478                                 return;
1479                         pos = (loff_t)NS_RAW_OFFSET(ns) + ns->regs.off;
1480                         tx = read_file(ns, ns->cfile, ns->buf.byte, num, pos);
1481                         if (tx != num) {
1482                                 NS_ERR("read_page: read error for page %d ret %ld\n", ns->regs.row, (long)tx);
1483                                 return;
1484                         }
1485                         do_bit_flips(ns, num);
1486                 }
1487                 return;
1488         }
1489
1490         mypage = NS_GET_PAGE(ns);
1491         if (mypage->byte == NULL) {
1492                 NS_DBG("read_page: page %d not allocated\n", ns->regs.row);
1493                 memset(ns->buf.byte, 0xFF, num);
1494         } else {
1495                 NS_DBG("read_page: page %d allocated, reading from %d\n",
1496                         ns->regs.row, ns->regs.column + ns->regs.off);
1497                 if (do_read_error(ns, num))
1498                         return;
1499                 memcpy(ns->buf.byte, NS_PAGE_BYTE_OFF(ns), num);
1500                 do_bit_flips(ns, num);
1501         }
1502 }
1503
1504 /*
1505  * Erase all pages in the specified sector.
1506  */
1507 static void erase_sector(struct nandsim *ns)
1508 {
1509         union ns_mem *mypage;
1510         int i;
1511
1512         if (ns->cfile) {
1513                 for (i = 0; i < ns->geom.pgsec; i++)
1514                         if (__test_and_clear_bit(ns->regs.row + i,
1515                                                  ns->pages_written)) {
1516                                 NS_DBG("erase_sector: freeing page %d\n", ns->regs.row + i);
1517                         }
1518                 return;
1519         }
1520
1521         mypage = NS_GET_PAGE(ns);
1522         for (i = 0; i < ns->geom.pgsec; i++) {
1523                 if (mypage->byte != NULL) {
1524                         NS_DBG("erase_sector: freeing page %d\n", ns->regs.row+i);
1525                         kmem_cache_free(ns->nand_pages_slab, mypage->byte);
1526                         mypage->byte = NULL;
1527                 }
1528                 mypage++;
1529         }
1530 }
1531
1532 /*
1533  * Program the specified page with the contents from the NAND buffer.
1534  */
1535 static int prog_page(struct nandsim *ns, int num)
1536 {
1537         int i;
1538         union ns_mem *mypage;
1539         u_char *pg_off;
1540
1541         if (ns->cfile) {
1542                 loff_t off;
1543                 ssize_t tx;
1544                 int all;
1545
1546                 NS_DBG("prog_page: writing page %d\n", ns->regs.row);
1547                 pg_off = ns->file_buf + ns->regs.column + ns->regs.off;
1548                 off = (loff_t)NS_RAW_OFFSET(ns) + ns->regs.off;
1549                 if (!test_bit(ns->regs.row, ns->pages_written)) {
1550                         all = 1;
1551                         memset(ns->file_buf, 0xff, ns->geom.pgszoob);
1552                 } else {
1553                         all = 0;
1554                         tx = read_file(ns, ns->cfile, pg_off, num, off);
1555                         if (tx != num) {
1556                                 NS_ERR("prog_page: read error for page %d ret %ld\n", ns->regs.row, (long)tx);
1557                                 return -1;
1558                         }
1559                 }
1560                 for (i = 0; i < num; i++)
1561                         pg_off[i] &= ns->buf.byte[i];
1562                 if (all) {
1563                         loff_t pos = (loff_t)ns->regs.row * ns->geom.pgszoob;
1564                         tx = write_file(ns, ns->cfile, ns->file_buf, ns->geom.pgszoob, pos);
1565                         if (tx != ns->geom.pgszoob) {
1566                                 NS_ERR("prog_page: write error for page %d ret %ld\n", ns->regs.row, (long)tx);
1567                                 return -1;
1568                         }
1569                         __set_bit(ns->regs.row, ns->pages_written);
1570                 } else {
1571                         tx = write_file(ns, ns->cfile, pg_off, num, off);
1572                         if (tx != num) {
1573                                 NS_ERR("prog_page: write error for page %d ret %ld\n", ns->regs.row, (long)tx);
1574                                 return -1;
1575                         }
1576                 }
1577                 return 0;
1578         }
1579
1580         mypage = NS_GET_PAGE(ns);
1581         if (mypage->byte == NULL) {
1582                 NS_DBG("prog_page: allocating page %d\n", ns->regs.row);
1583                 /*
1584                  * We allocate memory with GFP_NOFS because a flash FS may
1585                  * utilize this. If it is holding an FS lock, then gets here,
1586                  * then kernel memory alloc runs writeback which goes to the FS
1587                  * again and deadlocks. This was seen in practice.
1588                  */
1589                 mypage->byte = kmem_cache_alloc(ns->nand_pages_slab, GFP_NOFS);
1590                 if (mypage->byte == NULL) {
1591                         NS_ERR("prog_page: error allocating memory for page %d\n", ns->regs.row);
1592                         return -1;
1593                 }
1594                 memset(mypage->byte, 0xFF, ns->geom.pgszoob);
1595         }
1596
1597         pg_off = NS_PAGE_BYTE_OFF(ns);
1598         for (i = 0; i < num; i++)
1599                 pg_off[i] &= ns->buf.byte[i];
1600
1601         return 0;
1602 }
1603
1604 /*
1605  * If state has any action bit, perform this action.
1606  *
1607  * RETURNS: 0 if success, -1 if error.
1608  */
1609 static int do_state_action(struct nandsim *ns, uint32_t action)
1610 {
1611         int num;
1612         int busdiv = ns->busw == 8 ? 1 : 2;
1613         unsigned int erase_block_no, page_no;
1614
1615         action &= ACTION_MASK;
1616
1617         /* Check that page address input is correct */
1618         if (action != ACTION_SECERASE && ns->regs.row >= ns->geom.pgnum) {
1619                 NS_WARN("do_state_action: wrong page number (%#x)\n", ns->regs.row);
1620                 return -1;
1621         }
1622
1623         switch (action) {
1624
1625         case ACTION_CPY:
1626                 /*
1627                  * Copy page data to the internal buffer.
1628                  */
1629
1630                 /* Column shouldn't be very large */
1631                 if (ns->regs.column >= (ns->geom.pgszoob - ns->regs.off)) {
1632                         NS_ERR("do_state_action: column number is too large\n");
1633                         break;
1634                 }
1635                 num = ns->geom.pgszoob - ns->regs.off - ns->regs.column;
1636                 read_page(ns, num);
1637
1638                 NS_DBG("do_state_action: (ACTION_CPY:) copy %d bytes to int buf, raw offset %d\n",
1639                         num, NS_RAW_OFFSET(ns) + ns->regs.off);
1640
1641                 if (ns->regs.off == 0)
1642                         NS_LOG("read page %d\n", ns->regs.row);
1643                 else if (ns->regs.off < ns->geom.pgsz)
1644                         NS_LOG("read page %d (second half)\n", ns->regs.row);
1645                 else
1646                         NS_LOG("read OOB of page %d\n", ns->regs.row);
1647
1648                 NS_UDELAY(access_delay);
1649                 NS_UDELAY(input_cycle * ns->geom.pgsz / 1000 / busdiv);
1650
1651                 break;
1652
1653         case ACTION_SECERASE:
1654                 /*
1655                  * Erase sector.
1656                  */
1657
1658                 if (ns->lines.wp) {
1659                         NS_ERR("do_state_action: device is write-protected, ignore sector erase\n");
1660                         return -1;
1661                 }
1662
1663                 if (ns->regs.row >= ns->geom.pgnum - ns->geom.pgsec
1664                         || (ns->regs.row & ~(ns->geom.secsz - 1))) {
1665                         NS_ERR("do_state_action: wrong sector address (%#x)\n", ns->regs.row);
1666                         return -1;
1667                 }
1668
1669                 ns->regs.row = (ns->regs.row <<
1670                                 8 * (ns->geom.pgaddrbytes - ns->geom.secaddrbytes)) | ns->regs.column;
1671                 ns->regs.column = 0;
1672
1673                 erase_block_no = ns->regs.row >> (ns->geom.secshift - ns->geom.pgshift);
1674
1675                 NS_DBG("do_state_action: erase sector at address %#x, off = %d\n",
1676                                 ns->regs.row, NS_RAW_OFFSET(ns));
1677                 NS_LOG("erase sector %u\n", erase_block_no);
1678
1679                 erase_sector(ns);
1680
1681                 NS_MDELAY(erase_delay);
1682
1683                 if (erase_block_wear)
1684                         update_wear(erase_block_no);
1685
1686                 if (erase_error(erase_block_no)) {
1687                         NS_WARN("simulating erase failure in erase block %u\n", erase_block_no);
1688                         return -1;
1689                 }
1690
1691                 break;
1692
1693         case ACTION_PRGPAGE:
1694                 /*
1695                  * Program page - move internal buffer data to the page.
1696                  */
1697
1698                 if (ns->lines.wp) {
1699                         NS_WARN("do_state_action: device is write-protected, programm\n");
1700                         return -1;
1701                 }
1702
1703                 num = ns->geom.pgszoob - ns->regs.off - ns->regs.column;
1704                 if (num != ns->regs.count) {
1705                         NS_ERR("do_state_action: too few bytes were input (%d instead of %d)\n",
1706                                         ns->regs.count, num);
1707                         return -1;
1708                 }
1709
1710                 if (prog_page(ns, num) == -1)
1711                         return -1;
1712
1713                 page_no = ns->regs.row;
1714
1715                 NS_DBG("do_state_action: copy %d bytes from int buf to (%#x, %#x), raw off = %d\n",
1716                         num, ns->regs.row, ns->regs.column, NS_RAW_OFFSET(ns) + ns->regs.off);
1717                 NS_LOG("programm page %d\n", ns->regs.row);
1718
1719                 NS_UDELAY(programm_delay);
1720                 NS_UDELAY(output_cycle * ns->geom.pgsz / 1000 / busdiv);
1721
1722                 if (write_error(page_no)) {
1723                         NS_WARN("simulating write failure in page %u\n", page_no);
1724                         return -1;
1725                 }
1726
1727                 break;
1728
1729         case ACTION_ZEROOFF:
1730                 NS_DBG("do_state_action: set internal offset to 0\n");
1731                 ns->regs.off = 0;
1732                 break;
1733
1734         case ACTION_HALFOFF:
1735                 if (!(ns->options & OPT_PAGE512_8BIT)) {
1736                         NS_ERR("do_state_action: BUG! can't skip half of page for non-512"
1737                                 "byte page size 8x chips\n");
1738                         return -1;
1739                 }
1740                 NS_DBG("do_state_action: set internal offset to %d\n", ns->geom.pgsz/2);
1741                 ns->regs.off = ns->geom.pgsz/2;
1742                 break;
1743
1744         case ACTION_OOBOFF:
1745                 NS_DBG("do_state_action: set internal offset to %d\n", ns->geom.pgsz);
1746                 ns->regs.off = ns->geom.pgsz;
1747                 break;
1748
1749         default:
1750                 NS_DBG("do_state_action: BUG! unknown action\n");
1751         }
1752
1753         return 0;
1754 }
1755
1756 /*
1757  * Switch simulator's state.
1758  */
1759 static void switch_state(struct nandsim *ns)
1760 {
1761         if (ns->op) {
1762                 /*
1763                  * The current operation have already been identified.
1764                  * Just follow the states chain.
1765                  */
1766
1767                 ns->stateidx += 1;
1768                 ns->state = ns->nxstate;
1769                 ns->nxstate = ns->op[ns->stateidx + 1];
1770
1771                 NS_DBG("switch_state: operation is known, switch to the next state, "
1772                         "state: %s, nxstate: %s\n",
1773                         get_state_name(ns->state), get_state_name(ns->nxstate));
1774
1775                 /* See, whether we need to do some action */
1776                 if ((ns->state & ACTION_MASK) && do_state_action(ns, ns->state) < 0) {
1777                         switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1778                         return;
1779                 }
1780
1781         } else {
1782                 /*
1783                  * We don't yet know which operation we perform.
1784                  * Try to identify it.
1785                  */
1786
1787                 /*
1788                  *  The only event causing the switch_state function to
1789                  *  be called with yet unknown operation is new command.
1790                  */
1791                 ns->state = get_state_by_command(ns->regs.command);
1792
1793                 NS_DBG("switch_state: operation is unknown, try to find it\n");
1794
1795                 if (find_operation(ns, 0) != 0)
1796                         return;
1797
1798                 if ((ns->state & ACTION_MASK) && do_state_action(ns, ns->state) < 0) {
1799                         switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1800                         return;
1801                 }
1802         }
1803
1804         /* For 16x devices column means the page offset in words */
1805         if ((ns->nxstate & STATE_ADDR_MASK) && ns->busw == 16) {
1806                 NS_DBG("switch_state: double the column number for 16x device\n");
1807                 ns->regs.column <<= 1;
1808         }
1809
1810         if (NS_STATE(ns->nxstate) == STATE_READY) {
1811                 /*
1812                  * The current state is the last. Return to STATE_READY
1813                  */
1814
1815                 u_char status = NS_STATUS_OK(ns);
1816
1817                 /* In case of data states, see if all bytes were input/output */
1818                 if ((ns->state & (STATE_DATAIN_MASK | STATE_DATAOUT_MASK))
1819                         && ns->regs.count != ns->regs.num) {
1820                         NS_WARN("switch_state: not all bytes were processed, %d left\n",
1821                                         ns->regs.num - ns->regs.count);
1822                         status = NS_STATUS_FAILED(ns);
1823                 }
1824
1825                 NS_DBG("switch_state: operation complete, switch to STATE_READY state\n");
1826
1827                 switch_to_ready_state(ns, status);
1828
1829                 return;
1830         } else if (ns->nxstate & (STATE_DATAIN_MASK | STATE_DATAOUT_MASK)) {
1831                 /*
1832                  * If the next state is data input/output, switch to it now
1833                  */
1834
1835                 ns->state      = ns->nxstate;
1836                 ns->nxstate    = ns->op[++ns->stateidx + 1];
1837                 ns->regs.num   = ns->regs.count = 0;
1838
1839                 NS_DBG("switch_state: the next state is data I/O, switch, "
1840                         "state: %s, nxstate: %s\n",
1841                         get_state_name(ns->state), get_state_name(ns->nxstate));
1842
1843                 /*
1844                  * Set the internal register to the count of bytes which
1845                  * are expected to be input or output
1846                  */
1847                 switch (NS_STATE(ns->state)) {
1848                         case STATE_DATAIN:
1849                         case STATE_DATAOUT:
1850                                 ns->regs.num = ns->geom.pgszoob - ns->regs.off - ns->regs.column;
1851                                 break;
1852
1853                         case STATE_DATAOUT_ID:
1854                                 ns->regs.num = ns->geom.idbytes;
1855                                 break;
1856
1857                         case STATE_DATAOUT_STATUS:
1858                                 ns->regs.count = ns->regs.num = 0;
1859                                 break;
1860
1861                         default:
1862                                 NS_ERR("switch_state: BUG! unknown data state\n");
1863                 }
1864
1865         } else if (ns->nxstate & STATE_ADDR_MASK) {
1866                 /*
1867                  * If the next state is address input, set the internal
1868                  * register to the number of expected address bytes
1869                  */
1870
1871                 ns->regs.count = 0;
1872
1873                 switch (NS_STATE(ns->nxstate)) {
1874                         case STATE_ADDR_PAGE:
1875                                 ns->regs.num = ns->geom.pgaddrbytes;
1876
1877                                 break;
1878                         case STATE_ADDR_SEC:
1879                                 ns->regs.num = ns->geom.secaddrbytes;
1880                                 break;
1881
1882                         case STATE_ADDR_ZERO:
1883                                 ns->regs.num = 1;
1884                                 break;
1885
1886                         case STATE_ADDR_COLUMN:
1887                                 /* Column address is always 2 bytes */
1888                                 ns->regs.num = ns->geom.pgaddrbytes - ns->geom.secaddrbytes;
1889                                 break;
1890
1891                         default:
1892                                 NS_ERR("switch_state: BUG! unknown address state\n");
1893                 }
1894         } else {
1895                 /*
1896                  * Just reset internal counters.
1897                  */
1898
1899                 ns->regs.num = 0;
1900                 ns->regs.count = 0;
1901         }
1902 }
1903
1904 static u_char ns_nand_read_byte(struct mtd_info *mtd)
1905 {
1906         struct nand_chip *chip = mtd_to_nand(mtd);
1907         struct nandsim *ns = nand_get_controller_data(chip);
1908         u_char outb = 0x00;
1909
1910         /* Sanity and correctness checks */
1911         if (!ns->lines.ce) {
1912                 NS_ERR("read_byte: chip is disabled, return %#x\n", (uint)outb);
1913                 return outb;
1914         }
1915         if (ns->lines.ale || ns->lines.cle) {
1916                 NS_ERR("read_byte: ALE or CLE pin is high, return %#x\n", (uint)outb);
1917                 return outb;
1918         }
1919         if (!(ns->state & STATE_DATAOUT_MASK)) {
1920                 NS_WARN("read_byte: unexpected data output cycle, state is %s "
1921                         "return %#x\n", get_state_name(ns->state), (uint)outb);
1922                 return outb;
1923         }
1924
1925         /* Status register may be read as many times as it is wanted */
1926         if (NS_STATE(ns->state) == STATE_DATAOUT_STATUS) {
1927                 NS_DBG("read_byte: return %#x status\n", ns->regs.status);
1928                 return ns->regs.status;
1929         }
1930
1931         /* Check if there is any data in the internal buffer which may be read */
1932         if (ns->regs.count == ns->regs.num) {
1933                 NS_WARN("read_byte: no more data to output, return %#x\n", (uint)outb);
1934                 return outb;
1935         }
1936
1937         switch (NS_STATE(ns->state)) {
1938                 case STATE_DATAOUT:
1939                         if (ns->busw == 8) {
1940                                 outb = ns->buf.byte[ns->regs.count];
1941                                 ns->regs.count += 1;
1942                         } else {
1943                                 outb = (u_char)cpu_to_le16(ns->buf.word[ns->regs.count >> 1]);
1944                                 ns->regs.count += 2;
1945                         }
1946                         break;
1947                 case STATE_DATAOUT_ID:
1948                         NS_DBG("read_byte: read ID byte %d, total = %d\n", ns->regs.count, ns->regs.num);
1949                         outb = ns->ids[ns->regs.count];
1950                         ns->regs.count += 1;
1951                         break;
1952                 default:
1953                         BUG();
1954         }
1955
1956         if (ns->regs.count == ns->regs.num) {
1957                 NS_DBG("read_byte: all bytes were read\n");
1958
1959                 if (NS_STATE(ns->nxstate) == STATE_READY)
1960                         switch_state(ns);
1961         }
1962
1963         return outb;
1964 }
1965
1966 static void ns_nand_write_byte(struct mtd_info *mtd, u_char byte)
1967 {
1968         struct nand_chip *chip = mtd_to_nand(mtd);
1969         struct nandsim *ns = nand_get_controller_data(chip);
1970
1971         /* Sanity and correctness checks */
1972         if (!ns->lines.ce) {
1973                 NS_ERR("write_byte: chip is disabled, ignore write\n");
1974                 return;
1975         }
1976         if (ns->lines.ale && ns->lines.cle) {
1977                 NS_ERR("write_byte: ALE and CLE pins are high simultaneously, ignore write\n");
1978                 return;
1979         }
1980
1981         if (ns->lines.cle == 1) {
1982                 /*
1983                  * The byte written is a command.
1984                  */
1985
1986                 if (byte == NAND_CMD_RESET) {
1987                         NS_LOG("reset chip\n");
1988                         switch_to_ready_state(ns, NS_STATUS_OK(ns));
1989                         return;
1990                 }
1991
1992                 /* Check that the command byte is correct */
1993                 if (check_command(byte)) {
1994                         NS_ERR("write_byte: unknown command %#x\n", (uint)byte);
1995                         return;
1996                 }
1997
1998                 if (NS_STATE(ns->state) == STATE_DATAOUT_STATUS
1999                         || NS_STATE(ns->state) == STATE_DATAOUT) {
2000                         int row = ns->regs.row;
2001
2002                         switch_state(ns);
2003                         if (byte == NAND_CMD_RNDOUT)
2004                                 ns->regs.row = row;
2005                 }
2006
2007                 /* Check if chip is expecting command */
2008                 if (NS_STATE(ns->nxstate) != STATE_UNKNOWN && !(ns->nxstate & STATE_CMD_MASK)) {
2009                         /* Do not warn if only 2 id bytes are read */
2010                         if (!(ns->regs.command == NAND_CMD_READID &&
2011                             NS_STATE(ns->state) == STATE_DATAOUT_ID && ns->regs.count == 2)) {
2012                                 /*
2013                                  * We are in situation when something else (not command)
2014                                  * was expected but command was input. In this case ignore
2015                                  * previous command(s)/state(s) and accept the last one.
2016                                  */
2017                                 NS_WARN("write_byte: command (%#x) wasn't expected, expected state is %s, "
2018                                         "ignore previous states\n", (uint)byte, get_state_name(ns->nxstate));
2019                         }
2020                         switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2021                 }
2022
2023                 NS_DBG("command byte corresponding to %s state accepted\n",
2024                         get_state_name(get_state_by_command(byte)));
2025                 ns->regs.command = byte;
2026                 switch_state(ns);
2027
2028         } else if (ns->lines.ale == 1) {
2029                 /*
2030                  * The byte written is an address.
2031                  */
2032
2033                 if (NS_STATE(ns->nxstate) == STATE_UNKNOWN) {
2034
2035                         NS_DBG("write_byte: operation isn't known yet, identify it\n");
2036
2037                         if (find_operation(ns, 1) < 0)
2038                                 return;
2039
2040                         if ((ns->state & ACTION_MASK) && do_state_action(ns, ns->state) < 0) {
2041                                 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2042                                 return;
2043                         }
2044
2045                         ns->regs.count = 0;
2046                         switch (NS_STATE(ns->nxstate)) {
2047                                 case STATE_ADDR_PAGE:
2048                                         ns->regs.num = ns->geom.pgaddrbytes;
2049                                         break;
2050                                 case STATE_ADDR_SEC:
2051                                         ns->regs.num = ns->geom.secaddrbytes;
2052                                         break;
2053                                 case STATE_ADDR_ZERO:
2054                                         ns->regs.num = 1;
2055                                         break;
2056                                 default:
2057                                         BUG();
2058                         }
2059                 }
2060
2061                 /* Check that chip is expecting address */
2062                 if (!(ns->nxstate & STATE_ADDR_MASK)) {
2063                         NS_ERR("write_byte: address (%#x) isn't expected, expected state is %s, "
2064                                 "switch to STATE_READY\n", (uint)byte, get_state_name(ns->nxstate));
2065                         switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2066                         return;
2067                 }
2068
2069                 /* Check if this is expected byte */
2070                 if (ns->regs.count == ns->regs.num) {
2071                         NS_ERR("write_byte: no more address bytes expected\n");
2072                         switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2073                         return;
2074                 }
2075
2076                 accept_addr_byte(ns, byte);
2077
2078                 ns->regs.count += 1;
2079
2080                 NS_DBG("write_byte: address byte %#x was accepted (%d bytes input, %d expected)\n",
2081                                 (uint)byte, ns->regs.count, ns->regs.num);
2082
2083                 if (ns->regs.count == ns->regs.num) {
2084                         NS_DBG("address (%#x, %#x) is accepted\n", ns->regs.row, ns->regs.column);
2085                         switch_state(ns);
2086                 }
2087
2088         } else {
2089                 /*
2090                  * The byte written is an input data.
2091                  */
2092
2093                 /* Check that chip is expecting data input */
2094                 if (!(ns->state & STATE_DATAIN_MASK)) {
2095                         NS_ERR("write_byte: data input (%#x) isn't expected, state is %s, "
2096                                 "switch to %s\n", (uint)byte,
2097                                 get_state_name(ns->state), get_state_name(STATE_READY));
2098                         switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2099                         return;
2100                 }
2101
2102                 /* Check if this is expected byte */
2103                 if (ns->regs.count == ns->regs.num) {
2104                         NS_WARN("write_byte: %u input bytes has already been accepted, ignore write\n",
2105                                         ns->regs.num);
2106                         return;
2107                 }
2108
2109                 if (ns->busw == 8) {
2110                         ns->buf.byte[ns->regs.count] = byte;
2111                         ns->regs.count += 1;
2112                 } else {
2113                         ns->buf.word[ns->regs.count >> 1] = cpu_to_le16((uint16_t)byte);
2114                         ns->regs.count += 2;
2115                 }
2116         }
2117
2118         return;
2119 }
2120
2121 static void ns_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int bitmask)
2122 {
2123         struct nand_chip *chip = mtd_to_nand(mtd);
2124         struct nandsim *ns = nand_get_controller_data(chip);
2125
2126         ns->lines.cle = bitmask & NAND_CLE ? 1 : 0;
2127         ns->lines.ale = bitmask & NAND_ALE ? 1 : 0;
2128         ns->lines.ce = bitmask & NAND_NCE ? 1 : 0;
2129
2130         if (cmd != NAND_CMD_NONE)
2131                 ns_nand_write_byte(mtd, cmd);
2132 }
2133
2134 static int ns_device_ready(struct mtd_info *mtd)
2135 {
2136         NS_DBG("device_ready\n");
2137         return 1;
2138 }
2139
2140 static uint16_t ns_nand_read_word(struct mtd_info *mtd)
2141 {
2142         struct nand_chip *chip = mtd_to_nand(mtd);
2143
2144         NS_DBG("read_word\n");
2145
2146         return chip->read_byte(mtd) | (chip->read_byte(mtd) << 8);
2147 }
2148
2149 static void ns_nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len)
2150 {
2151         struct nand_chip *chip = mtd_to_nand(mtd);
2152         struct nandsim *ns = nand_get_controller_data(chip);
2153
2154         /* Check that chip is expecting data input */
2155         if (!(ns->state & STATE_DATAIN_MASK)) {
2156                 NS_ERR("write_buf: data input isn't expected, state is %s, "
2157                         "switch to STATE_READY\n", get_state_name(ns->state));
2158                 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2159                 return;
2160         }
2161
2162         /* Check if these are expected bytes */
2163         if (ns->regs.count + len > ns->regs.num) {
2164                 NS_ERR("write_buf: too many input bytes\n");
2165                 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2166                 return;
2167         }
2168
2169         memcpy(ns->buf.byte + ns->regs.count, buf, len);
2170         ns->regs.count += len;
2171
2172         if (ns->regs.count == ns->regs.num) {
2173                 NS_DBG("write_buf: %d bytes were written\n", ns->regs.count);
2174         }
2175 }
2176
2177 static void ns_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
2178 {
2179         struct nand_chip *chip = mtd_to_nand(mtd);
2180         struct nandsim *ns = nand_get_controller_data(chip);
2181
2182         /* Sanity and correctness checks */
2183         if (!ns->lines.ce) {
2184                 NS_ERR("read_buf: chip is disabled\n");
2185                 return;
2186         }
2187         if (ns->lines.ale || ns->lines.cle) {
2188                 NS_ERR("read_buf: ALE or CLE pin is high\n");
2189                 return;
2190         }
2191         if (!(ns->state & STATE_DATAOUT_MASK)) {
2192                 NS_WARN("read_buf: unexpected data output cycle, current state is %s\n",
2193                         get_state_name(ns->state));
2194                 return;
2195         }
2196
2197         if (NS_STATE(ns->state) != STATE_DATAOUT) {
2198                 int i;
2199
2200                 for (i = 0; i < len; i++)
2201                         buf[i] = mtd_to_nand(mtd)->read_byte(mtd);
2202
2203                 return;
2204         }
2205
2206         /* Check if these are expected bytes */
2207         if (ns->regs.count + len > ns->regs.num) {
2208                 NS_ERR("read_buf: too many bytes to read\n");
2209                 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2210                 return;
2211         }
2212
2213         memcpy(buf, ns->buf.byte + ns->regs.count, len);
2214         ns->regs.count += len;
2215
2216         if (ns->regs.count == ns->regs.num) {
2217                 if (NS_STATE(ns->nxstate) == STATE_READY)
2218                         switch_state(ns);
2219         }
2220
2221         return;
2222 }
2223
2224 /*
2225  * Module initialization function
2226  */
2227 static int __init ns_init_module(void)
2228 {
2229         struct nand_chip *chip;
2230         struct nandsim *nand;
2231         int retval = -ENOMEM, i;
2232
2233         if (bus_width != 8 && bus_width != 16) {
2234                 NS_ERR("wrong bus width (%d), use only 8 or 16\n", bus_width);
2235                 return -EINVAL;
2236         }
2237
2238         /* Allocate and initialize mtd_info, nand_chip and nandsim structures */
2239         chip = kzalloc(sizeof(struct nand_chip) + sizeof(struct nandsim),
2240                        GFP_KERNEL);
2241         if (!chip) {
2242                 NS_ERR("unable to allocate core structures.\n");
2243                 return -ENOMEM;
2244         }
2245         nsmtd       = nand_to_mtd(chip);
2246         nand        = (struct nandsim *)(chip + 1);
2247         nand_set_controller_data(chip, (void *)nand);
2248
2249         /*
2250          * Register simulator's callbacks.
2251          */
2252         chip->cmd_ctrl   = ns_hwcontrol;
2253         chip->read_byte  = ns_nand_read_byte;
2254         chip->dev_ready  = ns_device_ready;
2255         chip->write_buf  = ns_nand_write_buf;
2256         chip->read_buf   = ns_nand_read_buf;
2257         chip->read_word  = ns_nand_read_word;
2258         chip->ecc.mode   = NAND_ECC_SOFT;
2259         chip->ecc.algo   = NAND_ECC_HAMMING;
2260         /* The NAND_SKIP_BBTSCAN option is necessary for 'overridesize' */
2261         /* and 'badblocks' parameters to work */
2262         chip->options   |= NAND_SKIP_BBTSCAN;
2263
2264         switch (bbt) {
2265         case 2:
2266                  chip->bbt_options |= NAND_BBT_NO_OOB;
2267         case 1:
2268                  chip->bbt_options |= NAND_BBT_USE_FLASH;
2269         case 0:
2270                 break;
2271         default:
2272                 NS_ERR("bbt has to be 0..2\n");
2273                 retval = -EINVAL;
2274                 goto error;
2275         }
2276         /*
2277          * Perform minimum nandsim structure initialization to handle
2278          * the initial ID read command correctly
2279          */
2280         if (id_bytes[6] != 0xFF || id_bytes[7] != 0xFF)
2281                 nand->geom.idbytes = 8;
2282         else if (id_bytes[4] != 0xFF || id_bytes[5] != 0xFF)
2283                 nand->geom.idbytes = 6;
2284         else if (id_bytes[2] != 0xFF || id_bytes[3] != 0xFF)
2285                 nand->geom.idbytes = 4;
2286         else
2287                 nand->geom.idbytes = 2;
2288         nand->regs.status = NS_STATUS_OK(nand);
2289         nand->nxstate = STATE_UNKNOWN;
2290         nand->options |= OPT_PAGE512; /* temporary value */
2291         memcpy(nand->ids, id_bytes, sizeof(nand->ids));
2292         if (bus_width == 16) {
2293                 nand->busw = 16;
2294                 chip->options |= NAND_BUSWIDTH_16;
2295         }
2296
2297         nsmtd->owner = THIS_MODULE;
2298
2299         if ((retval = parse_weakblocks()) != 0)
2300                 goto error;
2301
2302         if ((retval = parse_weakpages()) != 0)
2303                 goto error;
2304
2305         if ((retval = parse_gravepages()) != 0)
2306                 goto error;
2307
2308         retval = nand_scan_ident(nsmtd, 1, NULL);
2309         if (retval) {
2310                 NS_ERR("cannot scan NAND Simulator device\n");
2311                 goto error;
2312         }
2313
2314         if (bch) {
2315                 unsigned int eccsteps, eccbytes;
2316                 if (!mtd_nand_has_bch()) {
2317                         NS_ERR("BCH ECC support is disabled\n");
2318                         retval = -EINVAL;
2319                         goto error;
2320                 }
2321                 /* use 512-byte ecc blocks */
2322                 eccsteps = nsmtd->writesize/512;
2323                 eccbytes = (bch*13+7)/8;
2324                 /* do not bother supporting small page devices */
2325                 if ((nsmtd->oobsize < 64) || !eccsteps) {
2326                         NS_ERR("bch not available on small page devices\n");
2327                         retval = -EINVAL;
2328                         goto error;
2329                 }
2330                 if ((eccbytes*eccsteps+2) > nsmtd->oobsize) {
2331                         NS_ERR("invalid bch value %u\n", bch);
2332                         retval = -EINVAL;
2333                         goto error;
2334                 }
2335                 chip->ecc.mode = NAND_ECC_SOFT;
2336                 chip->ecc.algo = NAND_ECC_BCH;
2337                 chip->ecc.size = 512;
2338                 chip->ecc.strength = bch;
2339                 chip->ecc.bytes = eccbytes;
2340                 NS_INFO("using %u-bit/%u bytes BCH ECC\n", bch, chip->ecc.size);
2341         }
2342
2343         retval = nand_scan_tail(nsmtd);
2344         if (retval) {
2345                 NS_ERR("can't register NAND Simulator\n");
2346                 goto error;
2347         }
2348
2349         if (overridesize) {
2350                 uint64_t new_size = (uint64_t)nsmtd->erasesize << overridesize;
2351                 if (new_size >> overridesize != nsmtd->erasesize) {
2352                         NS_ERR("overridesize is too big\n");
2353                         retval = -EINVAL;
2354                         goto err_exit;
2355                 }
2356                 /* N.B. This relies on nand_scan not doing anything with the size before we change it */
2357                 nsmtd->size = new_size;
2358                 chip->chipsize = new_size;
2359                 chip->chip_shift = ffs(nsmtd->erasesize) + overridesize - 1;
2360                 chip->pagemask = (chip->chipsize >> chip->page_shift) - 1;
2361         }
2362
2363         if ((retval = setup_wear_reporting(nsmtd)) != 0)
2364                 goto err_exit;
2365
2366         if ((retval = nandsim_debugfs_create(nand)) != 0)
2367                 goto err_exit;
2368
2369         if ((retval = init_nandsim(nsmtd)) != 0)
2370                 goto err_exit;
2371
2372         if ((retval = chip->scan_bbt(nsmtd)) != 0)
2373                 goto err_exit;
2374
2375         if ((retval = parse_badblocks(nand, nsmtd)) != 0)
2376                 goto err_exit;
2377
2378         /* Register NAND partitions */
2379         retval = mtd_device_register(nsmtd, &nand->partitions[0],
2380                                      nand->nbparts);
2381         if (retval != 0)
2382                 goto err_exit;
2383
2384         return 0;
2385
2386 err_exit:
2387         free_nandsim(nand);
2388         nand_release(nsmtd);
2389         for (i = 0;i < ARRAY_SIZE(nand->partitions); ++i)
2390                 kfree(nand->partitions[i].name);
2391 error:
2392         kfree(chip);
2393         free_lists();
2394
2395         return retval;
2396 }
2397
2398 module_init(ns_init_module);
2399
2400 /*
2401  * Module clean-up function
2402  */
2403 static void __exit ns_cleanup_module(void)
2404 {
2405         struct nand_chip *chip = mtd_to_nand(nsmtd);
2406         struct nandsim *ns = nand_get_controller_data(chip);
2407         int i;
2408
2409         nandsim_debugfs_remove(ns);
2410         free_nandsim(ns);    /* Free nandsim private resources */
2411         nand_release(nsmtd); /* Unregister driver */
2412         for (i = 0;i < ARRAY_SIZE(ns->partitions); ++i)
2413                 kfree(ns->partitions[i].name);
2414         kfree(mtd_to_nand(nsmtd));        /* Free other structures */
2415         free_lists();
2416 }
2417
2418 module_exit(ns_cleanup_module);
2419
2420 MODULE_LICENSE ("GPL");
2421 MODULE_AUTHOR ("Artem B. Bityuckiy");
2422 MODULE_DESCRIPTION ("The NAND flash simulator");