drivers/mmc/host/toshsd.c

   1 /*
   2  *  Toshiba PCI Secure Digital Host Controller Interface driver
   3  *
   4  *  Copyright (C) 2014 Ondrej Zary
   5  *  Copyright (C) 2007 Richard Betts, All Rights Reserved.
   6  *
   7  *      Based on asic3_mmc.c, copyright (c) 2005 SDG Systems, LLC and,
   8  *      sdhci.c, copyright (C) 2005-2006 Pierre Ossman
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License as published by
  12  * the Free Software Foundation; either version 2 of the License, or (at
  13  * your option) any later version.
  14  */
  15
  16 #include <linux/delay.h>
  17 #include <linux/device.h>
  18 #include <linux/module.h>
  19 #include <linux/pci.h>
  20 #include <linux/scatterlist.h>
  21 #include <linux/interrupt.h>
  22 #include <linux/io.h>
  23 #include <linux/pm.h>
  24 #include <linux/pm_runtime.h>
  25 #include <linux/mmc/host.h>
  26 #include <linux/mmc/mmc.h>
  27
  28 #include "toshsd.h"
  29
  30 #define DRIVER_NAME "toshsd"
  31
  32 static const struct pci_device_id pci_ids[] = {
  33         { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA, 0x0805) },
  34         { /* end: all zeroes */ },
  35 };
  36
  37 MODULE_DEVICE_TABLE(pci, pci_ids);
  38
  39 static void toshsd_init(struct toshsd_host *host)
  40 {
  41         /* enable clock */
  42         pci_write_config_byte(host->pdev, SD_PCICFG_CLKSTOP,
  43                                         SD_PCICFG_CLKSTOP_ENABLE_ALL);
  44         pci_write_config_byte(host->pdev, SD_PCICFG_CARDDETECT, 2);
  45
  46         /* reset */
  47         iowrite16(0, host->ioaddr + SD_SOFTWARERESET); /* assert */
  48         mdelay(2);
  49         iowrite16(1, host->ioaddr + SD_SOFTWARERESET); /* deassert */
  50         mdelay(2);
  51
  52         /* Clear card registers */
  53         iowrite16(0, host->ioaddr + SD_CARDCLOCKCTRL);
  54         iowrite32(0, host->ioaddr + SD_CARDSTATUS);
  55         iowrite32(0, host->ioaddr + SD_ERRORSTATUS0);
  56         iowrite16(0, host->ioaddr + SD_STOPINTERNAL);
  57
  58         /* SDIO clock? */
  59         iowrite16(0x100, host->ioaddr + SDIO_BASE + SDIO_CLOCKNWAITCTRL);
  60
  61         /* enable LED */
  62         pci_write_config_byte(host->pdev, SD_PCICFG_SDLED_ENABLE1,
  63                                         SD_PCICFG_LED_ENABLE1_START);
  64         pci_write_config_byte(host->pdev, SD_PCICFG_SDLED_ENABLE2,
  65                                         SD_PCICFG_LED_ENABLE2_START);
  66
  67         /* set interrupt masks */
  68         iowrite32(~(u32)(SD_CARD_RESP_END | SD_CARD_RW_END
  69                         | SD_CARD_CARD_REMOVED_0 | SD_CARD_CARD_INSERTED_0
  70                         | SD_BUF_READ_ENABLE | SD_BUF_WRITE_ENABLE
  71                         | SD_BUF_CMD_TIMEOUT),
  72                         host->ioaddr + SD_INTMASKCARD);
  73
  74         iowrite16(0x1000, host->ioaddr + SD_TRANSACTIONCTRL);
  75 }
  76
  77 /* Set MMC clock / power.
  78  * Note: This controller uses a simple divider scheme therefore it cannot run
  79  * SD/MMC cards at full speed (24/20MHz). HCLK (=33MHz PCI clock?) is too high
  80  * and the next slowest is 16MHz (div=2).
  81  */
  82 static void __toshsd_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
  83 {
  84         struct toshsd_host *host = mmc_priv(mmc);
  85
  86         if (ios->clock) {
  87                 u16 clk;
  88                 int div = 1;
  89
  90                 while (ios->clock < HCLK / div)
  91                         div *= 2;
  92
  93                 clk = div >> 2;
  94
  95                 if (div == 1) { /* disable the divider */
  96                         pci_write_config_byte(host->pdev, SD_PCICFG_CLKMODE,
  97                                               SD_PCICFG_CLKMODE_DIV_DISABLE);
  98                         clk |= SD_CARDCLK_DIV_DISABLE;
  99                 } else
 100                         pci_write_config_byte(host->pdev, SD_PCICFG_CLKMODE, 0);
 101
 102                 clk |= SD_CARDCLK_ENABLE_CLOCK;
 103                 iowrite16(clk, host->ioaddr + SD_CARDCLOCKCTRL);
 104
 105                 mdelay(10);
 106         } else
 107                 iowrite16(0, host->ioaddr + SD_CARDCLOCKCTRL);
 108
 109         switch (ios->power_mode) {
 110         case MMC_POWER_OFF:
 111                 pci_write_config_byte(host->pdev, SD_PCICFG_POWER1,
 112                                         SD_PCICFG_PWR1_OFF);
 113                 mdelay(1);
 114                 break;
 115         case MMC_POWER_UP:
 116                 break;
 117         case MMC_POWER_ON:
 118                 pci_write_config_byte(host->pdev, SD_PCICFG_POWER1,
 119                                         SD_PCICFG_PWR1_33V);
 120                 pci_write_config_byte(host->pdev, SD_PCICFG_POWER2,
 121                                         SD_PCICFG_PWR2_AUTO);
 122                 mdelay(20);
 123                 break;
 124         }
 125
 126         switch (ios->bus_width) {
 127         case MMC_BUS_WIDTH_1:
 128                 iowrite16(SD_CARDOPT_REQUIRED | SD_CARDOPT_DATA_RESP_TIMEOUT(14)
 129                                 | SD_CARDOPT_C2_MODULE_ABSENT
 130                                 | SD_CARDOPT_DATA_XFR_WIDTH_1,
 131                                 host->ioaddr + SD_CARDOPTIONSETUP);
 132                 break;
 133         case MMC_BUS_WIDTH_4:
 134                 iowrite16(SD_CARDOPT_REQUIRED | SD_CARDOPT_DATA_RESP_TIMEOUT(14)
 135                                 | SD_CARDOPT_C2_MODULE_ABSENT
 136                                 | SD_CARDOPT_DATA_XFR_WIDTH_4,
 137                                 host->ioaddr + SD_CARDOPTIONSETUP);
 138                 break;
 139         }
 140 }
 141
 142 static void toshsd_set_led(struct toshsd_host *host, unsigned char state)
 143 {
 144         iowrite16(state, host->ioaddr + SDIO_BASE + SDIO_LEDCTRL);
 145 }
 146
 147 static void toshsd_finish_request(struct toshsd_host *host)
 148 {
 149         struct mmc_request *mrq = host->mrq;
 150
 151         /* Write something to end the command */
 152         host->mrq = NULL;
 153         host->cmd = NULL;
 154         host->data = NULL;
 155
 156         toshsd_set_led(host, 0);
 157         mmc_request_done(host->mmc, mrq);
 158 }
 159
 160 static irqreturn_t toshsd_thread_irq(int irq, void *dev_id)
 161 {
 162         struct toshsd_host *host = dev_id;
 163         struct mmc_data *data = host->data;
 164         struct sg_mapping_iter *sg_miter = &host->sg_miter;
 165         unsigned short *buf;
 166         int count;
 167         unsigned long flags;
 168
 169         if (!data) {
 170                 dev_warn(&host->pdev->dev, "Spurious Data IRQ\n");
 171                 if (host->cmd) {
 172                         host->cmd->error = -EIO;
 173                         toshsd_finish_request(host);
 174                 }
 175                 return IRQ_NONE;
 176         }
 177         spin_lock_irqsave(&host->lock, flags);
 178
 179         if (!sg_miter_next(sg_miter))
 180                 goto done;
 181
 182         buf = sg_miter->addr;
 183
 184         /* Ensure we dont read more than one block. The chip will interrupt us
 185          * When the next block is available.
 186          */
 187         count = sg_miter->length;
 188         if (count > data->blksz)
 189                 count = data->blksz;
 190
 191         dev_dbg(&host->pdev->dev, "count: %08x, flags %08x\n", count,
 192                 data->flags);
 193
 194         /* Transfer the data */
 195         if (data->flags & MMC_DATA_READ)
 196                 ioread32_rep(host->ioaddr + SD_DATAPORT, buf, count >> 2);
 197         else
 198                 iowrite32_rep(host->ioaddr + SD_DATAPORT, buf, count >> 2);
 199
 200         sg_miter->consumed = count;
 201         sg_miter_stop(sg_miter);
 202
 203 done:
 204         spin_unlock_irqrestore(&host->lock, flags);
 205
 206         return IRQ_HANDLED;
 207 }
 208
 209 static void toshsd_cmd_irq(struct toshsd_host *host)
 210 {
 211         struct mmc_command *cmd = host->cmd;
 212         u8 *buf;
 213         u16 data;
 214
 215         if (!host->cmd) {
 216                 dev_warn(&host->pdev->dev, "Spurious CMD irq\n");
 217                 return;
 218         }
 219         buf = (u8 *)cmd->resp;
 220         host->cmd = NULL;
 221
 222         if (cmd->flags & MMC_RSP_PRESENT && cmd->flags & MMC_RSP_136) {
 223                 /* R2 */
 224                 buf[12] = 0xff;
 225                 data = ioread16(host->ioaddr + SD_RESPONSE0);
 226                 buf[13] = data & 0xff;
 227                 buf[14] = data >> 8;
 228                 data = ioread16(host->ioaddr + SD_RESPONSE1);
 229                 buf[15] = data & 0xff;
 230                 buf[8] = data >> 8;
 231                 data = ioread16(host->ioaddr + SD_RESPONSE2);
 232                 buf[9] = data & 0xff;
 233                 buf[10] = data >> 8;
 234                 data = ioread16(host->ioaddr + SD_RESPONSE3);
 235                 buf[11] = data & 0xff;
 236                 buf[4] = data >> 8;
 237                 data = ioread16(host->ioaddr + SD_RESPONSE4);
 238                 buf[5] = data & 0xff;
 239                 buf[6] = data >> 8;
 240                 data = ioread16(host->ioaddr + SD_RESPONSE5);
 241                 buf[7] = data & 0xff;
 242                 buf[0] = data >> 8;
 243                 data = ioread16(host->ioaddr + SD_RESPONSE6);
 244                 buf[1] = data & 0xff;
 245                 buf[2] = data >> 8;
 246                 data = ioread16(host->ioaddr + SD_RESPONSE7);
 247                 buf[3] = data & 0xff;
 248         } else if (cmd->flags & MMC_RSP_PRESENT) {
 249                 /* R1, R1B, R3, R6, R7 */
 250                 data = ioread16(host->ioaddr + SD_RESPONSE0);
 251                 buf[0] = data & 0xff;
 252                 buf[1] = data >> 8;
 253                 data = ioread16(host->ioaddr + SD_RESPONSE1);
 254                 buf[2] = data & 0xff;
 255                 buf[3] = data >> 8;
 256         }
 257
 258         dev_dbg(&host->pdev->dev, "Command IRQ complete %d %d %x\n",
 259                 cmd->opcode, cmd->error, cmd->flags);
 260
 261         /* If there is data to handle we will
 262          * finish the request in the mmc_data_end_irq handler.*/
 263         if (host->data)
 264                 return;
 265
 266         toshsd_finish_request(host);
 267 }
 268
 269 static void toshsd_data_end_irq(struct toshsd_host *host)
 270 {
 271         struct mmc_data *data = host->data;
 272
 273         host->data = NULL;
 274
 275         if (!data) {
 276                 dev_warn(&host->pdev->dev, "Spurious data end IRQ\n");
 277                 return;
 278         }
 279
 280         if (data->error == 0)
 281                 data->bytes_xfered = data->blocks * data->blksz;
 282         else
 283                 data->bytes_xfered = 0;
 284
 285         dev_dbg(&host->pdev->dev, "Completed data request xfr=%d\n",
 286                 data->bytes_xfered);
 287
 288         iowrite16(0, host->ioaddr + SD_STOPINTERNAL);
 289
 290         toshsd_finish_request(host);
 291 }
 292
 293 static irqreturn_t toshsd_irq(int irq, void *dev_id)
 294 {
 295         struct toshsd_host *host = dev_id;
 296         u32 int_reg, int_mask, int_status, detail;
 297         int error = 0, ret = IRQ_HANDLED;
 298
 299         spin_lock(&host->lock);
 300         int_status = ioread32(host->ioaddr + SD_CARDSTATUS);
 301         int_mask = ioread32(host->ioaddr + SD_INTMASKCARD);
 302         int_reg = int_status & ~int_mask & ~IRQ_DONT_CARE_BITS;
 303
 304         dev_dbg(&host->pdev->dev, "IRQ status:%x mask:%x\n",
 305                 int_status, int_mask);
 306
 307         /* nothing to do: it's not our IRQ */
 308         if (!int_reg) {
 309                 ret = IRQ_NONE;
 310                 goto irq_end;
 311         }
 312
 313         if (int_reg & SD_BUF_CMD_TIMEOUT) {
 314                 error = -ETIMEDOUT;
 315                 dev_dbg(&host->pdev->dev, "Timeout\n");
 316         } else if (int_reg & SD_BUF_CRC_ERR) {
 317                 error = -EILSEQ;
 318                 dev_err(&host->pdev->dev, "BadCRC\n");
 319         } else if (int_reg & (SD_BUF_ILLEGAL_ACCESS
 320                                 | SD_BUF_CMD_INDEX_ERR
 321                                 | SD_BUF_STOP_BIT_END_ERR
 322                                 | SD_BUF_OVERFLOW
 323                                 | SD_BUF_UNDERFLOW
 324                                 | SD_BUF_DATA_TIMEOUT)) {
 325                 dev_err(&host->pdev->dev, "Buffer status error: { %s%s%s%s%s%s}\n",
 326                         int_reg & SD_BUF_ILLEGAL_ACCESS ? "ILLEGAL_ACC " : "",
 327                         int_reg & SD_BUF_CMD_INDEX_ERR ? "CMD_INDEX " : "",
 328                         int_reg & SD_BUF_STOP_BIT_END_ERR ? "STOPBIT_END " : "",
 329                         int_reg & SD_BUF_OVERFLOW ? "OVERFLOW " : "",
 330                         int_reg & SD_BUF_UNDERFLOW ? "UNDERFLOW " : "",
 331                         int_reg & SD_BUF_DATA_TIMEOUT ? "DATA_TIMEOUT " : "");
 332
 333                 detail = ioread32(host->ioaddr + SD_ERRORSTATUS0);
 334                 dev_err(&host->pdev->dev, "detail error status { %s%s%s%s%s%s%s%s%s%s%s%s%s}\n",
 335                         detail & SD_ERR0_RESP_CMD_ERR ? "RESP_CMD " : "",
 336                         detail & SD_ERR0_RESP_NON_CMD12_END_BIT_ERR ? "RESP_END_BIT " : "",
 337                         detail & SD_ERR0_RESP_CMD12_END_BIT_ERR ? "RESP_END_BIT " : "",
 338                         detail & SD_ERR0_READ_DATA_END_BIT_ERR ? "READ_DATA_END_BIT " : "",
 339                         detail & SD_ERR0_WRITE_CRC_STATUS_END_BIT_ERR ? "WRITE_CMD_END_BIT " : "",
 340                         detail & SD_ERR0_RESP_NON_CMD12_CRC_ERR ? "RESP_CRC " : "",
 341                         detail & SD_ERR0_RESP_CMD12_CRC_ERR ? "RESP_CRC " : "",
 342                         detail & SD_ERR0_READ_DATA_CRC_ERR ? "READ_DATA_CRC " : "",
 343                         detail & SD_ERR0_WRITE_CMD_CRC_ERR ? "WRITE_CMD_CRC " : "",
 344                         detail & SD_ERR1_NO_CMD_RESP ? "NO_CMD_RESP " : "",
 345                         detail & SD_ERR1_TIMEOUT_READ_DATA ? "READ_DATA_TIMEOUT " : "",
 346                         detail & SD_ERR1_TIMEOUT_CRS_STATUS ? "CRS_STATUS_TIMEOUT " : "",
 347                         detail & SD_ERR1_TIMEOUT_CRC_BUSY ? "CRC_BUSY_TIMEOUT " : "");
 348                 error = -EIO;
 349         }
 350
 351         if (error) {
 352                 if (host->cmd)
 353                         host->cmd->error = error;
 354
 355                 if (error == -ETIMEDOUT) {
 356                         iowrite32(int_status &
 357                                   ~(SD_BUF_CMD_TIMEOUT | SD_CARD_RESP_END),
 358                                   host->ioaddr + SD_CARDSTATUS);
 359                 } else {
 360                         toshsd_init(host);
 361                         __toshsd_set_ios(host->mmc, &host->mmc->ios);
 362                         goto irq_end;
 363                 }
 364         }
 365
 366         /* Card insert/remove. The mmc controlling code is stateless. */
 367         if (int_reg & (SD_CARD_CARD_INSERTED_0 | SD_CARD_CARD_REMOVED_0)) {
 368                 iowrite32(int_status &
 369                           ~(SD_CARD_CARD_REMOVED_0 | SD_CARD_CARD_INSERTED_0),
 370                           host->ioaddr + SD_CARDSTATUS);
 371
 372                 if (int_reg & SD_CARD_CARD_INSERTED_0)
 373                         toshsd_init(host);
 374
 375                 mmc_detect_change(host->mmc, 1);
 376         }
 377
 378         /* Data transfer */
 379         if (int_reg & (SD_BUF_READ_ENABLE | SD_BUF_WRITE_ENABLE)) {
 380                 iowrite32(int_status &
 381                           ~(SD_BUF_WRITE_ENABLE | SD_BUF_READ_ENABLE),
 382                           host->ioaddr + SD_CARDSTATUS);
 383
 384                 ret = IRQ_WAKE_THREAD;
 385                 goto irq_end;
 386         }
 387
 388         /* Command completion */
 389         if (int_reg & SD_CARD_RESP_END) {
 390                 iowrite32(int_status & ~(SD_CARD_RESP_END),
 391                           host->ioaddr + SD_CARDSTATUS);
 392                 toshsd_cmd_irq(host);
 393         }
 394
 395         /* Data transfer completion */
 396         if (int_reg & SD_CARD_RW_END) {
 397                 iowrite32(int_status & ~(SD_CARD_RW_END),
 398                           host->ioaddr + SD_CARDSTATUS);
 399                 toshsd_data_end_irq(host);
 400         }
 401 irq_end:
 402         spin_unlock(&host->lock);
 403         return ret;
 404 }
 405
 406 static void toshsd_start_cmd(struct toshsd_host *host, struct mmc_command *cmd)
 407 {
 408         struct mmc_data *data = host->data;
 409         int c = cmd->opcode;
 410
 411         dev_dbg(&host->pdev->dev, "Command opcode: %d\n", cmd->opcode);
 412
 413         if (cmd->opcode == MMC_STOP_TRANSMISSION) {
 414                 iowrite16(SD_STOPINT_ISSUE_CMD12,
 415                           host->ioaddr + SD_STOPINTERNAL);
 416
 417                 cmd->resp[0] = cmd->opcode;
 418                 cmd->resp[1] = 0;
 419                 cmd->resp[2] = 0;
 420                 cmd->resp[3] = 0;
 421
 422                 toshsd_finish_request(host);
 423                 return;
 424         }
 425
 426         switch (mmc_resp_type(cmd)) {
 427         case MMC_RSP_NONE:
 428                 c |= SD_CMD_RESP_TYPE_NONE;
 429                 break;
 430
 431         case MMC_RSP_R1:
 432                 c |= SD_CMD_RESP_TYPE_EXT_R1;
 433                 break;
 434         case MMC_RSP_R1B:
 435                 c |= SD_CMD_RESP_TYPE_EXT_R1B;
 436                 break;
 437         case MMC_RSP_R2:
 438                 c |= SD_CMD_RESP_TYPE_EXT_R2;
 439                 break;
 440         case MMC_RSP_R3:
 441                 c |= SD_CMD_RESP_TYPE_EXT_R3;
 442                 break;
 443
 444         default:
 445                 dev_err(&host->pdev->dev, "Unknown response type %d\n",
 446                         mmc_resp_type(cmd));
 447                 break;
 448         }
 449
 450         host->cmd = cmd;
 451
 452         if (cmd->opcode == MMC_APP_CMD)
 453                 c |= SD_CMD_TYPE_ACMD;
 454
 455         if (cmd->opcode == MMC_GO_IDLE_STATE)
 456                 c |= (3 << 8);  /* removed from ipaq-asic3.h for some reason */
 457
 458         if (data) {
 459                 c |= SD_CMD_DATA_PRESENT;
 460
 461                 if (data->blocks > 1) {
 462                         iowrite16(SD_STOPINT_AUTO_ISSUE_CMD12,
 463                                   host->ioaddr + SD_STOPINTERNAL);
 464                         c |= SD_CMD_MULTI_BLOCK;
 465                 }
 466
 467                 if (data->flags & MMC_DATA_READ)
 468                         c |= SD_CMD_TRANSFER_READ;
 469
 470                 /* MMC_DATA_WRITE does not require a bit to be set */
 471         }
 472
 473         /* Send the command */
 474         iowrite32(cmd->arg, host->ioaddr + SD_ARG0);
 475         iowrite16(c, host->ioaddr + SD_CMD);
 476 }
 477
 478 static void toshsd_start_data(struct toshsd_host *host, struct mmc_data *data)
 479 {
 480         unsigned int flags = SG_MITER_ATOMIC;
 481
 482         dev_dbg(&host->pdev->dev, "setup data transfer: blocksize %08x  nr_blocks %d, offset: %08x\n",
 483                 data->blksz, data->blocks, data->sg->offset);
 484
 485         host->data = data;
 486
 487         if (data->flags & MMC_DATA_READ)
 488                 flags |= SG_MITER_TO_SG;
 489         else
 490                 flags |= SG_MITER_FROM_SG;
 491
 492         sg_miter_start(&host->sg_miter, data->sg, data->sg_len, flags);
 493
 494         /* Set transfer length and blocksize */
 495         iowrite16(data->blocks, host->ioaddr + SD_BLOCKCOUNT);
 496         iowrite16(data->blksz, host->ioaddr + SD_CARDXFERDATALEN);
 497 }
 498
 499 /* Process requests from the MMC layer */
 500 static void toshsd_request(struct mmc_host *mmc, struct mmc_request *mrq)
 501 {
 502         struct toshsd_host *host = mmc_priv(mmc);
 503         unsigned long flags;
 504
 505         /* abort if card not present */
 506         if (!(ioread16(host->ioaddr + SD_CARDSTATUS) & SD_CARD_PRESENT_0)) {
 507                 mrq->cmd->error = -ENOMEDIUM;
 508                 mmc_request_done(mmc, mrq);
 509                 return;
 510         }
 511
 512         spin_lock_irqsave(&host->lock, flags);
 513
 514         WARN_ON(host->mrq != NULL);
 515
 516         host->mrq = mrq;
 517
 518         if (mrq->data)
 519                 toshsd_start_data(host, mrq->data);
 520
 521         toshsd_set_led(host, 1);
 522
 523         toshsd_start_cmd(host, mrq->cmd);
 524
 525         spin_unlock_irqrestore(&host->lock, flags);
 526 }
 527
 528 static void toshsd_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
 529 {
 530         struct toshsd_host *host = mmc_priv(mmc);
 531         unsigned long flags;
 532
 533         spin_lock_irqsave(&host->lock, flags);
 534         __toshsd_set_ios(mmc, ios);
 535         spin_unlock_irqrestore(&host->lock, flags);
 536 }
 537
 538 static int toshsd_get_ro(struct mmc_host *mmc)
 539 {
 540         struct toshsd_host *host = mmc_priv(mmc);
 541
 542         /* active low */
 543         return !(ioread16(host->ioaddr + SD_CARDSTATUS) & SD_CARD_WRITE_PROTECT);
 544 }
 545
 546 static int toshsd_get_cd(struct mmc_host *mmc)
 547 {
 548         struct toshsd_host *host = mmc_priv(mmc);
 549
 550         return !!(ioread16(host->ioaddr + SD_CARDSTATUS) & SD_CARD_PRESENT_0);
 551 }
 552
 553 static const struct mmc_host_ops toshsd_ops = {
 554         .request = toshsd_request,
 555         .set_ios = toshsd_set_ios,
 556         .get_ro = toshsd_get_ro,
 557         .get_cd = toshsd_get_cd,
 558 };
 559
 560
 561 static void toshsd_powerdown(struct toshsd_host *host)
 562 {
 563         /* mask all interrupts */
 564         iowrite32(0xffffffff, host->ioaddr + SD_INTMASKCARD);
 565         /* disable card clock */
 566         iowrite16(0x000, host->ioaddr + SDIO_BASE + SDIO_CLOCKNWAITCTRL);
 567         iowrite16(0, host->ioaddr + SD_CARDCLOCKCTRL);
 568         /* power down card */
 569         pci_write_config_byte(host->pdev, SD_PCICFG_POWER1, SD_PCICFG_PWR1_OFF);
 570         /* disable clock */
 571         pci_write_config_byte(host->pdev, SD_PCICFG_CLKSTOP, 0);
 572 }
 573
 574 #ifdef CONFIG_PM_SLEEP
 575 static int toshsd_pm_suspend(struct device *dev)
 576 {
 577         struct pci_dev *pdev = to_pci_dev(dev);
 578         struct toshsd_host *host = pci_get_drvdata(pdev);
 579
 580         toshsd_powerdown(host);
 581
 582         pci_save_state(pdev);
 583         pci_enable_wake(pdev, PCI_D3hot, 0);
 584         pci_disable_device(pdev);
 585         pci_set_power_state(pdev, PCI_D3hot);
 586
 587         return 0;
 588 }
 589
 590 static int toshsd_pm_resume(struct device *dev)
 591 {
 592         struct pci_dev *pdev = to_pci_dev(dev);
 593         struct toshsd_host *host = pci_get_drvdata(pdev);
 594         int ret;
 595
 596         pci_set_power_state(pdev, PCI_D0);
 597         pci_restore_state(pdev);
 598         ret = pci_enable_device(pdev);
 599         if (ret)
 600                 return ret;
 601
 602         toshsd_init(host);
 603
 604         return 0;
 605 }
 606 #endif /* CONFIG_PM_SLEEP */
 607
 608 static int toshsd_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
 609 {
 610         int ret;
 611         struct toshsd_host *host;
 612         struct mmc_host *mmc;
 613         resource_size_t base;
 614
 615         ret = pci_enable_device(pdev);
 616         if (ret)
 617                 return ret;
 618
 619         mmc = mmc_alloc_host(sizeof(struct toshsd_host), &pdev->dev);
 620         if (!mmc) {
 621                 ret = -ENOMEM;
 622                 goto err;
 623         }
 624
 625         host = mmc_priv(mmc);
 626         host->mmc = mmc;
 627
 628         host->pdev = pdev;
 629         pci_set_drvdata(pdev, host);
 630
 631         ret = pci_request_regions(pdev, DRIVER_NAME);
 632         if (ret)
 633                 goto free;
 634
 635         host->ioaddr = pci_iomap(pdev, 0, 0);
 636         if (!host->ioaddr) {
 637                 ret = -ENOMEM;
 638                 goto release;
 639         }
 640
 641         /* Set MMC host parameters */
 642         mmc->ops = &toshsd_ops;
 643         mmc->caps = MMC_CAP_4_BIT_DATA;
 644         mmc->ocr_avail = MMC_VDD_32_33;
 645
 646         mmc->f_min = HCLK / 512;
 647         mmc->f_max = HCLK;
 648
 649         spin_lock_init(&host->lock);
 650
 651         toshsd_init(host);
 652
 653         ret = request_threaded_irq(pdev->irq, toshsd_irq, toshsd_thread_irq,
 654                                    IRQF_SHARED, DRIVER_NAME, host);
 655         if (ret)
 656                 goto unmap;
 657
 658         mmc_add_host(mmc);
 659
 660         base = pci_resource_start(pdev, 0);
 661         dev_dbg(&pdev->dev, "MMIO %pa, IRQ %d\n", &base, pdev->irq);
 662
 663         pm_suspend_ignore_children(&pdev->dev, 1);
 664
 665         return 0;
 666
 667 unmap:
 668         pci_iounmap(pdev, host->ioaddr);
 669 release:
 670         pci_release_regions(pdev);
 671 free:
 672         mmc_free_host(mmc);
 673         pci_set_drvdata(pdev, NULL);
 674 err:
 675         pci_disable_device(pdev);
 676         return ret;
 677 }
 678
 679 static void toshsd_remove(struct pci_dev *pdev)
 680 {
 681         struct toshsd_host *host = pci_get_drvdata(pdev);
 682
 683         mmc_remove_host(host->mmc);
 684         toshsd_powerdown(host);
 685         free_irq(pdev->irq, host);
 686         pci_iounmap(pdev, host->ioaddr);
 687         pci_release_regions(pdev);
 688         mmc_free_host(host->mmc);
 689         pci_set_drvdata(pdev, NULL);
 690         pci_disable_device(pdev);
 691 }
 692
 693 static const struct dev_pm_ops toshsd_pm_ops = {
 694         SET_SYSTEM_SLEEP_PM_OPS(toshsd_pm_suspend, toshsd_pm_resume)
 695 };
 696
 697 static struct pci_driver toshsd_driver = {
 698         .name = DRIVER_NAME,
 699         .id_table = pci_ids,
 700         .probe = toshsd_probe,
 701         .remove = toshsd_remove,
 702         .driver.pm = &toshsd_pm_ops,
 703 };
 704
 705 module_pci_driver(toshsd_driver);
 706
 707 MODULE_AUTHOR("Ondrej Zary, Richard Betts");
 708 MODULE_DESCRIPTION("Toshiba PCI Secure Digital Host Controller Interface driver");
 709 MODULE_LICENSE("GPL");