1 // SPDX-License-Identifier: GPL-2.0
3 * Driver for the MMC / SD / SDIO IP found in:
5 * TC6393XB, TC6391XB, TC6387XB, T7L66XB, ASIC3, SH-Mobile SoCs
7 * Copyright (C) 2015-19 Renesas Electronics Corporation
8 * Copyright (C) 2016-19 Sang Engineering, Wolfram Sang
9 * Copyright (C) 2017 Horms Solutions, Simon Horman
10 * Copyright (C) 2011 Guennadi Liakhovetski
11 * Copyright (C) 2007 Ian Molton
12 * Copyright (C) 2004 Ian Molton
14 * This driver draws mainly on scattered spec sheets, Reverse engineering
15 * of the toshiba e800 SD driver and some parts of the 2.4 ASIC3 driver (4 bit
16 * support). (Further 4 bit support from a later datasheet).
19 * Investigate using a workqueue for PIO transfers
21 * Better Power management
22 * Handle MMC errors better
23 * double buffer support
27 #include <linux/delay.h>
28 #include <linux/device.h>
29 #include <linux/dma-mapping.h>
30 #include <linux/highmem.h>
31 #include <linux/interrupt.h>
33 #include <linux/irq.h>
34 #include <linux/mfd/tmio.h>
35 #include <linux/mmc/card.h>
36 #include <linux/mmc/host.h>
37 #include <linux/mmc/mmc.h>
38 #include <linux/mmc/slot-gpio.h>
39 #include <linux/module.h>
40 #include <linux/pagemap.h>
41 #include <linux/platform_device.h>
42 #include <linux/pm_domain.h>
43 #include <linux/pm_qos.h>
44 #include <linux/pm_runtime.h>
45 #include <linux/regulator/consumer.h>
46 #include <linux/mmc/sdio.h>
47 #include <linux/scatterlist.h>
48 #include <linux/sizes.h>
49 #include <linux/spinlock.h>
50 #include <linux/workqueue.h>
54 static inline void tmio_mmc_start_dma(struct tmio_mmc_host *host,
55 struct mmc_data *data)
58 host->dma_ops->start(host, data);
61 static inline void tmio_mmc_enable_dma(struct tmio_mmc_host *host, bool enable)
64 host->dma_ops->enable(host, enable);
67 static inline void tmio_mmc_request_dma(struct tmio_mmc_host *host,
68 struct tmio_mmc_data *pdata)
71 host->dma_ops->request(host, pdata);
78 static inline void tmio_mmc_release_dma(struct tmio_mmc_host *host)
81 host->dma_ops->release(host);
84 static inline void tmio_mmc_abort_dma(struct tmio_mmc_host *host)
87 host->dma_ops->abort(host);
90 static inline void tmio_mmc_dataend_dma(struct tmio_mmc_host *host)
93 host->dma_ops->dataend(host);
96 void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
98 host->sdcard_irq_mask &= ~(i & TMIO_MASK_IRQ);
99 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
101 EXPORT_SYMBOL_GPL(tmio_mmc_enable_mmc_irqs);
103 void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
105 host->sdcard_irq_mask |= (i & TMIO_MASK_IRQ);
106 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
108 EXPORT_SYMBOL_GPL(tmio_mmc_disable_mmc_irqs);
110 static void tmio_mmc_ack_mmc_irqs(struct tmio_mmc_host *host, u32 i)
112 sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, ~i);
115 static void tmio_mmc_init_sg(struct tmio_mmc_host *host, struct mmc_data *data)
117 host->sg_len = data->sg_len;
118 host->sg_ptr = data->sg;
119 host->sg_orig = data->sg;
123 static int tmio_mmc_next_sg(struct tmio_mmc_host *host)
125 host->sg_ptr = sg_next(host->sg_ptr);
127 return --host->sg_len;
130 #define CMDREQ_TIMEOUT 5000
132 static void tmio_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
134 struct tmio_mmc_host *host = mmc_priv(mmc);
136 if (enable && !host->sdio_irq_enabled) {
139 /* Keep device active while SDIO irq is enabled */
140 pm_runtime_get_sync(mmc_dev(mmc));
142 host->sdio_irq_enabled = true;
143 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL & ~TMIO_SDIO_STAT_IOIRQ;
145 /* Clear obsolete interrupts before enabling */
146 sdio_status = sd_ctrl_read16(host, CTL_SDIO_STATUS) & ~TMIO_SDIO_MASK_ALL;
147 if (host->pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS)
148 sdio_status |= TMIO_SDIO_SETBITS_MASK;
149 sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status);
151 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
152 } else if (!enable && host->sdio_irq_enabled) {
153 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
154 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
156 host->sdio_irq_enabled = false;
157 pm_runtime_mark_last_busy(mmc_dev(mmc));
158 pm_runtime_put_autosuspend(mmc_dev(mmc));
162 static void tmio_mmc_reset(struct tmio_mmc_host *host)
164 /* FIXME - should we set stop clock reg here */
165 sd_ctrl_write16(host, CTL_RESET_SD, 0x0000);
166 usleep_range(10000, 11000);
167 sd_ctrl_write16(host, CTL_RESET_SD, 0x0001);
168 usleep_range(10000, 11000);
170 if (host->pdata->flags & TMIO_MMC_SDIO_IRQ) {
171 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
172 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0001);
176 static void tmio_mmc_hw_reset(struct mmc_host *mmc)
178 struct tmio_mmc_host *host = mmc_priv(mmc);
182 tmio_mmc_abort_dma(host);
185 host->hw_reset(host);
188 static void tmio_mmc_reset_work(struct work_struct *work)
190 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
191 delayed_reset_work.work);
192 struct mmc_request *mrq;
195 spin_lock_irqsave(&host->lock, flags);
199 * is request already finished? Since we use a non-blocking
200 * cancel_delayed_work(), it can happen, that a .set_ios() call preempts
201 * us, so, have to check for IS_ERR(host->mrq)
203 if (IS_ERR_OR_NULL(mrq) ||
204 time_is_after_jiffies(host->last_req_ts +
205 msecs_to_jiffies(CMDREQ_TIMEOUT))) {
206 spin_unlock_irqrestore(&host->lock, flags);
210 dev_warn(&host->pdev->dev,
211 "timeout waiting for hardware interrupt (CMD%u)\n",
215 host->data->error = -ETIMEDOUT;
217 host->cmd->error = -ETIMEDOUT;
219 mrq->cmd->error = -ETIMEDOUT;
224 spin_unlock_irqrestore(&host->lock, flags);
226 tmio_mmc_hw_reset(host->mmc);
228 /* Ready for new calls */
231 mmc_request_done(host->mmc, mrq);
234 /* These are the bitmasks the tmio chip requires to implement the MMC response
235 * types. Note that R1 and R6 are the same in this scheme. */
236 #define APP_CMD 0x0040
237 #define RESP_NONE 0x0300
238 #define RESP_R1 0x0400
239 #define RESP_R1B 0x0500
240 #define RESP_R2 0x0600
241 #define RESP_R3 0x0700
242 #define DATA_PRESENT 0x0800
243 #define TRANSFER_READ 0x1000
244 #define TRANSFER_MULTI 0x2000
245 #define SECURITY_CMD 0x4000
246 #define NO_CMD12_ISSUE 0x4000 /* TMIO_MMC_HAVE_CMD12_CTRL */
248 static int tmio_mmc_start_command(struct tmio_mmc_host *host,
249 struct mmc_command *cmd)
251 struct mmc_data *data = host->data;
254 switch (mmc_resp_type(cmd)) {
255 case MMC_RSP_NONE: c |= RESP_NONE; break;
257 case MMC_RSP_R1_NO_CRC:
259 case MMC_RSP_R1B: c |= RESP_R1B; break;
260 case MMC_RSP_R2: c |= RESP_R2; break;
261 case MMC_RSP_R3: c |= RESP_R3; break;
263 pr_debug("Unknown response type %d\n", mmc_resp_type(cmd));
269 /* FIXME - this seems to be ok commented out but the spec suggest this bit
270 * should be set when issuing app commands.
271 * if(cmd->flags & MMC_FLAG_ACMD)
276 if (data->blocks > 1) {
277 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, TMIO_STOP_SEC);
281 * Disable auto CMD12 at IO_RW_EXTENDED and
282 * SET_BLOCK_COUNT when doing multiple block transfer
284 if ((host->pdata->flags & TMIO_MMC_HAVE_CMD12_CTRL) &&
285 (cmd->opcode == SD_IO_RW_EXTENDED || host->mrq->sbc))
288 if (data->flags & MMC_DATA_READ)
292 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_CMD);
294 /* Fire off the command */
295 sd_ctrl_write32_as_16_and_16(host, CTL_ARG_REG, cmd->arg);
296 sd_ctrl_write16(host, CTL_SD_CMD, c);
301 static void tmio_mmc_transfer_data(struct tmio_mmc_host *host,
305 int is_read = host->data->flags & MMC_DATA_READ;
311 if (host->pdata->flags & TMIO_MMC_32BIT_DATA_PORT) {
313 u32 *buf32 = (u32 *)buf;
316 sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, buf32,
319 sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, buf32,
322 /* if count was multiple of 4 */
330 sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, &data, 1);
331 memcpy(buf32, &data, count);
333 memcpy(&data, buf32, count);
334 sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, &data, 1);
341 sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
343 sd_ctrl_write16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
345 /* if count was even number */
349 /* if count was odd number */
350 buf8 = (u8 *)(buf + (count >> 1));
355 * driver and this function are assuming that
356 * it is used as little endian
359 *buf8 = sd_ctrl_read16(host, CTL_SD_DATA_PORT) & 0xff;
361 sd_ctrl_write16(host, CTL_SD_DATA_PORT, *buf8);
365 * This chip always returns (at least?) as much data as you ask for.
366 * I'm unsure what happens if you ask for less than a block. This should be
367 * looked into to ensure that a funny length read doesn't hose the controller.
369 static void tmio_mmc_pio_irq(struct tmio_mmc_host *host)
371 struct mmc_data *data = host->data;
378 pr_err("PIO IRQ in DMA mode!\n");
381 pr_debug("Spurious PIO IRQ\n");
385 sg_virt = tmio_mmc_kmap_atomic(host->sg_ptr, &flags);
386 buf = (unsigned short *)(sg_virt + host->sg_off);
388 count = host->sg_ptr->length - host->sg_off;
389 if (count > data->blksz)
392 pr_debug("count: %08x offset: %08x flags %08x\n",
393 count, host->sg_off, data->flags);
395 /* Transfer the data */
396 tmio_mmc_transfer_data(host, buf, count);
398 host->sg_off += count;
400 tmio_mmc_kunmap_atomic(host->sg_ptr, &flags, sg_virt);
402 if (host->sg_off == host->sg_ptr->length)
403 tmio_mmc_next_sg(host);
406 static void tmio_mmc_check_bounce_buffer(struct tmio_mmc_host *host)
408 if (host->sg_ptr == &host->bounce_sg) {
410 void *sg_vaddr = tmio_mmc_kmap_atomic(host->sg_orig, &flags);
412 memcpy(sg_vaddr, host->bounce_buf, host->bounce_sg.length);
413 tmio_mmc_kunmap_atomic(host->sg_orig, &flags, sg_vaddr);
417 /* needs to be called with host->lock held */
418 void tmio_mmc_do_data_irq(struct tmio_mmc_host *host)
420 struct mmc_data *data = host->data;
421 struct mmc_command *stop;
426 dev_warn(&host->pdev->dev, "Spurious data end IRQ\n");
431 /* FIXME - return correct transfer count on errors */
433 data->bytes_xfered = data->blocks * data->blksz;
435 data->bytes_xfered = 0;
437 pr_debug("Completed data request\n");
440 * FIXME: other drivers allow an optional stop command of any given type
441 * which we dont do, as the chip can auto generate them.
442 * Perhaps we can be smarter about when to use auto CMD12 and
443 * only issue the auto request when we know this is the desired
444 * stop command, allowing fallback to the stop command the
445 * upper layers expect. For now, we do what works.
448 if (data->flags & MMC_DATA_READ) {
450 tmio_mmc_check_bounce_buffer(host);
451 dev_dbg(&host->pdev->dev, "Complete Rx request %p\n",
454 dev_dbg(&host->pdev->dev, "Complete Tx request %p\n",
458 if (stop && !host->mrq->sbc) {
459 if (stop->opcode != MMC_STOP_TRANSMISSION || stop->arg)
460 dev_err(&host->pdev->dev, "unsupported stop: CMD%u,0x%x. We did CMD12,0\n",
461 stop->opcode, stop->arg);
463 /* fill in response from auto CMD12 */
464 stop->resp[0] = sd_ctrl_read16_and_16_as_32(host, CTL_RESPONSE);
466 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0);
469 schedule_work(&host->done);
471 EXPORT_SYMBOL_GPL(tmio_mmc_do_data_irq);
473 static void tmio_mmc_data_irq(struct tmio_mmc_host *host, unsigned int stat)
475 struct mmc_data *data;
477 spin_lock(&host->lock);
483 if (stat & TMIO_STAT_CRCFAIL || stat & TMIO_STAT_STOPBIT_ERR ||
484 stat & TMIO_STAT_TXUNDERRUN)
485 data->error = -EILSEQ;
486 if (host->dma_on && (data->flags & MMC_DATA_WRITE)) {
487 u32 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS);
491 * Has all data been written out yet? Testing on SuperH showed,
492 * that in most cases the first interrupt comes already with the
493 * BUSY status bit clear, but on some operations, like mount or
494 * in the beginning of a write / sync / umount, there is one
495 * DATAEND interrupt with the BUSY bit set, in this cases
496 * waiting for one more interrupt fixes the problem.
498 if (host->pdata->flags & TMIO_MMC_HAS_IDLE_WAIT) {
499 if (status & TMIO_STAT_SCLKDIVEN)
502 if (!(status & TMIO_STAT_CMD_BUSY))
507 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
508 tmio_mmc_dataend_dma(host);
510 } else if (host->dma_on && (data->flags & MMC_DATA_READ)) {
511 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
512 tmio_mmc_dataend_dma(host);
514 tmio_mmc_do_data_irq(host);
515 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_READOP | TMIO_MASK_WRITEOP);
518 spin_unlock(&host->lock);
521 static void tmio_mmc_cmd_irq(struct tmio_mmc_host *host, unsigned int stat)
523 struct mmc_command *cmd = host->cmd;
526 spin_lock(&host->lock);
529 pr_debug("Spurious CMD irq\n");
533 /* This controller is sicker than the PXA one. Not only do we need to
534 * drop the top 8 bits of the first response word, we also need to
535 * modify the order of the response for short response command types.
538 for (i = 3, addr = CTL_RESPONSE ; i >= 0 ; i--, addr += 4)
539 cmd->resp[i] = sd_ctrl_read16_and_16_as_32(host, addr);
541 if (cmd->flags & MMC_RSP_136) {
542 cmd->resp[0] = (cmd->resp[0] << 8) | (cmd->resp[1] >> 24);
543 cmd->resp[1] = (cmd->resp[1] << 8) | (cmd->resp[2] >> 24);
544 cmd->resp[2] = (cmd->resp[2] << 8) | (cmd->resp[3] >> 24);
546 } else if (cmd->flags & MMC_RSP_R3) {
547 cmd->resp[0] = cmd->resp[3];
550 if (stat & TMIO_STAT_CMDTIMEOUT)
551 cmd->error = -ETIMEDOUT;
552 else if ((stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC) ||
553 stat & TMIO_STAT_STOPBIT_ERR ||
554 stat & TMIO_STAT_CMD_IDX_ERR)
555 cmd->error = -EILSEQ;
557 /* If there is data to handle we enable data IRQs here, and
558 * we will ultimatley finish the request in the data_end handler.
559 * If theres no data or we encountered an error, finish now.
561 if (host->data && (!cmd->error || cmd->error == -EILSEQ)) {
562 if (host->data->flags & MMC_DATA_READ) {
564 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_READOP);
566 tmio_mmc_disable_mmc_irqs(host,
568 tasklet_schedule(&host->dma_issue);
572 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_WRITEOP);
574 tmio_mmc_disable_mmc_irqs(host,
576 tasklet_schedule(&host->dma_issue);
580 schedule_work(&host->done);
584 spin_unlock(&host->lock);
587 static bool __tmio_mmc_card_detect_irq(struct tmio_mmc_host *host,
588 int ireg, int status)
590 struct mmc_host *mmc = host->mmc;
592 /* Card insert / remove attempts */
593 if (ireg & (TMIO_STAT_CARD_INSERT | TMIO_STAT_CARD_REMOVE)) {
594 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CARD_INSERT |
595 TMIO_STAT_CARD_REMOVE);
596 if ((((ireg & TMIO_STAT_CARD_REMOVE) && mmc->card) ||
597 ((ireg & TMIO_STAT_CARD_INSERT) && !mmc->card)) &&
598 !work_pending(&mmc->detect.work))
599 mmc_detect_change(host->mmc, msecs_to_jiffies(100));
606 static bool __tmio_mmc_sdcard_irq(struct tmio_mmc_host *host, int ireg,
609 /* Command completion */
610 if (ireg & (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT)) {
611 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CMDRESPEND |
612 TMIO_STAT_CMDTIMEOUT);
613 tmio_mmc_cmd_irq(host, status);
618 if (ireg & (TMIO_STAT_RXRDY | TMIO_STAT_TXRQ)) {
619 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_RXRDY | TMIO_STAT_TXRQ);
620 tmio_mmc_pio_irq(host);
624 /* Data transfer completion */
625 if (ireg & TMIO_STAT_DATAEND) {
626 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_DATAEND);
627 tmio_mmc_data_irq(host, status);
634 static bool __tmio_mmc_sdio_irq(struct tmio_mmc_host *host)
636 struct mmc_host *mmc = host->mmc;
637 struct tmio_mmc_data *pdata = host->pdata;
638 unsigned int ireg, status;
639 unsigned int sdio_status;
641 if (!(pdata->flags & TMIO_MMC_SDIO_IRQ))
644 status = sd_ctrl_read16(host, CTL_SDIO_STATUS);
645 ireg = status & TMIO_SDIO_MASK_ALL & ~host->sdio_irq_mask;
647 sdio_status = status & ~TMIO_SDIO_MASK_ALL;
648 if (pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS)
649 sdio_status |= TMIO_SDIO_SETBITS_MASK;
651 sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status);
653 if (mmc->caps & MMC_CAP_SDIO_IRQ && ireg & TMIO_SDIO_STAT_IOIRQ)
654 mmc_signal_sdio_irq(mmc);
659 irqreturn_t tmio_mmc_irq(int irq, void *devid)
661 struct tmio_mmc_host *host = devid;
662 unsigned int ireg, status;
664 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS);
665 ireg = status & TMIO_MASK_IRQ & ~host->sdcard_irq_mask;
667 /* Clear the status except the interrupt status */
668 sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, TMIO_MASK_IRQ);
670 if (__tmio_mmc_card_detect_irq(host, ireg, status))
672 if (__tmio_mmc_sdcard_irq(host, ireg, status))
675 if (__tmio_mmc_sdio_irq(host))
680 EXPORT_SYMBOL_GPL(tmio_mmc_irq);
682 static int tmio_mmc_start_data(struct tmio_mmc_host *host,
683 struct mmc_data *data)
685 struct tmio_mmc_data *pdata = host->pdata;
687 pr_debug("setup data transfer: blocksize %08x nr_blocks %d\n",
688 data->blksz, data->blocks);
690 /* Some hardware cannot perform 2 byte requests in 4/8 bit mode */
691 if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4 ||
692 host->mmc->ios.bus_width == MMC_BUS_WIDTH_8) {
693 int blksz_2bytes = pdata->flags & TMIO_MMC_BLKSZ_2BYTES;
695 if (data->blksz < 2 || (data->blksz < 4 && !blksz_2bytes)) {
696 pr_err("%s: %d byte block unsupported in 4/8 bit mode\n",
697 mmc_hostname(host->mmc), data->blksz);
702 tmio_mmc_init_sg(host, data);
704 host->dma_on = false;
706 /* Set transfer length / blocksize */
707 sd_ctrl_write16(host, CTL_SD_XFER_LEN, data->blksz);
708 if (host->mmc->max_blk_count >= SZ_64K)
709 sd_ctrl_write32(host, CTL_XFER_BLK_COUNT, data->blocks);
711 sd_ctrl_write16(host, CTL_XFER_BLK_COUNT, data->blocks);
713 tmio_mmc_start_dma(host, data);
718 static int tmio_mmc_execute_tuning(struct mmc_host *mmc, u32 opcode)
720 struct tmio_mmc_host *host = mmc_priv(mmc);
723 if (!host->execute_tuning)
726 ret = host->execute_tuning(host, opcode);
729 dev_warn(&host->pdev->dev, "Tuning procedure failed\n");
730 tmio_mmc_hw_reset(mmc);
736 static void tmio_process_mrq(struct tmio_mmc_host *host,
737 struct mmc_request *mrq)
739 struct mmc_command *cmd;
742 if (mrq->sbc && host->cmd != mrq->sbc) {
747 ret = tmio_mmc_start_data(host, mrq->data);
753 ret = tmio_mmc_start_command(host, cmd);
757 schedule_delayed_work(&host->delayed_reset_work,
758 msecs_to_jiffies(CMDREQ_TIMEOUT));
763 mrq->cmd->error = ret;
764 mmc_request_done(host->mmc, mrq);
767 /* Process requests from the MMC layer */
768 static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
770 struct tmio_mmc_host *host = mmc_priv(mmc);
773 spin_lock_irqsave(&host->lock, flags);
776 pr_debug("request not null\n");
777 if (IS_ERR(host->mrq)) {
778 spin_unlock_irqrestore(&host->lock, flags);
779 mrq->cmd->error = -EAGAIN;
780 mmc_request_done(mmc, mrq);
785 host->last_req_ts = jiffies;
789 spin_unlock_irqrestore(&host->lock, flags);
791 tmio_process_mrq(host, mrq);
794 static void tmio_mmc_finish_request(struct tmio_mmc_host *host)
796 struct mmc_request *mrq;
799 spin_lock_irqsave(&host->lock, flags);
802 if (IS_ERR_OR_NULL(mrq)) {
803 spin_unlock_irqrestore(&host->lock, flags);
807 /* If not SET_BLOCK_COUNT, clear old data */
808 if (host->cmd != mrq->sbc) {
814 cancel_delayed_work(&host->delayed_reset_work);
816 spin_unlock_irqrestore(&host->lock, flags);
818 if (mrq->cmd->error || (mrq->data && mrq->data->error))
819 tmio_mmc_abort_dma(host);
821 /* Error means retune, but executed command was still successful */
822 if (host->check_retune && host->check_retune(host))
823 mmc_retune_needed(host->mmc);
825 /* If SET_BLOCK_COUNT, continue with main command */
826 if (host->mrq && !mrq->cmd->error) {
827 tmio_process_mrq(host, mrq);
831 mmc_request_done(host->mmc, mrq);
834 static void tmio_mmc_done_work(struct work_struct *work)
836 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
838 tmio_mmc_finish_request(host);
841 static void tmio_mmc_power_on(struct tmio_mmc_host *host, unsigned short vdd)
843 struct mmc_host *mmc = host->mmc;
846 /* .set_ios() is returning void, so, no chance to report an error */
849 host->set_pwr(host->pdev, 1);
851 if (!IS_ERR(mmc->supply.vmmc)) {
852 ret = mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd);
854 * Attention: empiric value. With a b43 WiFi SDIO card this
855 * delay proved necessary for reliable card-insertion probing.
856 * 100us were not enough. Is this the same 140us delay, as in
857 * tmio_mmc_set_ios()?
859 usleep_range(200, 300);
862 * It seems, VccQ should be switched on after Vcc, this is also what the
863 * omap_hsmmc.c driver does.
865 if (!IS_ERR(mmc->supply.vqmmc) && !ret) {
866 ret = regulator_enable(mmc->supply.vqmmc);
867 usleep_range(200, 300);
871 dev_dbg(&host->pdev->dev, "Regulators failed to power up: %d\n",
875 static void tmio_mmc_power_off(struct tmio_mmc_host *host)
877 struct mmc_host *mmc = host->mmc;
879 if (!IS_ERR(mmc->supply.vqmmc))
880 regulator_disable(mmc->supply.vqmmc);
882 if (!IS_ERR(mmc->supply.vmmc))
883 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0);
886 host->set_pwr(host->pdev, 0);
889 static void tmio_mmc_set_bus_width(struct tmio_mmc_host *host,
890 unsigned char bus_width)
892 u16 reg = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT)
893 & ~(CARD_OPT_WIDTH | CARD_OPT_WIDTH8);
895 /* reg now applies to MMC_BUS_WIDTH_4 */
896 if (bus_width == MMC_BUS_WIDTH_1)
897 reg |= CARD_OPT_WIDTH;
898 else if (bus_width == MMC_BUS_WIDTH_8)
899 reg |= CARD_OPT_WIDTH8;
901 sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, reg);
904 /* Set MMC clock / power.
905 * Note: This controller uses a simple divider scheme therefore it cannot
906 * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as
907 * MMC wont run that fast, it has to be clocked at 12MHz which is the next
910 static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
912 struct tmio_mmc_host *host = mmc_priv(mmc);
913 struct device *dev = &host->pdev->dev;
916 mutex_lock(&host->ios_lock);
918 spin_lock_irqsave(&host->lock, flags);
920 if (IS_ERR(host->mrq)) {
922 "%s.%d: concurrent .set_ios(), clk %u, mode %u\n",
923 current->comm, task_pid_nr(current),
924 ios->clock, ios->power_mode);
925 host->mrq = ERR_PTR(-EINTR);
928 "%s.%d: CMD%u active since %lu, now %lu!\n",
929 current->comm, task_pid_nr(current),
930 host->mrq->cmd->opcode, host->last_req_ts,
933 spin_unlock_irqrestore(&host->lock, flags);
935 mutex_unlock(&host->ios_lock);
939 host->mrq = ERR_PTR(-EBUSY);
941 spin_unlock_irqrestore(&host->lock, flags);
943 switch (ios->power_mode) {
945 tmio_mmc_power_off(host);
946 host->set_clock(host, 0);
949 tmio_mmc_power_on(host, ios->vdd);
950 host->set_clock(host, ios->clock);
951 tmio_mmc_set_bus_width(host, ios->bus_width);
954 host->set_clock(host, ios->clock);
955 tmio_mmc_set_bus_width(host, ios->bus_width);
959 /* Let things settle. delay taken from winCE driver */
960 usleep_range(140, 200);
961 if (PTR_ERR(host->mrq) == -EINTR)
962 dev_dbg(&host->pdev->dev,
963 "%s.%d: IOS interrupted: clk %u, mode %u",
964 current->comm, task_pid_nr(current),
965 ios->clock, ios->power_mode);
968 host->clk_cache = ios->clock;
970 mutex_unlock(&host->ios_lock);
973 static int tmio_mmc_get_ro(struct mmc_host *mmc)
975 struct tmio_mmc_host *host = mmc_priv(mmc);
977 return !(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) &
978 TMIO_STAT_WRPROTECT);
981 static int tmio_mmc_get_cd(struct mmc_host *mmc)
983 struct tmio_mmc_host *host = mmc_priv(mmc);
985 return !!(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) &
989 static int tmio_multi_io_quirk(struct mmc_card *card,
990 unsigned int direction, int blk_size)
992 struct tmio_mmc_host *host = mmc_priv(card->host);
994 if (host->multi_io_quirk)
995 return host->multi_io_quirk(card, direction, blk_size);
1000 static struct mmc_host_ops tmio_mmc_ops = {
1001 .request = tmio_mmc_request,
1002 .set_ios = tmio_mmc_set_ios,
1003 .get_ro = tmio_mmc_get_ro,
1004 .get_cd = tmio_mmc_get_cd,
1005 .enable_sdio_irq = tmio_mmc_enable_sdio_irq,
1006 .multi_io_quirk = tmio_multi_io_quirk,
1007 .hw_reset = tmio_mmc_hw_reset,
1008 .execute_tuning = tmio_mmc_execute_tuning,
1011 static int tmio_mmc_init_ocr(struct tmio_mmc_host *host)
1013 struct tmio_mmc_data *pdata = host->pdata;
1014 struct mmc_host *mmc = host->mmc;
1017 err = mmc_regulator_get_supply(mmc);
1021 /* use ocr_mask if no regulator */
1022 if (!mmc->ocr_avail)
1023 mmc->ocr_avail = pdata->ocr_mask;
1027 * There is possibility that regulator has not been probed
1029 if (!mmc->ocr_avail)
1030 return -EPROBE_DEFER;
1035 static void tmio_mmc_of_parse(struct platform_device *pdev,
1036 struct mmc_host *mmc)
1038 const struct device_node *np = pdev->dev.of_node;
1045 * For new platforms, please use "disable-wp" instead of
1046 * "toshiba,mmc-wrprotect-disable"
1048 if (of_get_property(np, "toshiba,mmc-wrprotect-disable", NULL))
1049 mmc->caps2 |= MMC_CAP2_NO_WRITE_PROTECT;
1052 struct tmio_mmc_host *tmio_mmc_host_alloc(struct platform_device *pdev,
1053 struct tmio_mmc_data *pdata)
1055 struct tmio_mmc_host *host;
1056 struct mmc_host *mmc;
1060 ctl = devm_platform_ioremap_resource(pdev, 0);
1062 return ERR_CAST(ctl);
1064 mmc = mmc_alloc_host(sizeof(struct tmio_mmc_host), &pdev->dev);
1066 return ERR_PTR(-ENOMEM);
1068 host = mmc_priv(mmc);
1072 host->pdata = pdata;
1073 host->ops = tmio_mmc_ops;
1074 mmc->ops = &host->ops;
1076 ret = mmc_of_parse(host->mmc);
1078 host = ERR_PTR(ret);
1082 tmio_mmc_of_parse(pdev, mmc);
1084 platform_set_drvdata(pdev, host);
1092 EXPORT_SYMBOL_GPL(tmio_mmc_host_alloc);
1094 void tmio_mmc_host_free(struct tmio_mmc_host *host)
1096 mmc_free_host(host->mmc);
1098 EXPORT_SYMBOL_GPL(tmio_mmc_host_free);
1100 int tmio_mmc_host_probe(struct tmio_mmc_host *_host)
1102 struct platform_device *pdev = _host->pdev;
1103 struct tmio_mmc_data *pdata = _host->pdata;
1104 struct mmc_host *mmc = _host->mmc;
1108 * Check the sanity of mmc->f_min to prevent host->set_clock() from
1109 * looping forever...
1111 if (mmc->f_min == 0)
1114 if (!(pdata->flags & TMIO_MMC_HAS_IDLE_WAIT))
1115 _host->write16_hook = NULL;
1117 _host->set_pwr = pdata->set_pwr;
1119 ret = tmio_mmc_init_ocr(_host);
1124 * Look for a card detect GPIO, if it fails with anything
1125 * else than a probe deferral, just live without it.
1127 ret = mmc_gpiod_request_cd(mmc, "cd", 0, false, 0);
1128 if (ret == -EPROBE_DEFER)
1131 mmc->caps |= MMC_CAP_ERASE | MMC_CAP_4_BIT_DATA | pdata->capabilities;
1132 mmc->caps2 |= pdata->capabilities2;
1133 mmc->max_segs = pdata->max_segs ? : 32;
1134 mmc->max_blk_size = TMIO_MAX_BLK_SIZE;
1135 mmc->max_blk_count = pdata->max_blk_count ? :
1136 (PAGE_SIZE / mmc->max_blk_size) * mmc->max_segs;
1137 mmc->max_req_size = min_t(size_t,
1138 mmc->max_blk_size * mmc->max_blk_count,
1139 dma_max_mapping_size(&pdev->dev));
1140 mmc->max_seg_size = mmc->max_req_size;
1142 if (mmc_can_gpio_ro(mmc))
1143 _host->ops.get_ro = mmc_gpio_get_ro;
1145 if (mmc_can_gpio_cd(mmc))
1146 _host->ops.get_cd = mmc_gpio_get_cd;
1148 _host->native_hotplug = !(mmc_can_gpio_cd(mmc) ||
1149 mmc->caps & MMC_CAP_NEEDS_POLL ||
1150 !mmc_card_is_removable(mmc));
1153 _host->reset = tmio_mmc_reset;
1156 * On Gen2+, eMMC with NONREMOVABLE currently fails because native
1157 * hotplug gets disabled. It seems RuntimePM related yet we need further
1158 * research. Since we are planning a PM overhaul anyway, let's enforce
1159 * for now the device being active by enabling native hotplug always.
1161 if (pdata->flags & TMIO_MMC_MIN_RCAR2)
1162 _host->native_hotplug = true;
1165 * While using internal tmio hardware logic for card detection, we need
1166 * to ensure it stays powered for it to work.
1168 if (_host->native_hotplug)
1169 pm_runtime_get_noresume(&pdev->dev);
1171 _host->sdio_irq_enabled = false;
1172 if (pdata->flags & TMIO_MMC_SDIO_IRQ)
1173 _host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
1175 _host->set_clock(_host, 0);
1176 tmio_mmc_hw_reset(mmc);
1178 _host->sdcard_irq_mask = sd_ctrl_read16_and_16_as_32(_host, CTL_IRQ_MASK);
1179 tmio_mmc_disable_mmc_irqs(_host, TMIO_MASK_ALL);
1181 if (_host->native_hotplug)
1182 tmio_mmc_enable_mmc_irqs(_host,
1183 TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT);
1185 spin_lock_init(&_host->lock);
1186 mutex_init(&_host->ios_lock);
1188 /* Init delayed work for request timeouts */
1189 INIT_DELAYED_WORK(&_host->delayed_reset_work, tmio_mmc_reset_work);
1190 INIT_WORK(&_host->done, tmio_mmc_done_work);
1192 /* See if we also get DMA */
1193 tmio_mmc_request_dma(_host, pdata);
1195 dev_pm_domain_start(&pdev->dev);
1196 pm_runtime_get_noresume(&pdev->dev);
1197 pm_runtime_set_active(&pdev->dev);
1198 pm_runtime_set_autosuspend_delay(&pdev->dev, 50);
1199 pm_runtime_use_autosuspend(&pdev->dev);
1200 pm_runtime_enable(&pdev->dev);
1202 ret = mmc_add_host(mmc);
1206 dev_pm_qos_expose_latency_limit(&pdev->dev, 100);
1207 pm_runtime_put(&pdev->dev);
1212 pm_runtime_put_noidle(&pdev->dev);
1213 tmio_mmc_host_remove(_host);
1216 EXPORT_SYMBOL_GPL(tmio_mmc_host_probe);
1218 void tmio_mmc_host_remove(struct tmio_mmc_host *host)
1220 struct platform_device *pdev = host->pdev;
1221 struct mmc_host *mmc = host->mmc;
1223 pm_runtime_get_sync(&pdev->dev);
1225 if (host->pdata->flags & TMIO_MMC_SDIO_IRQ)
1226 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0000);
1228 dev_pm_qos_hide_latency_limit(&pdev->dev);
1230 mmc_remove_host(mmc);
1231 cancel_work_sync(&host->done);
1232 cancel_delayed_work_sync(&host->delayed_reset_work);
1233 tmio_mmc_release_dma(host);
1235 pm_runtime_dont_use_autosuspend(&pdev->dev);
1236 if (host->native_hotplug)
1237 pm_runtime_put_noidle(&pdev->dev);
1238 pm_runtime_put_sync(&pdev->dev);
1239 pm_runtime_disable(&pdev->dev);
1241 EXPORT_SYMBOL_GPL(tmio_mmc_host_remove);
1244 static int tmio_mmc_clk_enable(struct tmio_mmc_host *host)
1246 if (!host->clk_enable)
1249 return host->clk_enable(host);
1252 static void tmio_mmc_clk_disable(struct tmio_mmc_host *host)
1254 if (host->clk_disable)
1255 host->clk_disable(host);
1258 int tmio_mmc_host_runtime_suspend(struct device *dev)
1260 struct tmio_mmc_host *host = dev_get_drvdata(dev);
1262 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_ALL);
1264 if (host->clk_cache)
1265 host->set_clock(host, 0);
1267 tmio_mmc_clk_disable(host);
1271 EXPORT_SYMBOL_GPL(tmio_mmc_host_runtime_suspend);
1273 int tmio_mmc_host_runtime_resume(struct device *dev)
1275 struct tmio_mmc_host *host = dev_get_drvdata(dev);
1277 tmio_mmc_clk_enable(host);
1278 tmio_mmc_hw_reset(host->mmc);
1280 if (host->clk_cache)
1281 host->set_clock(host, host->clk_cache);
1283 if (host->native_hotplug)
1284 tmio_mmc_enable_mmc_irqs(host,
1285 TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT);
1287 tmio_mmc_enable_dma(host, true);
1289 mmc_retune_needed(host->mmc);
1293 EXPORT_SYMBOL_GPL(tmio_mmc_host_runtime_resume);
1296 MODULE_LICENSE("GPL v2");