1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * sdricoh_cs.c - driver for Ricoh Secure Digital Card Readers that can be
4 * found on some Ricoh RL5c476 II cardbus bridge
6 * Copyright (C) 2006 - 2008 Sascha Sommer <saschasommer@freenet.de>
13 #include <linux/delay.h>
14 #include <linux/highmem.h>
15 #include <linux/module.h>
16 #include <linux/pci.h>
17 #include <linux/ioport.h>
18 #include <linux/scatterlist.h>
20 #include <pcmcia/cistpl.h>
21 #include <pcmcia/ds.h>
24 #include <linux/mmc/host.h>
26 #define DRIVER_NAME "sdricoh_cs"
28 static unsigned int switchlocked;
31 #define SDRICOH_PCI_REGION 0
32 #define SDRICOH_PCI_REGION_SIZE 0x1000
35 #define R104_VERSION 0x104
36 #define R200_CMD 0x200
37 #define R204_CMD_ARG 0x204
38 #define R208_DATAIO 0x208
39 #define R20C_RESP 0x20c
40 #define R21C_STATUS 0x21c
41 #define R2E0_INIT 0x2e0
42 #define R2E4_STATUS_RESP 0x2e4
43 #define R2F0_RESET 0x2f0
44 #define R224_MODE 0x224
45 #define R226_BLOCKSIZE 0x226
46 #define R228_POWER 0x228
47 #define R230_DATA 0x230
49 /* flags for the R21C_STATUS register */
50 #define STATUS_CMD_FINISHED 0x00000001
51 #define STATUS_TRANSFER_FINISHED 0x00000004
52 #define STATUS_CARD_INSERTED 0x00000020
53 #define STATUS_CARD_LOCKED 0x00000080
54 #define STATUS_CMD_TIMEOUT 0x00400000
55 #define STATUS_READY_TO_READ 0x01000000
56 #define STATUS_READY_TO_WRITE 0x02000000
57 #define STATUS_BUSY 0x40000000
60 #define CMD_TIMEOUT 100000
61 #define TRANSFER_TIMEOUT 100000
63 /* list of supported pcmcia devices */
64 static const struct pcmcia_device_id pcmcia_ids[] = {
65 /* vendor and device strings followed by their crc32 hashes */
66 PCMCIA_DEVICE_PROD_ID12("RICOH", "Bay1Controller", 0xd9f522ed,
68 PCMCIA_DEVICE_PROD_ID12("RICOH", "Bay Controller", 0xd9f522ed,
73 MODULE_DEVICE_TABLE(pcmcia, pcmcia_ids);
78 struct mmc_host *mmc; /* MMC structure */
79 unsigned char __iomem *iobase;
80 struct pci_dev *pci_dev;
84 /***************** register i/o helper functions *****************************/
86 static inline unsigned int sdricoh_readl(struct sdricoh_host *host,
89 unsigned int value = readl(host->iobase + reg);
90 dev_vdbg(host->dev, "rl %x 0x%x\n", reg, value);
94 static inline void sdricoh_writel(struct sdricoh_host *host, unsigned int reg,
97 writel(value, host->iobase + reg);
98 dev_vdbg(host->dev, "wl %x 0x%x\n", reg, value);
102 static inline unsigned int sdricoh_readw(struct sdricoh_host *host,
105 unsigned int value = readw(host->iobase + reg);
106 dev_vdbg(host->dev, "rb %x 0x%x\n", reg, value);
110 static inline void sdricoh_writew(struct sdricoh_host *host, unsigned int reg,
111 unsigned short value)
113 writew(value, host->iobase + reg);
114 dev_vdbg(host->dev, "ww %x 0x%x\n", reg, value);
117 static inline unsigned int sdricoh_readb(struct sdricoh_host *host,
120 unsigned int value = readb(host->iobase + reg);
121 dev_vdbg(host->dev, "rb %x 0x%x\n", reg, value);
125 static int sdricoh_query_status(struct sdricoh_host *host, unsigned int wanted,
126 unsigned int timeout){
128 unsigned int status = 0;
129 struct device *dev = host->dev;
130 for (loop = 0; loop < timeout; loop++) {
131 status = sdricoh_readl(host, R21C_STATUS);
132 sdricoh_writel(host, R2E4_STATUS_RESP, status);
137 if (loop == timeout) {
138 dev_err(dev, "query_status: timeout waiting for %x\n", wanted);
142 /* do not do this check in the loop as some commands fail otherwise */
143 if (status & 0x7F0000) {
144 dev_err(dev, "waiting for status bit %x failed\n", wanted);
151 static int sdricoh_mmc_cmd(struct sdricoh_host *host, unsigned char opcode,
156 unsigned int loop = 0;
157 /* reset status reg? */
158 sdricoh_writel(host, R21C_STATUS, 0x18);
159 /* fill parameters */
160 sdricoh_writel(host, R204_CMD_ARG, arg);
161 sdricoh_writel(host, R200_CMD, (0x10000 << 8) | opcode);
162 /* wait for command completion */
164 for (loop = 0; loop < CMD_TIMEOUT; loop++) {
165 status = sdricoh_readl(host, R21C_STATUS);
166 sdricoh_writel(host, R2E4_STATUS_RESP, status);
167 if (status & STATUS_CMD_FINISHED)
170 /* don't check for timeout in the loop it is not always
173 if (loop == CMD_TIMEOUT || status & STATUS_CMD_TIMEOUT)
182 static int sdricoh_reset(struct sdricoh_host *host)
184 dev_dbg(host->dev, "reset\n");
185 sdricoh_writel(host, R2F0_RESET, 0x10001);
186 sdricoh_writel(host, R2E0_INIT, 0x10000);
187 if (sdricoh_readl(host, R2E0_INIT) != 0x10000)
189 sdricoh_writel(host, R2E0_INIT, 0x10007);
191 sdricoh_writel(host, R224_MODE, 0x2000000);
192 sdricoh_writel(host, R228_POWER, 0xe0);
195 /* status register ? */
196 sdricoh_writel(host, R21C_STATUS, 0x18);
201 static int sdricoh_blockio(struct sdricoh_host *host, int read,
206 /* wait until the data is available */
208 if (sdricoh_query_status(host, STATUS_READY_TO_READ,
211 sdricoh_writel(host, R21C_STATUS, 0x18);
214 data = sdricoh_readl(host, R230_DATA);
225 if (sdricoh_query_status(host, STATUS_READY_TO_WRITE,
228 sdricoh_writel(host, R21C_STATUS, 0x18);
235 data |= (u32)*buf << 24;
239 sdricoh_writel(host, R230_DATA, data);
246 static void sdricoh_request(struct mmc_host *mmc, struct mmc_request *mrq)
248 struct sdricoh_host *host = mmc_priv(mmc);
249 struct mmc_command *cmd = mrq->cmd;
250 struct mmc_data *data = cmd->data;
251 struct device *dev = host->dev;
252 unsigned char opcode = cmd->opcode;
255 dev_dbg(dev, "=============================\n");
256 dev_dbg(dev, "sdricoh_request opcode=%i\n", opcode);
258 sdricoh_writel(host, R21C_STATUS, 0x18);
260 /* MMC_APP_CMDs need some special handling */
264 } else if (opcode == 55)
267 /* read/write commands seem to require this */
269 sdricoh_writew(host, R226_BLOCKSIZE, data->blksz);
270 sdricoh_writel(host, R208_DATAIO, 0);
273 cmd->error = sdricoh_mmc_cmd(host, opcode, cmd->arg);
275 /* read response buffer */
276 if (cmd->flags & MMC_RSP_PRESENT) {
277 if (cmd->flags & MMC_RSP_136) {
278 /* CRC is stripped so we need to do some shifting. */
279 for (i = 0; i < 4; i++) {
282 R20C_RESP + (3 - i) * 4) << 8;
285 sdricoh_readb(host, R20C_RESP +
289 cmd->resp[0] = sdricoh_readl(host, R20C_RESP);
293 if (data && cmd->error == 0) {
294 dev_dbg(dev, "transfer: blksz %i blocks %i sg_len %i "
295 "sg length %i\n", data->blksz, data->blocks,
296 data->sg_len, data->sg->length);
298 /* enter data reading mode */
299 sdricoh_writel(host, R21C_STATUS, 0x837f031e);
300 for (i = 0; i < data->blocks; i++) {
301 size_t len = data->blksz;
305 page = sg_page(data->sg);
307 buf = kmap(page) + data->sg->offset + (len * i);
309 sdricoh_blockio(host,
310 data->flags & MMC_DATA_READ, buf, len);
312 flush_dcache_page(page);
314 dev_err(dev, "sdricoh_request: cmd %i "
315 "block transfer failed\n", cmd->opcode);
319 data->bytes_xfered += len;
322 sdricoh_writel(host, R208_DATAIO, 1);
324 if (sdricoh_query_status(host, STATUS_TRANSFER_FINISHED,
326 dev_err(dev, "sdricoh_request: transfer end error\n");
327 cmd->error = -EINVAL;
330 /* FIXME check busy flag */
332 mmc_request_done(mmc, mrq);
333 dev_dbg(dev, "=============================\n");
336 static void sdricoh_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
338 struct sdricoh_host *host = mmc_priv(mmc);
339 dev_dbg(host->dev, "set_ios\n");
341 if (ios->power_mode == MMC_POWER_ON) {
342 sdricoh_writel(host, R228_POWER, 0xc0e0);
344 if (ios->bus_width == MMC_BUS_WIDTH_4) {
345 sdricoh_writel(host, R224_MODE, 0x2000300);
346 sdricoh_writel(host, R228_POWER, 0x40e0);
348 sdricoh_writel(host, R224_MODE, 0x2000340);
351 } else if (ios->power_mode == MMC_POWER_UP) {
352 sdricoh_writel(host, R224_MODE, 0x2000320);
353 sdricoh_writel(host, R228_POWER, 0xe0);
357 static int sdricoh_get_ro(struct mmc_host *mmc)
359 struct sdricoh_host *host = mmc_priv(mmc);
362 status = sdricoh_readl(host, R21C_STATUS);
363 sdricoh_writel(host, R2E4_STATUS_RESP, status);
365 /* some notebooks seem to have the locked flag switched */
367 return !(status & STATUS_CARD_LOCKED);
369 return (status & STATUS_CARD_LOCKED);
372 static const struct mmc_host_ops sdricoh_ops = {
373 .request = sdricoh_request,
374 .set_ios = sdricoh_set_ios,
375 .get_ro = sdricoh_get_ro,
378 /* initialize the control and register it to the mmc framework */
379 static int sdricoh_init_mmc(struct pci_dev *pci_dev,
380 struct pcmcia_device *pcmcia_dev)
383 void __iomem *iobase;
384 struct mmc_host *mmc;
385 struct sdricoh_host *host;
386 struct device *dev = &pcmcia_dev->dev;
388 if (pci_resource_len(pci_dev, SDRICOH_PCI_REGION) !=
389 SDRICOH_PCI_REGION_SIZE) {
390 dev_dbg(dev, "unexpected pci resource len\n");
394 pci_iomap(pci_dev, SDRICOH_PCI_REGION, SDRICOH_PCI_REGION_SIZE);
396 dev_err(dev, "unable to map iobase\n");
400 if (readl(iobase + R104_VERSION) != 0x4000) {
401 dev_dbg(dev, "no supported mmc controller found\n");
405 /* allocate privdata */
406 mmc = pcmcia_dev->priv =
407 mmc_alloc_host(sizeof(struct sdricoh_host), &pcmcia_dev->dev);
409 dev_err(dev, "mmc_alloc_host failed\n");
413 host = mmc_priv(mmc);
415 host->iobase = iobase;
417 host->pci_dev = pci_dev;
419 mmc->ops = &sdricoh_ops;
421 /* FIXME: frequency and voltage handling is done by the controller
424 mmc->f_max = 24000000;
425 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
426 mmc->caps |= MMC_CAP_4_BIT_DATA;
428 mmc->max_seg_size = 1024 * 512;
429 mmc->max_blk_size = 512;
431 /* reset the controller */
432 if (sdricoh_reset(host)) {
433 dev_dbg(dev, "could not reset\n");
438 result = mmc_add_host(mmc);
441 dev_dbg(dev, "mmc host registered\n");
447 pci_iounmap(pci_dev, iobase);
451 /* search for supported mmc controllers */
452 static int sdricoh_pcmcia_probe(struct pcmcia_device *pcmcia_dev)
454 struct pci_dev *pci_dev = NULL;
456 dev_info(&pcmcia_dev->dev, "Searching MMC controller for pcmcia device"
457 " %s %s ...\n", pcmcia_dev->prod_id[0], pcmcia_dev->prod_id[1]);
459 /* search pci cardbus bridge that contains the mmc controller */
460 /* the io region is already claimed by yenta_socket... */
462 pci_get_device(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C476,
464 /* try to init the device */
465 if (!sdricoh_init_mmc(pci_dev, pcmcia_dev)) {
466 dev_info(&pcmcia_dev->dev, "MMC controller found\n");
471 dev_err(&pcmcia_dev->dev, "No MMC controller was found.\n");
475 static void sdricoh_pcmcia_detach(struct pcmcia_device *link)
477 struct mmc_host *mmc = link->priv;
479 dev_dbg(&link->dev, "detach\n");
481 /* remove mmc host */
483 struct sdricoh_host *host = mmc_priv(mmc);
484 mmc_remove_host(mmc);
485 pci_iounmap(host->pci_dev, host->iobase);
486 pci_dev_put(host->pci_dev);
489 pcmcia_disable_device(link);
494 static int sdricoh_pcmcia_suspend(struct pcmcia_device *link)
496 dev_dbg(&link->dev, "suspend\n");
500 static int sdricoh_pcmcia_resume(struct pcmcia_device *link)
502 struct mmc_host *mmc = link->priv;
503 dev_dbg(&link->dev, "resume\n");
504 sdricoh_reset(mmc_priv(mmc));
508 #define sdricoh_pcmcia_suspend NULL
509 #define sdricoh_pcmcia_resume NULL
512 static struct pcmcia_driver sdricoh_driver = {
514 .probe = sdricoh_pcmcia_probe,
515 .remove = sdricoh_pcmcia_detach,
516 .id_table = pcmcia_ids,
517 .suspend = sdricoh_pcmcia_suspend,
518 .resume = sdricoh_pcmcia_resume,
520 module_pcmcia_driver(sdricoh_driver);
522 module_param(switchlocked, uint, 0444);
524 MODULE_AUTHOR("Sascha Sommer <saschasommer@freenet.de>");
525 MODULE_DESCRIPTION("Ricoh PCMCIA Secure Digital Interface driver");
526 MODULE_LICENSE("GPL");
528 MODULE_PARM_DESC(switchlocked, "Switch the cards locked status."
529 "Use this when unlocked cards are shown readonly (default 0)");