2 * linux/drivers/mmc/host/pxa.c - PXA MMCI driver
4 * Copyright (C) 2003 Russell King, All Rights Reserved.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * This hardware is really sick:
11 * - No way to clear interrupts.
12 * - Have to turn off the clock whenever we touch the device.
13 * - Doesn't tell you how many data blocks were transferred.
16 * 1 and 3 byte data transfers not supported
17 * max block length up to 1023
19 #include <linux/module.h>
20 #include <linux/init.h>
21 #include <linux/ioport.h>
22 #include <linux/platform_device.h>
23 #include <linux/delay.h>
24 #include <linux/interrupt.h>
25 #include <linux/dmaengine.h>
26 #include <linux/dma-mapping.h>
27 #include <linux/clk.h>
28 #include <linux/err.h>
29 #include <linux/mmc/host.h>
30 #include <linux/mmc/slot-gpio.h>
32 #include <linux/regulator/consumer.h>
33 #include <linux/gpio.h>
34 #include <linux/gfp.h>
36 #include <linux/of_gpio.h>
37 #include <linux/of_device.h>
39 #include <asm/sizes.h>
41 #include <mach/hardware.h>
42 #include <linux/platform_data/mmc-pxamci.h>
46 #define DRIVER_NAME "pxa2xx-mci"
49 #define CLKRT_OFF (~0)
51 #define mmc_has_26MHz() (cpu_is_pxa300() || cpu_is_pxa310() \
60 unsigned long clkrate;
64 unsigned int power_mode;
65 unsigned long detect_delay_ms;
66 struct pxamci_platform_data *pdata;
68 struct mmc_request *mrq;
69 struct mmc_command *cmd;
70 struct mmc_data *data;
72 struct dma_chan *dma_chan_rx;
73 struct dma_chan *dma_chan_tx;
74 dma_cookie_t dma_cookie;
79 static int pxamci_init_ocr(struct pxamci_host *host)
81 struct mmc_host *mmc = host->mmc;
84 ret = mmc_regulator_get_supply(mmc);
88 if (IS_ERR(mmc->supply.vmmc)) {
89 /* fall-back to platform data */
90 mmc->ocr_avail = host->pdata ?
91 host->pdata->ocr_mask :
92 MMC_VDD_32_33 | MMC_VDD_33_34;
98 static inline int pxamci_set_power(struct pxamci_host *host,
99 unsigned char power_mode,
102 struct mmc_host *mmc = host->mmc;
103 struct regulator *supply = mmc->supply.vmmc;
107 return mmc_regulator_set_ocr(mmc, supply, vdd);
110 gpio_is_valid(host->pdata->gpio_power)) {
111 on = ((1 << vdd) & host->pdata->ocr_mask);
112 gpio_set_value(host->pdata->gpio_power,
113 !!on ^ host->pdata->gpio_power_invert);
116 if (host->pdata && host->pdata->setpower)
117 return host->pdata->setpower(mmc_dev(host->mmc), vdd);
122 static void pxamci_stop_clock(struct pxamci_host *host)
124 if (readl(host->base + MMC_STAT) & STAT_CLK_EN) {
125 unsigned long timeout = 10000;
128 writel(STOP_CLOCK, host->base + MMC_STRPCL);
131 v = readl(host->base + MMC_STAT);
132 if (!(v & STAT_CLK_EN))
138 dev_err(mmc_dev(host->mmc), "unable to stop clock\n");
142 static void pxamci_enable_irq(struct pxamci_host *host, unsigned int mask)
146 spin_lock_irqsave(&host->lock, flags);
147 host->imask &= ~mask;
148 writel(host->imask, host->base + MMC_I_MASK);
149 spin_unlock_irqrestore(&host->lock, flags);
152 static void pxamci_disable_irq(struct pxamci_host *host, unsigned int mask)
156 spin_lock_irqsave(&host->lock, flags);
158 writel(host->imask, host->base + MMC_I_MASK);
159 spin_unlock_irqrestore(&host->lock, flags);
162 static void pxamci_dma_irq(void *param);
164 static void pxamci_setup_data(struct pxamci_host *host, struct mmc_data *data)
166 struct dma_async_tx_descriptor *tx;
167 enum dma_data_direction direction;
168 struct dma_slave_config config;
169 struct dma_chan *chan;
170 unsigned int nob = data->blocks;
171 unsigned long long clks;
172 unsigned int timeout;
177 writel(nob, host->base + MMC_NOB);
178 writel(data->blksz, host->base + MMC_BLKLEN);
180 clks = (unsigned long long)data->timeout_ns * host->clkrate;
181 do_div(clks, 1000000000UL);
182 timeout = (unsigned int)clks + (data->timeout_clks << host->clkrt);
183 writel((timeout + 255) / 256, host->base + MMC_RDTO);
185 memset(&config, 0, sizeof(config));
186 config.src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
187 config.dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
188 config.src_addr = host->res->start + MMC_RXFIFO;
189 config.dst_addr = host->res->start + MMC_TXFIFO;
190 config.src_maxburst = 32;
191 config.dst_maxburst = 32;
193 if (data->flags & MMC_DATA_READ) {
194 host->dma_dir = DMA_FROM_DEVICE;
195 direction = DMA_DEV_TO_MEM;
196 chan = host->dma_chan_rx;
198 host->dma_dir = DMA_TO_DEVICE;
199 direction = DMA_MEM_TO_DEV;
200 chan = host->dma_chan_tx;
203 config.direction = direction;
205 ret = dmaengine_slave_config(chan, &config);
207 dev_err(mmc_dev(host->mmc), "dma slave config failed\n");
211 host->dma_len = dma_map_sg(chan->device->dev, data->sg, data->sg_len,
214 tx = dmaengine_prep_slave_sg(chan, data->sg, host->dma_len, direction,
217 dev_err(mmc_dev(host->mmc), "prep_slave_sg() failed\n");
221 if (!(data->flags & MMC_DATA_READ)) {
222 tx->callback = pxamci_dma_irq;
223 tx->callback_param = host;
226 host->dma_cookie = dmaengine_submit(tx);
229 * workaround for erratum #91:
230 * only start DMA now if we are doing a read,
231 * otherwise we wait until CMD/RESP has finished
232 * before starting DMA.
234 if (!cpu_is_pxa27x() || data->flags & MMC_DATA_READ)
235 dma_async_issue_pending(chan);
238 static void pxamci_start_cmd(struct pxamci_host *host, struct mmc_command *cmd, unsigned int cmdat)
240 WARN_ON(host->cmd != NULL);
243 if (cmd->flags & MMC_RSP_BUSY)
246 #define RSP_TYPE(x) ((x) & ~(MMC_RSP_BUSY|MMC_RSP_OPCODE))
247 switch (RSP_TYPE(mmc_resp_type(cmd))) {
248 case RSP_TYPE(MMC_RSP_R1): /* r1, r1b, r6, r7 */
249 cmdat |= CMDAT_RESP_SHORT;
251 case RSP_TYPE(MMC_RSP_R3):
252 cmdat |= CMDAT_RESP_R3;
254 case RSP_TYPE(MMC_RSP_R2):
255 cmdat |= CMDAT_RESP_R2;
261 writel(cmd->opcode, host->base + MMC_CMD);
262 writel(cmd->arg >> 16, host->base + MMC_ARGH);
263 writel(cmd->arg & 0xffff, host->base + MMC_ARGL);
264 writel(cmdat, host->base + MMC_CMDAT);
265 writel(host->clkrt, host->base + MMC_CLKRT);
267 writel(START_CLOCK, host->base + MMC_STRPCL);
269 pxamci_enable_irq(host, END_CMD_RES);
272 static void pxamci_finish_request(struct pxamci_host *host, struct mmc_request *mrq)
277 mmc_request_done(host->mmc, mrq);
280 static int pxamci_cmd_done(struct pxamci_host *host, unsigned int stat)
282 struct mmc_command *cmd = host->cmd;
292 * Did I mention this is Sick. We always need to
293 * discard the upper 8 bits of the first 16-bit word.
295 v = readl(host->base + MMC_RES) & 0xffff;
296 for (i = 0; i < 4; i++) {
297 u32 w1 = readl(host->base + MMC_RES) & 0xffff;
298 u32 w2 = readl(host->base + MMC_RES) & 0xffff;
299 cmd->resp[i] = v << 24 | w1 << 8 | w2 >> 8;
303 if (stat & STAT_TIME_OUT_RESPONSE) {
304 cmd->error = -ETIMEDOUT;
305 } else if (stat & STAT_RES_CRC_ERR && cmd->flags & MMC_RSP_CRC) {
307 * workaround for erratum #42:
308 * Intel PXA27x Family Processor Specification Update Rev 001
309 * A bogus CRC error can appear if the msb of a 136 bit
312 if (cpu_is_pxa27x() &&
313 (cmd->flags & MMC_RSP_136 && cmd->resp[0] & 0x80000000))
314 pr_debug("ignoring CRC from command %d - *risky*\n", cmd->opcode);
316 cmd->error = -EILSEQ;
319 pxamci_disable_irq(host, END_CMD_RES);
320 if (host->data && !cmd->error) {
321 pxamci_enable_irq(host, DATA_TRAN_DONE);
323 * workaround for erratum #91, if doing write
326 if (cpu_is_pxa27x() && host->data->flags & MMC_DATA_WRITE)
327 dma_async_issue_pending(host->dma_chan_tx);
329 pxamci_finish_request(host, host->mrq);
335 static int pxamci_data_done(struct pxamci_host *host, unsigned int stat)
337 struct mmc_data *data = host->data;
338 struct dma_chan *chan;
343 if (data->flags & MMC_DATA_READ)
344 chan = host->dma_chan_rx;
346 chan = host->dma_chan_tx;
347 dma_unmap_sg(chan->device->dev,
348 data->sg, data->sg_len, host->dma_dir);
350 if (stat & STAT_READ_TIME_OUT)
351 data->error = -ETIMEDOUT;
352 else if (stat & (STAT_CRC_READ_ERROR|STAT_CRC_WRITE_ERROR))
353 data->error = -EILSEQ;
356 * There appears to be a hardware design bug here. There seems to
357 * be no way to find out how much data was transferred to the card.
358 * This means that if there was an error on any block, we mark all
359 * data blocks as being in error.
362 data->bytes_xfered = data->blocks * data->blksz;
364 data->bytes_xfered = 0;
366 pxamci_disable_irq(host, DATA_TRAN_DONE);
369 if (host->mrq->stop) {
370 pxamci_stop_clock(host);
371 pxamci_start_cmd(host, host->mrq->stop, host->cmdat);
373 pxamci_finish_request(host, host->mrq);
379 static irqreturn_t pxamci_irq(int irq, void *devid)
381 struct pxamci_host *host = devid;
385 ireg = readl(host->base + MMC_I_REG) & ~readl(host->base + MMC_I_MASK);
388 unsigned stat = readl(host->base + MMC_STAT);
390 pr_debug("PXAMCI: irq %08x stat %08x\n", ireg, stat);
392 if (ireg & END_CMD_RES)
393 handled |= pxamci_cmd_done(host, stat);
394 if (ireg & DATA_TRAN_DONE)
395 handled |= pxamci_data_done(host, stat);
396 if (ireg & SDIO_INT) {
397 mmc_signal_sdio_irq(host->mmc);
402 return IRQ_RETVAL(handled);
405 static void pxamci_request(struct mmc_host *mmc, struct mmc_request *mrq)
407 struct pxamci_host *host = mmc_priv(mmc);
410 WARN_ON(host->mrq != NULL);
414 pxamci_stop_clock(host);
417 host->cmdat &= ~CMDAT_INIT;
420 pxamci_setup_data(host, mrq->data);
422 cmdat &= ~CMDAT_BUSY;
423 cmdat |= CMDAT_DATAEN | CMDAT_DMAEN;
424 if (mrq->data->flags & MMC_DATA_WRITE)
425 cmdat |= CMDAT_WRITE;
428 pxamci_start_cmd(host, mrq->cmd, cmdat);
431 static int pxamci_get_ro(struct mmc_host *mmc)
433 struct pxamci_host *host = mmc_priv(mmc);
435 if (host->pdata && gpio_is_valid(host->pdata->gpio_card_ro))
436 return mmc_gpio_get_ro(mmc);
437 if (host->pdata && host->pdata->get_ro)
438 return !!host->pdata->get_ro(mmc_dev(mmc));
440 * Board doesn't support read only detection; let the mmc core
446 static void pxamci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
448 struct pxamci_host *host = mmc_priv(mmc);
451 unsigned long rate = host->clkrate;
452 unsigned int clk = rate / ios->clock;
454 if (host->clkrt == CLKRT_OFF)
455 clk_prepare_enable(host->clk);
457 if (ios->clock == 26000000) {
458 /* to support 26MHz */
461 /* to handle (19.5MHz, 26MHz) */
466 * clk might result in a lower divisor than we
467 * desire. check for that condition and adjust
470 if (rate / clk > ios->clock)
472 host->clkrt = fls(clk) - 1;
476 * we write clkrt on the next command
479 pxamci_stop_clock(host);
480 if (host->clkrt != CLKRT_OFF) {
481 host->clkrt = CLKRT_OFF;
482 clk_disable_unprepare(host->clk);
486 if (host->power_mode != ios->power_mode) {
489 host->power_mode = ios->power_mode;
491 ret = pxamci_set_power(host, ios->power_mode, ios->vdd);
493 dev_err(mmc_dev(mmc), "unable to set power\n");
495 * The .set_ios() function in the mmc_host_ops
496 * struct return void, and failing to set the
497 * power should be rare so we print an error and
503 if (ios->power_mode == MMC_POWER_ON)
504 host->cmdat |= CMDAT_INIT;
507 if (ios->bus_width == MMC_BUS_WIDTH_4)
508 host->cmdat |= CMDAT_SD_4DAT;
510 host->cmdat &= ~CMDAT_SD_4DAT;
512 dev_dbg(mmc_dev(mmc), "PXAMCI: clkrt = %x cmdat = %x\n",
513 host->clkrt, host->cmdat);
516 static void pxamci_enable_sdio_irq(struct mmc_host *host, int enable)
518 struct pxamci_host *pxa_host = mmc_priv(host);
521 pxamci_enable_irq(pxa_host, SDIO_INT);
523 pxamci_disable_irq(pxa_host, SDIO_INT);
526 static const struct mmc_host_ops pxamci_ops = {
527 .request = pxamci_request,
528 .get_cd = mmc_gpio_get_cd,
529 .get_ro = pxamci_get_ro,
530 .set_ios = pxamci_set_ios,
531 .enable_sdio_irq = pxamci_enable_sdio_irq,
534 static void pxamci_dma_irq(void *param)
536 struct pxamci_host *host = param;
537 struct dma_tx_state state;
538 enum dma_status status;
539 struct dma_chan *chan;
542 spin_lock_irqsave(&host->lock, flags);
547 if (host->data->flags & MMC_DATA_READ)
548 chan = host->dma_chan_rx;
550 chan = host->dma_chan_tx;
552 status = dmaengine_tx_status(chan, host->dma_cookie, &state);
554 if (likely(status == DMA_COMPLETE)) {
555 writel(BUF_PART_FULL, host->base + MMC_PRTBUF);
557 pr_err("%s: DMA error on %s channel\n", mmc_hostname(host->mmc),
558 host->data->flags & MMC_DATA_READ ? "rx" : "tx");
559 host->data->error = -EIO;
560 pxamci_data_done(host, 0);
564 spin_unlock_irqrestore(&host->lock, flags);
567 static irqreturn_t pxamci_detect_irq(int irq, void *devid)
569 struct pxamci_host *host = mmc_priv(devid);
571 mmc_detect_change(devid, msecs_to_jiffies(host->detect_delay_ms));
576 static const struct of_device_id pxa_mmc_dt_ids[] = {
577 { .compatible = "marvell,pxa-mmc" },
581 MODULE_DEVICE_TABLE(of, pxa_mmc_dt_ids);
583 static int pxamci_of_init(struct platform_device *pdev,
584 struct mmc_host *mmc)
586 struct device_node *np = pdev->dev.of_node;
587 struct pxamci_host *host = mmc_priv(mmc);
594 /* pxa-mmc specific */
595 if (of_property_read_u32(np, "pxa-mmc,detect-delay-ms", &tmp) == 0)
596 host->detect_delay_ms = tmp;
598 ret = mmc_of_parse(mmc);
605 static int pxamci_of_init(struct platform_device *pdev,
606 struct mmc_host *mmc)
612 static int pxamci_probe(struct platform_device *pdev)
614 struct mmc_host *mmc;
615 struct pxamci_host *host = NULL;
619 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
620 irq = platform_get_irq(pdev, 0);
624 mmc = mmc_alloc_host(sizeof(struct pxamci_host), &pdev->dev);
630 mmc->ops = &pxamci_ops;
633 * We can do SG-DMA, but we don't because we never know how much
634 * data we successfully wrote to the card.
636 mmc->max_segs = NR_SG;
639 * Our hardware DMA can handle a maximum of one page per SG entry.
641 mmc->max_seg_size = PAGE_SIZE;
644 * Block length register is only 10 bits before PXA27x.
646 mmc->max_blk_size = cpu_is_pxa25x() ? 1023 : 2048;
649 * Block count register is 16 bits.
651 mmc->max_blk_count = 65535;
653 ret = pxamci_of_init(pdev, mmc);
657 host = mmc_priv(mmc);
659 host->pdata = pdev->dev.platform_data;
660 host->clkrt = CLKRT_OFF;
662 host->clk = devm_clk_get(&pdev->dev, NULL);
663 if (IS_ERR(host->clk)) {
664 ret = PTR_ERR(host->clk);
669 host->clkrate = clk_get_rate(host->clk);
672 * Calculate minimum clock rate, rounding up.
674 mmc->f_min = (host->clkrate + 63) / 64;
675 mmc->f_max = (mmc_has_26MHz()) ? 26000000 : host->clkrate;
677 ret = pxamci_init_ocr(host);
683 if (!cpu_is_pxa25x()) {
684 mmc->caps |= MMC_CAP_4_BIT_DATA | MMC_CAP_SDIO_IRQ;
685 host->cmdat |= CMDAT_SDIO_INT_EN;
687 mmc->caps |= MMC_CAP_MMC_HIGHSPEED |
688 MMC_CAP_SD_HIGHSPEED;
691 spin_lock_init(&host->lock);
693 host->imask = MMC_I_MASK_ALL;
695 host->base = devm_ioremap_resource(&pdev->dev, r);
696 if (IS_ERR(host->base)) {
697 ret = PTR_ERR(host->base);
702 * Ensure that the host controller is shut down, and setup
705 pxamci_stop_clock(host);
706 writel(0, host->base + MMC_SPI);
707 writel(64, host->base + MMC_RESTO);
708 writel(host->imask, host->base + MMC_I_MASK);
710 ret = devm_request_irq(&pdev->dev, irq, pxamci_irq, 0,
715 platform_set_drvdata(pdev, mmc);
717 host->dma_chan_rx = dma_request_slave_channel(&pdev->dev, "rx");
718 if (host->dma_chan_rx == NULL) {
719 dev_err(&pdev->dev, "unable to request rx dma channel\n");
724 host->dma_chan_tx = dma_request_slave_channel(&pdev->dev, "tx");
725 if (host->dma_chan_tx == NULL) {
726 dev_err(&pdev->dev, "unable to request tx dma channel\n");
732 int gpio_cd = host->pdata->gpio_card_detect;
733 int gpio_ro = host->pdata->gpio_card_ro;
734 int gpio_power = host->pdata->gpio_power;
736 host->detect_delay_ms = host->pdata->detect_delay_ms;
738 if (gpio_is_valid(gpio_power)) {
739 ret = devm_gpio_request(&pdev->dev, gpio_power,
743 "Failed requesting gpio_power %d\n",
747 gpio_direction_output(gpio_power,
748 host->pdata->gpio_power_invert);
751 if (gpio_is_valid(gpio_ro)) {
752 ret = mmc_gpio_request_ro(mmc, gpio_ro);
755 "Failed requesting gpio_ro %d\n",
759 mmc->caps2 |= host->pdata->gpio_card_ro_invert ?
760 0 : MMC_CAP2_RO_ACTIVE_HIGH;
764 if (gpio_is_valid(gpio_cd))
765 ret = mmc_gpio_request_cd(mmc, gpio_cd, 0);
767 dev_err(&pdev->dev, "Failed requesting gpio_cd %d\n",
772 if (host->pdata->init)
773 host->pdata->init(&pdev->dev, pxamci_detect_irq, mmc);
775 if (gpio_is_valid(gpio_power) && host->pdata->setpower)
776 dev_warn(&pdev->dev, "gpio_power and setpower() both defined\n");
777 if (gpio_is_valid(gpio_ro) && host->pdata->get_ro)
778 dev_warn(&pdev->dev, "gpio_ro and get_ro() both defined\n");
787 if (host->dma_chan_rx)
788 dma_release_channel(host->dma_chan_rx);
789 if (host->dma_chan_tx)
790 dma_release_channel(host->dma_chan_tx);
797 static int pxamci_remove(struct platform_device *pdev)
799 struct mmc_host *mmc = platform_get_drvdata(pdev);
802 struct pxamci_host *host = mmc_priv(mmc);
804 mmc_remove_host(mmc);
806 if (host->pdata && host->pdata->exit)
807 host->pdata->exit(&pdev->dev, mmc);
809 pxamci_stop_clock(host);
810 writel(TXFIFO_WR_REQ|RXFIFO_RD_REQ|CLK_IS_OFF|STOP_CMD|
811 END_CMD_RES|PRG_DONE|DATA_TRAN_DONE,
812 host->base + MMC_I_MASK);
814 dmaengine_terminate_all(host->dma_chan_rx);
815 dmaengine_terminate_all(host->dma_chan_tx);
816 dma_release_channel(host->dma_chan_rx);
817 dma_release_channel(host->dma_chan_tx);
825 static struct platform_driver pxamci_driver = {
826 .probe = pxamci_probe,
827 .remove = pxamci_remove,
830 .of_match_table = of_match_ptr(pxa_mmc_dt_ids),
834 module_platform_driver(pxamci_driver);
836 MODULE_DESCRIPTION("PXA Multimedia Card Interface Driver");
837 MODULE_LICENSE("GPL");
838 MODULE_ALIAS("platform:pxa2xx-mci");