2 * linux/drivers/mmc/host/pxa.c - PXA MMCI driver
4 * Copyright (C) 2003 Russell King, All Rights Reserved.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * This hardware is really sick:
11 * - No way to clear interrupts.
12 * - Have to turn off the clock whenever we touch the device.
13 * - Doesn't tell you how many data blocks were transferred.
16 * 1 and 3 byte data transfers not supported
17 * max block length up to 1023
19 #include <linux/module.h>
20 #include <linux/init.h>
21 #include <linux/ioport.h>
22 #include <linux/platform_device.h>
23 #include <linux/delay.h>
24 #include <linux/interrupt.h>
25 #include <linux/dmaengine.h>
26 #include <linux/dma-mapping.h>
27 #include <linux/clk.h>
28 #include <linux/err.h>
29 #include <linux/mmc/host.h>
30 #include <linux/mmc/slot-gpio.h>
32 #include <linux/regulator/consumer.h>
33 #include <linux/gpio/consumer.h>
34 #include <linux/gfp.h>
36 #include <linux/of_device.h>
38 #include <asm/sizes.h>
40 #include <mach/hardware.h>
41 #include <linux/platform_data/mmc-pxamci.h>
45 #define DRIVER_NAME "pxa2xx-mci"
48 #define CLKRT_OFF (~0)
50 #define mmc_has_26MHz() (cpu_is_pxa300() || cpu_is_pxa310() \
59 unsigned long clkrate;
63 unsigned int power_mode;
64 unsigned long detect_delay_ms;
66 struct gpio_desc *power;
67 struct pxamci_platform_data *pdata;
69 struct mmc_request *mrq;
70 struct mmc_command *cmd;
71 struct mmc_data *data;
73 struct dma_chan *dma_chan_rx;
74 struct dma_chan *dma_chan_tx;
75 dma_cookie_t dma_cookie;
80 static int pxamci_init_ocr(struct pxamci_host *host)
82 struct mmc_host *mmc = host->mmc;
85 ret = mmc_regulator_get_supply(mmc);
89 if (IS_ERR(mmc->supply.vmmc)) {
90 /* fall-back to platform data */
91 mmc->ocr_avail = host->pdata ?
92 host->pdata->ocr_mask :
93 MMC_VDD_32_33 | MMC_VDD_33_34;
99 static inline int pxamci_set_power(struct pxamci_host *host,
100 unsigned char power_mode,
103 struct mmc_host *mmc = host->mmc;
104 struct regulator *supply = mmc->supply.vmmc;
107 return mmc_regulator_set_ocr(mmc, supply, vdd);
110 bool on = !!((1 << vdd) & host->pdata->ocr_mask);
111 gpiod_set_value(host->power, on);
114 if (host->pdata && host->pdata->setpower)
115 return host->pdata->setpower(mmc_dev(host->mmc), vdd);
120 static void pxamci_stop_clock(struct pxamci_host *host)
122 if (readl(host->base + MMC_STAT) & STAT_CLK_EN) {
123 unsigned long timeout = 10000;
126 writel(STOP_CLOCK, host->base + MMC_STRPCL);
129 v = readl(host->base + MMC_STAT);
130 if (!(v & STAT_CLK_EN))
136 dev_err(mmc_dev(host->mmc), "unable to stop clock\n");
140 static void pxamci_enable_irq(struct pxamci_host *host, unsigned int mask)
144 spin_lock_irqsave(&host->lock, flags);
145 host->imask &= ~mask;
146 writel(host->imask, host->base + MMC_I_MASK);
147 spin_unlock_irqrestore(&host->lock, flags);
150 static void pxamci_disable_irq(struct pxamci_host *host, unsigned int mask)
154 spin_lock_irqsave(&host->lock, flags);
156 writel(host->imask, host->base + MMC_I_MASK);
157 spin_unlock_irqrestore(&host->lock, flags);
160 static void pxamci_dma_irq(void *param);
162 static void pxamci_setup_data(struct pxamci_host *host, struct mmc_data *data)
164 struct dma_async_tx_descriptor *tx;
165 enum dma_data_direction direction;
166 struct dma_slave_config config;
167 struct dma_chan *chan;
168 unsigned int nob = data->blocks;
169 unsigned long long clks;
170 unsigned int timeout;
175 writel(nob, host->base + MMC_NOB);
176 writel(data->blksz, host->base + MMC_BLKLEN);
178 clks = (unsigned long long)data->timeout_ns * host->clkrate;
179 do_div(clks, 1000000000UL);
180 timeout = (unsigned int)clks + (data->timeout_clks << host->clkrt);
181 writel((timeout + 255) / 256, host->base + MMC_RDTO);
183 memset(&config, 0, sizeof(config));
184 config.src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
185 config.dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
186 config.src_addr = host->res->start + MMC_RXFIFO;
187 config.dst_addr = host->res->start + MMC_TXFIFO;
188 config.src_maxburst = 32;
189 config.dst_maxburst = 32;
191 if (data->flags & MMC_DATA_READ) {
192 host->dma_dir = DMA_FROM_DEVICE;
193 direction = DMA_DEV_TO_MEM;
194 chan = host->dma_chan_rx;
196 host->dma_dir = DMA_TO_DEVICE;
197 direction = DMA_MEM_TO_DEV;
198 chan = host->dma_chan_tx;
201 config.direction = direction;
203 ret = dmaengine_slave_config(chan, &config);
205 dev_err(mmc_dev(host->mmc), "dma slave config failed\n");
209 host->dma_len = dma_map_sg(chan->device->dev, data->sg, data->sg_len,
212 tx = dmaengine_prep_slave_sg(chan, data->sg, host->dma_len, direction,
215 dev_err(mmc_dev(host->mmc), "prep_slave_sg() failed\n");
219 if (!(data->flags & MMC_DATA_READ)) {
220 tx->callback = pxamci_dma_irq;
221 tx->callback_param = host;
224 host->dma_cookie = dmaengine_submit(tx);
227 * workaround for erratum #91:
228 * only start DMA now if we are doing a read,
229 * otherwise we wait until CMD/RESP has finished
230 * before starting DMA.
232 if (!cpu_is_pxa27x() || data->flags & MMC_DATA_READ)
233 dma_async_issue_pending(chan);
236 static void pxamci_start_cmd(struct pxamci_host *host, struct mmc_command *cmd, unsigned int cmdat)
238 WARN_ON(host->cmd != NULL);
241 if (cmd->flags & MMC_RSP_BUSY)
244 #define RSP_TYPE(x) ((x) & ~(MMC_RSP_BUSY|MMC_RSP_OPCODE))
245 switch (RSP_TYPE(mmc_resp_type(cmd))) {
246 case RSP_TYPE(MMC_RSP_R1): /* r1, r1b, r6, r7 */
247 cmdat |= CMDAT_RESP_SHORT;
249 case RSP_TYPE(MMC_RSP_R3):
250 cmdat |= CMDAT_RESP_R3;
252 case RSP_TYPE(MMC_RSP_R2):
253 cmdat |= CMDAT_RESP_R2;
259 writel(cmd->opcode, host->base + MMC_CMD);
260 writel(cmd->arg >> 16, host->base + MMC_ARGH);
261 writel(cmd->arg & 0xffff, host->base + MMC_ARGL);
262 writel(cmdat, host->base + MMC_CMDAT);
263 writel(host->clkrt, host->base + MMC_CLKRT);
265 writel(START_CLOCK, host->base + MMC_STRPCL);
267 pxamci_enable_irq(host, END_CMD_RES);
270 static void pxamci_finish_request(struct pxamci_host *host, struct mmc_request *mrq)
275 mmc_request_done(host->mmc, mrq);
278 static int pxamci_cmd_done(struct pxamci_host *host, unsigned int stat)
280 struct mmc_command *cmd = host->cmd;
290 * Did I mention this is Sick. We always need to
291 * discard the upper 8 bits of the first 16-bit word.
293 v = readl(host->base + MMC_RES) & 0xffff;
294 for (i = 0; i < 4; i++) {
295 u32 w1 = readl(host->base + MMC_RES) & 0xffff;
296 u32 w2 = readl(host->base + MMC_RES) & 0xffff;
297 cmd->resp[i] = v << 24 | w1 << 8 | w2 >> 8;
301 if (stat & STAT_TIME_OUT_RESPONSE) {
302 cmd->error = -ETIMEDOUT;
303 } else if (stat & STAT_RES_CRC_ERR && cmd->flags & MMC_RSP_CRC) {
305 * workaround for erratum #42:
306 * Intel PXA27x Family Processor Specification Update Rev 001
307 * A bogus CRC error can appear if the msb of a 136 bit
310 if (cpu_is_pxa27x() &&
311 (cmd->flags & MMC_RSP_136 && cmd->resp[0] & 0x80000000))
312 pr_debug("ignoring CRC from command %d - *risky*\n", cmd->opcode);
314 cmd->error = -EILSEQ;
317 pxamci_disable_irq(host, END_CMD_RES);
318 if (host->data && !cmd->error) {
319 pxamci_enable_irq(host, DATA_TRAN_DONE);
321 * workaround for erratum #91, if doing write
324 if (cpu_is_pxa27x() && host->data->flags & MMC_DATA_WRITE)
325 dma_async_issue_pending(host->dma_chan_tx);
327 pxamci_finish_request(host, host->mrq);
333 static int pxamci_data_done(struct pxamci_host *host, unsigned int stat)
335 struct mmc_data *data = host->data;
336 struct dma_chan *chan;
341 if (data->flags & MMC_DATA_READ)
342 chan = host->dma_chan_rx;
344 chan = host->dma_chan_tx;
345 dma_unmap_sg(chan->device->dev,
346 data->sg, data->sg_len, host->dma_dir);
348 if (stat & STAT_READ_TIME_OUT)
349 data->error = -ETIMEDOUT;
350 else if (stat & (STAT_CRC_READ_ERROR|STAT_CRC_WRITE_ERROR))
351 data->error = -EILSEQ;
354 * There appears to be a hardware design bug here. There seems to
355 * be no way to find out how much data was transferred to the card.
356 * This means that if there was an error on any block, we mark all
357 * data blocks as being in error.
360 data->bytes_xfered = data->blocks * data->blksz;
362 data->bytes_xfered = 0;
364 pxamci_disable_irq(host, DATA_TRAN_DONE);
367 if (host->mrq->stop) {
368 pxamci_stop_clock(host);
369 pxamci_start_cmd(host, host->mrq->stop, host->cmdat);
371 pxamci_finish_request(host, host->mrq);
377 static irqreturn_t pxamci_irq(int irq, void *devid)
379 struct pxamci_host *host = devid;
383 ireg = readl(host->base + MMC_I_REG) & ~readl(host->base + MMC_I_MASK);
386 unsigned stat = readl(host->base + MMC_STAT);
388 pr_debug("PXAMCI: irq %08x stat %08x\n", ireg, stat);
390 if (ireg & END_CMD_RES)
391 handled |= pxamci_cmd_done(host, stat);
392 if (ireg & DATA_TRAN_DONE)
393 handled |= pxamci_data_done(host, stat);
394 if (ireg & SDIO_INT) {
395 mmc_signal_sdio_irq(host->mmc);
400 return IRQ_RETVAL(handled);
403 static void pxamci_request(struct mmc_host *mmc, struct mmc_request *mrq)
405 struct pxamci_host *host = mmc_priv(mmc);
408 WARN_ON(host->mrq != NULL);
412 pxamci_stop_clock(host);
415 host->cmdat &= ~CMDAT_INIT;
418 pxamci_setup_data(host, mrq->data);
420 cmdat &= ~CMDAT_BUSY;
421 cmdat |= CMDAT_DATAEN | CMDAT_DMAEN;
422 if (mrq->data->flags & MMC_DATA_WRITE)
423 cmdat |= CMDAT_WRITE;
426 pxamci_start_cmd(host, mrq->cmd, cmdat);
429 static int pxamci_get_ro(struct mmc_host *mmc)
431 struct pxamci_host *host = mmc_priv(mmc);
433 if (host->use_ro_gpio)
434 return mmc_gpio_get_ro(mmc);
435 if (host->pdata && host->pdata->get_ro)
436 return !!host->pdata->get_ro(mmc_dev(mmc));
438 * Board doesn't support read only detection; let the mmc core
444 static void pxamci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
446 struct pxamci_host *host = mmc_priv(mmc);
449 unsigned long rate = host->clkrate;
450 unsigned int clk = rate / ios->clock;
452 if (host->clkrt == CLKRT_OFF)
453 clk_prepare_enable(host->clk);
455 if (ios->clock == 26000000) {
456 /* to support 26MHz */
459 /* to handle (19.5MHz, 26MHz) */
464 * clk might result in a lower divisor than we
465 * desire. check for that condition and adjust
468 if (rate / clk > ios->clock)
470 host->clkrt = fls(clk) - 1;
474 * we write clkrt on the next command
477 pxamci_stop_clock(host);
478 if (host->clkrt != CLKRT_OFF) {
479 host->clkrt = CLKRT_OFF;
480 clk_disable_unprepare(host->clk);
484 if (host->power_mode != ios->power_mode) {
487 host->power_mode = ios->power_mode;
489 ret = pxamci_set_power(host, ios->power_mode, ios->vdd);
491 dev_err(mmc_dev(mmc), "unable to set power\n");
493 * The .set_ios() function in the mmc_host_ops
494 * struct return void, and failing to set the
495 * power should be rare so we print an error and
501 if (ios->power_mode == MMC_POWER_ON)
502 host->cmdat |= CMDAT_INIT;
505 if (ios->bus_width == MMC_BUS_WIDTH_4)
506 host->cmdat |= CMDAT_SD_4DAT;
508 host->cmdat &= ~CMDAT_SD_4DAT;
510 dev_dbg(mmc_dev(mmc), "PXAMCI: clkrt = %x cmdat = %x\n",
511 host->clkrt, host->cmdat);
514 static void pxamci_enable_sdio_irq(struct mmc_host *host, int enable)
516 struct pxamci_host *pxa_host = mmc_priv(host);
519 pxamci_enable_irq(pxa_host, SDIO_INT);
521 pxamci_disable_irq(pxa_host, SDIO_INT);
524 static const struct mmc_host_ops pxamci_ops = {
525 .request = pxamci_request,
526 .get_cd = mmc_gpio_get_cd,
527 .get_ro = pxamci_get_ro,
528 .set_ios = pxamci_set_ios,
529 .enable_sdio_irq = pxamci_enable_sdio_irq,
532 static void pxamci_dma_irq(void *param)
534 struct pxamci_host *host = param;
535 struct dma_tx_state state;
536 enum dma_status status;
537 struct dma_chan *chan;
540 spin_lock_irqsave(&host->lock, flags);
545 if (host->data->flags & MMC_DATA_READ)
546 chan = host->dma_chan_rx;
548 chan = host->dma_chan_tx;
550 status = dmaengine_tx_status(chan, host->dma_cookie, &state);
552 if (likely(status == DMA_COMPLETE)) {
553 writel(BUF_PART_FULL, host->base + MMC_PRTBUF);
555 pr_err("%s: DMA error on %s channel\n", mmc_hostname(host->mmc),
556 host->data->flags & MMC_DATA_READ ? "rx" : "tx");
557 host->data->error = -EIO;
558 pxamci_data_done(host, 0);
562 spin_unlock_irqrestore(&host->lock, flags);
565 static irqreturn_t pxamci_detect_irq(int irq, void *devid)
567 struct pxamci_host *host = mmc_priv(devid);
569 mmc_detect_change(devid, msecs_to_jiffies(host->detect_delay_ms));
574 static const struct of_device_id pxa_mmc_dt_ids[] = {
575 { .compatible = "marvell,pxa-mmc" },
579 MODULE_DEVICE_TABLE(of, pxa_mmc_dt_ids);
581 static int pxamci_of_init(struct platform_device *pdev,
582 struct mmc_host *mmc)
584 struct device_node *np = pdev->dev.of_node;
585 struct pxamci_host *host = mmc_priv(mmc);
592 /* pxa-mmc specific */
593 if (of_property_read_u32(np, "pxa-mmc,detect-delay-ms", &tmp) == 0)
594 host->detect_delay_ms = tmp;
596 ret = mmc_of_parse(mmc);
603 static int pxamci_of_init(struct platform_device *pdev,
604 struct mmc_host *mmc)
610 static int pxamci_probe(struct platform_device *pdev)
612 struct mmc_host *mmc;
613 struct pxamci_host *host = NULL;
614 struct device *dev = &pdev->dev;
618 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
619 irq = platform_get_irq(pdev, 0);
623 mmc = mmc_alloc_host(sizeof(struct pxamci_host), dev);
629 mmc->ops = &pxamci_ops;
632 * We can do SG-DMA, but we don't because we never know how much
633 * data we successfully wrote to the card.
635 mmc->max_segs = NR_SG;
638 * Our hardware DMA can handle a maximum of one page per SG entry.
640 mmc->max_seg_size = PAGE_SIZE;
643 * Block length register is only 10 bits before PXA27x.
645 mmc->max_blk_size = cpu_is_pxa25x() ? 1023 : 2048;
648 * Block count register is 16 bits.
650 mmc->max_blk_count = 65535;
652 ret = pxamci_of_init(pdev, mmc);
656 host = mmc_priv(mmc);
658 host->pdata = pdev->dev.platform_data;
659 host->clkrt = CLKRT_OFF;
661 host->clk = devm_clk_get(dev, NULL);
662 if (IS_ERR(host->clk)) {
663 ret = PTR_ERR(host->clk);
668 host->clkrate = clk_get_rate(host->clk);
671 * Calculate minimum clock rate, rounding up.
673 mmc->f_min = (host->clkrate + 63) / 64;
674 mmc->f_max = (mmc_has_26MHz()) ? 26000000 : host->clkrate;
676 ret = pxamci_init_ocr(host);
682 if (!cpu_is_pxa25x()) {
683 mmc->caps |= MMC_CAP_4_BIT_DATA | MMC_CAP_SDIO_IRQ;
684 host->cmdat |= CMDAT_SDIO_INT_EN;
686 mmc->caps |= MMC_CAP_MMC_HIGHSPEED |
687 MMC_CAP_SD_HIGHSPEED;
690 spin_lock_init(&host->lock);
692 host->imask = MMC_I_MASK_ALL;
694 host->base = devm_ioremap_resource(dev, r);
695 if (IS_ERR(host->base)) {
696 ret = PTR_ERR(host->base);
701 * Ensure that the host controller is shut down, and setup
704 pxamci_stop_clock(host);
705 writel(0, host->base + MMC_SPI);
706 writel(64, host->base + MMC_RESTO);
707 writel(host->imask, host->base + MMC_I_MASK);
709 ret = devm_request_irq(dev, irq, pxamci_irq, 0,
714 platform_set_drvdata(pdev, mmc);
716 host->dma_chan_rx = dma_request_slave_channel(dev, "rx");
717 if (host->dma_chan_rx == NULL) {
718 dev_err(dev, "unable to request rx dma channel\n");
723 host->dma_chan_tx = dma_request_slave_channel(dev, "tx");
724 if (host->dma_chan_tx == NULL) {
725 dev_err(dev, "unable to request tx dma channel\n");
731 host->detect_delay_ms = host->pdata->detect_delay_ms;
733 host->power = devm_gpiod_get_optional(dev, "power", GPIOD_OUT_LOW);
734 if (IS_ERR(host->power)) {
735 dev_err(dev, "Failed requesting gpio_power\n");
739 /* FIXME: should we pass detection delay to debounce? */
740 ret = mmc_gpiod_request_cd(mmc, "cd", 0, false, 0, NULL);
741 if (ret && ret != -ENOENT) {
742 dev_err(dev, "Failed requesting gpio_cd\n");
746 ret = mmc_gpiod_request_ro(mmc, "wp", 0, false, 0, NULL);
747 if (ret && ret != -ENOENT) {
748 dev_err(dev, "Failed requesting gpio_ro\n");
752 host->use_ro_gpio = true;
753 mmc->caps2 |= host->pdata->gpio_card_ro_invert ?
754 0 : MMC_CAP2_RO_ACTIVE_HIGH;
757 if (host->pdata->init)
758 host->pdata->init(dev, pxamci_detect_irq, mmc);
760 if (host->power && host->pdata->setpower)
761 dev_warn(dev, "gpio_power and setpower() both defined\n");
762 if (host->use_ro_gpio && host->pdata->get_ro)
763 dev_warn(dev, "gpio_ro and get_ro() both defined\n");
772 if (host->dma_chan_rx)
773 dma_release_channel(host->dma_chan_rx);
774 if (host->dma_chan_tx)
775 dma_release_channel(host->dma_chan_tx);
782 static int pxamci_remove(struct platform_device *pdev)
784 struct mmc_host *mmc = platform_get_drvdata(pdev);
787 struct pxamci_host *host = mmc_priv(mmc);
789 mmc_remove_host(mmc);
791 if (host->pdata && host->pdata->exit)
792 host->pdata->exit(&pdev->dev, mmc);
794 pxamci_stop_clock(host);
795 writel(TXFIFO_WR_REQ|RXFIFO_RD_REQ|CLK_IS_OFF|STOP_CMD|
796 END_CMD_RES|PRG_DONE|DATA_TRAN_DONE,
797 host->base + MMC_I_MASK);
799 dmaengine_terminate_all(host->dma_chan_rx);
800 dmaengine_terminate_all(host->dma_chan_tx);
801 dma_release_channel(host->dma_chan_rx);
802 dma_release_channel(host->dma_chan_tx);
810 static struct platform_driver pxamci_driver = {
811 .probe = pxamci_probe,
812 .remove = pxamci_remove,
815 .of_match_table = of_match_ptr(pxa_mmc_dt_ids),
819 module_platform_driver(pxamci_driver);
821 MODULE_DESCRIPTION("PXA Multimedia Card Interface Driver");
822 MODULE_LICENSE("GPL");
823 MODULE_ALIAS("platform:pxa2xx-mci");