drivers/misc/xilinx_tmr_inject.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Driver for Xilinx TMR Inject IP.
   4  *
   5  * Copyright (C) 2022 Advanced Micro Devices, Inc.
   6  *
   7  * Description:
   8  * This driver is developed for TMR Inject IP,The Triple Modular Redundancy(TMR)
   9  * Inject provides fault injection.
  10  */
  11
  12 #include <asm/xilinx_mb_manager.h>
  13 #include <linux/module.h>
  14 #include <linux/of_device.h>
  15 #include <linux/fault-inject.h>
  16
  17 /* TMR Inject Register offsets */
  18 #define XTMR_INJECT_CR_OFFSET           0x0
  19 #define XTMR_INJECT_AIR_OFFSET          0x4
  20 #define XTMR_INJECT_IIR_OFFSET          0xC
  21 #define XTMR_INJECT_EAIR_OFFSET         0x10
  22 #define XTMR_INJECT_ERR_OFFSET          0x204
  23
  24 /* Register Bitmasks/shifts */
  25 #define XTMR_INJECT_CR_CPUID_SHIFT      8
  26 #define XTMR_INJECT_CR_IE_SHIFT         10
  27 #define XTMR_INJECT_IIR_ADDR_MASK       GENMASK(31, 16)
  28
  29 #define XTMR_INJECT_MAGIC_MAX_VAL       255
  30
  31 /**
  32  * struct xtmr_inject_dev - Driver data for TMR Inject
  33  * @regs: device physical base address
  34  * @magic: Magic hardware configuration value
  35  */
  36 struct xtmr_inject_dev {
  37         void __iomem *regs;
  38         u32 magic;
  39 };
  40
  41 static DECLARE_FAULT_ATTR(inject_fault);
  42 static char *inject_request;
  43 module_param(inject_request, charp, 0);
  44 MODULE_PARM_DESC(inject_request, "default fault injection attributes");
  45 static struct dentry *dbgfs_root;
  46
  47 /* IO accessors */
  48 static inline void xtmr_inject_write(struct xtmr_inject_dev *xtmr_inject,
  49                                      u32 addr, u32 value)
  50 {
  51         iowrite32(value, xtmr_inject->regs + addr);
  52 }
  53
  54 static inline u32 xtmr_inject_read(struct xtmr_inject_dev *xtmr_inject,
  55                                    u32 addr)
  56 {
  57         return ioread32(xtmr_inject->regs + addr);
  58 }
  59
  60 static int xtmr_inject_set(void *data, u64 val)
  61 {
  62         if (val != 1)
  63                 return -EINVAL;
  64
  65         xmb_inject_err();
  66         return 0;
  67 }
  68 DEFINE_DEBUGFS_ATTRIBUTE(xtmr_inject_fops, NULL, xtmr_inject_set, "%llu\n");
  69
  70 static void xtmr_init_debugfs(struct xtmr_inject_dev *xtmr_inject)
  71 {
  72         struct dentry *dir;
  73
  74         dbgfs_root = debugfs_create_dir("xtmr_inject", NULL);
  75         dir = fault_create_debugfs_attr("inject_fault", dbgfs_root,
  76                                         &inject_fault);
  77         debugfs_create_file("inject_fault", 0200, dir, NULL,
  78                             &xtmr_inject_fops);
  79 }
  80
  81 static void xtmr_inject_init(struct xtmr_inject_dev *xtmr_inject)
  82 {
  83         u32 cr_val;
  84
  85         if (inject_request)
  86                 setup_fault_attr(&inject_fault, inject_request);
  87         /* Allow fault injection */
  88         cr_val = xtmr_inject->magic |
  89                  (1 << XTMR_INJECT_CR_IE_SHIFT) |
  90                  (1 << XTMR_INJECT_CR_CPUID_SHIFT);
  91         xtmr_inject_write(xtmr_inject, XTMR_INJECT_CR_OFFSET,
  92                           cr_val);
  93         /* Initialize the address inject and instruction inject registers */
  94         xtmr_inject_write(xtmr_inject, XTMR_INJECT_AIR_OFFSET,
  95                           XMB_INJECT_ERR_OFFSET);
  96         xtmr_inject_write(xtmr_inject, XTMR_INJECT_IIR_OFFSET,
  97                           XMB_INJECT_ERR_OFFSET & XTMR_INJECT_IIR_ADDR_MASK);
  98 }
  99
 100 /**
 101  * xtmr_inject_probe - Driver probe function
 102  * @pdev: Pointer to the platform_device structure
 103  *
 104  * This is the driver probe routine. It does all the memory
 105  * allocation for the device.
 106  *
 107  * Return: 0 on success and failure value on error
 108  */
 109 static int xtmr_inject_probe(struct platform_device *pdev)
 110 {
 111         struct xtmr_inject_dev *xtmr_inject;
 112         int err;
 113
 114         xtmr_inject = devm_kzalloc(&pdev->dev, sizeof(*xtmr_inject),
 115                                    GFP_KERNEL);
 116         if (!xtmr_inject)
 117                 return -ENOMEM;
 118
 119         xtmr_inject->regs = devm_platform_ioremap_resource(pdev, 0);
 120         if (IS_ERR(xtmr_inject->regs))
 121                 return PTR_ERR(xtmr_inject->regs);
 122
 123         err = of_property_read_u32(pdev->dev.of_node, "xlnx,magic",
 124                                    &xtmr_inject->magic);
 125         if (err < 0) {
 126                 dev_err(&pdev->dev, "unable to read xlnx,magic property");
 127                 return err;
 128         }
 129
 130         if (xtmr_inject->magic > XTMR_INJECT_MAGIC_MAX_VAL) {
 131                 dev_err(&pdev->dev, "invalid xlnx,magic property value");
 132                 return -EINVAL;
 133         }
 134
 135         /* Initialize TMR Inject */
 136         xtmr_inject_init(xtmr_inject);
 137
 138         xtmr_init_debugfs(xtmr_inject);
 139
 140         platform_set_drvdata(pdev, xtmr_inject);
 141
 142         return 0;
 143 }
 144
 145 static int xtmr_inject_remove(struct platform_device *pdev)
 146 {
 147         debugfs_remove_recursive(dbgfs_root);
 148         dbgfs_root = NULL;
 149         return 0;
 150 }
 151
 152 static const struct of_device_id xtmr_inject_of_match[] = {
 153         {
 154                 .compatible = "xlnx,tmr-inject-1.0",
 155         },
 156         { /* end of table */ }
 157 };
 158 MODULE_DEVICE_TABLE(of, xtmr_inject_of_match);
 159
 160 static struct platform_driver xtmr_inject_driver = {
 161         .driver = {
 162                 .name = "xilinx-tmr_inject",
 163                 .of_match_table = xtmr_inject_of_match,
 164         },
 165         .probe = xtmr_inject_probe,
 166         .remove = xtmr_inject_remove,
 167 };
 168 module_platform_driver(xtmr_inject_driver);
 169 MODULE_AUTHOR("Advanced Micro Devices, Inc");
 170 MODULE_DESCRIPTION("Xilinx TMR Inject Driver");
 171 MODULE_LICENSE("GPL");