1 // SPDX-License-Identifier: GPL-2.0-only
3 * Host side test driver to test endpoint functionality
5 * Copyright (C) 2017 Texas Instruments
6 * Author: Kishon Vijay Abraham I <kishon@ti.com>
9 #include <linux/crc32.h>
10 #include <linux/delay.h>
13 #include <linux/interrupt.h>
14 #include <linux/irq.h>
15 #include <linux/miscdevice.h>
16 #include <linux/module.h>
17 #include <linux/mutex.h>
18 #include <linux/random.h>
19 #include <linux/slab.h>
20 #include <linux/uaccess.h>
21 #include <linux/pci.h>
22 #include <linux/pci_ids.h>
24 #include <linux/pci_regs.h>
26 #include <uapi/linux/pcitest.h>
28 #define DRV_MODULE_NAME "pci-endpoint-test"
30 #define IRQ_TYPE_UNDEFINED -1
31 #define IRQ_TYPE_LEGACY 0
32 #define IRQ_TYPE_MSI 1
33 #define IRQ_TYPE_MSIX 2
35 #define PCI_ENDPOINT_TEST_MAGIC 0x0
37 #define PCI_ENDPOINT_TEST_COMMAND 0x4
38 #define COMMAND_RAISE_LEGACY_IRQ BIT(0)
39 #define COMMAND_RAISE_MSI_IRQ BIT(1)
40 #define COMMAND_RAISE_MSIX_IRQ BIT(2)
41 #define COMMAND_READ BIT(3)
42 #define COMMAND_WRITE BIT(4)
43 #define COMMAND_COPY BIT(5)
45 #define PCI_ENDPOINT_TEST_STATUS 0x8
46 #define STATUS_READ_SUCCESS BIT(0)
47 #define STATUS_READ_FAIL BIT(1)
48 #define STATUS_WRITE_SUCCESS BIT(2)
49 #define STATUS_WRITE_FAIL BIT(3)
50 #define STATUS_COPY_SUCCESS BIT(4)
51 #define STATUS_COPY_FAIL BIT(5)
52 #define STATUS_IRQ_RAISED BIT(6)
53 #define STATUS_SRC_ADDR_INVALID BIT(7)
54 #define STATUS_DST_ADDR_INVALID BIT(8)
56 #define PCI_ENDPOINT_TEST_LOWER_SRC_ADDR 0x0c
57 #define PCI_ENDPOINT_TEST_UPPER_SRC_ADDR 0x10
59 #define PCI_ENDPOINT_TEST_LOWER_DST_ADDR 0x14
60 #define PCI_ENDPOINT_TEST_UPPER_DST_ADDR 0x18
62 #define PCI_ENDPOINT_TEST_SIZE 0x1c
63 #define PCI_ENDPOINT_TEST_CHECKSUM 0x20
65 #define PCI_ENDPOINT_TEST_IRQ_TYPE 0x24
66 #define PCI_ENDPOINT_TEST_IRQ_NUMBER 0x28
68 #define PCI_ENDPOINT_TEST_FLAGS 0x2c
69 #define FLAG_USE_DMA BIT(0)
71 #define PCI_DEVICE_ID_TI_AM654 0xb00c
73 #define is_am654_pci_dev(pdev) \
74 ((pdev)->device == PCI_DEVICE_ID_TI_AM654)
76 #define PCI_DEVICE_ID_RENESAS_R8A774C0 0x002d
78 static DEFINE_IDA(pci_endpoint_test_ida);
80 #define to_endpoint_test(priv) container_of((priv), struct pci_endpoint_test, \
84 module_param(no_msi, bool, 0444);
85 MODULE_PARM_DESC(no_msi, "Disable MSI interrupt in pci_endpoint_test");
87 static int irq_type = IRQ_TYPE_MSI;
88 module_param(irq_type, int, 0444);
89 MODULE_PARM_DESC(irq_type, "IRQ mode selection in pci_endpoint_test (0 - Legacy, 1 - MSI, 2 - MSI-X)");
100 struct pci_endpoint_test {
101 struct pci_dev *pdev;
103 void __iomem *bar[PCI_STD_NUM_BARS];
104 struct completion irq_raised;
108 /* mutex to protect the ioctls */
110 struct miscdevice miscdev;
111 enum pci_barno test_reg_bar;
116 struct pci_endpoint_test_data {
117 enum pci_barno test_reg_bar;
122 static inline u32 pci_endpoint_test_readl(struct pci_endpoint_test *test,
125 return readl(test->base + offset);
128 static inline void pci_endpoint_test_writel(struct pci_endpoint_test *test,
129 u32 offset, u32 value)
131 writel(value, test->base + offset);
134 static inline u32 pci_endpoint_test_bar_readl(struct pci_endpoint_test *test,
137 return readl(test->bar[bar] + offset);
140 static inline void pci_endpoint_test_bar_writel(struct pci_endpoint_test *test,
141 int bar, u32 offset, u32 value)
143 writel(value, test->bar[bar] + offset);
146 static irqreturn_t pci_endpoint_test_irqhandler(int irq, void *dev_id)
148 struct pci_endpoint_test *test = dev_id;
151 reg = pci_endpoint_test_readl(test, PCI_ENDPOINT_TEST_STATUS);
152 if (reg & STATUS_IRQ_RAISED) {
153 test->last_irq = irq;
154 complete(&test->irq_raised);
155 reg &= ~STATUS_IRQ_RAISED;
157 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_STATUS,
163 static void pci_endpoint_test_free_irq_vectors(struct pci_endpoint_test *test)
165 struct pci_dev *pdev = test->pdev;
167 pci_free_irq_vectors(pdev);
168 test->irq_type = IRQ_TYPE_UNDEFINED;
171 static bool pci_endpoint_test_alloc_irq_vectors(struct pci_endpoint_test *test,
175 struct pci_dev *pdev = test->pdev;
176 struct device *dev = &pdev->dev;
180 case IRQ_TYPE_LEGACY:
181 irq = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_LEGACY);
183 dev_err(dev, "Failed to get Legacy interrupt\n");
186 irq = pci_alloc_irq_vectors(pdev, 1, 32, PCI_IRQ_MSI);
188 dev_err(dev, "Failed to get MSI interrupts\n");
191 irq = pci_alloc_irq_vectors(pdev, 1, 2048, PCI_IRQ_MSIX);
193 dev_err(dev, "Failed to get MSI-X interrupts\n");
196 dev_err(dev, "Invalid IRQ type selected\n");
204 test->irq_type = type;
205 test->num_irqs = irq;
210 static void pci_endpoint_test_release_irq(struct pci_endpoint_test *test)
213 struct pci_dev *pdev = test->pdev;
214 struct device *dev = &pdev->dev;
216 for (i = 0; i < test->num_irqs; i++)
217 devm_free_irq(dev, pci_irq_vector(pdev, i), test);
222 static bool pci_endpoint_test_request_irq(struct pci_endpoint_test *test)
226 struct pci_dev *pdev = test->pdev;
227 struct device *dev = &pdev->dev;
229 for (i = 0; i < test->num_irqs; i++) {
230 err = devm_request_irq(dev, pci_irq_vector(pdev, i),
231 pci_endpoint_test_irqhandler,
232 IRQF_SHARED, test->name, test);
241 case IRQ_TYPE_LEGACY:
242 dev_err(dev, "Failed to request IRQ %d for Legacy\n",
243 pci_irq_vector(pdev, i));
246 dev_err(dev, "Failed to request IRQ %d for MSI %d\n",
247 pci_irq_vector(pdev, i),
251 dev_err(dev, "Failed to request IRQ %d for MSI-X %d\n",
252 pci_irq_vector(pdev, i),
260 static bool pci_endpoint_test_bar(struct pci_endpoint_test *test,
261 enum pci_barno barno)
266 struct pci_dev *pdev = test->pdev;
268 if (!test->bar[barno])
271 size = pci_resource_len(pdev, barno);
273 if (barno == test->test_reg_bar)
276 for (j = 0; j < size; j += 4)
277 pci_endpoint_test_bar_writel(test, barno, j, 0xA0A0A0A0);
279 for (j = 0; j < size; j += 4) {
280 val = pci_endpoint_test_bar_readl(test, barno, j);
281 if (val != 0xA0A0A0A0)
288 static bool pci_endpoint_test_legacy_irq(struct pci_endpoint_test *test)
292 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_TYPE,
294 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_NUMBER, 0);
295 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_COMMAND,
296 COMMAND_RAISE_LEGACY_IRQ);
297 val = wait_for_completion_timeout(&test->irq_raised,
298 msecs_to_jiffies(1000));
305 static bool pci_endpoint_test_msi_irq(struct pci_endpoint_test *test,
306 u16 msi_num, bool msix)
309 struct pci_dev *pdev = test->pdev;
311 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_TYPE,
312 msix == false ? IRQ_TYPE_MSI :
314 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_NUMBER, msi_num);
315 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_COMMAND,
316 msix == false ? COMMAND_RAISE_MSI_IRQ :
317 COMMAND_RAISE_MSIX_IRQ);
318 val = wait_for_completion_timeout(&test->irq_raised,
319 msecs_to_jiffies(1000));
323 if (pci_irq_vector(pdev, msi_num - 1) == test->last_irq)
329 static bool pci_endpoint_test_copy(struct pci_endpoint_test *test,
332 struct pci_endpoint_test_xfer_param param;
339 dma_addr_t src_phys_addr;
340 dma_addr_t dst_phys_addr;
341 struct pci_dev *pdev = test->pdev;
342 struct device *dev = &pdev->dev;
344 dma_addr_t orig_src_phys_addr;
346 dma_addr_t orig_dst_phys_addr;
348 size_t alignment = test->alignment;
349 int irq_type = test->irq_type;
354 err = copy_from_user(¶m, (void __user *)arg, sizeof(param));
356 dev_err(dev, "Failed to get transfer param\n");
361 if (size > SIZE_MAX - alignment)
364 use_dma = !!(param.flags & PCITEST_FLAGS_USE_DMA);
366 flags |= FLAG_USE_DMA;
368 if (irq_type < IRQ_TYPE_LEGACY || irq_type > IRQ_TYPE_MSIX) {
369 dev_err(dev, "Invalid IRQ type option\n");
373 orig_src_addr = kzalloc(size + alignment, GFP_KERNEL);
374 if (!orig_src_addr) {
375 dev_err(dev, "Failed to allocate source buffer\n");
380 get_random_bytes(orig_src_addr, size + alignment);
381 orig_src_phys_addr = dma_map_single(dev, orig_src_addr,
382 size + alignment, DMA_TO_DEVICE);
383 if (dma_mapping_error(dev, orig_src_phys_addr)) {
384 dev_err(dev, "failed to map source buffer address\n");
386 goto err_src_phys_addr;
389 if (alignment && !IS_ALIGNED(orig_src_phys_addr, alignment)) {
390 src_phys_addr = PTR_ALIGN(orig_src_phys_addr, alignment);
391 offset = src_phys_addr - orig_src_phys_addr;
392 src_addr = orig_src_addr + offset;
394 src_phys_addr = orig_src_phys_addr;
395 src_addr = orig_src_addr;
398 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_LOWER_SRC_ADDR,
399 lower_32_bits(src_phys_addr));
401 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_UPPER_SRC_ADDR,
402 upper_32_bits(src_phys_addr));
404 src_crc32 = crc32_le(~0, src_addr, size);
406 orig_dst_addr = kzalloc(size + alignment, GFP_KERNEL);
407 if (!orig_dst_addr) {
408 dev_err(dev, "Failed to allocate destination address\n");
413 orig_dst_phys_addr = dma_map_single(dev, orig_dst_addr,
414 size + alignment, DMA_FROM_DEVICE);
415 if (dma_mapping_error(dev, orig_dst_phys_addr)) {
416 dev_err(dev, "failed to map destination buffer address\n");
418 goto err_dst_phys_addr;
421 if (alignment && !IS_ALIGNED(orig_dst_phys_addr, alignment)) {
422 dst_phys_addr = PTR_ALIGN(orig_dst_phys_addr, alignment);
423 offset = dst_phys_addr - orig_dst_phys_addr;
424 dst_addr = orig_dst_addr + offset;
426 dst_phys_addr = orig_dst_phys_addr;
427 dst_addr = orig_dst_addr;
430 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_LOWER_DST_ADDR,
431 lower_32_bits(dst_phys_addr));
432 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_UPPER_DST_ADDR,
433 upper_32_bits(dst_phys_addr));
435 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_SIZE,
438 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_FLAGS, flags);
439 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_TYPE, irq_type);
440 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_NUMBER, 1);
441 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_COMMAND,
444 wait_for_completion(&test->irq_raised);
446 dma_unmap_single(dev, orig_dst_phys_addr, size + alignment,
449 dst_crc32 = crc32_le(~0, dst_addr, size);
450 if (dst_crc32 == src_crc32)
454 kfree(orig_dst_addr);
457 dma_unmap_single(dev, orig_src_phys_addr, size + alignment,
461 kfree(orig_src_addr);
467 static bool pci_endpoint_test_write(struct pci_endpoint_test *test,
470 struct pci_endpoint_test_xfer_param param;
476 dma_addr_t phys_addr;
477 struct pci_dev *pdev = test->pdev;
478 struct device *dev = &pdev->dev;
480 dma_addr_t orig_phys_addr;
482 size_t alignment = test->alignment;
483 int irq_type = test->irq_type;
488 err = copy_from_user(¶m, (void __user *)arg, sizeof(param));
490 dev_err(dev, "Failed to get transfer param\n");
495 if (size > SIZE_MAX - alignment)
498 use_dma = !!(param.flags & PCITEST_FLAGS_USE_DMA);
500 flags |= FLAG_USE_DMA;
502 if (irq_type < IRQ_TYPE_LEGACY || irq_type > IRQ_TYPE_MSIX) {
503 dev_err(dev, "Invalid IRQ type option\n");
507 orig_addr = kzalloc(size + alignment, GFP_KERNEL);
509 dev_err(dev, "Failed to allocate address\n");
514 get_random_bytes(orig_addr, size + alignment);
516 orig_phys_addr = dma_map_single(dev, orig_addr, size + alignment,
518 if (dma_mapping_error(dev, orig_phys_addr)) {
519 dev_err(dev, "failed to map source buffer address\n");
524 if (alignment && !IS_ALIGNED(orig_phys_addr, alignment)) {
525 phys_addr = PTR_ALIGN(orig_phys_addr, alignment);
526 offset = phys_addr - orig_phys_addr;
527 addr = orig_addr + offset;
529 phys_addr = orig_phys_addr;
533 crc32 = crc32_le(~0, addr, size);
534 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_CHECKSUM,
537 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_LOWER_SRC_ADDR,
538 lower_32_bits(phys_addr));
539 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_UPPER_SRC_ADDR,
540 upper_32_bits(phys_addr));
542 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_SIZE, size);
544 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_FLAGS, flags);
545 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_TYPE, irq_type);
546 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_NUMBER, 1);
547 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_COMMAND,
550 wait_for_completion(&test->irq_raised);
552 reg = pci_endpoint_test_readl(test, PCI_ENDPOINT_TEST_STATUS);
553 if (reg & STATUS_READ_SUCCESS)
556 dma_unmap_single(dev, orig_phys_addr, size + alignment,
566 static bool pci_endpoint_test_read(struct pci_endpoint_test *test,
569 struct pci_endpoint_test_xfer_param param;
575 dma_addr_t phys_addr;
576 struct pci_dev *pdev = test->pdev;
577 struct device *dev = &pdev->dev;
579 dma_addr_t orig_phys_addr;
581 size_t alignment = test->alignment;
582 int irq_type = test->irq_type;
586 err = copy_from_user(¶m, (void __user *)arg, sizeof(param));
588 dev_err(dev, "Failed to get transfer param\n");
593 if (size > SIZE_MAX - alignment)
596 use_dma = !!(param.flags & PCITEST_FLAGS_USE_DMA);
598 flags |= FLAG_USE_DMA;
600 if (irq_type < IRQ_TYPE_LEGACY || irq_type > IRQ_TYPE_MSIX) {
601 dev_err(dev, "Invalid IRQ type option\n");
605 orig_addr = kzalloc(size + alignment, GFP_KERNEL);
607 dev_err(dev, "Failed to allocate destination address\n");
612 orig_phys_addr = dma_map_single(dev, orig_addr, size + alignment,
614 if (dma_mapping_error(dev, orig_phys_addr)) {
615 dev_err(dev, "failed to map source buffer address\n");
620 if (alignment && !IS_ALIGNED(orig_phys_addr, alignment)) {
621 phys_addr = PTR_ALIGN(orig_phys_addr, alignment);
622 offset = phys_addr - orig_phys_addr;
623 addr = orig_addr + offset;
625 phys_addr = orig_phys_addr;
629 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_LOWER_DST_ADDR,
630 lower_32_bits(phys_addr));
631 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_UPPER_DST_ADDR,
632 upper_32_bits(phys_addr));
634 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_SIZE, size);
636 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_FLAGS, flags);
637 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_TYPE, irq_type);
638 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_NUMBER, 1);
639 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_COMMAND,
642 wait_for_completion(&test->irq_raised);
644 dma_unmap_single(dev, orig_phys_addr, size + alignment,
647 crc32 = crc32_le(~0, addr, size);
648 if (crc32 == pci_endpoint_test_readl(test, PCI_ENDPOINT_TEST_CHECKSUM))
657 static bool pci_endpoint_test_clear_irq(struct pci_endpoint_test *test)
659 pci_endpoint_test_release_irq(test);
660 pci_endpoint_test_free_irq_vectors(test);
664 static bool pci_endpoint_test_set_irq(struct pci_endpoint_test *test,
667 struct pci_dev *pdev = test->pdev;
668 struct device *dev = &pdev->dev;
670 if (req_irq_type < IRQ_TYPE_LEGACY || req_irq_type > IRQ_TYPE_MSIX) {
671 dev_err(dev, "Invalid IRQ type option\n");
675 if (test->irq_type == req_irq_type)
678 pci_endpoint_test_release_irq(test);
679 pci_endpoint_test_free_irq_vectors(test);
681 if (!pci_endpoint_test_alloc_irq_vectors(test, req_irq_type))
684 if (!pci_endpoint_test_request_irq(test))
690 pci_endpoint_test_free_irq_vectors(test);
694 static long pci_endpoint_test_ioctl(struct file *file, unsigned int cmd,
699 struct pci_endpoint_test *test = to_endpoint_test(file->private_data);
700 struct pci_dev *pdev = test->pdev;
702 mutex_lock(&test->mutex);
706 if (bar < 0 || bar > 5)
708 if (is_am654_pci_dev(pdev) && bar == BAR_0)
710 ret = pci_endpoint_test_bar(test, bar);
712 case PCITEST_LEGACY_IRQ:
713 ret = pci_endpoint_test_legacy_irq(test);
717 ret = pci_endpoint_test_msi_irq(test, arg, cmd == PCITEST_MSIX);
720 ret = pci_endpoint_test_write(test, arg);
723 ret = pci_endpoint_test_read(test, arg);
726 ret = pci_endpoint_test_copy(test, arg);
728 case PCITEST_SET_IRQTYPE:
729 ret = pci_endpoint_test_set_irq(test, arg);
731 case PCITEST_GET_IRQTYPE:
734 case PCITEST_CLEAR_IRQ:
735 ret = pci_endpoint_test_clear_irq(test);
740 mutex_unlock(&test->mutex);
744 static const struct file_operations pci_endpoint_test_fops = {
745 .owner = THIS_MODULE,
746 .unlocked_ioctl = pci_endpoint_test_ioctl,
749 static int pci_endpoint_test_probe(struct pci_dev *pdev,
750 const struct pci_device_id *ent)
757 struct device *dev = &pdev->dev;
758 struct pci_endpoint_test *test;
759 struct pci_endpoint_test_data *data;
760 enum pci_barno test_reg_bar = BAR_0;
761 struct miscdevice *misc_device;
763 if (pci_is_bridge(pdev))
766 test = devm_kzalloc(dev, sizeof(*test), GFP_KERNEL);
770 test->test_reg_bar = 0;
773 test->irq_type = IRQ_TYPE_UNDEFINED;
776 irq_type = IRQ_TYPE_LEGACY;
778 data = (struct pci_endpoint_test_data *)ent->driver_data;
780 test_reg_bar = data->test_reg_bar;
781 test->test_reg_bar = test_reg_bar;
782 test->alignment = data->alignment;
783 irq_type = data->irq_type;
786 init_completion(&test->irq_raised);
787 mutex_init(&test->mutex);
789 if ((dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(48)) != 0) &&
790 dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)) != 0) {
791 dev_err(dev, "Cannot set DMA mask\n");
795 err = pci_enable_device(pdev);
797 dev_err(dev, "Cannot enable PCI device\n");
801 err = pci_request_regions(pdev, DRV_MODULE_NAME);
803 dev_err(dev, "Cannot obtain PCI resources\n");
804 goto err_disable_pdev;
807 pci_set_master(pdev);
809 if (!pci_endpoint_test_alloc_irq_vectors(test, irq_type))
810 goto err_disable_irq;
812 for (bar = 0; bar < PCI_STD_NUM_BARS; bar++) {
813 if (pci_resource_flags(pdev, bar) & IORESOURCE_MEM) {
814 base = pci_ioremap_bar(pdev, bar);
816 dev_err(dev, "Failed to read BAR%d\n", bar);
817 WARN_ON(bar == test_reg_bar);
819 test->bar[bar] = base;
823 test->base = test->bar[test_reg_bar];
826 dev_err(dev, "Cannot perform PCI test without BAR%d\n",
831 pci_set_drvdata(pdev, test);
833 id = ida_simple_get(&pci_endpoint_test_ida, 0, 0, GFP_KERNEL);
836 dev_err(dev, "Unable to get id\n");
840 snprintf(name, sizeof(name), DRV_MODULE_NAME ".%d", id);
841 test->name = kstrdup(name, GFP_KERNEL);
847 if (!pci_endpoint_test_request_irq(test))
848 goto err_kfree_test_name;
850 misc_device = &test->miscdev;
851 misc_device->minor = MISC_DYNAMIC_MINOR;
852 misc_device->name = kstrdup(name, GFP_KERNEL);
853 if (!misc_device->name) {
855 goto err_release_irq;
857 misc_device->fops = &pci_endpoint_test_fops,
859 err = misc_register(misc_device);
861 dev_err(dev, "Failed to register device\n");
868 kfree(misc_device->name);
871 pci_endpoint_test_release_irq(test);
877 ida_simple_remove(&pci_endpoint_test_ida, id);
880 for (bar = 0; bar < PCI_STD_NUM_BARS; bar++) {
882 pci_iounmap(pdev, test->bar[bar]);
886 pci_endpoint_test_free_irq_vectors(test);
887 pci_release_regions(pdev);
890 pci_disable_device(pdev);
895 static void pci_endpoint_test_remove(struct pci_dev *pdev)
899 struct pci_endpoint_test *test = pci_get_drvdata(pdev);
900 struct miscdevice *misc_device = &test->miscdev;
902 if (sscanf(misc_device->name, DRV_MODULE_NAME ".%d", &id) != 1)
907 misc_deregister(&test->miscdev);
908 kfree(misc_device->name);
910 ida_simple_remove(&pci_endpoint_test_ida, id);
911 for (bar = 0; bar < PCI_STD_NUM_BARS; bar++) {
913 pci_iounmap(pdev, test->bar[bar]);
916 pci_endpoint_test_release_irq(test);
917 pci_endpoint_test_free_irq_vectors(test);
919 pci_release_regions(pdev);
920 pci_disable_device(pdev);
923 static const struct pci_endpoint_test_data default_data = {
924 .test_reg_bar = BAR_0,
926 .irq_type = IRQ_TYPE_MSI,
929 static const struct pci_endpoint_test_data am654_data = {
930 .test_reg_bar = BAR_2,
932 .irq_type = IRQ_TYPE_MSI,
935 static const struct pci_device_id pci_endpoint_test_tbl[] = {
936 { PCI_DEVICE(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_DRA74x),
937 .driver_data = (kernel_ulong_t)&default_data,
939 { PCI_DEVICE(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_DRA72x),
940 .driver_data = (kernel_ulong_t)&default_data,
942 { PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, 0x81c0) },
943 { PCI_DEVICE_DATA(SYNOPSYS, EDDA, NULL) },
944 { PCI_DEVICE(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_AM654),
945 .driver_data = (kernel_ulong_t)&am654_data
947 { PCI_DEVICE(PCI_VENDOR_ID_RENESAS, PCI_DEVICE_ID_RENESAS_R8A774C0),
951 MODULE_DEVICE_TABLE(pci, pci_endpoint_test_tbl);
953 static struct pci_driver pci_endpoint_test_driver = {
954 .name = DRV_MODULE_NAME,
955 .id_table = pci_endpoint_test_tbl,
956 .probe = pci_endpoint_test_probe,
957 .remove = pci_endpoint_test_remove,
959 module_pci_driver(pci_endpoint_test_driver);
961 MODULE_DESCRIPTION("PCI ENDPOINT TEST HOST DRIVER");
962 MODULE_AUTHOR("Kishon Vijay Abraham I <kishon@ti.com>");
963 MODULE_LICENSE("GPL v2");