1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at24.c - handle most I2C EEPROMs
5 * Copyright (C) 2005-2007 David Brownell
6 * Copyright (C) 2008 Wolfram Sang, Pengutronix
9 #include <linux/acpi.h>
10 #include <linux/bitops.h>
11 #include <linux/capability.h>
12 #include <linux/delay.h>
13 #include <linux/i2c.h>
14 #include <linux/init.h>
15 #include <linux/jiffies.h>
16 #include <linux/kernel.h>
17 #include <linux/mod_devicetable.h>
18 #include <linux/module.h>
19 #include <linux/mutex.h>
20 #include <linux/nvmem-provider.h>
22 #include <linux/of_device.h>
23 #include <linux/pm_runtime.h>
24 #include <linux/property.h>
25 #include <linux/regmap.h>
26 #include <linux/regulator/consumer.h>
27 #include <linux/slab.h>
29 /* Address pointer is 16 bit. */
30 #define AT24_FLAG_ADDR16 BIT(7)
31 /* sysfs-entry will be read-only. */
32 #define AT24_FLAG_READONLY BIT(6)
33 /* sysfs-entry will be world-readable. */
34 #define AT24_FLAG_IRUGO BIT(5)
35 /* Take always 8 addresses (24c00). */
36 #define AT24_FLAG_TAKE8ADDR BIT(4)
37 /* Factory-programmed serial number. */
38 #define AT24_FLAG_SERIAL BIT(3)
39 /* Factory-programmed mac address. */
40 #define AT24_FLAG_MAC BIT(2)
41 /* Does not auto-rollover reads to the next slave address. */
42 #define AT24_FLAG_NO_RDROL BIT(1)
45 * I2C EEPROMs from most vendors are inexpensive and mostly interchangeable.
46 * Differences between different vendor product lines (like Atmel AT24C or
47 * MicroChip 24LC, etc) won't much matter for typical read/write access.
48 * There are also I2C RAM chips, likewise interchangeable. One example
49 * would be the PCF8570, which acts like a 24c02 EEPROM (256 bytes).
51 * However, misconfiguration can lose data. "Set 16-bit memory address"
52 * to a part with 8-bit addressing will overwrite data. Writing with too
53 * big a page size also loses data. And it's not safe to assume that the
54 * conventional addresses 0x50..0x57 only hold eeproms; a PCF8563 RTC
55 * uses 0x51, for just one example.
57 * Accordingly, explicit board-specific configuration data should be used
58 * in almost all cases. (One partial exception is an SMBus used to access
59 * "SPD" data for DRAM sticks. Those only use 24c02 EEPROMs.)
61 * So this driver uses "new style" I2C driver binding, expecting to be
62 * told what devices exist. That may be in arch/X/mach-Y/board-Z.c or
63 * similar kernel-resident tables; or, configuration data coming from
66 * Other than binding model, current differences from "eeprom" driver are
67 * that this one handles write access and isn't restricted to 24c02 devices.
68 * It also handles larger devices (32 kbit and up) with two-byte addresses,
69 * which won't work on pure SMBus systems.
74 * Lock protects against activities from other Linux tasks,
75 * but not from changes by other I2C masters.
79 unsigned int write_max;
80 unsigned int num_addresses;
81 unsigned int offset_adj;
87 struct nvmem_device *nvmem;
88 struct regulator *vcc_reg;
89 void (*read_post)(unsigned int off, char *buf, size_t count);
92 * Some chips tie up multiple I2C addresses; dummy devices reserve
96 struct regmap *client_regmaps[] __counted_by(num_addresses);
100 * This parameter is to help this driver avoid blocking other drivers out
101 * of I2C for potentially troublesome amounts of time. With a 100 kHz I2C
102 * clock, one 256 byte read takes about 1/43 second which is excessive;
103 * but the 1/170 second it takes at 400 kHz may be quite reasonable; and
104 * at 1 MHz (Fm+) a 1/430 second delay could easily be invisible.
106 * This value is forced to be a power of two so that writes align on pages.
108 static unsigned int at24_io_limit = 128;
109 module_param_named(io_limit, at24_io_limit, uint, 0);
110 MODULE_PARM_DESC(at24_io_limit, "Maximum bytes per I/O (default 128)");
113 * Specs often allow 5 msec for a page write, sometimes 20 msec;
114 * it's important to recover from write timeouts.
116 static unsigned int at24_write_timeout = 25;
117 module_param_named(write_timeout, at24_write_timeout, uint, 0);
118 MODULE_PARM_DESC(at24_write_timeout, "Time (in ms) to try writes (default 25)");
120 struct at24_chip_data {
124 void (*read_post)(unsigned int off, char *buf, size_t count);
127 #define AT24_CHIP_DATA(_name, _len, _flags) \
128 static const struct at24_chip_data _name = { \
129 .byte_len = _len, .flags = _flags, \
132 #define AT24_CHIP_DATA_CB(_name, _len, _flags, _read_post) \
133 static const struct at24_chip_data _name = { \
134 .byte_len = _len, .flags = _flags, \
135 .read_post = _read_post, \
138 #define AT24_CHIP_DATA_BS(_name, _len, _flags, _bank_addr_shift) \
139 static const struct at24_chip_data _name = { \
140 .byte_len = _len, .flags = _flags, \
141 .bank_addr_shift = _bank_addr_shift \
144 static void at24_read_post_vaio(unsigned int off, char *buf, size_t count)
148 if (capable(CAP_SYS_ADMIN))
152 * Hide VAIO private settings to regular users:
153 * - BIOS passwords: bytes 0x00 to 0x0f
154 * - UUID: bytes 0x10 to 0x1f
155 * - Serial number: 0xc0 to 0xdf
157 for (i = 0; i < count; i++) {
158 if ((off + i <= 0x1f) ||
159 (off + i >= 0xc0 && off + i <= 0xdf))
164 /* needs 8 addresses as A0-A2 are ignored */
165 AT24_CHIP_DATA(at24_data_24c00, 128 / 8, AT24_FLAG_TAKE8ADDR);
166 /* old variants can't be handled with this generic entry! */
167 AT24_CHIP_DATA(at24_data_24c01, 1024 / 8, 0);
168 AT24_CHIP_DATA(at24_data_24cs01, 16,
169 AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
170 AT24_CHIP_DATA(at24_data_24c02, 2048 / 8, 0);
171 AT24_CHIP_DATA(at24_data_24cs02, 16,
172 AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
173 AT24_CHIP_DATA(at24_data_24mac402, 48 / 8,
174 AT24_FLAG_MAC | AT24_FLAG_READONLY);
175 AT24_CHIP_DATA(at24_data_24mac602, 64 / 8,
176 AT24_FLAG_MAC | AT24_FLAG_READONLY);
177 /* spd is a 24c02 in memory DIMMs */
178 AT24_CHIP_DATA(at24_data_spd, 2048 / 8,
179 AT24_FLAG_READONLY | AT24_FLAG_IRUGO);
180 /* 24c02_vaio is a 24c02 on some Sony laptops */
181 AT24_CHIP_DATA_CB(at24_data_24c02_vaio, 2048 / 8,
182 AT24_FLAG_READONLY | AT24_FLAG_IRUGO,
183 at24_read_post_vaio);
184 AT24_CHIP_DATA(at24_data_24c04, 4096 / 8, 0);
185 AT24_CHIP_DATA(at24_data_24cs04, 16,
186 AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
187 /* 24rf08 quirk is handled at i2c-core */
188 AT24_CHIP_DATA(at24_data_24c08, 8192 / 8, 0);
189 AT24_CHIP_DATA(at24_data_24cs08, 16,
190 AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
191 AT24_CHIP_DATA(at24_data_24c16, 16384 / 8, 0);
192 AT24_CHIP_DATA(at24_data_24cs16, 16,
193 AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
194 AT24_CHIP_DATA(at24_data_24c32, 32768 / 8, AT24_FLAG_ADDR16);
195 /* M24C32-D Additional Write lockable page (M24C32-D order codes) */
196 AT24_CHIP_DATA(at24_data_24c32d_wlp, 32, AT24_FLAG_ADDR16);
197 AT24_CHIP_DATA(at24_data_24cs32, 16,
198 AT24_FLAG_ADDR16 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
199 AT24_CHIP_DATA(at24_data_24c64, 65536 / 8, AT24_FLAG_ADDR16);
200 /* M24C64-D Additional Write lockable page (M24C64-D order codes) */
201 AT24_CHIP_DATA(at24_data_24c64d_wlp, 32, AT24_FLAG_ADDR16);
202 AT24_CHIP_DATA(at24_data_24cs64, 16,
203 AT24_FLAG_ADDR16 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
204 AT24_CHIP_DATA(at24_data_24c128, 131072 / 8, AT24_FLAG_ADDR16);
205 AT24_CHIP_DATA(at24_data_24c256, 262144 / 8, AT24_FLAG_ADDR16);
206 AT24_CHIP_DATA(at24_data_24c512, 524288 / 8, AT24_FLAG_ADDR16);
207 AT24_CHIP_DATA(at24_data_24c1024, 1048576 / 8, AT24_FLAG_ADDR16);
208 AT24_CHIP_DATA_BS(at24_data_24c1025, 1048576 / 8, AT24_FLAG_ADDR16, 2);
209 AT24_CHIP_DATA(at24_data_24c2048, 2097152 / 8, AT24_FLAG_ADDR16);
210 /* identical to 24c08 ? */
211 AT24_CHIP_DATA(at24_data_INT3499, 8192 / 8, 0);
213 static const struct i2c_device_id at24_ids[] = {
214 { "24c00", (kernel_ulong_t)&at24_data_24c00 },
215 { "24c01", (kernel_ulong_t)&at24_data_24c01 },
216 { "24cs01", (kernel_ulong_t)&at24_data_24cs01 },
217 { "24c02", (kernel_ulong_t)&at24_data_24c02 },
218 { "24cs02", (kernel_ulong_t)&at24_data_24cs02 },
219 { "24mac402", (kernel_ulong_t)&at24_data_24mac402 },
220 { "24mac602", (kernel_ulong_t)&at24_data_24mac602 },
221 { "spd", (kernel_ulong_t)&at24_data_spd },
222 { "24c02-vaio", (kernel_ulong_t)&at24_data_24c02_vaio },
223 { "24c04", (kernel_ulong_t)&at24_data_24c04 },
224 { "24cs04", (kernel_ulong_t)&at24_data_24cs04 },
225 { "24c08", (kernel_ulong_t)&at24_data_24c08 },
226 { "24cs08", (kernel_ulong_t)&at24_data_24cs08 },
227 { "24c16", (kernel_ulong_t)&at24_data_24c16 },
228 { "24cs16", (kernel_ulong_t)&at24_data_24cs16 },
229 { "24c32", (kernel_ulong_t)&at24_data_24c32 },
230 { "24c32d-wl", (kernel_ulong_t)&at24_data_24c32d_wlp },
231 { "24cs32", (kernel_ulong_t)&at24_data_24cs32 },
232 { "24c64", (kernel_ulong_t)&at24_data_24c64 },
233 { "24c64-wl", (kernel_ulong_t)&at24_data_24c64d_wlp },
234 { "24cs64", (kernel_ulong_t)&at24_data_24cs64 },
235 { "24c128", (kernel_ulong_t)&at24_data_24c128 },
236 { "24c256", (kernel_ulong_t)&at24_data_24c256 },
237 { "24c512", (kernel_ulong_t)&at24_data_24c512 },
238 { "24c1024", (kernel_ulong_t)&at24_data_24c1024 },
239 { "24c1025", (kernel_ulong_t)&at24_data_24c1025 },
240 { "24c2048", (kernel_ulong_t)&at24_data_24c2048 },
242 { /* END OF LIST */ }
244 MODULE_DEVICE_TABLE(i2c, at24_ids);
246 static const struct of_device_id __maybe_unused at24_of_match[] = {
247 { .compatible = "atmel,24c00", .data = &at24_data_24c00 },
248 { .compatible = "atmel,24c01", .data = &at24_data_24c01 },
249 { .compatible = "atmel,24cs01", .data = &at24_data_24cs01 },
250 { .compatible = "atmel,24c02", .data = &at24_data_24c02 },
251 { .compatible = "atmel,24cs02", .data = &at24_data_24cs02 },
252 { .compatible = "atmel,24mac402", .data = &at24_data_24mac402 },
253 { .compatible = "atmel,24mac602", .data = &at24_data_24mac602 },
254 { .compatible = "atmel,spd", .data = &at24_data_spd },
255 { .compatible = "atmel,24c04", .data = &at24_data_24c04 },
256 { .compatible = "atmel,24cs04", .data = &at24_data_24cs04 },
257 { .compatible = "atmel,24c08", .data = &at24_data_24c08 },
258 { .compatible = "atmel,24cs08", .data = &at24_data_24cs08 },
259 { .compatible = "atmel,24c16", .data = &at24_data_24c16 },
260 { .compatible = "atmel,24cs16", .data = &at24_data_24cs16 },
261 { .compatible = "atmel,24c32", .data = &at24_data_24c32 },
262 { .compatible = "atmel,24c32d-wl", .data = &at24_data_24c32d_wlp },
263 { .compatible = "atmel,24cs32", .data = &at24_data_24cs32 },
264 { .compatible = "atmel,24c64", .data = &at24_data_24c64 },
265 { .compatible = "atmel,24c64d-wl", .data = &at24_data_24c64d_wlp },
266 { .compatible = "atmel,24cs64", .data = &at24_data_24cs64 },
267 { .compatible = "atmel,24c128", .data = &at24_data_24c128 },
268 { .compatible = "atmel,24c256", .data = &at24_data_24c256 },
269 { .compatible = "atmel,24c512", .data = &at24_data_24c512 },
270 { .compatible = "atmel,24c1024", .data = &at24_data_24c1024 },
271 { .compatible = "atmel,24c1025", .data = &at24_data_24c1025 },
272 { .compatible = "atmel,24c2048", .data = &at24_data_24c2048 },
273 { /* END OF LIST */ },
275 MODULE_DEVICE_TABLE(of, at24_of_match);
277 static const struct acpi_device_id __maybe_unused at24_acpi_ids[] = {
278 { "INT3499", (kernel_ulong_t)&at24_data_INT3499 },
279 { "TPF0001", (kernel_ulong_t)&at24_data_24c1024 },
280 { /* END OF LIST */ }
282 MODULE_DEVICE_TABLE(acpi, at24_acpi_ids);
285 * This routine supports chips which consume multiple I2C addresses. It
286 * computes the addressing information to be used for a given r/w request.
287 * Assumes that sanity checks for offset happened at sysfs-layer.
289 * Slave address and byte offset derive from the offset. Always
290 * set the byte address; on a multi-master board, another master
291 * may have changed the chip's "current" address pointer.
293 static struct regmap *at24_translate_offset(struct at24_data *at24,
294 unsigned int *offset)
298 if (at24->flags & AT24_FLAG_ADDR16) {
306 return at24->client_regmaps[i];
309 static struct device *at24_base_client_dev(struct at24_data *at24)
311 return regmap_get_device(at24->client_regmaps[0]);
314 static size_t at24_adjust_read_count(struct at24_data *at24,
315 unsigned int offset, size_t count)
321 * In case of multi-address chips that don't rollover reads to
322 * the next slave address: truncate the count to the slave boundary,
323 * so that the read never straddles slaves.
325 if (at24->flags & AT24_FLAG_NO_RDROL) {
326 bits = (at24->flags & AT24_FLAG_ADDR16) ? 16 : 8;
327 remainder = BIT(bits) - offset;
328 if (count > remainder)
332 if (count > at24_io_limit)
333 count = at24_io_limit;
338 static ssize_t at24_regmap_read(struct at24_data *at24, char *buf,
339 unsigned int offset, size_t count)
341 unsigned long timeout, read_time;
342 struct regmap *regmap;
345 regmap = at24_translate_offset(at24, &offset);
346 count = at24_adjust_read_count(at24, offset, count);
348 /* adjust offset for mac and serial read ops */
349 offset += at24->offset_adj;
351 timeout = jiffies + msecs_to_jiffies(at24_write_timeout);
354 * The timestamp shall be taken before the actual operation
355 * to avoid a premature timeout in case of high CPU load.
359 ret = regmap_bulk_read(regmap, offset, buf, count);
360 dev_dbg(regmap_get_device(regmap), "read %zu@%d --> %d (%ld)\n",
361 count, offset, ret, jiffies);
365 usleep_range(1000, 1500);
366 } while (time_before(read_time, timeout));
372 * Note that if the hardware write-protect pin is pulled high, the whole
373 * chip is normally write protected. But there are plenty of product
374 * variants here, including OTP fuses and partial chip protect.
376 * We only use page mode writes; the alternative is sloooow. These routines
377 * write at most one page.
380 static size_t at24_adjust_write_count(struct at24_data *at24,
381 unsigned int offset, size_t count)
383 unsigned int next_page;
385 /* write_max is at most a page */
386 if (count > at24->write_max)
387 count = at24->write_max;
389 /* Never roll over backwards, to the start of this page */
390 next_page = roundup(offset + 1, at24->page_size);
391 if (offset + count > next_page)
392 count = next_page - offset;
397 static ssize_t at24_regmap_write(struct at24_data *at24, const char *buf,
398 unsigned int offset, size_t count)
400 unsigned long timeout, write_time;
401 struct regmap *regmap;
404 regmap = at24_translate_offset(at24, &offset);
405 count = at24_adjust_write_count(at24, offset, count);
406 timeout = jiffies + msecs_to_jiffies(at24_write_timeout);
410 * The timestamp shall be taken before the actual operation
411 * to avoid a premature timeout in case of high CPU load.
413 write_time = jiffies;
415 ret = regmap_bulk_write(regmap, offset, buf, count);
416 dev_dbg(regmap_get_device(regmap), "write %zu@%d --> %d (%ld)\n",
417 count, offset, ret, jiffies);
421 usleep_range(1000, 1500);
422 } while (time_before(write_time, timeout));
427 static int at24_read(void *priv, unsigned int off, void *val, size_t count)
429 struct at24_data *at24;
435 dev = at24_base_client_dev(at24);
437 if (unlikely(!count))
440 if (off + count > at24->byte_len)
443 ret = pm_runtime_resume_and_get(dev);
447 * Read data from chip, protecting against concurrent updates
448 * from this host, but not from other I2C masters.
450 mutex_lock(&at24->lock);
452 for (i = 0; count; i += ret, count -= ret) {
453 ret = at24_regmap_read(at24, buf + i, off + i, count);
455 mutex_unlock(&at24->lock);
461 mutex_unlock(&at24->lock);
465 if (unlikely(at24->read_post))
466 at24->read_post(off, buf, i);
471 static int at24_write(void *priv, unsigned int off, void *val, size_t count)
473 struct at24_data *at24;
479 dev = at24_base_client_dev(at24);
481 if (unlikely(!count))
484 if (off + count > at24->byte_len)
487 ret = pm_runtime_resume_and_get(dev);
491 * Write data to chip, protecting against concurrent updates
492 * from this host, but not from other I2C masters.
494 mutex_lock(&at24->lock);
497 ret = at24_regmap_write(at24, buf, off, count);
499 mutex_unlock(&at24->lock);
508 mutex_unlock(&at24->lock);
515 static int at24_make_dummy_client(struct at24_data *at24, unsigned int index,
516 struct i2c_client *base_client,
517 struct regmap_config *regmap_config)
519 struct i2c_client *dummy_client;
520 struct regmap *regmap;
522 dummy_client = devm_i2c_new_dummy_device(&base_client->dev,
523 base_client->adapter,
525 (index << at24->bank_addr_shift));
526 if (IS_ERR(dummy_client))
527 return PTR_ERR(dummy_client);
529 regmap = devm_regmap_init_i2c(dummy_client, regmap_config);
531 return PTR_ERR(regmap);
533 at24->client_regmaps[index] = regmap;
538 static unsigned int at24_get_offset_adj(u8 flags, unsigned int byte_len)
540 if (flags & AT24_FLAG_MAC) {
541 /* EUI-48 starts from 0x9a, EUI-64 from 0x98 */
542 return 0xa0 - byte_len;
543 } else if (flags & AT24_FLAG_SERIAL && flags & AT24_FLAG_ADDR16) {
545 * For 16 bit address pointers, the word address must contain
546 * a '10' sequence in bits 11 and 10 regardless of the
547 * intended position of the address pointer.
550 } else if (flags & AT24_FLAG_SERIAL) {
552 * Otherwise the word address must begin with a '10' sequence,
553 * regardless of the intended address.
561 static void at24_probe_temp_sensor(struct i2c_client *client)
563 struct at24_data *at24 = i2c_get_clientdata(client);
564 struct i2c_board_info info = { .type = "jc42" };
569 * Byte 2 has value 11 for DDR3, earlier versions don't
570 * support the thermal sensor present flag
572 ret = at24_read(at24, 2, &val, 1);
573 if (ret || val != 11)
576 /* Byte 32, bit 7 is set if temp sensor is present */
577 ret = at24_read(at24, 32, &val, 1);
578 if (ret || !(val & BIT(7)))
581 info.addr = 0x18 | (client->addr & 7);
583 i2c_new_client_device(client->adapter, &info);
586 static int at24_probe(struct i2c_client *client)
588 struct regmap_config regmap_config = { };
589 struct nvmem_config nvmem_config = { };
590 u32 byte_len, page_size, flags, addrw;
591 const struct at24_chip_data *cdata;
592 struct device *dev = &client->dev;
593 bool i2c_fn_i2c, i2c_fn_block;
594 unsigned int i, num_addresses;
595 struct at24_data *at24;
597 struct regmap *regmap;
602 i2c_fn_i2c = i2c_check_functionality(client->adapter, I2C_FUNC_I2C);
603 i2c_fn_block = i2c_check_functionality(client->adapter,
604 I2C_FUNC_SMBUS_WRITE_I2C_BLOCK);
606 cdata = i2c_get_match_data(client);
610 err = device_property_read_u32(dev, "pagesize", &page_size);
613 * This is slow, but we can't know all eeproms, so we better
614 * play safe. Specifying custom eeprom-types via device tree
615 * or properties is recommended anyhow.
619 flags = cdata->flags;
620 if (device_property_present(dev, "read-only"))
621 flags |= AT24_FLAG_READONLY;
622 if (device_property_present(dev, "no-read-rollover"))
623 flags |= AT24_FLAG_NO_RDROL;
625 err = device_property_read_u32(dev, "address-width", &addrw);
629 if (flags & AT24_FLAG_ADDR16)
631 "Override address width to be 8, while default is 16\n");
632 flags &= ~AT24_FLAG_ADDR16;
635 flags |= AT24_FLAG_ADDR16;
638 dev_warn(dev, "Bad \"address-width\" property: %u\n",
643 err = device_property_read_u32(dev, "size", &byte_len);
645 byte_len = cdata->byte_len;
647 if (!i2c_fn_i2c && !i2c_fn_block)
651 dev_err(dev, "page_size must not be 0!\n");
655 if (!is_power_of_2(page_size))
656 dev_warn(dev, "page_size looks suspicious (no power of 2)!\n");
658 err = device_property_read_u32(dev, "num-addresses", &num_addresses);
660 if (flags & AT24_FLAG_TAKE8ADDR)
663 num_addresses = DIV_ROUND_UP(byte_len,
664 (flags & AT24_FLAG_ADDR16) ? 65536 : 256);
667 if ((flags & AT24_FLAG_SERIAL) && (flags & AT24_FLAG_MAC)) {
669 "invalid device data - cannot have both AT24_FLAG_SERIAL & AT24_FLAG_MAC.");
673 regmap_config.val_bits = 8;
674 regmap_config.reg_bits = (flags & AT24_FLAG_ADDR16) ? 16 : 8;
675 regmap_config.disable_locking = true;
677 regmap = devm_regmap_init_i2c(client, ®map_config);
679 return PTR_ERR(regmap);
681 at24 = devm_kzalloc(dev, struct_size(at24, client_regmaps, num_addresses),
686 mutex_init(&at24->lock);
687 at24->byte_len = byte_len;
688 at24->page_size = page_size;
690 at24->read_post = cdata->read_post;
691 at24->bank_addr_shift = cdata->bank_addr_shift;
692 at24->num_addresses = num_addresses;
693 at24->offset_adj = at24_get_offset_adj(flags, byte_len);
694 at24->client_regmaps[0] = regmap;
696 at24->vcc_reg = devm_regulator_get(dev, "vcc");
697 if (IS_ERR(at24->vcc_reg))
698 return PTR_ERR(at24->vcc_reg);
700 writable = !(flags & AT24_FLAG_READONLY);
702 at24->write_max = min_t(unsigned int,
703 page_size, at24_io_limit);
704 if (!i2c_fn_i2c && at24->write_max > I2C_SMBUS_BLOCK_MAX)
705 at24->write_max = I2C_SMBUS_BLOCK_MAX;
708 /* use dummy devices for multiple-address chips */
709 for (i = 1; i < num_addresses; i++) {
710 err = at24_make_dummy_client(at24, i, client, ®map_config);
716 * We initialize nvmem_config.id to NVMEM_DEVID_AUTO even if the
717 * label property is set as some platform can have multiple eeproms
718 * with same label and we can not register each of those with same
719 * label. Failing to register those eeproms trigger cascade failure
722 nvmem_config.id = NVMEM_DEVID_AUTO;
724 if (device_property_present(dev, "label")) {
725 err = device_property_read_string(dev, "label",
730 nvmem_config.name = dev_name(dev);
733 nvmem_config.type = NVMEM_TYPE_EEPROM;
734 nvmem_config.dev = dev;
735 nvmem_config.read_only = !writable;
736 nvmem_config.root_only = !(flags & AT24_FLAG_IRUGO);
737 nvmem_config.owner = THIS_MODULE;
738 nvmem_config.compat = true;
739 nvmem_config.base_dev = dev;
740 nvmem_config.reg_read = at24_read;
741 nvmem_config.reg_write = at24_write;
742 nvmem_config.priv = at24;
743 nvmem_config.stride = 1;
744 nvmem_config.word_size = 1;
745 nvmem_config.size = byte_len;
747 i2c_set_clientdata(client, at24);
749 full_power = acpi_dev_state_d0(&client->dev);
751 err = regulator_enable(at24->vcc_reg);
753 dev_err(dev, "Failed to enable vcc regulator\n");
757 pm_runtime_set_active(dev);
759 pm_runtime_enable(dev);
761 at24->nvmem = devm_nvmem_register(dev, &nvmem_config);
762 if (IS_ERR(at24->nvmem)) {
763 pm_runtime_disable(dev);
764 if (!pm_runtime_status_suspended(dev))
765 regulator_disable(at24->vcc_reg);
766 return dev_err_probe(dev, PTR_ERR(at24->nvmem),
767 "failed to register nvmem\n");
771 * Perform a one-byte test read to verify that the chip is functional,
772 * unless powering on the device is to be avoided during probe (i.e.
773 * it's powered off right now).
776 err = at24_read(at24, 0, &test_byte, 1);
778 pm_runtime_disable(dev);
779 if (!pm_runtime_status_suspended(dev))
780 regulator_disable(at24->vcc_reg);
785 /* If this a SPD EEPROM, probe for DDR3 thermal sensor */
786 if (cdata == &at24_data_spd)
787 at24_probe_temp_sensor(client);
789 pm_runtime_idle(dev);
792 dev_info(dev, "%u byte %s EEPROM, writable, %u bytes/write\n",
793 byte_len, client->name, at24->write_max);
795 dev_info(dev, "%u byte %s EEPROM, read-only\n",
796 byte_len, client->name);
801 static void at24_remove(struct i2c_client *client)
803 struct at24_data *at24 = i2c_get_clientdata(client);
805 pm_runtime_disable(&client->dev);
806 if (acpi_dev_state_d0(&client->dev)) {
807 if (!pm_runtime_status_suspended(&client->dev))
808 regulator_disable(at24->vcc_reg);
809 pm_runtime_set_suspended(&client->dev);
813 static int __maybe_unused at24_suspend(struct device *dev)
815 struct i2c_client *client = to_i2c_client(dev);
816 struct at24_data *at24 = i2c_get_clientdata(client);
818 return regulator_disable(at24->vcc_reg);
821 static int __maybe_unused at24_resume(struct device *dev)
823 struct i2c_client *client = to_i2c_client(dev);
824 struct at24_data *at24 = i2c_get_clientdata(client);
826 return regulator_enable(at24->vcc_reg);
829 static const struct dev_pm_ops at24_pm_ops = {
830 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
831 pm_runtime_force_resume)
832 SET_RUNTIME_PM_OPS(at24_suspend, at24_resume, NULL)
835 static struct i2c_driver at24_driver = {
839 .of_match_table = of_match_ptr(at24_of_match),
840 .acpi_match_table = ACPI_PTR(at24_acpi_ids),
843 .remove = at24_remove,
844 .id_table = at24_ids,
845 .flags = I2C_DRV_ACPI_WAIVE_D0_PROBE,
848 static int __init at24_init(void)
850 if (!at24_io_limit) {
851 pr_err("at24: at24_io_limit must not be 0!\n");
855 at24_io_limit = rounddown_pow_of_two(at24_io_limit);
856 return i2c_add_driver(&at24_driver);
858 module_init(at24_init);
860 static void __exit at24_exit(void)
862 i2c_del_driver(&at24_driver);
864 module_exit(at24_exit);
866 MODULE_DESCRIPTION("Driver for most I2C EEPROMs");
867 MODULE_AUTHOR("David Brownell and Wolfram Sang");
868 MODULE_LICENSE("GPL");