drivers/mfd/ti_am335x_tscadc.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * TI Touch Screen / ADC MFD driver
   4  *
   5  * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
   6  */
   7
   8 #include <linux/module.h>
   9 #include <linux/slab.h>
  10 #include <linux/err.h>
  11 #include <linux/io.h>
  12 #include <linux/clk.h>
  13 #include <linux/regmap.h>
  14 #include <linux/mfd/core.h>
  15 #include <linux/pm_runtime.h>
  16 #include <linux/of.h>
  17 #include <linux/of_device.h>
  18 #include <linux/sched.h>
  19
  20 #include <linux/mfd/ti_am335x_tscadc.h>
  21
  22 static const struct regmap_config tscadc_regmap_config = {
  23         .name = "ti_tscadc",
  24         .reg_bits = 32,
  25         .reg_stride = 4,
  26         .val_bits = 32,
  27 };
  28
  29 void am335x_tsc_se_set_cache(struct ti_tscadc_dev *tscadc, u32 val)
  30 {
  31         unsigned long flags;
  32
  33         spin_lock_irqsave(&tscadc->reg_lock, flags);
  34         tscadc->reg_se_cache |= val;
  35         if (tscadc->adc_waiting)
  36                 wake_up(&tscadc->reg_se_wait);
  37         else if (!tscadc->adc_in_use)
  38                 regmap_write(tscadc->regmap, REG_SE, tscadc->reg_se_cache);
  39
  40         spin_unlock_irqrestore(&tscadc->reg_lock, flags);
  41 }
  42 EXPORT_SYMBOL_GPL(am335x_tsc_se_set_cache);
  43
  44 static void am335x_tscadc_need_adc(struct ti_tscadc_dev *tscadc)
  45 {
  46         DEFINE_WAIT(wait);
  47         u32 reg;
  48
  49         regmap_read(tscadc->regmap, REG_ADCFSM, &reg);
  50         if (reg & SEQ_STATUS) {
  51                 tscadc->adc_waiting = true;
  52                 prepare_to_wait(&tscadc->reg_se_wait, &wait,
  53                                 TASK_UNINTERRUPTIBLE);
  54                 spin_unlock_irq(&tscadc->reg_lock);
  55
  56                 schedule();
  57
  58                 spin_lock_irq(&tscadc->reg_lock);
  59                 finish_wait(&tscadc->reg_se_wait, &wait);
  60
  61                 /*
  62                  * Sequencer should either be idle or
  63                  * busy applying the charge step.
  64                  */
  65                 regmap_read(tscadc->regmap, REG_ADCFSM, &reg);
  66                 WARN_ON((reg & SEQ_STATUS) && !(reg & CHARGE_STEP));
  67                 tscadc->adc_waiting = false;
  68         }
  69         tscadc->adc_in_use = true;
  70 }
  71
  72 void am335x_tsc_se_set_once(struct ti_tscadc_dev *tscadc, u32 val)
  73 {
  74         spin_lock_irq(&tscadc->reg_lock);
  75         am335x_tscadc_need_adc(tscadc);
  76
  77         regmap_write(tscadc->regmap, REG_SE, val);
  78         spin_unlock_irq(&tscadc->reg_lock);
  79 }
  80 EXPORT_SYMBOL_GPL(am335x_tsc_se_set_once);
  81
  82 void am335x_tsc_se_adc_done(struct ti_tscadc_dev *tscadc)
  83 {
  84         unsigned long flags;
  85
  86         spin_lock_irqsave(&tscadc->reg_lock, flags);
  87         tscadc->adc_in_use = false;
  88         regmap_write(tscadc->regmap, REG_SE, tscadc->reg_se_cache);
  89         spin_unlock_irqrestore(&tscadc->reg_lock, flags);
  90 }
  91 EXPORT_SYMBOL_GPL(am335x_tsc_se_adc_done);
  92
  93 void am335x_tsc_se_clr(struct ti_tscadc_dev *tscadc, u32 val)
  94 {
  95         unsigned long flags;
  96
  97         spin_lock_irqsave(&tscadc->reg_lock, flags);
  98         tscadc->reg_se_cache &= ~val;
  99         regmap_write(tscadc->regmap, REG_SE, tscadc->reg_se_cache);
 100         spin_unlock_irqrestore(&tscadc->reg_lock, flags);
 101 }
 102 EXPORT_SYMBOL_GPL(am335x_tsc_se_clr);
 103
 104 static void tscadc_idle_config(struct ti_tscadc_dev *tscadc)
 105 {
 106         unsigned int idleconfig;
 107
 108         idleconfig = STEPCONFIG_YNN | STEPCONFIG_INM_ADCREFM |
 109                         STEPCONFIG_INP_ADCREFM | STEPCONFIG_YPN;
 110
 111         regmap_write(tscadc->regmap, REG_IDLECONFIG, idleconfig);
 112 }
 113
 114 static  int ti_tscadc_probe(struct platform_device *pdev)
 115 {
 116         struct ti_tscadc_dev *tscadc;
 117         struct resource *res;
 118         struct clk *clk;
 119         struct device_node *node;
 120         struct mfd_cell *cell;
 121         struct property *prop;
 122         const __be32 *cur;
 123         u32 val;
 124         int err, ctrl;
 125         int tsc_wires = 0, adc_channels = 0, total_channels;
 126         int readouts = 0;
 127
 128         /* Allocate memory for device */
 129         tscadc = devm_kzalloc(&pdev->dev, sizeof(*tscadc), GFP_KERNEL);
 130         if (!tscadc)
 131                 return -ENOMEM;
 132
 133         tscadc->dev = &pdev->dev;
 134
 135         if (!pdev->dev.of_node) {
 136                 dev_err(&pdev->dev, "Could not find valid DT data.\n");
 137                 return -EINVAL;
 138         }
 139
 140         tscadc->data = of_device_get_match_data(&pdev->dev);
 141
 142         node = of_get_child_by_name(pdev->dev.of_node, "tsc");
 143         of_property_read_u32(node, "ti,wires", &tsc_wires);
 144         of_property_read_u32(node, "ti,coordiante-readouts", &readouts);
 145         of_node_put(node);
 146
 147         node = of_get_child_by_name(pdev->dev.of_node, "adc");
 148         of_property_for_each_u32(node, "ti,adc-channels", prop, cur, val) {
 149                 adc_channels++;
 150                 if (val > 7) {
 151                         dev_err(&pdev->dev, " PIN numbers are 0..7 (not %d)\n",
 152                                 val);
 153                         of_node_put(node);
 154                         return -EINVAL;
 155                 }
 156         }
 157
 158         of_node_put(node);
 159
 160         total_channels = tsc_wires + adc_channels;
 161         if (total_channels > 8) {
 162                 dev_err(&pdev->dev, "Number of i/p channels more than 8\n");
 163                 return -EINVAL;
 164         }
 165
 166         if (total_channels == 0) {
 167                 dev_err(&pdev->dev, "Need atleast one channel.\n");
 168                 return -EINVAL;
 169         }
 170
 171         if (readouts * 2 + 2 + adc_channels > 16) {
 172                 dev_err(&pdev->dev, "Too many step configurations requested\n");
 173                 return -EINVAL;
 174         }
 175
 176         err = platform_get_irq(pdev, 0);
 177         if (err < 0)
 178                 return err;
 179         else
 180                 tscadc->irq = err;
 181
 182         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 183         tscadc->tscadc_base = devm_ioremap_resource(&pdev->dev, res);
 184         if (IS_ERR(tscadc->tscadc_base))
 185                 return PTR_ERR(tscadc->tscadc_base);
 186
 187         tscadc->tscadc_phys_base = res->start;
 188         tscadc->regmap = devm_regmap_init_mmio(&pdev->dev,
 189                                                tscadc->tscadc_base,
 190                                                &tscadc_regmap_config);
 191         if (IS_ERR(tscadc->regmap)) {
 192                 dev_err(&pdev->dev, "regmap init failed\n");
 193                 return PTR_ERR(tscadc->regmap);
 194         }
 195
 196         spin_lock_init(&tscadc->reg_lock);
 197         init_waitqueue_head(&tscadc->reg_se_wait);
 198
 199         pm_runtime_enable(&pdev->dev);
 200         pm_runtime_get_sync(&pdev->dev);
 201
 202         /*
 203          * The TSC_ADC_Subsystem has 2 clock domains: OCP_CLK and ADC_CLK.
 204          * ADCs produce a 12-bit sample every 15 ADC_CLK cycles.
 205          * am33xx ADCs expect to capture 200ksps.
 206          * We need the ADC clocks to run at 3MHz.
 207          * This frequency is valid since TSC_ADC_SS controller design
 208          * assumes the OCP clock is at least 6x faster than the ADC clock.
 209          */
 210         clk = devm_clk_get(&pdev->dev, NULL);
 211         if (IS_ERR(clk)) {
 212                 dev_err(&pdev->dev, "failed to get TSC fck\n");
 213                 err = PTR_ERR(clk);
 214                 goto err_disable_clk;
 215         }
 216
 217         tscadc->clk_div = (clk_get_rate(clk) / tscadc->data->target_clk_rate) - 1;
 218         regmap_write(tscadc->regmap, REG_CLKDIV, tscadc->clk_div);
 219
 220         /* Set the control register bits */
 221         ctrl = CNTRLREG_STEPCONFIGWRT | CNTRLREG_STEPID;
 222         regmap_write(tscadc->regmap, REG_CTRL, ctrl);
 223
 224         /* Set register bits for Idle Config Mode */
 225         if (tsc_wires > 0) {
 226                 tscadc->tsc_wires = tsc_wires;
 227                 if (tsc_wires == 5)
 228                         ctrl |= CNTRLREG_5WIRE | CNTRLREG_TSCENB;
 229                 else
 230                         ctrl |= CNTRLREG_4WIRE | CNTRLREG_TSCENB;
 231                 tscadc_idle_config(tscadc);
 232         }
 233
 234         /* Enable the TSC module enable bit */
 235         ctrl |= CNTRLREG_TSCSSENB;
 236         regmap_write(tscadc->regmap, REG_CTRL, ctrl);
 237
 238         tscadc->used_cells = 0;
 239         tscadc->tsc_cell = -1;
 240         tscadc->adc_cell = -1;
 241
 242         /* TSC Cell */
 243         if (tsc_wires > 0) {
 244                 tscadc->tsc_cell = tscadc->used_cells;
 245                 cell = &tscadc->cells[tscadc->used_cells++];
 246                 cell->name = tscadc->data->secondary_feature_name;
 247                 cell->of_compatible = tscadc->data->secondary_feature_compatible;
 248                 cell->platform_data = &tscadc;
 249                 cell->pdata_size = sizeof(tscadc);
 250         }
 251
 252         /* ADC Cell */
 253         if (adc_channels > 0) {
 254                 tscadc->adc_cell = tscadc->used_cells;
 255                 cell = &tscadc->cells[tscadc->used_cells++];
 256                 cell->name = tscadc->data->adc_feature_name;
 257                 cell->of_compatible = tscadc->data->adc_feature_compatible;
 258                 cell->platform_data = &tscadc;
 259                 cell->pdata_size = sizeof(tscadc);
 260         }
 261
 262         err = mfd_add_devices(&pdev->dev, PLATFORM_DEVID_AUTO,
 263                               tscadc->cells, tscadc->used_cells, NULL,
 264                               0, NULL);
 265         if (err < 0)
 266                 goto err_disable_clk;
 267
 268         platform_set_drvdata(pdev, tscadc);
 269         return 0;
 270
 271 err_disable_clk:
 272         pm_runtime_put_sync(&pdev->dev);
 273         pm_runtime_disable(&pdev->dev);
 274
 275         return err;
 276 }
 277
 278 static int ti_tscadc_remove(struct platform_device *pdev)
 279 {
 280         struct ti_tscadc_dev *tscadc = platform_get_drvdata(pdev);
 281
 282         regmap_write(tscadc->regmap, REG_SE, 0x00);
 283
 284         pm_runtime_put_sync(&pdev->dev);
 285         pm_runtime_disable(&pdev->dev);
 286
 287         mfd_remove_devices(tscadc->dev);
 288
 289         return 0;
 290 }
 291
 292 static int __maybe_unused ti_tscadc_can_wakeup(struct device *dev, void *data)
 293 {
 294         return device_may_wakeup(dev);
 295 }
 296
 297 static int __maybe_unused tscadc_suspend(struct device *dev)
 298 {
 299         struct ti_tscadc_dev *tscadc = dev_get_drvdata(dev);
 300
 301         regmap_write(tscadc->regmap, REG_SE, 0x00);
 302         if (device_for_each_child(dev, NULL, ti_tscadc_can_wakeup)) {
 303                 u32 ctrl;
 304
 305                 regmap_read(tscadc->regmap, REG_CTRL, &ctrl);
 306                 ctrl &= ~(CNTRLREG_POWERDOWN);
 307                 ctrl |= CNTRLREG_TSCSSENB;
 308                 regmap_write(tscadc->regmap, REG_CTRL, ctrl);
 309         }
 310         pm_runtime_put_sync(dev);
 311
 312         return 0;
 313 }
 314
 315 static int __maybe_unused tscadc_resume(struct device *dev)
 316 {
 317         struct ti_tscadc_dev *tscadc = dev_get_drvdata(dev);
 318         u32 ctrl;
 319
 320         pm_runtime_get_sync(dev);
 321
 322         /* context restore */
 323         ctrl = CNTRLREG_STEPCONFIGWRT | CNTRLREG_STEPID;
 324         regmap_write(tscadc->regmap, REG_CTRL, ctrl);
 325
 326         if (tscadc->tsc_wires > 0) {
 327                 if (tscadc->tsc_wires == 5)
 328                         ctrl |= CNTRLREG_5WIRE | CNTRLREG_TSCENB;
 329                 else
 330                         ctrl |= CNTRLREG_4WIRE | CNTRLREG_TSCENB;
 331                 tscadc_idle_config(tscadc);
 332         }
 333         ctrl |= CNTRLREG_TSCSSENB;
 334         regmap_write(tscadc->regmap, REG_CTRL, ctrl);
 335
 336         regmap_write(tscadc->regmap, REG_CLKDIV, tscadc->clk_div);
 337
 338         return 0;
 339 }
 340
 341 static SIMPLE_DEV_PM_OPS(tscadc_pm_ops, tscadc_suspend, tscadc_resume);
 342
 343 static const struct ti_tscadc_data tscdata = {
 344         .adc_feature_name = "TI-am335x-adc",
 345         .adc_feature_compatible = "ti,am3359-adc",
 346         .secondary_feature_name = "TI-am335x-tsc",
 347         .secondary_feature_compatible = "ti,am3359-tsc",
 348         .target_clk_rate = ADC_CLK,
 349 };
 350
 351 static const struct of_device_id ti_tscadc_dt_ids[] = {
 352         { .compatible = "ti,am3359-tscadc", .data = &tscdata },
 353         { }
 354 };
 355 MODULE_DEVICE_TABLE(of, ti_tscadc_dt_ids);
 356
 357 static struct platform_driver ti_tscadc_driver = {
 358         .driver = {
 359                 .name   = "ti_am3359-tscadc",
 360                 .pm     = &tscadc_pm_ops,
 361                 .of_match_table = ti_tscadc_dt_ids,
 362         },
 363         .probe  = ti_tscadc_probe,
 364         .remove = ti_tscadc_remove,
 365
 366 };
 367
 368 module_platform_driver(ti_tscadc_driver);
 369
 370 MODULE_DESCRIPTION("TI touchscreen / ADC MFD controller driver");
 371 MODULE_AUTHOR("Rachna Patil <rachna@ti.com>");
 372 MODULE_LICENSE("GPL");