3 * Toshiba T7L66XB core mfd support
5 * Copyright (c) 2005, 2007, 2008 Ian Molton
6 * Copyright (c) 2008 Dmitry Baryshkov
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
14 * Supported in this driver:
16 * SM/NAND flash controller
18 * As yet not supported
19 * GPIO interface (on NAND pins)
21 * TFT 'interface converter'
22 * PCMCIA interface logic
25 #include <linux/kernel.h>
26 #include <linux/module.h>
27 #include <linux/err.h>
29 #include <linux/slab.h>
30 #include <linux/irq.h>
31 #include <linux/clk.h>
32 #include <linux/platform_device.h>
33 #include <linux/mfd/core.h>
34 #include <linux/mfd/tmio.h>
35 #include <linux/mfd/t7l66xb.h>
42 static const struct resource t7l66xb_mmc_resources[] = {
46 .flags = IORESOURCE_MEM,
49 .start = IRQ_T7L66XB_MMC,
50 .end = IRQ_T7L66XB_MMC,
51 .flags = IORESOURCE_IRQ,
55 #define SCR_REVID 0x08 /* b Revision ID */
56 #define SCR_IMR 0x42 /* b Interrupt Mask */
57 #define SCR_DEV_CTL 0xe0 /* b Device control */
58 #define SCR_ISR 0xe1 /* b Interrupt Status */
59 #define SCR_GPO_OC 0xf0 /* b GPO output control */
60 #define SCR_GPO_OS 0xf1 /* b GPO output enable */
61 #define SCR_GPI_S 0xf2 /* w GPI status */
62 #define SCR_APDC 0xf8 /* b Active pullup down ctrl */
64 #define SCR_DEV_CTL_USB BIT(0) /* USB enable */
65 #define SCR_DEV_CTL_MMC BIT(1) /* MMC enable */
67 /*--------------------------------------------------------------------------*/
71 /* Lock to protect registers requiring read/modify/write ops. */
81 /*--------------------------------------------------------------------------*/
83 static int t7l66xb_mmc_enable(struct platform_device *mmc)
85 struct t7l66xb *t7l66xb = dev_get_drvdata(mmc->dev.parent);
90 ret = clk_prepare_enable(t7l66xb->clk32k);
94 raw_spin_lock_irqsave(&t7l66xb->lock, flags);
96 dev_ctl = tmio_ioread8(t7l66xb->scr + SCR_DEV_CTL);
97 dev_ctl |= SCR_DEV_CTL_MMC;
98 tmio_iowrite8(dev_ctl, t7l66xb->scr + SCR_DEV_CTL);
100 raw_spin_unlock_irqrestore(&t7l66xb->lock, flags);
102 tmio_core_mmc_enable(t7l66xb->scr + 0x200, 0,
103 t7l66xb_mmc_resources[0].start & 0xfffe);
108 static int t7l66xb_mmc_disable(struct platform_device *mmc)
110 struct t7l66xb *t7l66xb = dev_get_drvdata(mmc->dev.parent);
114 raw_spin_lock_irqsave(&t7l66xb->lock, flags);
116 dev_ctl = tmio_ioread8(t7l66xb->scr + SCR_DEV_CTL);
117 dev_ctl &= ~SCR_DEV_CTL_MMC;
118 tmio_iowrite8(dev_ctl, t7l66xb->scr + SCR_DEV_CTL);
120 raw_spin_unlock_irqrestore(&t7l66xb->lock, flags);
122 clk_disable_unprepare(t7l66xb->clk32k);
127 static void t7l66xb_mmc_pwr(struct platform_device *mmc, int state)
129 struct t7l66xb *t7l66xb = dev_get_drvdata(mmc->dev.parent);
131 tmio_core_mmc_pwr(t7l66xb->scr + 0x200, 0, state);
134 static void t7l66xb_mmc_clk_div(struct platform_device *mmc, int state)
136 struct t7l66xb *t7l66xb = dev_get_drvdata(mmc->dev.parent);
138 tmio_core_mmc_clk_div(t7l66xb->scr + 0x200, 0, state);
141 /*--------------------------------------------------------------------------*/
143 static struct tmio_mmc_data t7166xb_mmc_data = {
145 .set_pwr = t7l66xb_mmc_pwr,
146 .set_clk_div = t7l66xb_mmc_clk_div,
149 static const struct resource t7l66xb_nand_resources[] = {
153 .flags = IORESOURCE_MEM,
158 .flags = IORESOURCE_MEM,
161 .start = IRQ_T7L66XB_NAND,
162 .end = IRQ_T7L66XB_NAND,
163 .flags = IORESOURCE_IRQ,
167 static struct mfd_cell t7l66xb_cells[] = {
168 [T7L66XB_CELL_MMC] = {
170 .enable = t7l66xb_mmc_enable,
171 .disable = t7l66xb_mmc_disable,
172 .platform_data = &t7166xb_mmc_data,
173 .pdata_size = sizeof(t7166xb_mmc_data),
174 .num_resources = ARRAY_SIZE(t7l66xb_mmc_resources),
175 .resources = t7l66xb_mmc_resources,
177 [T7L66XB_CELL_NAND] = {
179 .num_resources = ARRAY_SIZE(t7l66xb_nand_resources),
180 .resources = t7l66xb_nand_resources,
184 /*--------------------------------------------------------------------------*/
186 /* Handle the T7L66XB interrupt mux */
187 static void t7l66xb_irq(struct irq_desc *desc)
189 struct t7l66xb *t7l66xb = irq_desc_get_handler_data(desc);
191 unsigned int i, irq_base;
193 irq_base = t7l66xb->irq_base;
195 while ((isr = tmio_ioread8(t7l66xb->scr + SCR_ISR) &
196 ~tmio_ioread8(t7l66xb->scr + SCR_IMR)))
197 for (i = 0; i < T7L66XB_NR_IRQS; i++)
199 generic_handle_irq(irq_base + i);
202 static void t7l66xb_irq_mask(struct irq_data *data)
204 struct t7l66xb *t7l66xb = irq_data_get_irq_chip_data(data);
208 raw_spin_lock_irqsave(&t7l66xb->lock, flags);
209 imr = tmio_ioread8(t7l66xb->scr + SCR_IMR);
210 imr |= 1 << (data->irq - t7l66xb->irq_base);
211 tmio_iowrite8(imr, t7l66xb->scr + SCR_IMR);
212 raw_spin_unlock_irqrestore(&t7l66xb->lock, flags);
215 static void t7l66xb_irq_unmask(struct irq_data *data)
217 struct t7l66xb *t7l66xb = irq_data_get_irq_chip_data(data);
221 raw_spin_lock_irqsave(&t7l66xb->lock, flags);
222 imr = tmio_ioread8(t7l66xb->scr + SCR_IMR);
223 imr &= ~(1 << (data->irq - t7l66xb->irq_base));
224 tmio_iowrite8(imr, t7l66xb->scr + SCR_IMR);
225 raw_spin_unlock_irqrestore(&t7l66xb->lock, flags);
228 static struct irq_chip t7l66xb_chip = {
230 .irq_ack = t7l66xb_irq_mask,
231 .irq_mask = t7l66xb_irq_mask,
232 .irq_unmask = t7l66xb_irq_unmask,
235 /*--------------------------------------------------------------------------*/
237 /* Install the IRQ handler */
238 static void t7l66xb_attach_irq(struct platform_device *dev)
240 struct t7l66xb *t7l66xb = platform_get_drvdata(dev);
241 unsigned int irq, irq_base;
243 irq_base = t7l66xb->irq_base;
245 for (irq = irq_base; irq < irq_base + T7L66XB_NR_IRQS; irq++) {
246 irq_set_chip_and_handler(irq, &t7l66xb_chip, handle_level_irq);
247 irq_set_chip_data(irq, t7l66xb);
250 irq_set_irq_type(t7l66xb->irq, IRQ_TYPE_EDGE_FALLING);
251 irq_set_chained_handler_and_data(t7l66xb->irq, t7l66xb_irq, t7l66xb);
254 static void t7l66xb_detach_irq(struct platform_device *dev)
256 struct t7l66xb *t7l66xb = platform_get_drvdata(dev);
257 unsigned int irq, irq_base;
259 irq_base = t7l66xb->irq_base;
261 irq_set_chained_handler_and_data(t7l66xb->irq, NULL, NULL);
263 for (irq = irq_base; irq < irq_base + T7L66XB_NR_IRQS; irq++) {
264 irq_set_chip(irq, NULL);
265 irq_set_chip_data(irq, NULL);
269 /*--------------------------------------------------------------------------*/
272 static int t7l66xb_suspend(struct platform_device *dev, pm_message_t state)
274 struct t7l66xb *t7l66xb = platform_get_drvdata(dev);
275 struct t7l66xb_platform_data *pdata = dev_get_platdata(&dev->dev);
277 if (pdata && pdata->suspend)
279 clk_disable_unprepare(t7l66xb->clk48m);
284 static int t7l66xb_resume(struct platform_device *dev)
286 struct t7l66xb *t7l66xb = platform_get_drvdata(dev);
287 struct t7l66xb_platform_data *pdata = dev_get_platdata(&dev->dev);
290 ret = clk_prepare_enable(t7l66xb->clk48m);
294 if (pdata && pdata->resume)
297 tmio_core_mmc_enable(t7l66xb->scr + 0x200, 0,
298 t7l66xb_mmc_resources[0].start & 0xfffe);
303 #define t7l66xb_suspend NULL
304 #define t7l66xb_resume NULL
307 /*--------------------------------------------------------------------------*/
309 static int t7l66xb_probe(struct platform_device *dev)
311 struct t7l66xb_platform_data *pdata = dev_get_platdata(&dev->dev);
312 struct t7l66xb *t7l66xb;
313 struct resource *iomem, *rscr;
319 iomem = platform_get_resource(dev, IORESOURCE_MEM, 0);
323 t7l66xb = kzalloc(sizeof *t7l66xb, GFP_KERNEL);
327 raw_spin_lock_init(&t7l66xb->lock);
329 platform_set_drvdata(dev, t7l66xb);
331 ret = platform_get_irq(dev, 0);
337 t7l66xb->irq_base = pdata->irq_base;
339 t7l66xb->clk32k = clk_get(&dev->dev, "CLK_CK32K");
340 if (IS_ERR(t7l66xb->clk32k)) {
341 ret = PTR_ERR(t7l66xb->clk32k);
345 t7l66xb->clk48m = clk_get(&dev->dev, "CLK_CK48M");
346 if (IS_ERR(t7l66xb->clk48m)) {
347 ret = PTR_ERR(t7l66xb->clk48m);
351 rscr = &t7l66xb->rscr;
352 rscr->name = "t7l66xb-core";
353 rscr->start = iomem->start;
354 rscr->end = iomem->start + 0xff;
355 rscr->flags = IORESOURCE_MEM;
357 ret = request_resource(iomem, rscr);
359 goto err_request_scr;
361 t7l66xb->scr = ioremap(rscr->start, resource_size(rscr));
367 ret = clk_prepare_enable(t7l66xb->clk48m);
374 /* Mask all interrupts */
375 tmio_iowrite8(0xbf, t7l66xb->scr + SCR_IMR);
377 printk(KERN_INFO "%s rev %d @ 0x%08lx, irq %d\n",
378 dev->name, tmio_ioread8(t7l66xb->scr + SCR_REVID),
379 (unsigned long)iomem->start, t7l66xb->irq);
381 t7l66xb_attach_irq(dev);
383 t7l66xb_cells[T7L66XB_CELL_NAND].platform_data = pdata->nand_data;
384 t7l66xb_cells[T7L66XB_CELL_NAND].pdata_size = sizeof(*pdata->nand_data);
386 ret = mfd_add_devices(&dev->dev, dev->id,
387 t7l66xb_cells, ARRAY_SIZE(t7l66xb_cells),
388 iomem, t7l66xb->irq_base, NULL);
393 t7l66xb_detach_irq(dev);
394 clk_disable_unprepare(t7l66xb->clk48m);
396 iounmap(t7l66xb->scr);
398 release_resource(&t7l66xb->rscr);
400 clk_put(t7l66xb->clk48m);
402 clk_put(t7l66xb->clk32k);
409 static int t7l66xb_remove(struct platform_device *dev)
411 struct t7l66xb_platform_data *pdata = dev_get_platdata(&dev->dev);
412 struct t7l66xb *t7l66xb = platform_get_drvdata(dev);
415 ret = pdata->disable(dev);
416 clk_disable_unprepare(t7l66xb->clk48m);
417 clk_put(t7l66xb->clk48m);
418 clk_disable_unprepare(t7l66xb->clk32k);
419 clk_put(t7l66xb->clk32k);
420 t7l66xb_detach_irq(dev);
421 iounmap(t7l66xb->scr);
422 release_resource(&t7l66xb->rscr);
423 mfd_remove_devices(&dev->dev);
430 static struct platform_driver t7l66xb_platform_driver = {
434 .suspend = t7l66xb_suspend,
435 .resume = t7l66xb_resume,
436 .probe = t7l66xb_probe,
437 .remove = t7l66xb_remove,
440 /*--------------------------------------------------------------------------*/
442 module_platform_driver(t7l66xb_platform_driver);
444 MODULE_DESCRIPTION("Toshiba T7L66XB core driver");
445 MODULE_LICENSE("GPL v2");
446 MODULE_AUTHOR("Ian Molton");
447 MODULE_ALIAS("platform:t7l66xb");