2 * ST Microelectronics MFD: stmpe's driver
4 * Copyright (C) ST-Ericsson SA 2010
6 * License Terms: GNU General Public License, version 2
7 * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
10 #include <linux/gpio.h>
11 #include <linux/export.h>
12 #include <linux/kernel.h>
13 #include <linux/interrupt.h>
14 #include <linux/irq.h>
16 #include <linux/slab.h>
17 #include <linux/mfd/core.h>
20 static int __stmpe_enable(struct stmpe *stmpe, unsigned int blocks)
22 return stmpe->variant->enable(stmpe, blocks, true);
25 static int __stmpe_disable(struct stmpe *stmpe, unsigned int blocks)
27 return stmpe->variant->enable(stmpe, blocks, false);
30 static int __stmpe_reg_read(struct stmpe *stmpe, u8 reg)
34 ret = stmpe->ci->read_byte(stmpe, reg);
36 dev_err(stmpe->dev, "failed to read reg %#x: %d\n", reg, ret);
38 dev_vdbg(stmpe->dev, "rd: reg %#x => data %#x\n", reg, ret);
43 static int __stmpe_reg_write(struct stmpe *stmpe, u8 reg, u8 val)
47 dev_vdbg(stmpe->dev, "wr: reg %#x <= %#x\n", reg, val);
49 ret = stmpe->ci->write_byte(stmpe, reg, val);
51 dev_err(stmpe->dev, "failed to write reg %#x: %d\n", reg, ret);
56 static int __stmpe_set_bits(struct stmpe *stmpe, u8 reg, u8 mask, u8 val)
60 ret = __stmpe_reg_read(stmpe, reg);
67 return __stmpe_reg_write(stmpe, reg, ret);
70 static int __stmpe_block_read(struct stmpe *stmpe, u8 reg, u8 length,
75 ret = stmpe->ci->read_block(stmpe, reg, length, values);
77 dev_err(stmpe->dev, "failed to read regs %#x: %d\n", reg, ret);
79 dev_vdbg(stmpe->dev, "rd: reg %#x (%d) => ret %#x\n", reg, length, ret);
80 stmpe_dump_bytes("stmpe rd: ", values, length);
85 static int __stmpe_block_write(struct stmpe *stmpe, u8 reg, u8 length,
90 dev_vdbg(stmpe->dev, "wr: regs %#x (%d)\n", reg, length);
91 stmpe_dump_bytes("stmpe wr: ", values, length);
93 ret = stmpe->ci->write_block(stmpe, reg, length, values);
95 dev_err(stmpe->dev, "failed to write regs %#x: %d\n", reg, ret);
101 * stmpe_enable - enable blocks on an STMPE device
102 * @stmpe: Device to work on
103 * @blocks: Mask of blocks (enum stmpe_block values) to enable
105 int stmpe_enable(struct stmpe *stmpe, unsigned int blocks)
109 mutex_lock(&stmpe->lock);
110 ret = __stmpe_enable(stmpe, blocks);
111 mutex_unlock(&stmpe->lock);
115 EXPORT_SYMBOL_GPL(stmpe_enable);
118 * stmpe_disable - disable blocks on an STMPE device
119 * @stmpe: Device to work on
120 * @blocks: Mask of blocks (enum stmpe_block values) to enable
122 int stmpe_disable(struct stmpe *stmpe, unsigned int blocks)
126 mutex_lock(&stmpe->lock);
127 ret = __stmpe_disable(stmpe, blocks);
128 mutex_unlock(&stmpe->lock);
132 EXPORT_SYMBOL_GPL(stmpe_disable);
135 * stmpe_reg_read() - read a single STMPE register
136 * @stmpe: Device to read from
137 * @reg: Register to read
139 int stmpe_reg_read(struct stmpe *stmpe, u8 reg)
143 mutex_lock(&stmpe->lock);
144 ret = __stmpe_reg_read(stmpe, reg);
145 mutex_unlock(&stmpe->lock);
149 EXPORT_SYMBOL_GPL(stmpe_reg_read);
152 * stmpe_reg_write() - write a single STMPE register
153 * @stmpe: Device to write to
154 * @reg: Register to write
155 * @val: Value to write
157 int stmpe_reg_write(struct stmpe *stmpe, u8 reg, u8 val)
161 mutex_lock(&stmpe->lock);
162 ret = __stmpe_reg_write(stmpe, reg, val);
163 mutex_unlock(&stmpe->lock);
167 EXPORT_SYMBOL_GPL(stmpe_reg_write);
170 * stmpe_set_bits() - set the value of a bitfield in a STMPE register
171 * @stmpe: Device to write to
172 * @reg: Register to write
173 * @mask: Mask of bits to set
176 int stmpe_set_bits(struct stmpe *stmpe, u8 reg, u8 mask, u8 val)
180 mutex_lock(&stmpe->lock);
181 ret = __stmpe_set_bits(stmpe, reg, mask, val);
182 mutex_unlock(&stmpe->lock);
186 EXPORT_SYMBOL_GPL(stmpe_set_bits);
189 * stmpe_block_read() - read multiple STMPE registers
190 * @stmpe: Device to read from
191 * @reg: First register
192 * @length: Number of registers
193 * @values: Buffer to write to
195 int stmpe_block_read(struct stmpe *stmpe, u8 reg, u8 length, u8 *values)
199 mutex_lock(&stmpe->lock);
200 ret = __stmpe_block_read(stmpe, reg, length, values);
201 mutex_unlock(&stmpe->lock);
205 EXPORT_SYMBOL_GPL(stmpe_block_read);
208 * stmpe_block_write() - write multiple STMPE registers
209 * @stmpe: Device to write to
210 * @reg: First register
211 * @length: Number of registers
212 * @values: Values to write
214 int stmpe_block_write(struct stmpe *stmpe, u8 reg, u8 length,
219 mutex_lock(&stmpe->lock);
220 ret = __stmpe_block_write(stmpe, reg, length, values);
221 mutex_unlock(&stmpe->lock);
225 EXPORT_SYMBOL_GPL(stmpe_block_write);
228 * stmpe_set_altfunc()- set the alternate function for STMPE pins
229 * @stmpe: Device to configure
230 * @pins: Bitmask of pins to affect
231 * @block: block to enable alternate functions for
233 * @pins is assumed to have a bit set for each of the bits whose alternate
234 * function is to be changed, numbered according to the GPIOXY numbers.
236 * If the GPIO module is not enabled, this function automatically enables it in
237 * order to perform the change.
239 int stmpe_set_altfunc(struct stmpe *stmpe, u32 pins, enum stmpe_block block)
241 struct stmpe_variant_info *variant = stmpe->variant;
242 u8 regaddr = stmpe->regs[STMPE_IDX_GPAFR_U_MSB];
243 int af_bits = variant->af_bits;
244 int numregs = DIV_ROUND_UP(stmpe->num_gpios * af_bits, 8);
245 int mask = (1 << af_bits) - 1;
247 int af, afperreg, ret;
249 if (!variant->get_altfunc)
252 afperreg = 8 / af_bits;
253 mutex_lock(&stmpe->lock);
255 ret = __stmpe_enable(stmpe, STMPE_BLOCK_GPIO);
259 ret = __stmpe_block_read(stmpe, regaddr, numregs, regs);
263 af = variant->get_altfunc(stmpe, block);
266 int pin = __ffs(pins);
267 int regoffset = numregs - (pin / afperreg) - 1;
268 int pos = (pin % afperreg) * (8 / afperreg);
270 regs[regoffset] &= ~(mask << pos);
271 regs[regoffset] |= af << pos;
276 ret = __stmpe_block_write(stmpe, regaddr, numregs, regs);
279 mutex_unlock(&stmpe->lock);
282 EXPORT_SYMBOL_GPL(stmpe_set_altfunc);
285 * GPIO (all variants)
288 static struct resource stmpe_gpio_resources[] = {
289 /* Start and end filled dynamically */
291 .flags = IORESOURCE_IRQ,
295 static struct mfd_cell stmpe_gpio_cell = {
296 .name = "stmpe-gpio",
297 .resources = stmpe_gpio_resources,
298 .num_resources = ARRAY_SIZE(stmpe_gpio_resources),
302 * Keypad (1601, 2401, 2403)
305 static struct resource stmpe_keypad_resources[] = {
310 .flags = IORESOURCE_IRQ,
313 .name = "KEYPAD_OVER",
316 .flags = IORESOURCE_IRQ,
320 static struct mfd_cell stmpe_keypad_cell = {
321 .name = "stmpe-keypad",
322 .resources = stmpe_keypad_resources,
323 .num_resources = ARRAY_SIZE(stmpe_keypad_resources),
329 static const u8 stmpe801_regs[] = {
330 [STMPE_IDX_CHIP_ID] = STMPE801_REG_CHIP_ID,
331 [STMPE_IDX_ICR_LSB] = STMPE801_REG_SYS_CTRL,
332 [STMPE_IDX_GPMR_LSB] = STMPE801_REG_GPIO_MP_STA,
333 [STMPE_IDX_GPSR_LSB] = STMPE801_REG_GPIO_SET_PIN,
334 [STMPE_IDX_GPCR_LSB] = STMPE801_REG_GPIO_SET_PIN,
335 [STMPE_IDX_GPDR_LSB] = STMPE801_REG_GPIO_DIR,
336 [STMPE_IDX_IEGPIOR_LSB] = STMPE801_REG_GPIO_INT_EN,
337 [STMPE_IDX_ISGPIOR_MSB] = STMPE801_REG_GPIO_INT_STA,
341 static struct stmpe_variant_block stmpe801_blocks[] = {
343 .cell = &stmpe_gpio_cell,
345 .block = STMPE_BLOCK_GPIO,
349 static int stmpe801_enable(struct stmpe *stmpe, unsigned int blocks,
352 if (blocks & STMPE_BLOCK_GPIO)
358 static struct stmpe_variant_info stmpe801 = {
360 .id_val = STMPE801_ID,
363 .regs = stmpe801_regs,
364 .blocks = stmpe801_blocks,
365 .num_blocks = ARRAY_SIZE(stmpe801_blocks),
366 .num_irqs = STMPE801_NR_INTERNAL_IRQS,
367 .enable = stmpe801_enable,
371 * Touchscreen (STMPE811 or STMPE610)
374 static struct resource stmpe_ts_resources[] = {
379 .flags = IORESOURCE_IRQ,
385 .flags = IORESOURCE_IRQ,
389 static struct mfd_cell stmpe_ts_cell = {
391 .resources = stmpe_ts_resources,
392 .num_resources = ARRAY_SIZE(stmpe_ts_resources),
396 * STMPE811 or STMPE610
399 static const u8 stmpe811_regs[] = {
400 [STMPE_IDX_CHIP_ID] = STMPE811_REG_CHIP_ID,
401 [STMPE_IDX_ICR_LSB] = STMPE811_REG_INT_CTRL,
402 [STMPE_IDX_IER_LSB] = STMPE811_REG_INT_EN,
403 [STMPE_IDX_ISR_MSB] = STMPE811_REG_INT_STA,
404 [STMPE_IDX_GPMR_LSB] = STMPE811_REG_GPIO_MP_STA,
405 [STMPE_IDX_GPSR_LSB] = STMPE811_REG_GPIO_SET_PIN,
406 [STMPE_IDX_GPCR_LSB] = STMPE811_REG_GPIO_CLR_PIN,
407 [STMPE_IDX_GPDR_LSB] = STMPE811_REG_GPIO_DIR,
408 [STMPE_IDX_GPRER_LSB] = STMPE811_REG_GPIO_RE,
409 [STMPE_IDX_GPFER_LSB] = STMPE811_REG_GPIO_FE,
410 [STMPE_IDX_GPAFR_U_MSB] = STMPE811_REG_GPIO_AF,
411 [STMPE_IDX_IEGPIOR_LSB] = STMPE811_REG_GPIO_INT_EN,
412 [STMPE_IDX_ISGPIOR_MSB] = STMPE811_REG_GPIO_INT_STA,
413 [STMPE_IDX_GPEDR_MSB] = STMPE811_REG_GPIO_ED,
416 static struct stmpe_variant_block stmpe811_blocks[] = {
418 .cell = &stmpe_gpio_cell,
419 .irq = STMPE811_IRQ_GPIOC,
420 .block = STMPE_BLOCK_GPIO,
423 .cell = &stmpe_ts_cell,
424 .irq = STMPE811_IRQ_TOUCH_DET,
425 .block = STMPE_BLOCK_TOUCHSCREEN,
429 static int stmpe811_enable(struct stmpe *stmpe, unsigned int blocks,
432 unsigned int mask = 0;
434 if (blocks & STMPE_BLOCK_GPIO)
435 mask |= STMPE811_SYS_CTRL2_GPIO_OFF;
437 if (blocks & STMPE_BLOCK_ADC)
438 mask |= STMPE811_SYS_CTRL2_ADC_OFF;
440 if (blocks & STMPE_BLOCK_TOUCHSCREEN)
441 mask |= STMPE811_SYS_CTRL2_TSC_OFF;
443 return __stmpe_set_bits(stmpe, STMPE811_REG_SYS_CTRL2, mask,
447 static int stmpe811_get_altfunc(struct stmpe *stmpe, enum stmpe_block block)
449 /* 0 for touchscreen, 1 for GPIO */
450 return block != STMPE_BLOCK_TOUCHSCREEN;
453 static struct stmpe_variant_info stmpe811 = {
459 .regs = stmpe811_regs,
460 .blocks = stmpe811_blocks,
461 .num_blocks = ARRAY_SIZE(stmpe811_blocks),
462 .num_irqs = STMPE811_NR_INTERNAL_IRQS,
463 .enable = stmpe811_enable,
464 .get_altfunc = stmpe811_get_altfunc,
467 /* Similar to 811, except number of gpios */
468 static struct stmpe_variant_info stmpe610 = {
474 .regs = stmpe811_regs,
475 .blocks = stmpe811_blocks,
476 .num_blocks = ARRAY_SIZE(stmpe811_blocks),
477 .num_irqs = STMPE811_NR_INTERNAL_IRQS,
478 .enable = stmpe811_enable,
479 .get_altfunc = stmpe811_get_altfunc,
486 static const u8 stmpe1601_regs[] = {
487 [STMPE_IDX_CHIP_ID] = STMPE1601_REG_CHIP_ID,
488 [STMPE_IDX_ICR_LSB] = STMPE1601_REG_ICR_LSB,
489 [STMPE_IDX_IER_LSB] = STMPE1601_REG_IER_LSB,
490 [STMPE_IDX_ISR_MSB] = STMPE1601_REG_ISR_MSB,
491 [STMPE_IDX_GPMR_LSB] = STMPE1601_REG_GPIO_MP_LSB,
492 [STMPE_IDX_GPSR_LSB] = STMPE1601_REG_GPIO_SET_LSB,
493 [STMPE_IDX_GPCR_LSB] = STMPE1601_REG_GPIO_CLR_LSB,
494 [STMPE_IDX_GPDR_LSB] = STMPE1601_REG_GPIO_SET_DIR_LSB,
495 [STMPE_IDX_GPRER_LSB] = STMPE1601_REG_GPIO_RE_LSB,
496 [STMPE_IDX_GPFER_LSB] = STMPE1601_REG_GPIO_FE_LSB,
497 [STMPE_IDX_GPAFR_U_MSB] = STMPE1601_REG_GPIO_AF_U_MSB,
498 [STMPE_IDX_IEGPIOR_LSB] = STMPE1601_REG_INT_EN_GPIO_MASK_LSB,
499 [STMPE_IDX_ISGPIOR_MSB] = STMPE1601_REG_INT_STA_GPIO_MSB,
500 [STMPE_IDX_GPEDR_MSB] = STMPE1601_REG_GPIO_ED_MSB,
503 static struct stmpe_variant_block stmpe1601_blocks[] = {
505 .cell = &stmpe_gpio_cell,
506 .irq = STMPE24XX_IRQ_GPIOC,
507 .block = STMPE_BLOCK_GPIO,
510 .cell = &stmpe_keypad_cell,
511 .irq = STMPE24XX_IRQ_KEYPAD,
512 .block = STMPE_BLOCK_KEYPAD,
516 /* supported autosleep timeout delay (in msecs) */
517 static const int stmpe_autosleep_delay[] = {
518 4, 16, 32, 64, 128, 256, 512, 1024,
521 static int stmpe_round_timeout(int timeout)
525 for (i = 0; i < ARRAY_SIZE(stmpe_autosleep_delay); i++) {
526 if (stmpe_autosleep_delay[i] >= timeout)
531 * requests for delays longer than supported should not return the
532 * longest supported delay
537 static int stmpe_autosleep(struct stmpe *stmpe, int autosleep_timeout)
541 if (!stmpe->variant->enable_autosleep)
544 mutex_lock(&stmpe->lock);
545 ret = stmpe->variant->enable_autosleep(stmpe, autosleep_timeout);
546 mutex_unlock(&stmpe->lock);
552 * Both stmpe 1601/2403 support same layout for autosleep
554 static int stmpe1601_autosleep(struct stmpe *stmpe,
555 int autosleep_timeout)
559 /* choose the best available timeout */
560 timeout = stmpe_round_timeout(autosleep_timeout);
562 dev_err(stmpe->dev, "invalid timeout\n");
566 ret = __stmpe_set_bits(stmpe, STMPE1601_REG_SYS_CTRL2,
567 STMPE1601_AUTOSLEEP_TIMEOUT_MASK,
572 return __stmpe_set_bits(stmpe, STMPE1601_REG_SYS_CTRL2,
573 STPME1601_AUTOSLEEP_ENABLE,
574 STPME1601_AUTOSLEEP_ENABLE);
577 static int stmpe1601_enable(struct stmpe *stmpe, unsigned int blocks,
580 unsigned int mask = 0;
582 if (blocks & STMPE_BLOCK_GPIO)
583 mask |= STMPE1601_SYS_CTRL_ENABLE_GPIO;
585 if (blocks & STMPE_BLOCK_KEYPAD)
586 mask |= STMPE1601_SYS_CTRL_ENABLE_KPC;
588 return __stmpe_set_bits(stmpe, STMPE1601_REG_SYS_CTRL, mask,
592 static int stmpe1601_get_altfunc(struct stmpe *stmpe, enum stmpe_block block)
595 case STMPE_BLOCK_PWM:
598 case STMPE_BLOCK_KEYPAD:
601 case STMPE_BLOCK_GPIO:
607 static struct stmpe_variant_info stmpe1601 = {
610 .id_mask = 0xfff0, /* at least 0x0210 and 0x0212 */
613 .regs = stmpe1601_regs,
614 .blocks = stmpe1601_blocks,
615 .num_blocks = ARRAY_SIZE(stmpe1601_blocks),
616 .num_irqs = STMPE1601_NR_INTERNAL_IRQS,
617 .enable = stmpe1601_enable,
618 .get_altfunc = stmpe1601_get_altfunc,
619 .enable_autosleep = stmpe1601_autosleep,
626 static const u8 stmpe24xx_regs[] = {
627 [STMPE_IDX_CHIP_ID] = STMPE24XX_REG_CHIP_ID,
628 [STMPE_IDX_ICR_LSB] = STMPE24XX_REG_ICR_LSB,
629 [STMPE_IDX_IER_LSB] = STMPE24XX_REG_IER_LSB,
630 [STMPE_IDX_ISR_MSB] = STMPE24XX_REG_ISR_MSB,
631 [STMPE_IDX_GPMR_LSB] = STMPE24XX_REG_GPMR_LSB,
632 [STMPE_IDX_GPSR_LSB] = STMPE24XX_REG_GPSR_LSB,
633 [STMPE_IDX_GPCR_LSB] = STMPE24XX_REG_GPCR_LSB,
634 [STMPE_IDX_GPDR_LSB] = STMPE24XX_REG_GPDR_LSB,
635 [STMPE_IDX_GPRER_LSB] = STMPE24XX_REG_GPRER_LSB,
636 [STMPE_IDX_GPFER_LSB] = STMPE24XX_REG_GPFER_LSB,
637 [STMPE_IDX_GPAFR_U_MSB] = STMPE24XX_REG_GPAFR_U_MSB,
638 [STMPE_IDX_IEGPIOR_LSB] = STMPE24XX_REG_IEGPIOR_LSB,
639 [STMPE_IDX_ISGPIOR_MSB] = STMPE24XX_REG_ISGPIOR_MSB,
640 [STMPE_IDX_GPEDR_MSB] = STMPE24XX_REG_GPEDR_MSB,
643 static struct stmpe_variant_block stmpe24xx_blocks[] = {
645 .cell = &stmpe_gpio_cell,
646 .irq = STMPE24XX_IRQ_GPIOC,
647 .block = STMPE_BLOCK_GPIO,
650 .cell = &stmpe_keypad_cell,
651 .irq = STMPE24XX_IRQ_KEYPAD,
652 .block = STMPE_BLOCK_KEYPAD,
656 static int stmpe24xx_enable(struct stmpe *stmpe, unsigned int blocks,
659 unsigned int mask = 0;
661 if (blocks & STMPE_BLOCK_GPIO)
662 mask |= STMPE24XX_SYS_CTRL_ENABLE_GPIO;
664 if (blocks & STMPE_BLOCK_KEYPAD)
665 mask |= STMPE24XX_SYS_CTRL_ENABLE_KPC;
667 return __stmpe_set_bits(stmpe, STMPE24XX_REG_SYS_CTRL, mask,
671 static int stmpe24xx_get_altfunc(struct stmpe *stmpe, enum stmpe_block block)
674 case STMPE_BLOCK_ROTATOR:
677 case STMPE_BLOCK_KEYPAD:
680 case STMPE_BLOCK_GPIO:
686 static struct stmpe_variant_info stmpe2401 = {
692 .regs = stmpe24xx_regs,
693 .blocks = stmpe24xx_blocks,
694 .num_blocks = ARRAY_SIZE(stmpe24xx_blocks),
695 .num_irqs = STMPE24XX_NR_INTERNAL_IRQS,
696 .enable = stmpe24xx_enable,
697 .get_altfunc = stmpe24xx_get_altfunc,
700 static struct stmpe_variant_info stmpe2403 = {
706 .regs = stmpe24xx_regs,
707 .blocks = stmpe24xx_blocks,
708 .num_blocks = ARRAY_SIZE(stmpe24xx_blocks),
709 .num_irqs = STMPE24XX_NR_INTERNAL_IRQS,
710 .enable = stmpe24xx_enable,
711 .get_altfunc = stmpe24xx_get_altfunc,
712 .enable_autosleep = stmpe1601_autosleep, /* same as stmpe1601 */
715 static struct stmpe_variant_info *stmpe_variant_info[] = {
716 [STMPE610] = &stmpe610,
717 [STMPE801] = &stmpe801,
718 [STMPE811] = &stmpe811,
719 [STMPE1601] = &stmpe1601,
720 [STMPE2401] = &stmpe2401,
721 [STMPE2403] = &stmpe2403,
724 static irqreturn_t stmpe_irq(int irq, void *data)
726 struct stmpe *stmpe = data;
727 struct stmpe_variant_info *variant = stmpe->variant;
728 int num = DIV_ROUND_UP(variant->num_irqs, 8);
729 u8 israddr = stmpe->regs[STMPE_IDX_ISR_MSB];
734 if (variant->id_val == STMPE801_ID) {
735 handle_nested_irq(stmpe->irq_base);
739 ret = stmpe_block_read(stmpe, israddr, num, isr);
743 for (i = 0; i < num; i++) {
744 int bank = num - i - 1;
748 status &= stmpe->ier[bank];
754 int bit = __ffs(status);
755 int line = bank * 8 + bit;
757 handle_nested_irq(stmpe->irq_base + line);
758 status &= ~(1 << bit);
761 stmpe_reg_write(stmpe, israddr + i, clear);
767 static void stmpe_irq_lock(struct irq_data *data)
769 struct stmpe *stmpe = irq_data_get_irq_chip_data(data);
771 mutex_lock(&stmpe->irq_lock);
774 static void stmpe_irq_sync_unlock(struct irq_data *data)
776 struct stmpe *stmpe = irq_data_get_irq_chip_data(data);
777 struct stmpe_variant_info *variant = stmpe->variant;
778 int num = DIV_ROUND_UP(variant->num_irqs, 8);
781 for (i = 0; i < num; i++) {
782 u8 new = stmpe->ier[i];
783 u8 old = stmpe->oldier[i];
788 stmpe->oldier[i] = new;
789 stmpe_reg_write(stmpe, stmpe->regs[STMPE_IDX_IER_LSB] - i, new);
792 mutex_unlock(&stmpe->irq_lock);
795 static void stmpe_irq_mask(struct irq_data *data)
797 struct stmpe *stmpe = irq_data_get_irq_chip_data(data);
798 int offset = data->irq - stmpe->irq_base;
799 int regoffset = offset / 8;
800 int mask = 1 << (offset % 8);
802 stmpe->ier[regoffset] &= ~mask;
805 static void stmpe_irq_unmask(struct irq_data *data)
807 struct stmpe *stmpe = irq_data_get_irq_chip_data(data);
808 int offset = data->irq - stmpe->irq_base;
809 int regoffset = offset / 8;
810 int mask = 1 << (offset % 8);
812 stmpe->ier[regoffset] |= mask;
815 static struct irq_chip stmpe_irq_chip = {
817 .irq_bus_lock = stmpe_irq_lock,
818 .irq_bus_sync_unlock = stmpe_irq_sync_unlock,
819 .irq_mask = stmpe_irq_mask,
820 .irq_unmask = stmpe_irq_unmask,
823 static int __devinit stmpe_irq_init(struct stmpe *stmpe)
825 struct irq_chip *chip = NULL;
826 int num_irqs = stmpe->variant->num_irqs;
827 int base = stmpe->irq_base;
830 if (stmpe->variant->id_val != STMPE801_ID)
831 chip = &stmpe_irq_chip;
833 for (irq = base; irq < base + num_irqs; irq++) {
834 irq_set_chip_data(irq, stmpe);
835 irq_set_chip_and_handler(irq, chip, handle_edge_irq);
836 irq_set_nested_thread(irq, 1);
838 set_irq_flags(irq, IRQF_VALID);
840 irq_set_noprobe(irq);
847 static void stmpe_irq_remove(struct stmpe *stmpe)
849 int num_irqs = stmpe->variant->num_irqs;
850 int base = stmpe->irq_base;
853 for (irq = base; irq < base + num_irqs; irq++) {
855 set_irq_flags(irq, 0);
857 irq_set_chip_and_handler(irq, NULL, NULL);
858 irq_set_chip_data(irq, NULL);
862 static int __devinit stmpe_chip_init(struct stmpe *stmpe)
864 unsigned int irq_trigger = stmpe->pdata->irq_trigger;
865 int autosleep_timeout = stmpe->pdata->autosleep_timeout;
866 struct stmpe_variant_info *variant = stmpe->variant;
872 ret = stmpe_block_read(stmpe, stmpe->regs[STMPE_IDX_CHIP_ID],
873 ARRAY_SIZE(data), data);
877 id = (data[0] << 8) | data[1];
878 if ((id & variant->id_mask) != variant->id_val) {
879 dev_err(stmpe->dev, "unknown chip id: %#x\n", id);
883 dev_info(stmpe->dev, "%s detected, chip id: %#x\n", variant->name, id);
885 /* Disable all modules -- subdrivers should enable what they need. */
886 ret = stmpe_disable(stmpe, ~0);
890 if (id == STMPE801_ID)
891 icr = STMPE801_REG_SYS_CTRL_INT_EN;
893 icr = STMPE_ICR_LSB_GIM;
895 /* STMPE801 doesn't support Edge interrupts */
896 if (id != STMPE801_ID) {
897 if (irq_trigger == IRQF_TRIGGER_FALLING ||
898 irq_trigger == IRQF_TRIGGER_RISING)
899 icr |= STMPE_ICR_LSB_EDGE;
902 if (irq_trigger == IRQF_TRIGGER_RISING ||
903 irq_trigger == IRQF_TRIGGER_HIGH) {
904 if (id == STMPE801_ID)
905 icr |= STMPE801_REG_SYS_CTRL_INT_HI;
907 icr |= STMPE_ICR_LSB_HIGH;
910 if (stmpe->pdata->irq_invert_polarity) {
911 if (id == STMPE801_ID)
912 icr ^= STMPE801_REG_SYS_CTRL_INT_HI;
914 icr ^= STMPE_ICR_LSB_HIGH;
917 if (stmpe->pdata->autosleep) {
918 ret = stmpe_autosleep(stmpe, autosleep_timeout);
923 return stmpe_reg_write(stmpe, stmpe->regs[STMPE_IDX_ICR_LSB], icr);
926 static int __devinit stmpe_add_device(struct stmpe *stmpe,
927 struct mfd_cell *cell, int irq)
929 return mfd_add_devices(stmpe->dev, stmpe->pdata->id, cell, 1,
930 NULL, stmpe->irq_base + irq);
933 static int __devinit stmpe_devices_init(struct stmpe *stmpe)
935 struct stmpe_variant_info *variant = stmpe->variant;
936 unsigned int platform_blocks = stmpe->pdata->blocks;
940 for (i = 0; i < variant->num_blocks; i++) {
941 struct stmpe_variant_block *block = &variant->blocks[i];
943 if (!(platform_blocks & block->block))
946 platform_blocks &= ~block->block;
947 ret = stmpe_add_device(stmpe, block->cell, block->irq);
954 "platform wants blocks (%#x) not present on variant",
960 /* Called from client specific probe routines */
961 int __devinit stmpe_probe(struct stmpe_client_info *ci, int partnum)
963 struct stmpe_platform_data *pdata = dev_get_platdata(ci->dev);
970 stmpe = kzalloc(sizeof(struct stmpe), GFP_KERNEL);
974 mutex_init(&stmpe->irq_lock);
975 mutex_init(&stmpe->lock);
977 stmpe->dev = ci->dev;
978 stmpe->client = ci->client;
979 stmpe->pdata = pdata;
980 stmpe->irq_base = pdata->irq_base;
982 stmpe->partnum = partnum;
983 stmpe->variant = stmpe_variant_info[partnum];
984 stmpe->regs = stmpe->variant->regs;
985 stmpe->num_gpios = stmpe->variant->num_gpios;
986 dev_set_drvdata(stmpe->dev, stmpe);
991 if (pdata->irq_over_gpio) {
992 ret = gpio_request_one(pdata->irq_gpio, GPIOF_DIR_IN, "stmpe");
994 dev_err(stmpe->dev, "failed to request IRQ GPIO: %d\n",
999 stmpe->irq = gpio_to_irq(pdata->irq_gpio);
1001 stmpe->irq = ci->irq;
1004 ret = stmpe_chip_init(stmpe);
1008 ret = stmpe_irq_init(stmpe);
1012 ret = request_threaded_irq(stmpe->irq, NULL, stmpe_irq,
1013 pdata->irq_trigger | IRQF_ONESHOT, "stmpe", stmpe);
1015 dev_err(stmpe->dev, "failed to request IRQ: %d\n", ret);
1019 ret = stmpe_devices_init(stmpe);
1021 dev_err(stmpe->dev, "failed to add children\n");
1022 goto out_removedevs;
1028 mfd_remove_devices(stmpe->dev);
1029 free_irq(stmpe->irq, stmpe);
1031 stmpe_irq_remove(stmpe);
1033 if (pdata->irq_over_gpio)
1034 gpio_free(pdata->irq_gpio);
1040 int stmpe_remove(struct stmpe *stmpe)
1042 mfd_remove_devices(stmpe->dev);
1044 free_irq(stmpe->irq, stmpe);
1045 stmpe_irq_remove(stmpe);
1047 if (stmpe->pdata->irq_over_gpio)
1048 gpio_free(stmpe->pdata->irq_gpio);
1056 static int stmpe_suspend(struct device *dev)
1058 struct stmpe *stmpe = dev_get_drvdata(dev);
1060 if (device_may_wakeup(dev))
1061 enable_irq_wake(stmpe->irq);
1066 static int stmpe_resume(struct device *dev)
1068 struct stmpe *stmpe = dev_get_drvdata(dev);
1070 if (device_may_wakeup(dev))
1071 disable_irq_wake(stmpe->irq);
1076 const struct dev_pm_ops stmpe_dev_pm_ops = {
1077 .suspend = stmpe_suspend,
1078 .resume = stmpe_resume,