drivers/mfd/qcom_rpm.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (c) 2014, Sony Mobile Communications AB.
   4  * Copyright (c) 2013, The Linux Foundation. All rights reserved.
   5  * Author: Bjorn Andersson <bjorn.andersson@sonymobile.com>
   6  */
   7
   8 #include <linux/module.h>
   9 #include <linux/platform_device.h>
  10 #include <linux/of_platform.h>
  11 #include <linux/io.h>
  12 #include <linux/interrupt.h>
  13 #include <linux/mfd/qcom_rpm.h>
  14 #include <linux/mfd/syscon.h>
  15 #include <linux/regmap.h>
  16 #include <linux/clk.h>
  17
  18 #include <dt-bindings/mfd/qcom-rpm.h>
  19
  20 struct qcom_rpm_resource {
  21         unsigned target_id;
  22         unsigned status_id;
  23         unsigned select_id;
  24         unsigned size;
  25 };
  26
  27 struct qcom_rpm_data {
  28         u32 version;
  29         const struct qcom_rpm_resource *resource_table;
  30         unsigned int n_resources;
  31         unsigned int req_ctx_off;
  32         unsigned int req_sel_off;
  33         unsigned int ack_ctx_off;
  34         unsigned int ack_sel_off;
  35         unsigned int req_sel_size;
  36         unsigned int ack_sel_size;
  37 };
  38
  39 struct qcom_rpm {
  40         struct device *dev;
  41         struct regmap *ipc_regmap;
  42         unsigned ipc_offset;
  43         unsigned ipc_bit;
  44         struct clk *ramclk;
  45
  46         struct completion ack;
  47         struct mutex lock;
  48
  49         void __iomem *status_regs;
  50         void __iomem *ctrl_regs;
  51         void __iomem *req_regs;
  52
  53         u32 ack_status;
  54
  55         const struct qcom_rpm_data *data;
  56 };
  57
  58 #define RPM_STATUS_REG(rpm, i)  ((rpm)->status_regs + (i) * 4)
  59 #define RPM_CTRL_REG(rpm, i)    ((rpm)->ctrl_regs + (i) * 4)
  60 #define RPM_REQ_REG(rpm, i)     ((rpm)->req_regs + (i) * 4)
  61
  62 #define RPM_REQUEST_TIMEOUT     (5 * HZ)
  63
  64 #define RPM_MAX_SEL_SIZE        7
  65
  66 #define RPM_NOTIFICATION        BIT(30)
  67 #define RPM_REJECTED            BIT(31)
  68
  69 static const struct qcom_rpm_resource apq8064_rpm_resource_table[] = {
  70         [QCOM_RPM_CXO_CLK] =                    { 25, 9, 5, 1 },
  71         [QCOM_RPM_PXO_CLK] =                    { 26, 10, 6, 1 },
  72         [QCOM_RPM_APPS_FABRIC_CLK] =            { 27, 11, 8, 1 },
  73         [QCOM_RPM_SYS_FABRIC_CLK] =             { 28, 12, 9, 1 },
  74         [QCOM_RPM_MM_FABRIC_CLK] =              { 29, 13, 10, 1 },
  75         [QCOM_RPM_DAYTONA_FABRIC_CLK] =         { 30, 14, 11, 1 },
  76         [QCOM_RPM_SFPB_CLK] =                   { 31, 15, 12, 1 },
  77         [QCOM_RPM_CFPB_CLK] =                   { 32, 16, 13, 1 },
  78         [QCOM_RPM_MMFPB_CLK] =                  { 33, 17, 14, 1 },
  79         [QCOM_RPM_EBI1_CLK] =                   { 34, 18, 16, 1 },
  80         [QCOM_RPM_APPS_FABRIC_HALT] =           { 35, 19, 18, 1 },
  81         [QCOM_RPM_APPS_FABRIC_MODE] =           { 37, 20, 19, 1 },
  82         [QCOM_RPM_APPS_FABRIC_IOCTL] =          { 40, 21, 20, 1 },
  83         [QCOM_RPM_APPS_FABRIC_ARB] =            { 41, 22, 21, 12 },
  84         [QCOM_RPM_SYS_FABRIC_HALT] =            { 53, 23, 22, 1 },
  85         [QCOM_RPM_SYS_FABRIC_MODE] =            { 55, 24, 23, 1 },
  86         [QCOM_RPM_SYS_FABRIC_IOCTL] =           { 58, 25, 24, 1 },
  87         [QCOM_RPM_SYS_FABRIC_ARB] =             { 59, 26, 25, 30 },
  88         [QCOM_RPM_MM_FABRIC_HALT] =             { 89, 27, 26, 1 },
  89         [QCOM_RPM_MM_FABRIC_MODE] =             { 91, 28, 27, 1 },
  90         [QCOM_RPM_MM_FABRIC_IOCTL] =            { 94, 29, 28, 1 },
  91         [QCOM_RPM_MM_FABRIC_ARB] =              { 95, 30, 29, 21 },
  92         [QCOM_RPM_PM8921_SMPS1] =               { 116, 31, 30, 2 },
  93         [QCOM_RPM_PM8921_SMPS2] =               { 118, 33, 31, 2 },
  94         [QCOM_RPM_PM8921_SMPS3] =               { 120, 35, 32, 2 },
  95         [QCOM_RPM_PM8921_SMPS4] =               { 122, 37, 33, 2 },
  96         [QCOM_RPM_PM8921_SMPS5] =               { 124, 39, 34, 2 },
  97         [QCOM_RPM_PM8921_SMPS6] =               { 126, 41, 35, 2 },
  98         [QCOM_RPM_PM8921_SMPS7] =               { 128, 43, 36, 2 },
  99         [QCOM_RPM_PM8921_SMPS8] =               { 130, 45, 37, 2 },
 100         [QCOM_RPM_PM8921_LDO1] =                { 132, 47, 38, 2 },
 101         [QCOM_RPM_PM8921_LDO2] =                { 134, 49, 39, 2 },
 102         [QCOM_RPM_PM8921_LDO3] =                { 136, 51, 40, 2 },
 103         [QCOM_RPM_PM8921_LDO4] =                { 138, 53, 41, 2 },
 104         [QCOM_RPM_PM8921_LDO5] =                { 140, 55, 42, 2 },
 105         [QCOM_RPM_PM8921_LDO6] =                { 142, 57, 43, 2 },
 106         [QCOM_RPM_PM8921_LDO7] =                { 144, 59, 44, 2 },
 107         [QCOM_RPM_PM8921_LDO8] =                { 146, 61, 45, 2 },
 108         [QCOM_RPM_PM8921_LDO9] =                { 148, 63, 46, 2 },
 109         [QCOM_RPM_PM8921_LDO10] =               { 150, 65, 47, 2 },
 110         [QCOM_RPM_PM8921_LDO11] =               { 152, 67, 48, 2 },
 111         [QCOM_RPM_PM8921_LDO12] =               { 154, 69, 49, 2 },
 112         [QCOM_RPM_PM8921_LDO13] =               { 156, 71, 50, 2 },
 113         [QCOM_RPM_PM8921_LDO14] =               { 158, 73, 51, 2 },
 114         [QCOM_RPM_PM8921_LDO15] =               { 160, 75, 52, 2 },
 115         [QCOM_RPM_PM8921_LDO16] =               { 162, 77, 53, 2 },
 116         [QCOM_RPM_PM8921_LDO17] =               { 164, 79, 54, 2 },
 117         [QCOM_RPM_PM8921_LDO18] =               { 166, 81, 55, 2 },
 118         [QCOM_RPM_PM8921_LDO19] =               { 168, 83, 56, 2 },
 119         [QCOM_RPM_PM8921_LDO20] =               { 170, 85, 57, 2 },
 120         [QCOM_RPM_PM8921_LDO21] =               { 172, 87, 58, 2 },
 121         [QCOM_RPM_PM8921_LDO22] =               { 174, 89, 59, 2 },
 122         [QCOM_RPM_PM8921_LDO23] =               { 176, 91, 60, 2 },
 123         [QCOM_RPM_PM8921_LDO24] =               { 178, 93, 61, 2 },
 124         [QCOM_RPM_PM8921_LDO25] =               { 180, 95, 62, 2 },
 125         [QCOM_RPM_PM8921_LDO26] =               { 182, 97, 63, 2 },
 126         [QCOM_RPM_PM8921_LDO27] =               { 184, 99, 64, 2 },
 127         [QCOM_RPM_PM8921_LDO28] =               { 186, 101, 65, 2 },
 128         [QCOM_RPM_PM8921_LDO29] =               { 188, 103, 66, 2 },
 129         [QCOM_RPM_PM8921_CLK1] =                { 190, 105, 67, 2 },
 130         [QCOM_RPM_PM8921_CLK2] =                { 192, 107, 68, 2 },
 131         [QCOM_RPM_PM8921_LVS1] =                { 194, 109, 69, 1 },
 132         [QCOM_RPM_PM8921_LVS2] =                { 195, 110, 70, 1 },
 133         [QCOM_RPM_PM8921_LVS3] =                { 196, 111, 71, 1 },
 134         [QCOM_RPM_PM8921_LVS4] =                { 197, 112, 72, 1 },
 135         [QCOM_RPM_PM8921_LVS5] =                { 198, 113, 73, 1 },
 136         [QCOM_RPM_PM8921_LVS6] =                { 199, 114, 74, 1 },
 137         [QCOM_RPM_PM8921_LVS7] =                { 200, 115, 75, 1 },
 138         [QCOM_RPM_PM8821_SMPS1] =               { 201, 116, 76, 2 },
 139         [QCOM_RPM_PM8821_SMPS2] =               { 203, 118, 77, 2 },
 140         [QCOM_RPM_PM8821_LDO1] =                { 205, 120, 78, 2 },
 141         [QCOM_RPM_PM8921_NCP] =                 { 207, 122, 80, 2 },
 142         [QCOM_RPM_CXO_BUFFERS] =                { 209, 124, 81, 1 },
 143         [QCOM_RPM_USB_OTG_SWITCH] =             { 210, 125, 82, 1 },
 144         [QCOM_RPM_HDMI_SWITCH] =                { 211, 126, 83, 1 },
 145         [QCOM_RPM_DDR_DMM] =                    { 212, 127, 84, 2 },
 146         [QCOM_RPM_QDSS_CLK] =                   { 214, ~0, 7, 1 },
 147         [QCOM_RPM_VDDMIN_GPIO] =                { 215, 131, 89, 1 },
 148 };
 149
 150 static const struct qcom_rpm_data apq8064_template = {
 151         .version = 3,
 152         .resource_table = apq8064_rpm_resource_table,
 153         .n_resources = ARRAY_SIZE(apq8064_rpm_resource_table),
 154         .req_ctx_off = 3,
 155         .req_sel_off = 11,
 156         .ack_ctx_off = 15,
 157         .ack_sel_off = 23,
 158         .req_sel_size = 4,
 159         .ack_sel_size = 7,
 160 };
 161
 162 static const struct qcom_rpm_resource msm8660_rpm_resource_table[] = {
 163         [QCOM_RPM_CXO_CLK] =                    { 32, 12, 5, 1 },
 164         [QCOM_RPM_PXO_CLK] =                    { 33, 13, 6, 1 },
 165         [QCOM_RPM_PLL_4] =                      { 34, 14, 7, 1 },
 166         [QCOM_RPM_APPS_FABRIC_CLK] =            { 35, 15, 8, 1 },
 167         [QCOM_RPM_SYS_FABRIC_CLK] =             { 36, 16, 9, 1 },
 168         [QCOM_RPM_MM_FABRIC_CLK] =              { 37, 17, 10, 1 },
 169         [QCOM_RPM_DAYTONA_FABRIC_CLK] =         { 38, 18, 11, 1 },
 170         [QCOM_RPM_SFPB_CLK] =                   { 39, 19, 12, 1 },
 171         [QCOM_RPM_CFPB_CLK] =                   { 40, 20, 13, 1 },
 172         [QCOM_RPM_MMFPB_CLK] =                  { 41, 21, 14, 1 },
 173         [QCOM_RPM_SMI_CLK] =                    { 42, 22, 15, 1 },
 174         [QCOM_RPM_EBI1_CLK] =                   { 43, 23, 16, 1 },
 175         [QCOM_RPM_APPS_L2_CACHE_CTL] =          { 44, 24, 17, 1 },
 176         [QCOM_RPM_APPS_FABRIC_HALT] =           { 45, 25, 18, 2 },
 177         [QCOM_RPM_APPS_FABRIC_MODE] =           { 47, 26, 19, 3 },
 178         [QCOM_RPM_APPS_FABRIC_ARB] =            { 51, 28, 21, 6 },
 179         [QCOM_RPM_SYS_FABRIC_HALT] =            { 63, 29, 22, 2 },
 180         [QCOM_RPM_SYS_FABRIC_MODE] =            { 65, 30, 23, 3 },
 181         [QCOM_RPM_SYS_FABRIC_ARB] =             { 69, 32, 25, 22 },
 182         [QCOM_RPM_MM_FABRIC_HALT] =             { 105, 33, 26, 2 },
 183         [QCOM_RPM_MM_FABRIC_MODE] =             { 107, 34, 27, 3 },
 184         [QCOM_RPM_MM_FABRIC_ARB] =              { 111, 36, 29, 23 },
 185         [QCOM_RPM_PM8901_SMPS0] =               { 134, 37, 30, 2 },
 186         [QCOM_RPM_PM8901_SMPS1] =               { 136, 39, 31, 2 },
 187         [QCOM_RPM_PM8901_SMPS2] =               { 138, 41, 32, 2 },
 188         [QCOM_RPM_PM8901_SMPS3] =               { 140, 43, 33, 2 },
 189         [QCOM_RPM_PM8901_SMPS4] =               { 142, 45, 34, 2 },
 190         [QCOM_RPM_PM8901_LDO0] =                { 144, 47, 35, 2 },
 191         [QCOM_RPM_PM8901_LDO1] =                { 146, 49, 36, 2 },
 192         [QCOM_RPM_PM8901_LDO2] =                { 148, 51, 37, 2 },
 193         [QCOM_RPM_PM8901_LDO3] =                { 150, 53, 38, 2 },
 194         [QCOM_RPM_PM8901_LDO4] =                { 152, 55, 39, 2 },
 195         [QCOM_RPM_PM8901_LDO5] =                { 154, 57, 40, 2 },
 196         [QCOM_RPM_PM8901_LDO6] =                { 156, 59, 41, 2 },
 197         [QCOM_RPM_PM8901_LVS0] =                { 158, 61, 42, 1 },
 198         [QCOM_RPM_PM8901_LVS1] =                { 159, 62, 43, 1 },
 199         [QCOM_RPM_PM8901_LVS2] =                { 160, 63, 44, 1 },
 200         [QCOM_RPM_PM8901_LVS3] =                { 161, 64, 45, 1 },
 201         [QCOM_RPM_PM8901_MVS] =                 { 162, 65, 46, 1 },
 202         [QCOM_RPM_PM8058_SMPS0] =               { 163, 66, 47, 2 },
 203         [QCOM_RPM_PM8058_SMPS1] =               { 165, 68, 48, 2 },
 204         [QCOM_RPM_PM8058_SMPS2] =               { 167, 70, 49, 2 },
 205         [QCOM_RPM_PM8058_SMPS3] =               { 169, 72, 50, 2 },
 206         [QCOM_RPM_PM8058_SMPS4] =               { 171, 74, 51, 2 },
 207         [QCOM_RPM_PM8058_LDO0] =                { 173, 76, 52, 2 },
 208         [QCOM_RPM_PM8058_LDO1] =                { 175, 78, 53, 2 },
 209         [QCOM_RPM_PM8058_LDO2] =                { 177, 80, 54, 2 },
 210         [QCOM_RPM_PM8058_LDO3] =                { 179, 82, 55, 2 },
 211         [QCOM_RPM_PM8058_LDO4] =                { 181, 84, 56, 2 },
 212         [QCOM_RPM_PM8058_LDO5] =                { 183, 86, 57, 2 },
 213         [QCOM_RPM_PM8058_LDO6] =                { 185, 88, 58, 2 },
 214         [QCOM_RPM_PM8058_LDO7] =                { 187, 90, 59, 2 },
 215         [QCOM_RPM_PM8058_LDO8] =                { 189, 92, 60, 2 },
 216         [QCOM_RPM_PM8058_LDO9] =                { 191, 94, 61, 2 },
 217         [QCOM_RPM_PM8058_LDO10] =               { 193, 96, 62, 2 },
 218         [QCOM_RPM_PM8058_LDO11] =               { 195, 98, 63, 2 },
 219         [QCOM_RPM_PM8058_LDO12] =               { 197, 100, 64, 2 },
 220         [QCOM_RPM_PM8058_LDO13] =               { 199, 102, 65, 2 },
 221         [QCOM_RPM_PM8058_LDO14] =               { 201, 104, 66, 2 },
 222         [QCOM_RPM_PM8058_LDO15] =               { 203, 106, 67, 2 },
 223         [QCOM_RPM_PM8058_LDO16] =               { 205, 108, 68, 2 },
 224         [QCOM_RPM_PM8058_LDO17] =               { 207, 110, 69, 2 },
 225         [QCOM_RPM_PM8058_LDO18] =               { 209, 112, 70, 2 },
 226         [QCOM_RPM_PM8058_LDO19] =               { 211, 114, 71, 2 },
 227         [QCOM_RPM_PM8058_LDO20] =               { 213, 116, 72, 2 },
 228         [QCOM_RPM_PM8058_LDO21] =               { 215, 118, 73, 2 },
 229         [QCOM_RPM_PM8058_LDO22] =               { 217, 120, 74, 2 },
 230         [QCOM_RPM_PM8058_LDO23] =               { 219, 122, 75, 2 },
 231         [QCOM_RPM_PM8058_LDO24] =               { 221, 124, 76, 2 },
 232         [QCOM_RPM_PM8058_LDO25] =               { 223, 126, 77, 2 },
 233         [QCOM_RPM_PM8058_LVS0] =                { 225, 128, 78, 1 },
 234         [QCOM_RPM_PM8058_LVS1] =                { 226, 129, 79, 1 },
 235         [QCOM_RPM_PM8058_NCP] =                 { 227, 130, 80, 2 },
 236         [QCOM_RPM_CXO_BUFFERS] =                { 229, 132, 81, 1 },
 237 };
 238
 239 static const struct qcom_rpm_data msm8660_template = {
 240         .version = 2,
 241         .resource_table = msm8660_rpm_resource_table,
 242         .n_resources = ARRAY_SIZE(msm8660_rpm_resource_table),
 243         .req_ctx_off = 3,
 244         .req_sel_off = 11,
 245         .ack_ctx_off = 19,
 246         .ack_sel_off = 27,
 247         .req_sel_size = 7,
 248         .ack_sel_size = 7,
 249 };
 250
 251 static const struct qcom_rpm_resource msm8960_rpm_resource_table[] = {
 252         [QCOM_RPM_CXO_CLK] =                    { 25, 9, 5, 1 },
 253         [QCOM_RPM_PXO_CLK] =                    { 26, 10, 6, 1 },
 254         [QCOM_RPM_APPS_FABRIC_CLK] =            { 27, 11, 8, 1 },
 255         [QCOM_RPM_SYS_FABRIC_CLK] =             { 28, 12, 9, 1 },
 256         [QCOM_RPM_MM_FABRIC_CLK] =              { 29, 13, 10, 1 },
 257         [QCOM_RPM_DAYTONA_FABRIC_CLK] =         { 30, 14, 11, 1 },
 258         [QCOM_RPM_SFPB_CLK] =                   { 31, 15, 12, 1 },
 259         [QCOM_RPM_CFPB_CLK] =                   { 32, 16, 13, 1 },
 260         [QCOM_RPM_MMFPB_CLK] =                  { 33, 17, 14, 1 },
 261         [QCOM_RPM_EBI1_CLK] =                   { 34, 18, 16, 1 },
 262         [QCOM_RPM_APPS_FABRIC_HALT] =           { 35, 19, 18, 1 },
 263         [QCOM_RPM_APPS_FABRIC_MODE] =           { 37, 20, 19, 1 },
 264         [QCOM_RPM_APPS_FABRIC_IOCTL] =          { 40, 21, 20, 1 },
 265         [QCOM_RPM_APPS_FABRIC_ARB] =            { 41, 22, 21, 12 },
 266         [QCOM_RPM_SYS_FABRIC_HALT] =            { 53, 23, 22, 1 },
 267         [QCOM_RPM_SYS_FABRIC_MODE] =            { 55, 24, 23, 1 },
 268         [QCOM_RPM_SYS_FABRIC_IOCTL] =           { 58, 25, 24, 1 },
 269         [QCOM_RPM_SYS_FABRIC_ARB] =             { 59, 26, 25, 29 },
 270         [QCOM_RPM_MM_FABRIC_HALT] =             { 88, 27, 26, 1 },
 271         [QCOM_RPM_MM_FABRIC_MODE] =             { 90, 28, 27, 1 },
 272         [QCOM_RPM_MM_FABRIC_IOCTL] =            { 93, 29, 28, 1 },
 273         [QCOM_RPM_MM_FABRIC_ARB] =              { 94, 30, 29, 23 },
 274         [QCOM_RPM_PM8921_SMPS1] =               { 117, 31, 30, 2 },
 275         [QCOM_RPM_PM8921_SMPS2] =               { 119, 33, 31, 2 },
 276         [QCOM_RPM_PM8921_SMPS3] =               { 121, 35, 32, 2 },
 277         [QCOM_RPM_PM8921_SMPS4] =               { 123, 37, 33, 2 },
 278         [QCOM_RPM_PM8921_SMPS5] =               { 125, 39, 34, 2 },
 279         [QCOM_RPM_PM8921_SMPS6] =               { 127, 41, 35, 2 },
 280         [QCOM_RPM_PM8921_SMPS7] =               { 129, 43, 36, 2 },
 281         [QCOM_RPM_PM8921_SMPS8] =               { 131, 45, 37, 2 },
 282         [QCOM_RPM_PM8921_LDO1] =                { 133, 47, 38, 2 },
 283         [QCOM_RPM_PM8921_LDO2] =                { 135, 49, 39, 2 },
 284         [QCOM_RPM_PM8921_LDO3] =                { 137, 51, 40, 2 },
 285         [QCOM_RPM_PM8921_LDO4] =                { 139, 53, 41, 2 },
 286         [QCOM_RPM_PM8921_LDO5] =                { 141, 55, 42, 2 },
 287         [QCOM_RPM_PM8921_LDO6] =                { 143, 57, 43, 2 },
 288         [QCOM_RPM_PM8921_LDO7] =                { 145, 59, 44, 2 },
 289         [QCOM_RPM_PM8921_LDO8] =                { 147, 61, 45, 2 },
 290         [QCOM_RPM_PM8921_LDO9] =                { 149, 63, 46, 2 },
 291         [QCOM_RPM_PM8921_LDO10] =               { 151, 65, 47, 2 },
 292         [QCOM_RPM_PM8921_LDO11] =               { 153, 67, 48, 2 },
 293         [QCOM_RPM_PM8921_LDO12] =               { 155, 69, 49, 2 },
 294         [QCOM_RPM_PM8921_LDO13] =               { 157, 71, 50, 2 },
 295         [QCOM_RPM_PM8921_LDO14] =               { 159, 73, 51, 2 },
 296         [QCOM_RPM_PM8921_LDO15] =               { 161, 75, 52, 2 },
 297         [QCOM_RPM_PM8921_LDO16] =               { 163, 77, 53, 2 },
 298         [QCOM_RPM_PM8921_LDO17] =               { 165, 79, 54, 2 },
 299         [QCOM_RPM_PM8921_LDO18] =               { 167, 81, 55, 2 },
 300         [QCOM_RPM_PM8921_LDO19] =               { 169, 83, 56, 2 },
 301         [QCOM_RPM_PM8921_LDO20] =               { 171, 85, 57, 2 },
 302         [QCOM_RPM_PM8921_LDO21] =               { 173, 87, 58, 2 },
 303         [QCOM_RPM_PM8921_LDO22] =               { 175, 89, 59, 2 },
 304         [QCOM_RPM_PM8921_LDO23] =               { 177, 91, 60, 2 },
 305         [QCOM_RPM_PM8921_LDO24] =               { 179, 93, 61, 2 },
 306         [QCOM_RPM_PM8921_LDO25] =               { 181, 95, 62, 2 },
 307         [QCOM_RPM_PM8921_LDO26] =               { 183, 97, 63, 2 },
 308         [QCOM_RPM_PM8921_LDO27] =               { 185, 99, 64, 2 },
 309         [QCOM_RPM_PM8921_LDO28] =               { 187, 101, 65, 2 },
 310         [QCOM_RPM_PM8921_LDO29] =               { 189, 103, 66, 2 },
 311         [QCOM_RPM_PM8921_CLK1] =                { 191, 105, 67, 2 },
 312         [QCOM_RPM_PM8921_CLK2] =                { 193, 107, 68, 2 },
 313         [QCOM_RPM_PM8921_LVS1] =                { 195, 109, 69, 1 },
 314         [QCOM_RPM_PM8921_LVS2] =                { 196, 110, 70, 1 },
 315         [QCOM_RPM_PM8921_LVS3] =                { 197, 111, 71, 1 },
 316         [QCOM_RPM_PM8921_LVS4] =                { 198, 112, 72, 1 },
 317         [QCOM_RPM_PM8921_LVS5] =                { 199, 113, 73, 1 },
 318         [QCOM_RPM_PM8921_LVS6] =                { 200, 114, 74, 1 },
 319         [QCOM_RPM_PM8921_LVS7] =                { 201, 115, 75, 1 },
 320         [QCOM_RPM_PM8921_NCP] =                 { 202, 116, 80, 2 },
 321         [QCOM_RPM_CXO_BUFFERS] =                { 204, 118, 81, 1 },
 322         [QCOM_RPM_USB_OTG_SWITCH] =             { 205, 119, 82, 1 },
 323         [QCOM_RPM_HDMI_SWITCH] =                { 206, 120, 83, 1 },
 324         [QCOM_RPM_DDR_DMM] =                    { 207, 121, 84, 2 },
 325 };
 326
 327 static const struct qcom_rpm_data msm8960_template = {
 328         .version = 3,
 329         .resource_table = msm8960_rpm_resource_table,
 330         .n_resources = ARRAY_SIZE(msm8960_rpm_resource_table),
 331         .req_ctx_off = 3,
 332         .req_sel_off = 11,
 333         .ack_ctx_off = 15,
 334         .ack_sel_off = 23,
 335         .req_sel_size = 4,
 336         .ack_sel_size = 7,
 337 };
 338
 339 static const struct qcom_rpm_resource ipq806x_rpm_resource_table[] = {
 340         [QCOM_RPM_CXO_CLK] =                    { 25, 9, 5, 1 },
 341         [QCOM_RPM_PXO_CLK] =                    { 26, 10, 6, 1 },
 342         [QCOM_RPM_APPS_FABRIC_CLK] =            { 27, 11, 8, 1 },
 343         [QCOM_RPM_SYS_FABRIC_CLK] =             { 28, 12, 9, 1 },
 344         [QCOM_RPM_NSS_FABRIC_0_CLK] =           { 29, 13, 10, 1 },
 345         [QCOM_RPM_DAYTONA_FABRIC_CLK] =         { 30, 14, 11, 1 },
 346         [QCOM_RPM_SFPB_CLK] =                   { 31, 15, 12, 1 },
 347         [QCOM_RPM_CFPB_CLK] =                   { 32, 16, 13, 1 },
 348         [QCOM_RPM_NSS_FABRIC_1_CLK] =           { 33, 17, 14, 1 },
 349         [QCOM_RPM_EBI1_CLK] =                   { 34, 18, 16, 1 },
 350         [QCOM_RPM_APPS_FABRIC_HALT] =           { 35, 19, 18, 2 },
 351         [QCOM_RPM_APPS_FABRIC_MODE] =           { 37, 20, 19, 3 },
 352         [QCOM_RPM_APPS_FABRIC_IOCTL] =          { 40, 21, 20, 1 },
 353         [QCOM_RPM_APPS_FABRIC_ARB] =            { 41, 22, 21, 12 },
 354         [QCOM_RPM_SYS_FABRIC_HALT] =            { 53, 23, 22, 2 },
 355         [QCOM_RPM_SYS_FABRIC_MODE] =            { 55, 24, 23, 3 },
 356         [QCOM_RPM_SYS_FABRIC_IOCTL] =           { 58, 25, 24, 1 },
 357         [QCOM_RPM_SYS_FABRIC_ARB] =             { 59, 26, 25, 30 },
 358         [QCOM_RPM_MM_FABRIC_HALT] =             { 89, 27, 26, 2 },
 359         [QCOM_RPM_MM_FABRIC_MODE] =             { 91, 28, 27, 3 },
 360         [QCOM_RPM_MM_FABRIC_IOCTL] =            { 94, 29, 28, 1 },
 361         [QCOM_RPM_MM_FABRIC_ARB] =              { 95, 30, 29, 2 },
 362         [QCOM_RPM_CXO_BUFFERS] =                { 209, 33, 31, 1 },
 363         [QCOM_RPM_USB_OTG_SWITCH] =             { 210, 34, 32, 1 },
 364         [QCOM_RPM_HDMI_SWITCH] =                { 211, 35, 33, 1 },
 365         [QCOM_RPM_DDR_DMM] =                    { 212, 36, 34, 2 },
 366         [QCOM_RPM_VDDMIN_GPIO] =                { 215, 40, 39, 1 },
 367         [QCOM_RPM_SMB208_S1a] =                 { 216, 41, 90, 2 },
 368         [QCOM_RPM_SMB208_S1b] =                 { 218, 43, 91, 2 },
 369         [QCOM_RPM_SMB208_S2a] =                 { 220, 45, 92, 2 },
 370         [QCOM_RPM_SMB208_S2b] =                 { 222, 47, 93, 2 },
 371 };
 372
 373 static const struct qcom_rpm_data ipq806x_template = {
 374         .version = 3,
 375         .resource_table = ipq806x_rpm_resource_table,
 376         .n_resources = ARRAY_SIZE(ipq806x_rpm_resource_table),
 377         .req_ctx_off = 3,
 378         .req_sel_off = 11,
 379         .ack_ctx_off = 15,
 380         .ack_sel_off = 23,
 381         .req_sel_size = 4,
 382         .ack_sel_size = 7,
 383 };
 384
 385 static const struct qcom_rpm_resource mdm9615_rpm_resource_table[] = {
 386         [QCOM_RPM_CXO_CLK] =                    { 25, 9, 5, 1 },
 387         [QCOM_RPM_SYS_FABRIC_CLK] =             { 26, 10, 9, 1 },
 388         [QCOM_RPM_DAYTONA_FABRIC_CLK] =         { 27, 11, 11, 1 },
 389         [QCOM_RPM_SFPB_CLK] =                   { 28, 12, 12, 1 },
 390         [QCOM_RPM_CFPB_CLK] =                   { 29, 13, 13, 1 },
 391         [QCOM_RPM_EBI1_CLK] =                   { 30, 14, 16, 1 },
 392         [QCOM_RPM_APPS_FABRIC_HALT] =           { 31, 15, 22, 2 },
 393         [QCOM_RPM_APPS_FABRIC_MODE] =           { 33, 16, 23, 3 },
 394         [QCOM_RPM_APPS_FABRIC_IOCTL] =          { 36, 17, 24, 1 },
 395         [QCOM_RPM_APPS_FABRIC_ARB] =            { 37, 18, 25, 27 },
 396         [QCOM_RPM_PM8018_SMPS1] =               { 64, 19, 30, 2 },
 397         [QCOM_RPM_PM8018_SMPS2] =               { 66, 21, 31, 2 },
 398         [QCOM_RPM_PM8018_SMPS3] =               { 68, 23, 32, 2 },
 399         [QCOM_RPM_PM8018_SMPS4] =               { 70, 25, 33, 2 },
 400         [QCOM_RPM_PM8018_SMPS5] =               { 72, 27, 34, 2 },
 401         [QCOM_RPM_PM8018_LDO1] =                { 74, 29, 35, 2 },
 402         [QCOM_RPM_PM8018_LDO2] =                { 76, 31, 36, 2 },
 403         [QCOM_RPM_PM8018_LDO3] =                { 78, 33, 37, 2 },
 404         [QCOM_RPM_PM8018_LDO4] =                { 80, 35, 38, 2 },
 405         [QCOM_RPM_PM8018_LDO5] =                { 82, 37, 39, 2 },
 406         [QCOM_RPM_PM8018_LDO6] =                { 84, 39, 40, 2 },
 407         [QCOM_RPM_PM8018_LDO7] =                { 86, 41, 41, 2 },
 408         [QCOM_RPM_PM8018_LDO8] =                { 88, 43, 42, 2 },
 409         [QCOM_RPM_PM8018_LDO9] =                { 90, 45, 43, 2 },
 410         [QCOM_RPM_PM8018_LDO10] =               { 92, 47, 44, 2 },
 411         [QCOM_RPM_PM8018_LDO11] =               { 94, 49, 45, 2 },
 412         [QCOM_RPM_PM8018_LDO12] =               { 96, 51, 46, 2 },
 413         [QCOM_RPM_PM8018_LDO13] =               { 98, 53, 47, 2 },
 414         [QCOM_RPM_PM8018_LDO14] =               { 100, 55, 48, 2 },
 415         [QCOM_RPM_PM8018_LVS1] =                { 102, 57, 49, 1 },
 416         [QCOM_RPM_PM8018_NCP] =                 { 103, 58, 80, 2 },
 417         [QCOM_RPM_CXO_BUFFERS] =                { 105, 60, 81, 1 },
 418         [QCOM_RPM_USB_OTG_SWITCH] =             { 106, 61, 82, 1 },
 419         [QCOM_RPM_HDMI_SWITCH] =                { 107, 62, 83, 1 },
 420         [QCOM_RPM_VOLTAGE_CORNER] =             { 109, 64, 87, 1 },
 421 };
 422
 423 static const struct qcom_rpm_data mdm9615_template = {
 424         .version = 3,
 425         .resource_table = mdm9615_rpm_resource_table,
 426         .n_resources = ARRAY_SIZE(mdm9615_rpm_resource_table),
 427         .req_ctx_off = 3,
 428         .req_sel_off = 11,
 429         .ack_ctx_off = 15,
 430         .ack_sel_off = 23,
 431         .req_sel_size = 4,
 432         .ack_sel_size = 7,
 433 };
 434
 435 static const struct of_device_id qcom_rpm_of_match[] = {
 436         { .compatible = "qcom,rpm-apq8064", .data = &apq8064_template },
 437         { .compatible = "qcom,rpm-msm8660", .data = &msm8660_template },
 438         { .compatible = "qcom,rpm-msm8960", .data = &msm8960_template },
 439         { .compatible = "qcom,rpm-ipq8064", .data = &ipq806x_template },
 440         { .compatible = "qcom,rpm-mdm9615", .data = &mdm9615_template },
 441         { }
 442 };
 443 MODULE_DEVICE_TABLE(of, qcom_rpm_of_match);
 444
 445 int qcom_rpm_write(struct qcom_rpm *rpm,
 446                    int state,
 447                    int resource,
 448                    u32 *buf, size_t count)
 449 {
 450         const struct qcom_rpm_resource *res;
 451         const struct qcom_rpm_data *data = rpm->data;
 452         u32 sel_mask[RPM_MAX_SEL_SIZE] = { 0 };
 453         int left;
 454         int ret = 0;
 455         int i;
 456
 457         if (WARN_ON(resource < 0 || resource >= data->n_resources))
 458                 return -EINVAL;
 459
 460         res = &data->resource_table[resource];
 461         if (WARN_ON(res->size != count))
 462                 return -EINVAL;
 463
 464         mutex_lock(&rpm->lock);
 465
 466         for (i = 0; i < res->size; i++)
 467                 writel_relaxed(buf[i], RPM_REQ_REG(rpm, res->target_id + i));
 468
 469         bitmap_set((unsigned long *)sel_mask, res->select_id, 1);
 470         for (i = 0; i < rpm->data->req_sel_size; i++) {
 471                 writel_relaxed(sel_mask[i],
 472                                RPM_CTRL_REG(rpm, rpm->data->req_sel_off + i));
 473         }
 474
 475         writel_relaxed(BIT(state), RPM_CTRL_REG(rpm, rpm->data->req_ctx_off));
 476
 477         reinit_completion(&rpm->ack);
 478         regmap_write(rpm->ipc_regmap, rpm->ipc_offset, BIT(rpm->ipc_bit));
 479
 480         left = wait_for_completion_timeout(&rpm->ack, RPM_REQUEST_TIMEOUT);
 481         if (!left)
 482                 ret = -ETIMEDOUT;
 483         else if (rpm->ack_status & RPM_REJECTED)
 484                 ret = -EIO;
 485
 486         mutex_unlock(&rpm->lock);
 487
 488         return ret;
 489 }
 490 EXPORT_SYMBOL(qcom_rpm_write);
 491
 492 static irqreturn_t qcom_rpm_ack_interrupt(int irq, void *dev)
 493 {
 494         struct qcom_rpm *rpm = dev;
 495         u32 ack;
 496         int i;
 497
 498         ack = readl_relaxed(RPM_CTRL_REG(rpm, rpm->data->ack_ctx_off));
 499         for (i = 0; i < rpm->data->ack_sel_size; i++)
 500                 writel_relaxed(0,
 501                         RPM_CTRL_REG(rpm, rpm->data->ack_sel_off + i));
 502         writel(0, RPM_CTRL_REG(rpm, rpm->data->ack_ctx_off));
 503
 504         if (ack & RPM_NOTIFICATION) {
 505                 dev_warn(rpm->dev, "ignoring notification!\n");
 506         } else {
 507                 rpm->ack_status = ack;
 508                 complete(&rpm->ack);
 509         }
 510
 511         return IRQ_HANDLED;
 512 }
 513
 514 static irqreturn_t qcom_rpm_err_interrupt(int irq, void *dev)
 515 {
 516         struct qcom_rpm *rpm = dev;
 517
 518         regmap_write(rpm->ipc_regmap, rpm->ipc_offset, BIT(rpm->ipc_bit));
 519         dev_err(rpm->dev, "RPM triggered fatal error\n");
 520
 521         return IRQ_HANDLED;
 522 }
 523
 524 static irqreturn_t qcom_rpm_wakeup_interrupt(int irq, void *dev)
 525 {
 526         return IRQ_HANDLED;
 527 }
 528
 529 static int qcom_rpm_probe(struct platform_device *pdev)
 530 {
 531         const struct of_device_id *match;
 532         struct device_node *syscon_np;
 533         struct resource *res;
 534         struct qcom_rpm *rpm;
 535         u32 fw_version[3];
 536         int irq_wakeup;
 537         int irq_ack;
 538         int irq_err;
 539         int ret;
 540
 541         rpm = devm_kzalloc(&pdev->dev, sizeof(*rpm), GFP_KERNEL);
 542         if (!rpm)
 543                 return -ENOMEM;
 544
 545         rpm->dev = &pdev->dev;
 546         mutex_init(&rpm->lock);
 547         init_completion(&rpm->ack);
 548
 549         /* Enable message RAM clock */
 550         rpm->ramclk = devm_clk_get(&pdev->dev, "ram");
 551         if (IS_ERR(rpm->ramclk)) {
 552                 ret = PTR_ERR(rpm->ramclk);
 553                 if (ret == -EPROBE_DEFER)
 554                         return ret;
 555                 /*
 556                  * Fall through in all other cases, as the clock is
 557                  * optional. (Does not exist on all platforms.)
 558                  */
 559                 rpm->ramclk = NULL;
 560         }
 561         clk_prepare_enable(rpm->ramclk); /* Accepts NULL */
 562
 563         irq_ack = platform_get_irq_byname(pdev, "ack");
 564         if (irq_ack < 0)
 565                 return irq_ack;
 566
 567         irq_err = platform_get_irq_byname(pdev, "err");
 568         if (irq_err < 0)
 569                 return irq_err;
 570
 571         irq_wakeup = platform_get_irq_byname(pdev, "wakeup");
 572         if (irq_wakeup < 0)
 573                 return irq_wakeup;
 574
 575         match = of_match_device(qcom_rpm_of_match, &pdev->dev);
 576         if (!match)
 577                 return -ENODEV;
 578         rpm->data = match->data;
 579
 580         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 581         rpm->status_regs = devm_ioremap_resource(&pdev->dev, res);
 582         if (IS_ERR(rpm->status_regs))
 583                 return PTR_ERR(rpm->status_regs);
 584         rpm->ctrl_regs = rpm->status_regs + 0x400;
 585         rpm->req_regs = rpm->status_regs + 0x600;
 586
 587         syscon_np = of_parse_phandle(pdev->dev.of_node, "qcom,ipc", 0);
 588         if (!syscon_np) {
 589                 dev_err(&pdev->dev, "no qcom,ipc node\n");
 590                 return -ENODEV;
 591         }
 592
 593         rpm->ipc_regmap = syscon_node_to_regmap(syscon_np);
 594         of_node_put(syscon_np);
 595         if (IS_ERR(rpm->ipc_regmap))
 596                 return PTR_ERR(rpm->ipc_regmap);
 597
 598         ret = of_property_read_u32_index(pdev->dev.of_node, "qcom,ipc", 1,
 599                                          &rpm->ipc_offset);
 600         if (ret < 0) {
 601                 dev_err(&pdev->dev, "no offset in qcom,ipc\n");
 602                 return -EINVAL;
 603         }
 604
 605         ret = of_property_read_u32_index(pdev->dev.of_node, "qcom,ipc", 2,
 606                                          &rpm->ipc_bit);
 607         if (ret < 0) {
 608                 dev_err(&pdev->dev, "no bit in qcom,ipc\n");
 609                 return -EINVAL;
 610         }
 611
 612         dev_set_drvdata(&pdev->dev, rpm);
 613
 614         fw_version[0] = readl(RPM_STATUS_REG(rpm, 0));
 615         fw_version[1] = readl(RPM_STATUS_REG(rpm, 1));
 616         fw_version[2] = readl(RPM_STATUS_REG(rpm, 2));
 617         if (fw_version[0] != rpm->data->version) {
 618                 dev_err(&pdev->dev,
 619                         "RPM version %u.%u.%u incompatible with driver version %u",
 620                         fw_version[0],
 621                         fw_version[1],
 622                         fw_version[2],
 623                         rpm->data->version);
 624                 return -EFAULT;
 625         }
 626
 627         writel(fw_version[0], RPM_CTRL_REG(rpm, 0));
 628         writel(fw_version[1], RPM_CTRL_REG(rpm, 1));
 629         writel(fw_version[2], RPM_CTRL_REG(rpm, 2));
 630
 631         dev_info(&pdev->dev, "RPM firmware %u.%u.%u\n", fw_version[0],
 632                                                         fw_version[1],
 633                                                         fw_version[2]);
 634
 635         ret = devm_request_irq(&pdev->dev,
 636                                irq_ack,
 637                                qcom_rpm_ack_interrupt,
 638                                IRQF_TRIGGER_RISING,
 639                                "qcom_rpm_ack",
 640                                rpm);
 641         if (ret) {
 642                 dev_err(&pdev->dev, "failed to request ack interrupt\n");
 643                 return ret;
 644         }
 645
 646         ret = irq_set_irq_wake(irq_ack, 1);
 647         if (ret)
 648                 dev_warn(&pdev->dev, "failed to mark ack irq as wakeup\n");
 649
 650         ret = devm_request_irq(&pdev->dev,
 651                                irq_err,
 652                                qcom_rpm_err_interrupt,
 653                                IRQF_TRIGGER_RISING,
 654                                "qcom_rpm_err",
 655                                rpm);
 656         if (ret) {
 657                 dev_err(&pdev->dev, "failed to request err interrupt\n");
 658                 return ret;
 659         }
 660
 661         ret = devm_request_irq(&pdev->dev,
 662                                irq_wakeup,
 663                                qcom_rpm_wakeup_interrupt,
 664                                IRQF_TRIGGER_RISING,
 665                                "qcom_rpm_wakeup",
 666                                rpm);
 667         if (ret) {
 668                 dev_err(&pdev->dev, "failed to request wakeup interrupt\n");
 669                 return ret;
 670         }
 671
 672         ret = irq_set_irq_wake(irq_wakeup, 1);
 673         if (ret)
 674                 dev_warn(&pdev->dev, "failed to mark wakeup irq as wakeup\n");
 675
 676         return of_platform_populate(pdev->dev.of_node, NULL, NULL, &pdev->dev);
 677 }
 678
 679 static int qcom_rpm_remove(struct platform_device *pdev)
 680 {
 681         struct qcom_rpm *rpm = dev_get_drvdata(&pdev->dev);
 682
 683         of_platform_depopulate(&pdev->dev);
 684         clk_disable_unprepare(rpm->ramclk);
 685
 686         return 0;
 687 }
 688
 689 static struct platform_driver qcom_rpm_driver = {
 690         .probe = qcom_rpm_probe,
 691         .remove = qcom_rpm_remove,
 692         .driver  = {
 693                 .name  = "qcom_rpm",
 694                 .of_match_table = qcom_rpm_of_match,
 695         },
 696 };
 697
 698 static int __init qcom_rpm_init(void)
 699 {
 700         return platform_driver_register(&qcom_rpm_driver);
 701 }
 702 arch_initcall(qcom_rpm_init);
 703
 704 static void __exit qcom_rpm_exit(void)
 705 {
 706         platform_driver_unregister(&qcom_rpm_driver);
 707 }
 708 module_exit(qcom_rpm_exit)
 709
 710 MODULE_DESCRIPTION("Qualcomm Resource Power Manager driver");
 711 MODULE_LICENSE("GPL v2");
 712 MODULE_AUTHOR("Bjorn Andersson <bjorn.andersson@sonymobile.com>");