drivers/mfd/ioc3.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * SGI IOC3 multifunction device driver
   4  *
   5  * Copyright (C) 2018, 2019 Thomas Bogendoerfer <tbogendoerfer@suse.de>
   6  *
   7  * Based on work by:
   8  *   Stanislaw Skowronek <skylark@unaligned.org>
   9  *   Joshua Kinard <kumba@gentoo.org>
  10  *   Brent Casavant <bcasavan@sgi.com> - IOC4 master driver
  11  *   Pat Gefre <pfg@sgi.com> - IOC3 serial port IRQ demuxer
  12  */
  13
  14 #include <linux/delay.h>
  15 #include <linux/errno.h>
  16 #include <linux/interrupt.h>
  17 #include <linux/mfd/core.h>
  18 #include <linux/module.h>
  19 #include <linux/pci.h>
  20 #include <linux/platform_device.h>
  21 #include <linux/platform_data/sgi-w1.h>
  22 #include <linux/rtc/ds1685.h>
  23
  24 #include <asm/pci/bridge.h>
  25 #include <asm/sn/ioc3.h>
  26
  27 #define IOC3_IRQ_SERIAL_A       6
  28 #define IOC3_IRQ_SERIAL_B       15
  29 #define IOC3_IRQ_KBD            22
  30
  31 /* Bitmask for selecting which IRQs are level triggered */
  32 #define IOC3_LVL_MASK   (BIT(IOC3_IRQ_SERIAL_A) | BIT(IOC3_IRQ_SERIAL_B))
  33
  34 #define M48T35_REG_SIZE 32768   /* size of m48t35 registers */
  35
  36 /* 1.2 us latency timer (40 cycles at 33 MHz) */
  37 #define IOC3_LATENCY    40
  38
  39 struct ioc3_priv_data {
  40         struct irq_domain *domain;
  41         struct ioc3 __iomem *regs;
  42         struct pci_dev *pdev;
  43         int domain_irq;
  44 };
  45
  46 static void ioc3_irq_ack(struct irq_data *d)
  47 {
  48         struct ioc3_priv_data *ipd = irq_data_get_irq_chip_data(d);
  49         unsigned int hwirq = irqd_to_hwirq(d);
  50
  51         writel(BIT(hwirq), &ipd->regs->sio_ir);
  52 }
  53
  54 static void ioc3_irq_mask(struct irq_data *d)
  55 {
  56         struct ioc3_priv_data *ipd = irq_data_get_irq_chip_data(d);
  57         unsigned int hwirq = irqd_to_hwirq(d);
  58
  59         writel(BIT(hwirq), &ipd->regs->sio_iec);
  60 }
  61
  62 static void ioc3_irq_unmask(struct irq_data *d)
  63 {
  64         struct ioc3_priv_data *ipd = irq_data_get_irq_chip_data(d);
  65         unsigned int hwirq = irqd_to_hwirq(d);
  66
  67         writel(BIT(hwirq), &ipd->regs->sio_ies);
  68 }
  69
  70 static struct irq_chip ioc3_irq_chip = {
  71         .name           = "IOC3",
  72         .irq_ack        = ioc3_irq_ack,
  73         .irq_mask       = ioc3_irq_mask,
  74         .irq_unmask     = ioc3_irq_unmask,
  75 };
  76
  77 static int ioc3_irq_domain_map(struct irq_domain *d, unsigned int irq,
  78                               irq_hw_number_t hwirq)
  79 {
  80         /* Set level IRQs for every interrupt contained in IOC3_LVL_MASK */
  81         if (BIT(hwirq) & IOC3_LVL_MASK)
  82                 irq_set_chip_and_handler(irq, &ioc3_irq_chip, handle_level_irq);
  83         else
  84                 irq_set_chip_and_handler(irq, &ioc3_irq_chip, handle_edge_irq);
  85
  86         irq_set_chip_data(irq, d->host_data);
  87         return 0;
  88 }
  89
  90 static void ioc3_irq_domain_unmap(struct irq_domain *d, unsigned int irq)
  91 {
  92         irq_set_chip_and_handler(irq, NULL, NULL);
  93         irq_set_chip_data(irq, NULL);
  94 }
  95
  96 static const struct irq_domain_ops ioc3_irq_domain_ops = {
  97         .map = ioc3_irq_domain_map,
  98         .unmap = ioc3_irq_domain_unmap,
  99 };
 100
 101 static void ioc3_irq_handler(struct irq_desc *desc)
 102 {
 103         struct irq_domain *domain = irq_desc_get_handler_data(desc);
 104         struct ioc3_priv_data *ipd = domain->host_data;
 105         struct ioc3 __iomem *regs = ipd->regs;
 106         u32 pending, mask;
 107         unsigned int irq;
 108
 109         pending = readl(&regs->sio_ir);
 110         mask = readl(&regs->sio_ies);
 111         pending &= mask; /* Mask off not enabled interrupts */
 112
 113         if (pending) {
 114                 irq = irq_find_mapping(domain, __ffs(pending));
 115                 if (irq)
 116                         generic_handle_irq(irq);
 117         } else  {
 118                 spurious_interrupt();
 119         }
 120 }
 121
 122 /*
 123  * System boards/BaseIOs use more interrupt pins of the bridge ASIC
 124  * to which the IOC3 is connected. Since the IOC3 MFD driver
 125  * knows wiring of these extra pins, we use the map_irq function
 126  * to get interrupts activated
 127  */
 128 static int ioc3_map_irq(struct pci_dev *pdev, int slot, int pin)
 129 {
 130         struct pci_host_bridge *hbrg = pci_find_host_bridge(pdev->bus);
 131
 132         return hbrg->map_irq(pdev, slot, pin);
 133 }
 134
 135 static int ioc3_irq_domain_setup(struct ioc3_priv_data *ipd, int irq)
 136 {
 137         struct irq_domain *domain;
 138         struct fwnode_handle *fn;
 139
 140         fn = irq_domain_alloc_named_fwnode("IOC3");
 141         if (!fn)
 142                 goto err;
 143
 144         domain = irq_domain_create_linear(fn, 24, &ioc3_irq_domain_ops, ipd);
 145         if (!domain)
 146                 goto err;
 147
 148         irq_domain_free_fwnode(fn);
 149         ipd->domain = domain;
 150
 151         irq_set_chained_handler_and_data(irq, ioc3_irq_handler, domain);
 152         ipd->domain_irq = irq;
 153         return 0;
 154
 155 err:
 156         dev_err(&ipd->pdev->dev, "irq domain setup failed\n");
 157         return -ENOMEM;
 158 }
 159
 160 static struct resource ioc3_uarta_resources[] = {
 161         DEFINE_RES_MEM(offsetof(struct ioc3, sregs.uarta),
 162                        sizeof_field(struct ioc3, sregs.uarta)),
 163         DEFINE_RES_IRQ(IOC3_IRQ_SERIAL_A)
 164 };
 165
 166 static struct resource ioc3_uartb_resources[] = {
 167         DEFINE_RES_MEM(offsetof(struct ioc3, sregs.uartb),
 168                        sizeof_field(struct ioc3, sregs.uartb)),
 169         DEFINE_RES_IRQ(IOC3_IRQ_SERIAL_B)
 170 };
 171
 172 static struct mfd_cell ioc3_serial_cells[] = {
 173         {
 174                 .name = "ioc3-serial8250",
 175                 .resources = ioc3_uarta_resources,
 176                 .num_resources = ARRAY_SIZE(ioc3_uarta_resources),
 177         },
 178         {
 179                 .name = "ioc3-serial8250",
 180                 .resources = ioc3_uartb_resources,
 181                 .num_resources = ARRAY_SIZE(ioc3_uartb_resources),
 182         }
 183 };
 184
 185 static int ioc3_serial_setup(struct ioc3_priv_data *ipd)
 186 {
 187         int ret;
 188
 189         /* Set gpio pins for RS232/RS422 mode selection */
 190         writel(GPCR_UARTA_MODESEL | GPCR_UARTB_MODESEL,
 191                 &ipd->regs->gpcr_s);
 192         /* Select RS232 mode for uart a */
 193         writel(0, &ipd->regs->gppr[6]);
 194         /* Select RS232 mode for uart b */
 195         writel(0, &ipd->regs->gppr[7]);
 196
 197         /* Switch both ports to 16650 mode */
 198         writel(readl(&ipd->regs->port_a.sscr) & ~SSCR_DMA_EN,
 199                &ipd->regs->port_a.sscr);
 200         writel(readl(&ipd->regs->port_b.sscr) & ~SSCR_DMA_EN,
 201                &ipd->regs->port_b.sscr);
 202         udelay(1000); /* Wait until mode switch is done */
 203
 204         ret = mfd_add_devices(&ipd->pdev->dev, PLATFORM_DEVID_AUTO,
 205                               ioc3_serial_cells, ARRAY_SIZE(ioc3_serial_cells),
 206                               &ipd->pdev->resource[0], 0, ipd->domain);
 207         if (ret) {
 208                 dev_err(&ipd->pdev->dev, "Failed to add 16550 subdevs\n");
 209                 return ret;
 210         }
 211
 212         return 0;
 213 }
 214
 215 static struct resource ioc3_kbd_resources[] = {
 216         DEFINE_RES_MEM(offsetof(struct ioc3, serio),
 217                        sizeof_field(struct ioc3, serio)),
 218         DEFINE_RES_IRQ(IOC3_IRQ_KBD)
 219 };
 220
 221 static struct mfd_cell ioc3_kbd_cells[] = {
 222         {
 223                 .name = "ioc3-kbd",
 224                 .resources = ioc3_kbd_resources,
 225                 .num_resources = ARRAY_SIZE(ioc3_kbd_resources),
 226         }
 227 };
 228
 229 static int ioc3_kbd_setup(struct ioc3_priv_data *ipd)
 230 {
 231         int ret;
 232
 233         ret = mfd_add_devices(&ipd->pdev->dev, PLATFORM_DEVID_AUTO,
 234                               ioc3_kbd_cells, ARRAY_SIZE(ioc3_kbd_cells),
 235                               &ipd->pdev->resource[0], 0, ipd->domain);
 236         if (ret) {
 237                 dev_err(&ipd->pdev->dev, "Failed to add 16550 subdevs\n");
 238                 return ret;
 239         }
 240
 241         return 0;
 242 }
 243
 244 static struct resource ioc3_eth_resources[] = {
 245         DEFINE_RES_MEM(offsetof(struct ioc3, eth),
 246                        sizeof_field(struct ioc3, eth)),
 247         DEFINE_RES_MEM(offsetof(struct ioc3, ssram),
 248                        sizeof_field(struct ioc3, ssram)),
 249         DEFINE_RES_IRQ(0)
 250 };
 251
 252 static struct resource ioc3_w1_resources[] = {
 253         DEFINE_RES_MEM(offsetof(struct ioc3, mcr),
 254                        sizeof_field(struct ioc3, mcr)),
 255 };
 256 static struct sgi_w1_platform_data ioc3_w1_platform_data;
 257
 258 static struct mfd_cell ioc3_eth_cells[] = {
 259         {
 260                 .name = "ioc3-eth",
 261                 .resources = ioc3_eth_resources,
 262                 .num_resources = ARRAY_SIZE(ioc3_eth_resources),
 263         },
 264         {
 265                 .name = "sgi_w1",
 266                 .resources = ioc3_w1_resources,
 267                 .num_resources = ARRAY_SIZE(ioc3_w1_resources),
 268                 .platform_data = &ioc3_w1_platform_data,
 269                 .pdata_size = sizeof(ioc3_w1_platform_data),
 270         }
 271 };
 272
 273 static int ioc3_eth_setup(struct ioc3_priv_data *ipd)
 274 {
 275         int ret;
 276
 277         /* Enable One-Wire bus */
 278         writel(GPCR_MLAN_EN, &ipd->regs->gpcr_s);
 279
 280         /* Generate unique identifier */
 281         snprintf(ioc3_w1_platform_data.dev_id,
 282                  sizeof(ioc3_w1_platform_data.dev_id), "ioc3-%012llx",
 283                  ipd->pdev->resource->start);
 284
 285         ret = mfd_add_devices(&ipd->pdev->dev, PLATFORM_DEVID_AUTO,
 286                               ioc3_eth_cells, ARRAY_SIZE(ioc3_eth_cells),
 287                               &ipd->pdev->resource[0], ipd->pdev->irq, NULL);
 288         if (ret) {
 289                 dev_err(&ipd->pdev->dev, "Failed to add ETH/W1 subdev\n");
 290                 return ret;
 291         }
 292
 293         return 0;
 294 }
 295
 296 static struct resource ioc3_m48t35_resources[] = {
 297         DEFINE_RES_MEM(IOC3_BYTEBUS_DEV0, M48T35_REG_SIZE)
 298 };
 299
 300 static struct mfd_cell ioc3_m48t35_cells[] = {
 301         {
 302                 .name = "rtc-m48t35",
 303                 .resources = ioc3_m48t35_resources,
 304                 .num_resources = ARRAY_SIZE(ioc3_m48t35_resources),
 305         }
 306 };
 307
 308 static int ioc3_m48t35_setup(struct ioc3_priv_data *ipd)
 309 {
 310         int ret;
 311
 312         ret = mfd_add_devices(&ipd->pdev->dev, PLATFORM_DEVID_AUTO,
 313                               ioc3_m48t35_cells, ARRAY_SIZE(ioc3_m48t35_cells),
 314                               &ipd->pdev->resource[0], 0, ipd->domain);
 315         if (ret)
 316                 dev_err(&ipd->pdev->dev, "Failed to add M48T35 subdev\n");
 317
 318         return ret;
 319 }
 320
 321 static struct ds1685_rtc_platform_data ip30_rtc_platform_data = {
 322         .bcd_mode = false,
 323         .no_irq = false,
 324         .uie_unsupported = true,
 325         .access_type = ds1685_reg_indirect,
 326 };
 327
 328 static struct resource ioc3_rtc_ds1685_resources[] = {
 329         DEFINE_RES_MEM(IOC3_BYTEBUS_DEV1, 1),
 330         DEFINE_RES_MEM(IOC3_BYTEBUS_DEV2, 1),
 331         DEFINE_RES_IRQ(0)
 332 };
 333
 334 static struct mfd_cell ioc3_ds1685_cells[] = {
 335         {
 336                 .name = "rtc-ds1685",
 337                 .resources = ioc3_rtc_ds1685_resources,
 338                 .num_resources = ARRAY_SIZE(ioc3_rtc_ds1685_resources),
 339                 .platform_data = &ip30_rtc_platform_data,
 340                 .pdata_size = sizeof(ip30_rtc_platform_data),
 341                 .id = PLATFORM_DEVID_NONE,
 342         }
 343 };
 344
 345 static int ioc3_ds1685_setup(struct ioc3_priv_data *ipd)
 346 {
 347         int ret, irq;
 348
 349         irq = ioc3_map_irq(ipd->pdev, 6, 0);
 350
 351         ret = mfd_add_devices(&ipd->pdev->dev, 0, ioc3_ds1685_cells,
 352                               ARRAY_SIZE(ioc3_ds1685_cells),
 353                               &ipd->pdev->resource[0], irq, NULL);
 354         if (ret)
 355                 dev_err(&ipd->pdev->dev, "Failed to add DS1685 subdev\n");
 356
 357         return ret;
 358 };
 359
 360
 361 static struct resource ioc3_leds_resources[] = {
 362         DEFINE_RES_MEM(offsetof(struct ioc3, gppr[0]),
 363                        sizeof_field(struct ioc3, gppr[0])),
 364         DEFINE_RES_MEM(offsetof(struct ioc3, gppr[1]),
 365                        sizeof_field(struct ioc3, gppr[1])),
 366 };
 367
 368 static struct mfd_cell ioc3_led_cells[] = {
 369         {
 370                 .name = "ip30-leds",
 371                 .resources = ioc3_leds_resources,
 372                 .num_resources = ARRAY_SIZE(ioc3_leds_resources),
 373                 .id = PLATFORM_DEVID_NONE,
 374         }
 375 };
 376
 377 static int ioc3_led_setup(struct ioc3_priv_data *ipd)
 378 {
 379         int ret;
 380
 381         ret = mfd_add_devices(&ipd->pdev->dev, 0, ioc3_led_cells,
 382                               ARRAY_SIZE(ioc3_led_cells),
 383                               &ipd->pdev->resource[0], 0, ipd->domain);
 384         if (ret)
 385                 dev_err(&ipd->pdev->dev, "Failed to add LED subdev\n");
 386
 387         return ret;
 388 }
 389
 390 static int ip27_baseio_setup(struct ioc3_priv_data *ipd)
 391 {
 392         int ret, io_irq;
 393
 394         io_irq = ioc3_map_irq(ipd->pdev, PCI_SLOT(ipd->pdev->devfn),
 395                               PCI_INTERRUPT_INTB);
 396         ret = ioc3_irq_domain_setup(ipd, io_irq);
 397         if (ret)
 398                 return ret;
 399
 400         ret = ioc3_eth_setup(ipd);
 401         if (ret)
 402                 return ret;
 403
 404         ret = ioc3_serial_setup(ipd);
 405         if (ret)
 406                 return ret;
 407
 408         return ioc3_m48t35_setup(ipd);
 409 }
 410
 411 static int ip27_baseio6g_setup(struct ioc3_priv_data *ipd)
 412 {
 413         int ret, io_irq;
 414
 415         io_irq = ioc3_map_irq(ipd->pdev, PCI_SLOT(ipd->pdev->devfn),
 416                               PCI_INTERRUPT_INTB);
 417         ret = ioc3_irq_domain_setup(ipd, io_irq);
 418         if (ret)
 419                 return ret;
 420
 421         ret = ioc3_eth_setup(ipd);
 422         if (ret)
 423                 return ret;
 424
 425         ret = ioc3_serial_setup(ipd);
 426         if (ret)
 427                 return ret;
 428
 429         ret = ioc3_m48t35_setup(ipd);
 430         if (ret)
 431                 return ret;
 432
 433         return ioc3_kbd_setup(ipd);
 434 }
 435
 436 static int ip27_mio_setup(struct ioc3_priv_data *ipd)
 437 {
 438         int ret;
 439
 440         ret = ioc3_irq_domain_setup(ipd, ipd->pdev->irq);
 441         if (ret)
 442                 return ret;
 443
 444         ret = ioc3_serial_setup(ipd);
 445         if (ret)
 446                 return ret;
 447
 448         return ioc3_kbd_setup(ipd);
 449 }
 450
 451 static int ip30_sysboard_setup(struct ioc3_priv_data *ipd)
 452 {
 453         int ret, io_irq;
 454
 455         io_irq = ioc3_map_irq(ipd->pdev, PCI_SLOT(ipd->pdev->devfn),
 456                               PCI_INTERRUPT_INTB);
 457         ret = ioc3_irq_domain_setup(ipd, io_irq);
 458         if (ret)
 459                 return ret;
 460
 461         ret = ioc3_eth_setup(ipd);
 462         if (ret)
 463                 return ret;
 464
 465         ret = ioc3_serial_setup(ipd);
 466         if (ret)
 467                 return ret;
 468
 469         ret = ioc3_kbd_setup(ipd);
 470         if (ret)
 471                 return ret;
 472
 473         ret = ioc3_ds1685_setup(ipd);
 474         if (ret)
 475                 return ret;
 476
 477         return ioc3_led_setup(ipd);
 478 }
 479
 480 static int ioc3_menet_setup(struct ioc3_priv_data *ipd)
 481 {
 482         int ret, io_irq;
 483
 484         io_irq = ioc3_map_irq(ipd->pdev, PCI_SLOT(ipd->pdev->devfn),
 485                               PCI_INTERRUPT_INTB);
 486         ret = ioc3_irq_domain_setup(ipd, io_irq);
 487         if (ret)
 488                 return ret;
 489
 490         ret = ioc3_eth_setup(ipd);
 491         if (ret)
 492                 return ret;
 493
 494         return ioc3_serial_setup(ipd);
 495 }
 496
 497 static int ioc3_menet4_setup(struct ioc3_priv_data *ipd)
 498 {
 499         return ioc3_eth_setup(ipd);
 500 }
 501
 502 static int ioc3_cad_duo_setup(struct ioc3_priv_data *ipd)
 503 {
 504         int ret, io_irq;
 505
 506         io_irq = ioc3_map_irq(ipd->pdev, PCI_SLOT(ipd->pdev->devfn),
 507                               PCI_INTERRUPT_INTB);
 508         ret = ioc3_irq_domain_setup(ipd, io_irq);
 509         if (ret)
 510                 return ret;
 511
 512         ret = ioc3_eth_setup(ipd);
 513         if (ret)
 514                 return ret;
 515
 516         return ioc3_kbd_setup(ipd);
 517 }
 518
 519 /* Helper macro for filling ioc3_info array */
 520 #define IOC3_SID(_name, _sid, _setup) \
 521         {                                                                  \
 522                 .name = _name,                                             \
 523                 .sid = PCI_VENDOR_ID_SGI | (IOC3_SUBSYS_ ## _sid << 16),   \
 524                 .setup = _setup,                                           \
 525         }
 526
 527 static struct {
 528         const char *name;
 529         u32 sid;
 530         int (*setup)(struct ioc3_priv_data *ipd);
 531 } ioc3_infos[] = {
 532         IOC3_SID("IP27 BaseIO6G", IP27_BASEIO6G, &ip27_baseio6g_setup),
 533         IOC3_SID("IP27 MIO", IP27_MIO, &ip27_mio_setup),
 534         IOC3_SID("IP27 BaseIO", IP27_BASEIO, &ip27_baseio_setup),
 535         IOC3_SID("IP29 System Board", IP29_SYSBOARD, &ip27_baseio6g_setup),
 536         IOC3_SID("IP30 System Board", IP30_SYSBOARD, &ip30_sysboard_setup),
 537         IOC3_SID("MENET", MENET, &ioc3_menet_setup),
 538         IOC3_SID("MENET4", MENET4, &ioc3_menet4_setup)
 539 };
 540 #undef IOC3_SID
 541
 542 static int ioc3_setup(struct ioc3_priv_data *ipd)
 543 {
 544         u32 sid;
 545         int i;
 546
 547         /* Clear IRQs */
 548         writel(~0, &ipd->regs->sio_iec);
 549         writel(~0, &ipd->regs->sio_ir);
 550         writel(0, &ipd->regs->eth.eier);
 551         writel(~0, &ipd->regs->eth.eisr);
 552
 553         /* Read subsystem vendor id and subsystem id */
 554         pci_read_config_dword(ipd->pdev, PCI_SUBSYSTEM_VENDOR_ID, &sid);
 555
 556         for (i = 0; i < ARRAY_SIZE(ioc3_infos); i++)
 557                 if (sid == ioc3_infos[i].sid) {
 558                         pr_info("ioc3: %s\n", ioc3_infos[i].name);
 559                         return ioc3_infos[i].setup(ipd);
 560                 }
 561
 562         /* Treat everything not identified by PCI subid as CAD DUO */
 563         pr_info("ioc3: CAD DUO\n");
 564         return ioc3_cad_duo_setup(ipd);
 565 }
 566
 567 static int ioc3_mfd_probe(struct pci_dev *pdev,
 568                           const struct pci_device_id *pci_id)
 569 {
 570         struct ioc3_priv_data *ipd;
 571         struct ioc3 __iomem *regs;
 572         int ret;
 573
 574         ret = pci_enable_device(pdev);
 575         if (ret)
 576                 return ret;
 577
 578         pci_write_config_byte(pdev, PCI_LATENCY_TIMER, IOC3_LATENCY);
 579         pci_set_master(pdev);
 580
 581         ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
 582         if (ret) {
 583                 pr_err("%s: No usable DMA configuration, aborting.\n",
 584                        pci_name(pdev));
 585                 goto out_disable_device;
 586         }
 587
 588         /* Set up per-IOC3 data */
 589         ipd = devm_kzalloc(&pdev->dev, sizeof(struct ioc3_priv_data),
 590                            GFP_KERNEL);
 591         if (!ipd) {
 592                 ret = -ENOMEM;
 593                 goto out_disable_device;
 594         }
 595         ipd->pdev = pdev;
 596
 597         /*
 598          * Map all IOC3 registers.  These are shared between subdevices
 599          * so the main IOC3 module manages them.
 600          */
 601         regs = pci_ioremap_bar(pdev, 0);
 602         if (!regs) {
 603                 dev_warn(&pdev->dev, "ioc3: Unable to remap PCI BAR for %s.\n",
 604                          pci_name(pdev));
 605                 ret = -ENOMEM;
 606                 goto out_disable_device;
 607         }
 608         ipd->regs = regs;
 609
 610         /* Track PCI-device specific data */
 611         pci_set_drvdata(pdev, ipd);
 612
 613         ret = ioc3_setup(ipd);
 614         if (ret) {
 615                 /* Remove all already added MFD devices */
 616                 mfd_remove_devices(&ipd->pdev->dev);
 617                 if (ipd->domain) {
 618                         irq_domain_remove(ipd->domain);
 619                         free_irq(ipd->domain_irq, (void *)ipd);
 620                 }
 621                 pci_iounmap(pdev, regs);
 622                 goto out_disable_device;
 623         }
 624
 625         return 0;
 626
 627 out_disable_device:
 628         pci_disable_device(pdev);
 629         return ret;
 630 }
 631
 632 static void ioc3_mfd_remove(struct pci_dev *pdev)
 633 {
 634         struct ioc3_priv_data *ipd;
 635
 636         ipd = pci_get_drvdata(pdev);
 637
 638         /* Clear and disable all IRQs */
 639         writel(~0, &ipd->regs->sio_iec);
 640         writel(~0, &ipd->regs->sio_ir);
 641
 642         /* Release resources */
 643         mfd_remove_devices(&ipd->pdev->dev);
 644         if (ipd->domain) {
 645                 irq_domain_remove(ipd->domain);
 646                 free_irq(ipd->domain_irq, (void *)ipd);
 647         }
 648         pci_iounmap(pdev, ipd->regs);
 649         pci_disable_device(pdev);
 650 }
 651
 652 static struct pci_device_id ioc3_mfd_id_table[] = {
 653         { PCI_VENDOR_ID_SGI, PCI_DEVICE_ID_SGI_IOC3, PCI_ANY_ID, PCI_ANY_ID },
 654         { 0, },
 655 };
 656 MODULE_DEVICE_TABLE(pci, ioc3_mfd_id_table);
 657
 658 static struct pci_driver ioc3_mfd_driver = {
 659         .name = "IOC3",
 660         .id_table = ioc3_mfd_id_table,
 661         .probe = ioc3_mfd_probe,
 662         .remove = ioc3_mfd_remove,
 663 };
 664
 665 module_pci_driver(ioc3_mfd_driver);
 666
 667 MODULE_AUTHOR("Thomas Bogendoerfer <tbogendoerfer@suse.de>");
 668 MODULE_DESCRIPTION("SGI IOC3 MFD driver");
 669 MODULE_LICENSE("GPL v2");