1 // SPDX-License-Identifier: GPL-2.0
3 * SGI IOC3 multifunction device driver
5 * Copyright (C) 2018, 2019 Thomas Bogendoerfer <tbogendoerfer@suse.de>
8 * Stanislaw Skowronek <skylark@unaligned.org>
9 * Joshua Kinard <kumba@gentoo.org>
10 * Brent Casavant <bcasavan@sgi.com> - IOC4 master driver
11 * Pat Gefre <pfg@sgi.com> - IOC3 serial port IRQ demuxer
14 #include <linux/delay.h>
15 #include <linux/errno.h>
16 #include <linux/interrupt.h>
17 #include <linux/irqdomain.h>
18 #include <linux/mfd/core.h>
19 #include <linux/module.h>
20 #include <linux/pci.h>
21 #include <linux/platform_device.h>
22 #include <linux/platform_data/sgi-w1.h>
23 #include <linux/rtc/ds1685.h>
25 #include <asm/pci/bridge.h>
26 #include <asm/sn/ioc3.h>
28 #define IOC3_IRQ_SERIAL_A 6
29 #define IOC3_IRQ_SERIAL_B 15
30 #define IOC3_IRQ_KBD 22
32 /* Bitmask for selecting which IRQs are level triggered */
33 #define IOC3_LVL_MASK (BIT(IOC3_IRQ_SERIAL_A) | BIT(IOC3_IRQ_SERIAL_B))
35 #define M48T35_REG_SIZE 32768 /* size of m48t35 registers */
37 /* 1.2 us latency timer (40 cycles at 33 MHz) */
38 #define IOC3_LATENCY 40
40 struct ioc3_priv_data {
41 struct irq_domain *domain;
42 struct ioc3 __iomem *regs;
47 static void ioc3_irq_ack(struct irq_data *d)
49 struct ioc3_priv_data *ipd = irq_data_get_irq_chip_data(d);
50 unsigned int hwirq = irqd_to_hwirq(d);
52 writel(BIT(hwirq), &ipd->regs->sio_ir);
55 static void ioc3_irq_mask(struct irq_data *d)
57 struct ioc3_priv_data *ipd = irq_data_get_irq_chip_data(d);
58 unsigned int hwirq = irqd_to_hwirq(d);
60 writel(BIT(hwirq), &ipd->regs->sio_iec);
63 static void ioc3_irq_unmask(struct irq_data *d)
65 struct ioc3_priv_data *ipd = irq_data_get_irq_chip_data(d);
66 unsigned int hwirq = irqd_to_hwirq(d);
68 writel(BIT(hwirq), &ipd->regs->sio_ies);
71 static struct irq_chip ioc3_irq_chip = {
73 .irq_ack = ioc3_irq_ack,
74 .irq_mask = ioc3_irq_mask,
75 .irq_unmask = ioc3_irq_unmask,
78 static int ioc3_irq_domain_map(struct irq_domain *d, unsigned int irq,
79 irq_hw_number_t hwirq)
81 /* Set level IRQs for every interrupt contained in IOC3_LVL_MASK */
82 if (BIT(hwirq) & IOC3_LVL_MASK)
83 irq_set_chip_and_handler(irq, &ioc3_irq_chip, handle_level_irq);
85 irq_set_chip_and_handler(irq, &ioc3_irq_chip, handle_edge_irq);
87 irq_set_chip_data(irq, d->host_data);
91 static void ioc3_irq_domain_unmap(struct irq_domain *d, unsigned int irq)
93 irq_set_chip_and_handler(irq, NULL, NULL);
94 irq_set_chip_data(irq, NULL);
97 static const struct irq_domain_ops ioc3_irq_domain_ops = {
98 .map = ioc3_irq_domain_map,
99 .unmap = ioc3_irq_domain_unmap,
102 static void ioc3_irq_handler(struct irq_desc *desc)
104 struct irq_domain *domain = irq_desc_get_handler_data(desc);
105 struct ioc3_priv_data *ipd = domain->host_data;
106 struct ioc3 __iomem *regs = ipd->regs;
110 pending = readl(®s->sio_ir);
111 mask = readl(®s->sio_ies);
112 pending &= mask; /* Mask off not enabled interrupts */
115 irq = irq_find_mapping(domain, __ffs(pending));
117 generic_handle_irq(irq);
119 spurious_interrupt();
124 * System boards/BaseIOs use more interrupt pins of the bridge ASIC
125 * to which the IOC3 is connected. Since the IOC3 MFD driver
126 * knows wiring of these extra pins, we use the map_irq function
127 * to get interrupts activated
129 static int ioc3_map_irq(struct pci_dev *pdev, int slot, int pin)
131 struct pci_host_bridge *hbrg = pci_find_host_bridge(pdev->bus);
133 return hbrg->map_irq(pdev, slot, pin);
136 static int ioc3_irq_domain_setup(struct ioc3_priv_data *ipd, int irq)
138 struct irq_domain *domain;
139 struct fwnode_handle *fn;
141 fn = irq_domain_alloc_named_fwnode("IOC3");
145 domain = irq_domain_create_linear(fn, 24, &ioc3_irq_domain_ops, ipd);
147 irq_domain_free_fwnode(fn);
151 ipd->domain = domain;
153 irq_set_chained_handler_and_data(irq, ioc3_irq_handler, domain);
154 ipd->domain_irq = irq;
158 dev_err(&ipd->pdev->dev, "irq domain setup failed\n");
162 static const struct resource ioc3_uarta_resources[] = {
163 DEFINE_RES_MEM(offsetof(struct ioc3, sregs.uarta),
164 sizeof_field(struct ioc3, sregs.uarta)),
165 DEFINE_RES_IRQ(IOC3_IRQ_SERIAL_A)
168 static const struct resource ioc3_uartb_resources[] = {
169 DEFINE_RES_MEM(offsetof(struct ioc3, sregs.uartb),
170 sizeof_field(struct ioc3, sregs.uartb)),
171 DEFINE_RES_IRQ(IOC3_IRQ_SERIAL_B)
174 static struct mfd_cell ioc3_serial_cells[] = {
176 .name = "ioc3-serial8250",
177 .resources = ioc3_uarta_resources,
178 .num_resources = ARRAY_SIZE(ioc3_uarta_resources),
181 .name = "ioc3-serial8250",
182 .resources = ioc3_uartb_resources,
183 .num_resources = ARRAY_SIZE(ioc3_uartb_resources),
187 static int ioc3_serial_setup(struct ioc3_priv_data *ipd)
191 /* Set gpio pins for RS232/RS422 mode selection */
192 writel(GPCR_UARTA_MODESEL | GPCR_UARTB_MODESEL,
194 /* Select RS232 mode for uart a */
195 writel(0, &ipd->regs->gppr[6]);
196 /* Select RS232 mode for uart b */
197 writel(0, &ipd->regs->gppr[7]);
199 /* Switch both ports to 16650 mode */
200 writel(readl(&ipd->regs->port_a.sscr) & ~SSCR_DMA_EN,
201 &ipd->regs->port_a.sscr);
202 writel(readl(&ipd->regs->port_b.sscr) & ~SSCR_DMA_EN,
203 &ipd->regs->port_b.sscr);
204 udelay(1000); /* Wait until mode switch is done */
206 ret = mfd_add_devices(&ipd->pdev->dev, PLATFORM_DEVID_AUTO,
207 ioc3_serial_cells, ARRAY_SIZE(ioc3_serial_cells),
208 &ipd->pdev->resource[0], 0, ipd->domain);
210 dev_err(&ipd->pdev->dev, "Failed to add 16550 subdevs\n");
217 static const struct resource ioc3_kbd_resources[] = {
218 DEFINE_RES_MEM(offsetof(struct ioc3, serio),
219 sizeof_field(struct ioc3, serio)),
220 DEFINE_RES_IRQ(IOC3_IRQ_KBD)
223 static struct mfd_cell ioc3_kbd_cells[] = {
226 .resources = ioc3_kbd_resources,
227 .num_resources = ARRAY_SIZE(ioc3_kbd_resources),
231 static int ioc3_kbd_setup(struct ioc3_priv_data *ipd)
235 ret = mfd_add_devices(&ipd->pdev->dev, PLATFORM_DEVID_AUTO,
236 ioc3_kbd_cells, ARRAY_SIZE(ioc3_kbd_cells),
237 &ipd->pdev->resource[0], 0, ipd->domain);
239 dev_err(&ipd->pdev->dev, "Failed to add 16550 subdevs\n");
246 static const struct resource ioc3_eth_resources[] = {
247 DEFINE_RES_MEM(offsetof(struct ioc3, eth),
248 sizeof_field(struct ioc3, eth)),
249 DEFINE_RES_MEM(offsetof(struct ioc3, ssram),
250 sizeof_field(struct ioc3, ssram)),
254 static const struct resource ioc3_w1_resources[] = {
255 DEFINE_RES_MEM(offsetof(struct ioc3, mcr),
256 sizeof_field(struct ioc3, mcr)),
258 static struct sgi_w1_platform_data ioc3_w1_platform_data;
260 static struct mfd_cell ioc3_eth_cells[] = {
263 .resources = ioc3_eth_resources,
264 .num_resources = ARRAY_SIZE(ioc3_eth_resources),
268 .resources = ioc3_w1_resources,
269 .num_resources = ARRAY_SIZE(ioc3_w1_resources),
270 .platform_data = &ioc3_w1_platform_data,
271 .pdata_size = sizeof(ioc3_w1_platform_data),
275 static int ioc3_eth_setup(struct ioc3_priv_data *ipd)
279 /* Enable One-Wire bus */
280 writel(GPCR_MLAN_EN, &ipd->regs->gpcr_s);
282 /* Generate unique identifier */
283 snprintf(ioc3_w1_platform_data.dev_id,
284 sizeof(ioc3_w1_platform_data.dev_id), "ioc3-%012llx",
285 ipd->pdev->resource->start);
287 ret = mfd_add_devices(&ipd->pdev->dev, PLATFORM_DEVID_AUTO,
288 ioc3_eth_cells, ARRAY_SIZE(ioc3_eth_cells),
289 &ipd->pdev->resource[0], ipd->pdev->irq, NULL);
291 dev_err(&ipd->pdev->dev, "Failed to add ETH/W1 subdev\n");
298 static const struct resource ioc3_m48t35_resources[] = {
299 DEFINE_RES_MEM(IOC3_BYTEBUS_DEV0, M48T35_REG_SIZE)
302 static struct mfd_cell ioc3_m48t35_cells[] = {
304 .name = "rtc-m48t35",
305 .resources = ioc3_m48t35_resources,
306 .num_resources = ARRAY_SIZE(ioc3_m48t35_resources),
310 static int ioc3_m48t35_setup(struct ioc3_priv_data *ipd)
314 ret = mfd_add_devices(&ipd->pdev->dev, PLATFORM_DEVID_AUTO,
315 ioc3_m48t35_cells, ARRAY_SIZE(ioc3_m48t35_cells),
316 &ipd->pdev->resource[0], 0, ipd->domain);
318 dev_err(&ipd->pdev->dev, "Failed to add M48T35 subdev\n");
323 static struct ds1685_rtc_platform_data ip30_rtc_platform_data = {
326 .uie_unsupported = true,
327 .access_type = ds1685_reg_indirect,
330 static const struct resource ioc3_rtc_ds1685_resources[] = {
331 DEFINE_RES_MEM(IOC3_BYTEBUS_DEV1, 1),
332 DEFINE_RES_MEM(IOC3_BYTEBUS_DEV2, 1),
336 static struct mfd_cell ioc3_ds1685_cells[] = {
338 .name = "rtc-ds1685",
339 .resources = ioc3_rtc_ds1685_resources,
340 .num_resources = ARRAY_SIZE(ioc3_rtc_ds1685_resources),
341 .platform_data = &ip30_rtc_platform_data,
342 .pdata_size = sizeof(ip30_rtc_platform_data),
343 .id = PLATFORM_DEVID_NONE,
347 static int ioc3_ds1685_setup(struct ioc3_priv_data *ipd)
351 irq = ioc3_map_irq(ipd->pdev, 6, 0);
353 ret = mfd_add_devices(&ipd->pdev->dev, 0, ioc3_ds1685_cells,
354 ARRAY_SIZE(ioc3_ds1685_cells),
355 &ipd->pdev->resource[0], irq, NULL);
357 dev_err(&ipd->pdev->dev, "Failed to add DS1685 subdev\n");
363 static const struct resource ioc3_leds_resources[] = {
364 DEFINE_RES_MEM(offsetof(struct ioc3, gppr[0]),
365 sizeof_field(struct ioc3, gppr[0])),
366 DEFINE_RES_MEM(offsetof(struct ioc3, gppr[1]),
367 sizeof_field(struct ioc3, gppr[1])),
370 static struct mfd_cell ioc3_led_cells[] = {
373 .resources = ioc3_leds_resources,
374 .num_resources = ARRAY_SIZE(ioc3_leds_resources),
375 .id = PLATFORM_DEVID_NONE,
379 static int ioc3_led_setup(struct ioc3_priv_data *ipd)
383 ret = mfd_add_devices(&ipd->pdev->dev, 0, ioc3_led_cells,
384 ARRAY_SIZE(ioc3_led_cells),
385 &ipd->pdev->resource[0], 0, ipd->domain);
387 dev_err(&ipd->pdev->dev, "Failed to add LED subdev\n");
392 static int ip27_baseio_setup(struct ioc3_priv_data *ipd)
396 io_irq = ioc3_map_irq(ipd->pdev, PCI_SLOT(ipd->pdev->devfn),
398 ret = ioc3_irq_domain_setup(ipd, io_irq);
402 ret = ioc3_eth_setup(ipd);
406 ret = ioc3_serial_setup(ipd);
410 return ioc3_m48t35_setup(ipd);
413 static int ip27_baseio6g_setup(struct ioc3_priv_data *ipd)
417 io_irq = ioc3_map_irq(ipd->pdev, PCI_SLOT(ipd->pdev->devfn),
419 ret = ioc3_irq_domain_setup(ipd, io_irq);
423 ret = ioc3_eth_setup(ipd);
427 ret = ioc3_serial_setup(ipd);
431 ret = ioc3_m48t35_setup(ipd);
435 return ioc3_kbd_setup(ipd);
438 static int ip27_mio_setup(struct ioc3_priv_data *ipd)
442 ret = ioc3_irq_domain_setup(ipd, ipd->pdev->irq);
446 ret = ioc3_serial_setup(ipd);
450 return ioc3_kbd_setup(ipd);
453 static int ip30_sysboard_setup(struct ioc3_priv_data *ipd)
457 io_irq = ioc3_map_irq(ipd->pdev, PCI_SLOT(ipd->pdev->devfn),
459 ret = ioc3_irq_domain_setup(ipd, io_irq);
463 ret = ioc3_eth_setup(ipd);
467 ret = ioc3_serial_setup(ipd);
471 ret = ioc3_kbd_setup(ipd);
475 ret = ioc3_ds1685_setup(ipd);
479 return ioc3_led_setup(ipd);
482 static int ioc3_menet_setup(struct ioc3_priv_data *ipd)
486 io_irq = ioc3_map_irq(ipd->pdev, PCI_SLOT(ipd->pdev->devfn),
488 ret = ioc3_irq_domain_setup(ipd, io_irq);
492 ret = ioc3_eth_setup(ipd);
496 return ioc3_serial_setup(ipd);
499 static int ioc3_menet4_setup(struct ioc3_priv_data *ipd)
501 return ioc3_eth_setup(ipd);
504 static int ioc3_cad_duo_setup(struct ioc3_priv_data *ipd)
508 io_irq = ioc3_map_irq(ipd->pdev, PCI_SLOT(ipd->pdev->devfn),
510 ret = ioc3_irq_domain_setup(ipd, io_irq);
514 ret = ioc3_eth_setup(ipd);
518 return ioc3_kbd_setup(ipd);
521 /* Helper macro for filling ioc3_info array */
522 #define IOC3_SID(_name, _sid, _setup) \
525 .sid = PCI_VENDOR_ID_SGI | (IOC3_SUBSYS_ ## _sid << 16), \
532 int (*setup)(struct ioc3_priv_data *ipd);
534 IOC3_SID("IP27 BaseIO6G", IP27_BASEIO6G, &ip27_baseio6g_setup),
535 IOC3_SID("IP27 MIO", IP27_MIO, &ip27_mio_setup),
536 IOC3_SID("IP27 BaseIO", IP27_BASEIO, &ip27_baseio_setup),
537 IOC3_SID("IP29 System Board", IP29_SYSBOARD, &ip27_baseio6g_setup),
538 IOC3_SID("IP30 System Board", IP30_SYSBOARD, &ip30_sysboard_setup),
539 IOC3_SID("MENET", MENET, &ioc3_menet_setup),
540 IOC3_SID("MENET4", MENET4, &ioc3_menet4_setup)
544 static int ioc3_setup(struct ioc3_priv_data *ipd)
550 writel(~0, &ipd->regs->sio_iec);
551 writel(~0, &ipd->regs->sio_ir);
552 writel(0, &ipd->regs->eth.eier);
553 writel(~0, &ipd->regs->eth.eisr);
555 /* Read subsystem vendor id and subsystem id */
556 pci_read_config_dword(ipd->pdev, PCI_SUBSYSTEM_VENDOR_ID, &sid);
558 for (i = 0; i < ARRAY_SIZE(ioc3_infos); i++)
559 if (sid == ioc3_infos[i].sid) {
560 pr_info("ioc3: %s\n", ioc3_infos[i].name);
561 return ioc3_infos[i].setup(ipd);
564 /* Treat everything not identified by PCI subid as CAD DUO */
565 pr_info("ioc3: CAD DUO\n");
566 return ioc3_cad_duo_setup(ipd);
569 static int ioc3_mfd_probe(struct pci_dev *pdev,
570 const struct pci_device_id *pci_id)
572 struct ioc3_priv_data *ipd;
573 struct ioc3 __iomem *regs;
576 ret = pci_enable_device(pdev);
580 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, IOC3_LATENCY);
581 pci_set_master(pdev);
583 ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
585 pr_err("%s: No usable DMA configuration, aborting.\n",
587 goto out_disable_device;
590 /* Set up per-IOC3 data */
591 ipd = devm_kzalloc(&pdev->dev, sizeof(struct ioc3_priv_data),
595 goto out_disable_device;
600 * Map all IOC3 registers. These are shared between subdevices
601 * so the main IOC3 module manages them.
603 regs = pci_ioremap_bar(pdev, 0);
605 dev_warn(&pdev->dev, "ioc3: Unable to remap PCI BAR for %s.\n",
608 goto out_disable_device;
612 /* Track PCI-device specific data */
613 pci_set_drvdata(pdev, ipd);
615 ret = ioc3_setup(ipd);
617 /* Remove all already added MFD devices */
618 mfd_remove_devices(&ipd->pdev->dev);
620 struct fwnode_handle *fn = ipd->domain->fwnode;
622 irq_domain_remove(ipd->domain);
623 irq_domain_free_fwnode(fn);
624 free_irq(ipd->domain_irq, (void *)ipd);
626 pci_iounmap(pdev, regs);
627 goto out_disable_device;
633 pci_disable_device(pdev);
637 static void ioc3_mfd_remove(struct pci_dev *pdev)
639 struct ioc3_priv_data *ipd;
641 ipd = pci_get_drvdata(pdev);
643 /* Clear and disable all IRQs */
644 writel(~0, &ipd->regs->sio_iec);
645 writel(~0, &ipd->regs->sio_ir);
647 /* Release resources */
648 mfd_remove_devices(&ipd->pdev->dev);
650 struct fwnode_handle *fn = ipd->domain->fwnode;
652 irq_domain_remove(ipd->domain);
653 irq_domain_free_fwnode(fn);
654 free_irq(ipd->domain_irq, (void *)ipd);
656 pci_iounmap(pdev, ipd->regs);
657 pci_disable_device(pdev);
660 static struct pci_device_id ioc3_mfd_id_table[] = {
661 { PCI_VENDOR_ID_SGI, PCI_DEVICE_ID_SGI_IOC3, PCI_ANY_ID, PCI_ANY_ID },
664 MODULE_DEVICE_TABLE(pci, ioc3_mfd_id_table);
666 static struct pci_driver ioc3_mfd_driver = {
668 .id_table = ioc3_mfd_id_table,
669 .probe = ioc3_mfd_probe,
670 .remove = ioc3_mfd_remove,
673 module_pci_driver(ioc3_mfd_driver);
675 MODULE_AUTHOR("Thomas Bogendoerfer <tbogendoerfer@suse.de>");
676 MODULE_DESCRIPTION("SGI IOC3 MFD driver");
677 MODULE_LICENSE("GPL v2");