2 * MFD core driver for Intel Broxton Whiskey Cove PMIC
4 * Copyright (C) 2015 Intel Corporation. All rights reserved.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
16 #include <linux/module.h>
17 #include <linux/acpi.h>
18 #include <linux/err.h>
19 #include <linux/delay.h>
20 #include <linux/interrupt.h>
21 #include <linux/kernel.h>
22 #include <linux/mfd/core.h>
23 #include <linux/mfd/intel_bxtwc.h>
24 #include <asm/intel_pmc_ipc.h>
26 /* PMIC device registers */
27 #define REG_ADDR_MASK 0xFF00
28 #define REG_ADDR_SHIFT 8
29 #define REG_OFFSET_MASK 0xFF
31 /* Interrupt Status Registers */
32 #define BXTWC_IRQLVL1 0x4E02
33 #define BXTWC_PWRBTNIRQ 0x4E03
35 #define BXTWC_THRM0IRQ 0x4E04
36 #define BXTWC_THRM1IRQ 0x4E05
37 #define BXTWC_THRM2IRQ 0x4E06
38 #define BXTWC_BCUIRQ 0x4E07
39 #define BXTWC_ADCIRQ 0x4E08
40 #define BXTWC_CHGR0IRQ 0x4E09
41 #define BXTWC_CHGR1IRQ 0x4E0A
42 #define BXTWC_GPIOIRQ0 0x4E0B
43 #define BXTWC_GPIOIRQ1 0x4E0C
44 #define BXTWC_CRITIRQ 0x4E0D
46 /* Interrupt MASK Registers */
47 #define BXTWC_MIRQLVL1 0x4E0E
48 #define BXTWC_MPWRTNIRQ 0x4E0F
50 #define BXTWC_MTHRM0IRQ 0x4E12
51 #define BXTWC_MTHRM1IRQ 0x4E13
52 #define BXTWC_MTHRM2IRQ 0x4E14
53 #define BXTWC_MBCUIRQ 0x4E15
54 #define BXTWC_MADCIRQ 0x4E16
55 #define BXTWC_MCHGR0IRQ 0x4E17
56 #define BXTWC_MCHGR1IRQ 0x4E18
57 #define BXTWC_MGPIO0IRQ 0x4E19
58 #define BXTWC_MGPIO1IRQ 0x4E1A
59 #define BXTWC_MCRITIRQ 0x4E1B
61 /* Whiskey Cove PMIC share same ACPI ID between different platforms */
62 #define BROXTON_PMIC_WC_HRV 4
64 /* Manage in two IRQ chips since mask registers are not consecutive */
67 BXTWC_PWRBTN_LVL1_IRQ = 0,
80 enum bxtwc_irqs_level2 {
94 static const struct regmap_irq bxtwc_regmap_irqs[] = {
95 REGMAP_IRQ_REG(BXTWC_PWRBTN_LVL1_IRQ, 0, BIT(0)),
96 REGMAP_IRQ_REG(BXTWC_TMU_LVL1_IRQ, 0, BIT(1)),
97 REGMAP_IRQ_REG(BXTWC_THRM_LVL1_IRQ, 0, BIT(2)),
98 REGMAP_IRQ_REG(BXTWC_BCU_LVL1_IRQ, 0, BIT(3)),
99 REGMAP_IRQ_REG(BXTWC_ADC_LVL1_IRQ, 0, BIT(4)),
100 REGMAP_IRQ_REG(BXTWC_CHGR_LVL1_IRQ, 0, BIT(5)),
101 REGMAP_IRQ_REG(BXTWC_GPIO_LVL1_IRQ, 0, BIT(6)),
102 REGMAP_IRQ_REG(BXTWC_CRIT_LVL1_IRQ, 0, BIT(7)),
103 REGMAP_IRQ_REG(BXTWC_PWRBTN_IRQ, 1, 0x03),
106 static const struct regmap_irq bxtwc_regmap_irqs_level2[] = {
107 REGMAP_IRQ_REG(BXTWC_THRM0_IRQ, 0, 0xff),
108 REGMAP_IRQ_REG(BXTWC_THRM1_IRQ, 1, 0xbf),
109 REGMAP_IRQ_REG(BXTWC_THRM2_IRQ, 2, 0xff),
110 REGMAP_IRQ_REG(BXTWC_BCU_IRQ, 3, 0x1f),
111 REGMAP_IRQ_REG(BXTWC_ADC_IRQ, 4, 0xff),
112 REGMAP_IRQ_REG(BXTWC_CHGR0_IRQ, 5, 0x1f),
113 REGMAP_IRQ_REG(BXTWC_CHGR1_IRQ, 6, 0x1f),
114 REGMAP_IRQ_REG(BXTWC_GPIO0_IRQ, 7, 0xff),
115 REGMAP_IRQ_REG(BXTWC_GPIO1_IRQ, 8, 0x3f),
116 REGMAP_IRQ_REG(BXTWC_CRIT_IRQ, 9, 0x03),
119 static struct regmap_irq_chip bxtwc_regmap_irq_chip = {
120 .name = "bxtwc_irq_chip",
121 .status_base = BXTWC_IRQLVL1,
122 .mask_base = BXTWC_MIRQLVL1,
123 .irqs = bxtwc_regmap_irqs,
124 .num_irqs = ARRAY_SIZE(bxtwc_regmap_irqs),
128 static struct regmap_irq_chip bxtwc_regmap_irq_chip_level2 = {
129 .name = "bxtwc_irq_chip_level2",
130 .status_base = BXTWC_THRM0IRQ,
131 .mask_base = BXTWC_MTHRM0IRQ,
132 .irqs = bxtwc_regmap_irqs_level2,
133 .num_irqs = ARRAY_SIZE(bxtwc_regmap_irqs_level2),
137 static struct resource gpio_resources[] = {
138 DEFINE_RES_IRQ_NAMED(BXTWC_GPIO0_IRQ, "GPIO0"),
139 DEFINE_RES_IRQ_NAMED(BXTWC_GPIO1_IRQ, "GPIO1"),
142 static struct resource adc_resources[] = {
143 DEFINE_RES_IRQ_NAMED(BXTWC_ADC_IRQ, "ADC"),
146 static struct resource charger_resources[] = {
147 DEFINE_RES_IRQ_NAMED(BXTWC_CHGR0_IRQ, "CHARGER"),
148 DEFINE_RES_IRQ_NAMED(BXTWC_CHGR1_IRQ, "CHARGER1"),
151 static struct resource thermal_resources[] = {
152 DEFINE_RES_IRQ(BXTWC_THRM0_IRQ),
153 DEFINE_RES_IRQ(BXTWC_THRM1_IRQ),
154 DEFINE_RES_IRQ(BXTWC_THRM2_IRQ),
157 static struct resource bcu_resources[] = {
158 DEFINE_RES_IRQ_NAMED(BXTWC_BCU_IRQ, "BCU"),
161 static struct mfd_cell bxt_wc_dev[] = {
163 .name = "bxt_wcove_gpadc",
164 .num_resources = ARRAY_SIZE(adc_resources),
165 .resources = adc_resources,
168 .name = "bxt_wcove_thermal",
169 .num_resources = ARRAY_SIZE(thermal_resources),
170 .resources = thermal_resources,
173 .name = "bxt_wcove_ext_charger",
174 .num_resources = ARRAY_SIZE(charger_resources),
175 .resources = charger_resources,
178 .name = "bxt_wcove_bcu",
179 .num_resources = ARRAY_SIZE(bcu_resources),
180 .resources = bcu_resources,
183 .name = "bxt_wcove_gpio",
184 .num_resources = ARRAY_SIZE(gpio_resources),
185 .resources = gpio_resources,
188 .name = "bxt_wcove_region",
192 static int regmap_ipc_byte_reg_read(void *context, unsigned int reg,
199 struct intel_soc_pmic *pmic = context;
201 if (reg & REG_ADDR_MASK)
202 i2c_addr = (reg & REG_ADDR_MASK) >> REG_ADDR_SHIFT;
204 i2c_addr = BXTWC_DEVICE1_ADDR;
206 dev_err(pmic->dev, "I2C address not set\n");
210 reg &= REG_OFFSET_MASK;
213 ipc_in[1] = i2c_addr;
214 ret = intel_pmc_ipc_command(PMC_IPC_PMIC_ACCESS,
215 PMC_IPC_PMIC_ACCESS_READ,
216 ipc_in, sizeof(ipc_in), (u32 *)ipc_out, 1);
218 dev_err(pmic->dev, "Failed to read from PMIC\n");
226 static int regmap_ipc_byte_reg_write(void *context, unsigned int reg,
232 struct intel_soc_pmic *pmic = context;
234 if (reg & REG_ADDR_MASK)
235 i2c_addr = (reg & REG_ADDR_MASK) >> REG_ADDR_SHIFT;
237 i2c_addr = BXTWC_DEVICE1_ADDR;
239 dev_err(pmic->dev, "I2C address not set\n");
243 reg &= REG_OFFSET_MASK;
246 ipc_in[1] = i2c_addr;
248 ret = intel_pmc_ipc_command(PMC_IPC_PMIC_ACCESS,
249 PMC_IPC_PMIC_ACCESS_WRITE,
250 ipc_in, sizeof(ipc_in), NULL, 0);
252 dev_err(pmic->dev, "Failed to write to PMIC\n");
259 /* sysfs interfaces to r/w PMIC registers, required by initial script */
260 static unsigned long bxtwc_reg_addr;
261 static ssize_t bxtwc_reg_show(struct device *dev,
262 struct device_attribute *attr, char *buf)
264 return sprintf(buf, "0x%lx\n", bxtwc_reg_addr);
267 static ssize_t bxtwc_reg_store(struct device *dev,
268 struct device_attribute *attr, const char *buf, size_t count)
270 if (kstrtoul(buf, 0, &bxtwc_reg_addr)) {
271 dev_err(dev, "Invalid register address\n");
274 return (ssize_t)count;
277 static ssize_t bxtwc_val_show(struct device *dev,
278 struct device_attribute *attr, char *buf)
282 struct intel_soc_pmic *pmic = dev_get_drvdata(dev);
284 ret = regmap_read(pmic->regmap, bxtwc_reg_addr, &val);
286 dev_err(dev, "Failed to read 0x%lx\n", bxtwc_reg_addr);
290 return sprintf(buf, "0x%02x\n", val);
293 static ssize_t bxtwc_val_store(struct device *dev,
294 struct device_attribute *attr, const char *buf, size_t count)
298 struct intel_soc_pmic *pmic = dev_get_drvdata(dev);
300 ret = kstrtouint(buf, 0, &val);
304 ret = regmap_write(pmic->regmap, bxtwc_reg_addr, val);
306 dev_err(dev, "Failed to write value 0x%02x to address 0x%lx",
307 val, bxtwc_reg_addr);
313 static DEVICE_ATTR(addr, S_IWUSR | S_IRUSR, bxtwc_reg_show, bxtwc_reg_store);
314 static DEVICE_ATTR(val, S_IWUSR | S_IRUSR, bxtwc_val_show, bxtwc_val_store);
315 static struct attribute *bxtwc_attrs[] = {
321 static const struct attribute_group bxtwc_group = {
322 .attrs = bxtwc_attrs,
325 static const struct regmap_config bxtwc_regmap_config = {
328 .reg_write = regmap_ipc_byte_reg_write,
329 .reg_read = regmap_ipc_byte_reg_read,
332 static int bxtwc_probe(struct platform_device *pdev)
337 unsigned long long hrv;
338 struct intel_soc_pmic *pmic;
340 handle = ACPI_HANDLE(&pdev->dev);
341 status = acpi_evaluate_integer(handle, "_HRV", NULL, &hrv);
342 if (ACPI_FAILURE(status)) {
343 dev_err(&pdev->dev, "Failed to get PMIC hardware revision\n");
346 if (hrv != BROXTON_PMIC_WC_HRV) {
347 dev_err(&pdev->dev, "Invalid PMIC hardware revision: %llu\n",
352 pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL);
356 ret = platform_get_irq(pdev, 0);
358 dev_err(&pdev->dev, "Invalid IRQ\n");
363 dev_set_drvdata(&pdev->dev, pmic);
364 pmic->dev = &pdev->dev;
366 pmic->regmap = devm_regmap_init(&pdev->dev, NULL, pmic,
367 &bxtwc_regmap_config);
368 if (IS_ERR(pmic->regmap)) {
369 ret = PTR_ERR(pmic->regmap);
370 dev_err(&pdev->dev, "Failed to initialise regmap: %d\n", ret);
374 ret = regmap_add_irq_chip(pmic->regmap, pmic->irq,
375 IRQF_ONESHOT | IRQF_SHARED,
376 0, &bxtwc_regmap_irq_chip,
377 &pmic->irq_chip_data);
379 dev_err(&pdev->dev, "Failed to add IRQ chip\n");
383 ret = regmap_add_irq_chip(pmic->regmap, pmic->irq,
384 IRQF_ONESHOT | IRQF_SHARED,
385 0, &bxtwc_regmap_irq_chip_level2,
386 &pmic->irq_chip_data_level2);
388 dev_err(&pdev->dev, "Failed to add secondary IRQ chip\n");
389 goto err_irq_chip_level2;
392 ret = mfd_add_devices(&pdev->dev, PLATFORM_DEVID_NONE, bxt_wc_dev,
393 ARRAY_SIZE(bxt_wc_dev), NULL, 0,
396 dev_err(&pdev->dev, "Failed to add devices\n");
400 ret = sysfs_create_group(&pdev->dev.kobj, &bxtwc_group);
402 dev_err(&pdev->dev, "Failed to create sysfs group %d\n", ret);
409 mfd_remove_devices(&pdev->dev);
411 regmap_del_irq_chip(pmic->irq, pmic->irq_chip_data_level2);
413 regmap_del_irq_chip(pmic->irq, pmic->irq_chip_data);
418 static int bxtwc_remove(struct platform_device *pdev)
420 struct intel_soc_pmic *pmic = dev_get_drvdata(&pdev->dev);
422 sysfs_remove_group(&pdev->dev.kobj, &bxtwc_group);
423 mfd_remove_devices(&pdev->dev);
424 regmap_del_irq_chip(pmic->irq, pmic->irq_chip_data);
425 regmap_del_irq_chip(pmic->irq, pmic->irq_chip_data_level2);
430 static void bxtwc_shutdown(struct platform_device *pdev)
432 struct intel_soc_pmic *pmic = dev_get_drvdata(&pdev->dev);
434 disable_irq(pmic->irq);
437 #ifdef CONFIG_PM_SLEEP
438 static int bxtwc_suspend(struct device *dev)
440 struct intel_soc_pmic *pmic = dev_get_drvdata(dev);
442 disable_irq(pmic->irq);
447 static int bxtwc_resume(struct device *dev)
449 struct intel_soc_pmic *pmic = dev_get_drvdata(dev);
451 enable_irq(pmic->irq);
455 static SIMPLE_DEV_PM_OPS(bxtwc_pm_ops, bxtwc_suspend, bxtwc_resume);
457 static const struct acpi_device_id bxtwc_acpi_ids[] = {
461 MODULE_DEVICE_TABLE(acpi, pmic_acpi_ids);
463 static struct platform_driver bxtwc_driver = {
464 .probe = bxtwc_probe,
465 .remove = bxtwc_remove,
466 .shutdown = bxtwc_shutdown,
468 .name = "BXTWC PMIC",
470 .acpi_match_table = ACPI_PTR(bxtwc_acpi_ids),
474 module_platform_driver(bxtwc_driver);
476 MODULE_LICENSE("GPL v2");
477 MODULE_AUTHOR("Qipeng Zha<qipeng.zha@intel.com>");