2 * ChromeOS EC multi-function device (SPI)
4 * Copyright (C) 2012 Google, Inc
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
16 #include <linux/delay.h>
17 #include <linux/kernel.h>
18 #include <linux/module.h>
19 #include <linux/mfd/cros_ec.h>
20 #include <linux/mfd/cros_ec_commands.h>
22 #include <linux/platform_device.h>
23 #include <linux/slab.h>
24 #include <linux/spi/spi.h>
27 /* The header byte, which follows the preamble */
28 #define EC_MSG_HEADER 0xec
31 * Number of EC preamble bytes we read at a time. Since it takes
32 * about 400-500us for the EC to respond there is not a lot of
33 * point in tuning this. If the EC could respond faster then
34 * we could increase this so that might expect the preamble and
35 * message to occur in a single transaction. However, the maximum
36 * SPI transfer size is 256 bytes, so at 5MHz we need a response
37 * time of perhaps <320us (200 bytes / 1600 bits).
39 #define EC_MSG_PREAMBLE_COUNT 32
42 * Allow for a long time for the EC to respond. We support i2c
43 * tunneling and support fairly long messages for the tunnel (249
44 * bytes long at the moment). If we're talking to a 100 kHz device
45 * on the other end and need to transfer ~256 bytes, then we need:
46 * 10 us/bit * ~10 bits/byte * ~256 bytes = ~25ms
48 * We'll wait 8 times that to handle clock stretching and other
49 * paranoia. Note that some battery gas gauge ICs claim to have a
50 * clock stretch of 144ms in rare situations. That's incentive for
51 * not directly passing i2c through, but it's too late for that for
54 * It's pretty unlikely that we'll really see a 249 byte tunnel in
55 * anything other than testing. If this was more common we might
56 * consider having slow commands like this require a GET_STATUS
57 * wait loop. The 'flash write' command would be another candidate
58 * for this, clocking in at 2-3ms.
60 #define EC_MSG_DEADLINE_MS 200
63 * Time between raising the SPI chip select (for the end of a
64 * transaction) and dropping it again (for the next transaction).
65 * If we go too fast, the EC will miss the transaction. We know that we
66 * need at least 70 us with the 16 MHz STM32 EC, so go with 200 us to be
69 #define EC_SPI_RECOVERY_TIME_NS (200 * 1000)
72 * struct cros_ec_spi - information about a SPI-connected EC
74 * @spi: SPI device we are connected to
75 * @last_transfer_ns: time that we last finished a transfer.
76 * @start_of_msg_delay: used to set the delay_usecs on the spi_transfer that
77 * is sent when we want to turn on CS at the start of a transaction.
78 * @end_of_msg_delay: used to set the delay_usecs on the spi_transfer that
79 * is sent when we want to turn off CS at the end of a transaction.
82 struct spi_device *spi;
84 unsigned int start_of_msg_delay;
85 unsigned int end_of_msg_delay;
88 static void debug_packet(struct device *dev, const char *name, u8 *ptr,
94 dev_dbg(dev, "%s: ", name);
95 for (i = 0; i < len; i++)
96 pr_cont(" %02x", ptr[i]);
102 static int terminate_request(struct cros_ec_device *ec_dev)
104 struct cros_ec_spi *ec_spi = ec_dev->priv;
105 struct spi_message msg;
106 struct spi_transfer trans;
110 * Turn off CS, possibly adding a delay to ensure the rising edge
111 * doesn't come too soon after the end of the data.
113 spi_message_init(&msg);
114 memset(&trans, 0, sizeof(trans));
115 trans.delay_usecs = ec_spi->end_of_msg_delay;
116 spi_message_add_tail(&trans, &msg);
118 ret = spi_sync_locked(ec_spi->spi, &msg);
120 /* Reset end-of-response timer */
121 ec_spi->last_transfer_ns = ktime_get_ns();
124 "cs-deassert spi transfer failed: %d\n",
132 * receive_n_bytes - receive n bytes from the EC.
134 * Assumes buf is a pointer into the ec_dev->din buffer
136 static int receive_n_bytes(struct cros_ec_device *ec_dev, u8 *buf, int n)
138 struct cros_ec_spi *ec_spi = ec_dev->priv;
139 struct spi_transfer trans;
140 struct spi_message msg;
143 BUG_ON(buf - ec_dev->din + n > ec_dev->din_size);
145 memset(&trans, 0, sizeof(trans));
150 spi_message_init(&msg);
151 spi_message_add_tail(&trans, &msg);
152 ret = spi_sync_locked(ec_spi->spi, &msg);
154 dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret);
160 * cros_ec_spi_receive_packet - Receive a packet from the EC.
162 * This function has two phases: reading the preamble bytes (since if we read
163 * data from the EC before it is ready to send, we just get preamble) and
164 * reading the actual message.
166 * The received data is placed into ec_dev->din.
168 * @ec_dev: ChromeOS EC device
169 * @need_len: Number of message bytes we need to read
171 static int cros_ec_spi_receive_packet(struct cros_ec_device *ec_dev,
174 struct ec_host_response *response;
177 unsigned long deadline;
180 BUG_ON(ec_dev->din_size < EC_MSG_PREAMBLE_COUNT);
182 /* Receive data until we see the header byte */
183 deadline = jiffies + msecs_to_jiffies(EC_MSG_DEADLINE_MS);
185 unsigned long start_jiffies = jiffies;
187 ret = receive_n_bytes(ec_dev,
189 EC_MSG_PREAMBLE_COUNT);
194 for (end = ptr + EC_MSG_PREAMBLE_COUNT; ptr != end; ptr++) {
195 if (*ptr == EC_SPI_FRAME_START) {
196 dev_dbg(ec_dev->dev, "msg found at %zd\n",
205 * Use the time at the start of the loop as a timeout. This
206 * gives us one last shot at getting the transfer and is useful
207 * in case we got context switched out for a while.
209 if (time_after(start_jiffies, deadline)) {
210 dev_warn(ec_dev->dev, "EC failed to respond in time\n");
216 * ptr now points to the header byte. Copy any valid data to the
217 * start of our buffer
220 BUG_ON(todo < 0 || todo > ec_dev->din_size);
221 todo = min(todo, need_len);
222 memmove(ec_dev->din, ptr, todo);
223 ptr = ec_dev->din + todo;
224 dev_dbg(ec_dev->dev, "need %d, got %d bytes from preamble\n",
228 /* If the entire response struct wasn't read, get the rest of it. */
229 if (todo < sizeof(*response)) {
230 ret = receive_n_bytes(ec_dev, ptr, sizeof(*response) - todo);
233 ptr += (sizeof(*response) - todo);
234 todo = sizeof(*response);
237 response = (struct ec_host_response *)ec_dev->din;
239 /* Abort if data_len is too large. */
240 if (response->data_len > ec_dev->din_size)
243 /* Receive data until we have it all */
244 while (need_len > 0) {
246 * We can't support transfers larger than the SPI FIFO size
247 * unless we have DMA. We don't have DMA on the ISP SPI ports
248 * for Exynos. We need a way of asking SPI driver for
249 * maximum-supported transfer size.
251 todo = min(need_len, 256);
252 dev_dbg(ec_dev->dev, "loop, todo=%d, need_len=%d, ptr=%zd\n",
253 todo, need_len, ptr - ec_dev->din);
255 ret = receive_n_bytes(ec_dev, ptr, todo);
263 dev_dbg(ec_dev->dev, "loop done, ptr=%zd\n", ptr - ec_dev->din);
269 * cros_ec_spi_receive_response - Receive a response from the EC.
271 * This function has two phases: reading the preamble bytes (since if we read
272 * data from the EC before it is ready to send, we just get preamble) and
273 * reading the actual message.
275 * The received data is placed into ec_dev->din.
277 * @ec_dev: ChromeOS EC device
278 * @need_len: Number of message bytes we need to read
280 static int cros_ec_spi_receive_response(struct cros_ec_device *ec_dev,
285 unsigned long deadline;
288 BUG_ON(ec_dev->din_size < EC_MSG_PREAMBLE_COUNT);
290 /* Receive data until we see the header byte */
291 deadline = jiffies + msecs_to_jiffies(EC_MSG_DEADLINE_MS);
293 unsigned long start_jiffies = jiffies;
295 ret = receive_n_bytes(ec_dev,
297 EC_MSG_PREAMBLE_COUNT);
302 for (end = ptr + EC_MSG_PREAMBLE_COUNT; ptr != end; ptr++) {
303 if (*ptr == EC_SPI_FRAME_START) {
304 dev_dbg(ec_dev->dev, "msg found at %zd\n",
313 * Use the time at the start of the loop as a timeout. This
314 * gives us one last shot at getting the transfer and is useful
315 * in case we got context switched out for a while.
317 if (time_after(start_jiffies, deadline)) {
318 dev_warn(ec_dev->dev, "EC failed to respond in time\n");
324 * ptr now points to the header byte. Copy any valid data to the
325 * start of our buffer
328 BUG_ON(todo < 0 || todo > ec_dev->din_size);
329 todo = min(todo, need_len);
330 memmove(ec_dev->din, ptr, todo);
331 ptr = ec_dev->din + todo;
332 dev_dbg(ec_dev->dev, "need %d, got %d bytes from preamble\n",
336 /* Receive data until we have it all */
337 while (need_len > 0) {
339 * We can't support transfers larger than the SPI FIFO size
340 * unless we have DMA. We don't have DMA on the ISP SPI ports
341 * for Exynos. We need a way of asking SPI driver for
342 * maximum-supported transfer size.
344 todo = min(need_len, 256);
345 dev_dbg(ec_dev->dev, "loop, todo=%d, need_len=%d, ptr=%zd\n",
346 todo, need_len, ptr - ec_dev->din);
348 ret = receive_n_bytes(ec_dev, ptr, todo);
352 debug_packet(ec_dev->dev, "interim", ptr, todo);
357 dev_dbg(ec_dev->dev, "loop done, ptr=%zd\n", ptr - ec_dev->din);
363 * cros_ec_pkt_xfer_spi - Transfer a packet over SPI and receive the reply
365 * @ec_dev: ChromeOS EC device
366 * @ec_msg: Message to transfer
368 static int cros_ec_pkt_xfer_spi(struct cros_ec_device *ec_dev,
369 struct cros_ec_command *ec_msg)
371 struct ec_host_response *response;
372 struct cros_ec_spi *ec_spi = ec_dev->priv;
373 struct spi_transfer trans, trans_delay;
374 struct spi_message msg;
380 int ret = 0, final_ret;
383 len = cros_ec_prepare_tx(ec_dev, ec_msg);
384 dev_dbg(ec_dev->dev, "prepared, len=%d\n", len);
386 /* If it's too soon to do another transaction, wait */
387 delay = ktime_get_ns() - ec_spi->last_transfer_ns;
388 if (delay < EC_SPI_RECOVERY_TIME_NS)
389 ndelay(EC_SPI_RECOVERY_TIME_NS - delay);
391 rx_buf = kzalloc(len, GFP_KERNEL);
395 spi_bus_lock(ec_spi->spi->master);
398 * Leave a gap between CS assertion and clocking of data to allow the
401 spi_message_init(&msg);
402 if (ec_spi->start_of_msg_delay) {
403 memset(&trans_delay, 0, sizeof(trans_delay));
404 trans_delay.delay_usecs = ec_spi->start_of_msg_delay;
405 spi_message_add_tail(&trans_delay, &msg);
408 /* Transmit phase - send our message */
409 memset(&trans, 0, sizeof(trans));
410 trans.tx_buf = ec_dev->dout;
411 trans.rx_buf = rx_buf;
414 spi_message_add_tail(&trans, &msg);
415 ret = spi_sync_locked(ec_spi->spi, &msg);
417 /* Get the response */
419 /* Verify that EC can process command */
420 for (i = 0; i < len; i++) {
422 if (rx_byte == EC_SPI_PAST_END ||
423 rx_byte == EC_SPI_RX_BAD_DATA ||
424 rx_byte == EC_SPI_NOT_READY) {
432 ret = cros_ec_spi_receive_packet(ec_dev,
433 ec_msg->insize + sizeof(*response));
435 dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret);
437 final_ret = terminate_request(ec_dev);
439 spi_bus_unlock(ec_spi->spi->master);
448 /* check response error code */
449 response = (struct ec_host_response *)ptr;
450 ec_msg->result = response->result;
452 ret = cros_ec_check_result(ec_dev, ec_msg);
456 len = response->data_len;
458 if (len > ec_msg->insize) {
459 dev_err(ec_dev->dev, "packet too long (%d bytes, expected %d)",
460 len, ec_msg->insize);
465 for (i = 0; i < sizeof(*response); i++)
468 /* copy response packet payload and compute checksum */
469 memcpy(ec_msg->data, ptr + sizeof(*response), len);
470 for (i = 0; i < len; i++)
471 sum += ec_msg->data[i];
475 "bad packet checksum, calculated %x\n",
484 if (ec_msg->command == EC_CMD_REBOOT_EC)
485 msleep(EC_REBOOT_DELAY_MS);
491 * cros_ec_cmd_xfer_spi - Transfer a message over SPI and receive the reply
493 * @ec_dev: ChromeOS EC device
494 * @ec_msg: Message to transfer
496 static int cros_ec_cmd_xfer_spi(struct cros_ec_device *ec_dev,
497 struct cros_ec_command *ec_msg)
499 struct cros_ec_spi *ec_spi = ec_dev->priv;
500 struct spi_transfer trans;
501 struct spi_message msg;
507 int ret = 0, final_ret;
510 len = cros_ec_prepare_tx(ec_dev, ec_msg);
511 dev_dbg(ec_dev->dev, "prepared, len=%d\n", len);
513 /* If it's too soon to do another transaction, wait */
514 delay = ktime_get_ns() - ec_spi->last_transfer_ns;
515 if (delay < EC_SPI_RECOVERY_TIME_NS)
516 ndelay(EC_SPI_RECOVERY_TIME_NS - delay);
518 rx_buf = kzalloc(len, GFP_KERNEL);
522 spi_bus_lock(ec_spi->spi->master);
524 /* Transmit phase - send our message */
525 debug_packet(ec_dev->dev, "out", ec_dev->dout, len);
526 memset(&trans, 0, sizeof(trans));
527 trans.tx_buf = ec_dev->dout;
528 trans.rx_buf = rx_buf;
531 spi_message_init(&msg);
532 spi_message_add_tail(&trans, &msg);
533 ret = spi_sync_locked(ec_spi->spi, &msg);
535 /* Get the response */
537 /* Verify that EC can process command */
538 for (i = 0; i < len; i++) {
540 if (rx_byte == EC_SPI_PAST_END ||
541 rx_byte == EC_SPI_RX_BAD_DATA ||
542 rx_byte == EC_SPI_NOT_READY) {
550 ret = cros_ec_spi_receive_response(ec_dev,
551 ec_msg->insize + EC_MSG_TX_PROTO_BYTES);
553 dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret);
555 final_ret = terminate_request(ec_dev);
557 spi_bus_unlock(ec_spi->spi->master);
566 /* check response error code */
567 ec_msg->result = ptr[0];
568 ret = cros_ec_check_result(ec_dev, ec_msg);
573 sum = ptr[0] + ptr[1];
574 if (len > ec_msg->insize) {
575 dev_err(ec_dev->dev, "packet too long (%d bytes, expected %d)",
576 len, ec_msg->insize);
581 /* copy response packet payload and compute checksum */
582 for (i = 0; i < len; i++) {
585 ec_msg->data[i] = ptr[i + 2];
589 debug_packet(ec_dev->dev, "in", ptr, len + 3);
591 if (sum != ptr[len + 2]) {
593 "bad packet checksum, expected %02x, got %02x\n",
602 if (ec_msg->command == EC_CMD_REBOOT_EC)
603 msleep(EC_REBOOT_DELAY_MS);
608 static void cros_ec_spi_dt_probe(struct cros_ec_spi *ec_spi, struct device *dev)
610 struct device_node *np = dev->of_node;
614 ret = of_property_read_u32(np, "google,cros-ec-spi-pre-delay", &val);
616 ec_spi->start_of_msg_delay = val;
618 ret = of_property_read_u32(np, "google,cros-ec-spi-msg-delay", &val);
620 ec_spi->end_of_msg_delay = val;
623 static int cros_ec_spi_probe(struct spi_device *spi)
625 struct device *dev = &spi->dev;
626 struct cros_ec_device *ec_dev;
627 struct cros_ec_spi *ec_spi;
630 spi->bits_per_word = 8;
631 spi->mode = SPI_MODE_0;
632 err = spi_setup(spi);
636 ec_spi = devm_kzalloc(dev, sizeof(*ec_spi), GFP_KERNEL);
640 ec_dev = devm_kzalloc(dev, sizeof(*ec_dev), GFP_KERNEL);
644 /* Check for any DT properties */
645 cros_ec_spi_dt_probe(ec_spi, dev);
647 spi_set_drvdata(spi, ec_dev);
649 ec_dev->priv = ec_spi;
650 ec_dev->irq = spi->irq;
651 ec_dev->cmd_xfer = cros_ec_cmd_xfer_spi;
652 ec_dev->pkt_xfer = cros_ec_pkt_xfer_spi;
653 ec_dev->phys_name = dev_name(&ec_spi->spi->dev);
654 ec_dev->din_size = EC_MSG_PREAMBLE_COUNT +
655 sizeof(struct ec_host_response) +
656 sizeof(struct ec_response_get_protocol_info);
657 ec_dev->dout_size = sizeof(struct ec_host_request);
659 ec_spi->last_transfer_ns = ktime_get_ns();
661 err = cros_ec_register(ec_dev);
663 dev_err(dev, "cannot register EC\n");
667 device_init_wakeup(&spi->dev, true);
672 static int cros_ec_spi_remove(struct spi_device *spi)
674 struct cros_ec_device *ec_dev;
676 ec_dev = spi_get_drvdata(spi);
677 cros_ec_remove(ec_dev);
682 #ifdef CONFIG_PM_SLEEP
683 static int cros_ec_spi_suspend(struct device *dev)
685 struct cros_ec_device *ec_dev = dev_get_drvdata(dev);
687 return cros_ec_suspend(ec_dev);
690 static int cros_ec_spi_resume(struct device *dev)
692 struct cros_ec_device *ec_dev = dev_get_drvdata(dev);
694 return cros_ec_resume(ec_dev);
698 static SIMPLE_DEV_PM_OPS(cros_ec_spi_pm_ops, cros_ec_spi_suspend,
701 static const struct of_device_id cros_ec_spi_of_match[] = {
702 { .compatible = "google,cros-ec-spi", },
705 MODULE_DEVICE_TABLE(of, cros_ec_spi_of_match);
707 static const struct spi_device_id cros_ec_spi_id[] = {
708 { "cros-ec-spi", 0 },
711 MODULE_DEVICE_TABLE(spi, cros_ec_spi_id);
713 static struct spi_driver cros_ec_driver_spi = {
715 .name = "cros-ec-spi",
716 .of_match_table = of_match_ptr(cros_ec_spi_of_match),
717 .pm = &cros_ec_spi_pm_ops,
719 .probe = cros_ec_spi_probe,
720 .remove = cros_ec_spi_remove,
721 .id_table = cros_ec_spi_id,
724 module_spi_driver(cros_ec_driver_spi);
726 MODULE_LICENSE("GPL v2");
727 MODULE_DESCRIPTION("ChromeOS EC multi function device (SPI)");