drivers/message/fusion/mptbase.c

   1 /*
   2  *  linux/drivers/message/fusion/mptbase.c
   3  *      This is the Fusion MPT base driver which supports multiple
   4  *      (SCSI + LAN) specialized protocol drivers.
   5  *      For use with LSI PCI chip/adapter(s)
   6  *      running LSI Fusion MPT (Message Passing Technology) firmware.
   7  *
   8  *  Copyright (c) 1999-2008 LSI Corporation
   9  *  (mailto:DL-MPTFusionLinux@lsi.com)
  10  *
  11  */
  12 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  13 /*
  14     This program is free software; you can redistribute it and/or modify
  15     it under the terms of the GNU General Public License as published by
  16     the Free Software Foundation; version 2 of the License.
  17
  18     This program is distributed in the hope that it will be useful,
  19     but WITHOUT ANY WARRANTY; without even the implied warranty of
  20     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  21     GNU General Public License for more details.
  22
  23     NO WARRANTY
  24     THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
  25     CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
  26     LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
  27     MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
  28     solely responsible for determining the appropriateness of using and
  29     distributing the Program and assumes all risks associated with its
  30     exercise of rights under this Agreement, including but not limited to
  31     the risks and costs of program errors, damage to or loss of data,
  32     programs or equipment, and unavailability or interruption of operations.
  33
  34     DISCLAIMER OF LIABILITY
  35     NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
  36     DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  37     DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
  38     ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
  39     TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
  40     USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
  41     HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
  42
  43     You should have received a copy of the GNU General Public License
  44     along with this program; if not, write to the Free Software
  45     Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  46 */
  47 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  48
  49 #include <linux/kernel.h>
  50 #include <linux/module.h>
  51 #include <linux/errno.h>
  52 #include <linux/init.h>
  53 #include <linux/seq_file.h>
  54 #include <linux/slab.h>
  55 #include <linux/types.h>
  56 #include <linux/pci.h>
  57 #include <linux/kdev_t.h>
  58 #include <linux/blkdev.h>
  59 #include <linux/delay.h>
  60 #include <linux/interrupt.h>
  61 #include <linux/dma-mapping.h>
  62 #include <linux/kthread.h>
  63 #include <scsi/scsi_host.h>
  64
  65 #include "mptbase.h"
  66 #include "lsi/mpi_log_fc.h"
  67
  68 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  69 #define my_NAME         "Fusion MPT base driver"
  70 #define my_VERSION      MPT_LINUX_VERSION_COMMON
  71 #define MYNAM           "mptbase"
  72
  73 MODULE_AUTHOR(MODULEAUTHOR);
  74 MODULE_DESCRIPTION(my_NAME);
  75 MODULE_LICENSE("GPL");
  76 MODULE_VERSION(my_VERSION);
  77
  78 /*
  79  *  cmd line parameters
  80  */
  81
  82 static int mpt_msi_enable_spi;
  83 module_param(mpt_msi_enable_spi, int, 0);
  84 MODULE_PARM_DESC(mpt_msi_enable_spi,
  85                  " Enable MSI Support for SPI controllers (default=0)");
  86
  87 static int mpt_msi_enable_fc;
  88 module_param(mpt_msi_enable_fc, int, 0);
  89 MODULE_PARM_DESC(mpt_msi_enable_fc,
  90                  " Enable MSI Support for FC controllers (default=0)");
  91
  92 static int mpt_msi_enable_sas;
  93 module_param(mpt_msi_enable_sas, int, 0);
  94 MODULE_PARM_DESC(mpt_msi_enable_sas,
  95                  " Enable MSI Support for SAS controllers (default=0)");
  96
  97 static int mpt_channel_mapping;
  98 module_param(mpt_channel_mapping, int, 0);
  99 MODULE_PARM_DESC(mpt_channel_mapping, " Mapping id's to channels (default=0)");
 100
 101 static int mpt_debug_level;
 102 static int mpt_set_debug_level(const char *val, const struct kernel_param *kp);
 103 module_param_call(mpt_debug_level, mpt_set_debug_level, param_get_int,
 104                   &mpt_debug_level, 0600);
 105 MODULE_PARM_DESC(mpt_debug_level,
 106                  " debug level - refer to mptdebug.h - (default=0)");
 107
 108 int mpt_fwfault_debug;
 109 EXPORT_SYMBOL(mpt_fwfault_debug);
 110 module_param(mpt_fwfault_debug, int, 0600);
 111 MODULE_PARM_DESC(mpt_fwfault_debug,
 112                  "Enable detection of Firmware fault and halt Firmware on fault - (default=0)");
 113
 114 static char     MptCallbacksName[MPT_MAX_PROTOCOL_DRIVERS]
 115                                 [MPT_MAX_CALLBACKNAME_LEN+1];
 116
 117 #ifdef MFCNT
 118 static int mfcounter = 0;
 119 #define PRINT_MF_COUNT 20000
 120 #endif
 121
 122 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
 123 /*
 124  *  Public data...
 125  */
 126
 127 #define WHOINIT_UNKNOWN         0xAA
 128
 129 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
 130 /*
 131  *  Private data...
 132  */
 133                                         /* Adapter link list */
 134 LIST_HEAD(ioc_list);
 135                                         /* Callback lookup table */
 136 static MPT_CALLBACK              MptCallbacks[MPT_MAX_PROTOCOL_DRIVERS];
 137                                         /* Protocol driver class lookup table */
 138 static int                       MptDriverClass[MPT_MAX_PROTOCOL_DRIVERS];
 139                                         /* Event handler lookup table */
 140 static MPT_EVHANDLER             MptEvHandlers[MPT_MAX_PROTOCOL_DRIVERS];
 141                                         /* Reset handler lookup table */
 142 static MPT_RESETHANDLER          MptResetHandlers[MPT_MAX_PROTOCOL_DRIVERS];
 143 static struct mpt_pci_driver    *MptDeviceDriverHandlers[MPT_MAX_PROTOCOL_DRIVERS];
 144
 145 #ifdef CONFIG_PROC_FS
 146 static struct proc_dir_entry    *mpt_proc_root_dir;
 147 #endif
 148
 149 /*
 150  *  Driver Callback Index's
 151  */
 152 static u8 mpt_base_index = MPT_MAX_PROTOCOL_DRIVERS;
 153 static u8 last_drv_idx;
 154
 155 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
 156 /*
 157  *  Forward protos...
 158  */
 159 static irqreturn_t mpt_interrupt(int irq, void *bus_id);
 160 static int      mptbase_reply(MPT_ADAPTER *ioc, MPT_FRAME_HDR *req,
 161                 MPT_FRAME_HDR *reply);
 162 static int      mpt_handshake_req_reply_wait(MPT_ADAPTER *ioc, int reqBytes,
 163                         u32 *req, int replyBytes, u16 *u16reply, int maxwait,
 164                         int sleepFlag);
 165 static int      mpt_do_ioc_recovery(MPT_ADAPTER *ioc, u32 reason, int sleepFlag);
 166 static void     mpt_detect_bound_ports(MPT_ADAPTER *ioc, struct pci_dev *pdev);
 167 static void     mpt_adapter_disable(MPT_ADAPTER *ioc);
 168 static void     mpt_adapter_dispose(MPT_ADAPTER *ioc);
 169
 170 static void     MptDisplayIocCapabilities(MPT_ADAPTER *ioc);
 171 static int      MakeIocReady(MPT_ADAPTER *ioc, int force, int sleepFlag);
 172 static int      GetIocFacts(MPT_ADAPTER *ioc, int sleepFlag, int reason);
 173 static int      GetPortFacts(MPT_ADAPTER *ioc, int portnum, int sleepFlag);
 174 static int      SendIocInit(MPT_ADAPTER *ioc, int sleepFlag);
 175 static int      SendPortEnable(MPT_ADAPTER *ioc, int portnum, int sleepFlag);
 176 static int      mpt_do_upload(MPT_ADAPTER *ioc, int sleepFlag);
 177 static int      mpt_downloadboot(MPT_ADAPTER *ioc, MpiFwHeader_t *pFwHeader, int sleepFlag);
 178 static int      mpt_diag_reset(MPT_ADAPTER *ioc, int ignore, int sleepFlag);
 179 static int      KickStart(MPT_ADAPTER *ioc, int ignore, int sleepFlag);
 180 static int      SendIocReset(MPT_ADAPTER *ioc, u8 reset_type, int sleepFlag);
 181 static int      PrimeIocFifos(MPT_ADAPTER *ioc);
 182 static int      WaitForDoorbellAck(MPT_ADAPTER *ioc, int howlong, int sleepFlag);
 183 static int      WaitForDoorbellInt(MPT_ADAPTER *ioc, int howlong, int sleepFlag);
 184 static int      WaitForDoorbellReply(MPT_ADAPTER *ioc, int howlong, int sleepFlag);
 185 static int      GetLanConfigPages(MPT_ADAPTER *ioc);
 186 static int      GetIoUnitPage2(MPT_ADAPTER *ioc);
 187 int             mptbase_sas_persist_operation(MPT_ADAPTER *ioc, u8 persist_opcode);
 188 static int      mpt_GetScsiPortSettings(MPT_ADAPTER *ioc, int portnum);
 189 static int      mpt_readScsiDevicePageHeaders(MPT_ADAPTER *ioc, int portnum);
 190 static void     mpt_read_ioc_pg_1(MPT_ADAPTER *ioc);
 191 static void     mpt_read_ioc_pg_4(MPT_ADAPTER *ioc);
 192 static void     mpt_get_manufacturing_pg_0(MPT_ADAPTER *ioc);
 193 static int      SendEventNotification(MPT_ADAPTER *ioc, u8 EvSwitch,
 194         int sleepFlag);
 195 static int      SendEventAck(MPT_ADAPTER *ioc, EventNotificationReply_t *evnp);
 196 static int      mpt_host_page_access_control(MPT_ADAPTER *ioc, u8 access_control_value, int sleepFlag);
 197 static int      mpt_host_page_alloc(MPT_ADAPTER *ioc, pIOCInit_t ioc_init);
 198
 199 #ifdef CONFIG_PROC_FS
 200 static int mpt_summary_proc_show(struct seq_file *m, void *v);
 201 static int mpt_version_proc_show(struct seq_file *m, void *v);
 202 static int mpt_iocinfo_proc_show(struct seq_file *m, void *v);
 203 #endif
 204 static void     mpt_get_fw_exp_ver(char *buf, MPT_ADAPTER *ioc);
 205
 206 static int      ProcessEventNotification(MPT_ADAPTER *ioc,
 207                 EventNotificationReply_t *evReply, int *evHandlers);
 208 static void     mpt_iocstatus_info(MPT_ADAPTER *ioc, u32 ioc_status, MPT_FRAME_HDR *mf);
 209 static void     mpt_fc_log_info(MPT_ADAPTER *ioc, u32 log_info);
 210 static void     mpt_spi_log_info(MPT_ADAPTER *ioc, u32 log_info);
 211 static void     mpt_sas_log_info(MPT_ADAPTER *ioc, u32 log_info , u8 cb_idx);
 212 static int      mpt_read_ioc_pg_3(MPT_ADAPTER *ioc);
 213 static void     mpt_inactive_raid_list_free(MPT_ADAPTER *ioc);
 214
 215 /* module entry point */
 216 static int  __init    fusion_init  (void);
 217 static void __exit    fusion_exit  (void);
 218
 219 #define CHIPREG_READ32(addr)            readl_relaxed(addr)
 220 #define CHIPREG_READ32_dmasync(addr)    readl(addr)
 221 #define CHIPREG_WRITE32(addr,val)       writel(val, addr)
 222 #define CHIPREG_PIO_WRITE32(addr,val)   outl(val, (unsigned long)addr)
 223 #define CHIPREG_PIO_READ32(addr)        inl((unsigned long)addr)
 224
 225 static void
 226 pci_disable_io_access(struct pci_dev *pdev)
 227 {
 228         u16 command_reg;
 229
 230         pci_read_config_word(pdev, PCI_COMMAND, &command_reg);
 231         command_reg &= ~1;
 232         pci_write_config_word(pdev, PCI_COMMAND, command_reg);
 233 }
 234
 235 static void
 236 pci_enable_io_access(struct pci_dev *pdev)
 237 {
 238         u16 command_reg;
 239
 240         pci_read_config_word(pdev, PCI_COMMAND, &command_reg);
 241         command_reg |= 1;
 242         pci_write_config_word(pdev, PCI_COMMAND, command_reg);
 243 }
 244
 245 static int mpt_set_debug_level(const char *val, const struct kernel_param *kp)
 246 {
 247         int ret = param_set_int(val, kp);
 248         MPT_ADAPTER *ioc;
 249
 250         if (ret)
 251                 return ret;
 252
 253         list_for_each_entry(ioc, &ioc_list, list)
 254                 ioc->debug_level = mpt_debug_level;
 255         return 0;
 256 }
 257
 258 /**
 259  *      mpt_get_cb_idx - obtain cb_idx for registered driver
 260  *      @dclass: class driver enum
 261  *
 262  *      Returns cb_idx, or zero means it wasn't found
 263  **/
 264 static u8
 265 mpt_get_cb_idx(MPT_DRIVER_CLASS dclass)
 266 {
 267         u8 cb_idx;
 268
 269         for (cb_idx = MPT_MAX_PROTOCOL_DRIVERS-1; cb_idx; cb_idx--)
 270                 if (MptDriverClass[cb_idx] == dclass)
 271                         return cb_idx;
 272         return 0;
 273 }
 274
 275 /**
 276  * mpt_is_discovery_complete - determine if discovery has completed
 277  * @ioc: per adatper instance
 278  *
 279  * Returns 1 when discovery completed, else zero.
 280  */
 281 static int
 282 mpt_is_discovery_complete(MPT_ADAPTER *ioc)
 283 {
 284         ConfigExtendedPageHeader_t hdr;
 285         CONFIGPARMS cfg;
 286         SasIOUnitPage0_t *buffer;
 287         dma_addr_t dma_handle;
 288         int rc = 0;
 289
 290         memset(&hdr, 0, sizeof(ConfigExtendedPageHeader_t));
 291         memset(&cfg, 0, sizeof(CONFIGPARMS));
 292         hdr.PageVersion = MPI_SASIOUNITPAGE0_PAGEVERSION;
 293         hdr.PageType = MPI_CONFIG_PAGETYPE_EXTENDED;
 294         hdr.ExtPageType = MPI_CONFIG_EXTPAGETYPE_SAS_IO_UNIT;
 295         cfg.cfghdr.ehdr = &hdr;
 296         cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
 297
 298         if ((mpt_config(ioc, &cfg)))
 299                 goto out;
 300         if (!hdr.ExtPageLength)
 301                 goto out;
 302
 303         buffer = pci_alloc_consistent(ioc->pcidev, hdr.ExtPageLength * 4,
 304             &dma_handle);
 305         if (!buffer)
 306                 goto out;
 307
 308         cfg.physAddr = dma_handle;
 309         cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
 310
 311         if ((mpt_config(ioc, &cfg)))
 312                 goto out_free_consistent;
 313
 314         if (!(buffer->PhyData[0].PortFlags &
 315             MPI_SAS_IOUNIT0_PORT_FLAGS_DISCOVERY_IN_PROGRESS))
 316                 rc = 1;
 317
 318  out_free_consistent:
 319         pci_free_consistent(ioc->pcidev, hdr.ExtPageLength * 4,
 320             buffer, dma_handle);
 321  out:
 322         return rc;
 323 }
 324
 325
 326 /**
 327  *  mpt_remove_dead_ioc_func - kthread context to remove dead ioc
 328  * @arg: input argument, used to derive ioc
 329  *
 330  * Return 0 if controller is removed from pci subsystem.
 331  * Return -1 for other case.
 332  */
 333 static int mpt_remove_dead_ioc_func(void *arg)
 334 {
 335         MPT_ADAPTER *ioc = (MPT_ADAPTER *)arg;
 336         struct pci_dev *pdev;
 337
 338         if (!ioc)
 339                 return -1;
 340
 341         pdev = ioc->pcidev;
 342         if (!pdev)
 343                 return -1;
 344
 345         pci_stop_and_remove_bus_device_locked(pdev);
 346         return 0;
 347 }
 348
 349
 350
 351 /**
 352  *      mpt_fault_reset_work - work performed on workq after ioc fault
 353  *      @work: input argument, used to derive ioc
 354  *
 355 **/
 356 static void
 357 mpt_fault_reset_work(struct work_struct *work)
 358 {
 359         MPT_ADAPTER     *ioc =
 360             container_of(work, MPT_ADAPTER, fault_reset_work.work);
 361         u32              ioc_raw_state;
 362         int              rc;
 363         unsigned long    flags;
 364         MPT_SCSI_HOST   *hd;
 365         struct task_struct *p;
 366
 367         if (ioc->ioc_reset_in_progress || !ioc->active)
 368                 goto out;
 369
 370
 371         ioc_raw_state = mpt_GetIocState(ioc, 0);
 372         if ((ioc_raw_state & MPI_IOC_STATE_MASK) == MPI_IOC_STATE_MASK) {
 373                 printk(MYIOC_s_INFO_FMT "%s: IOC is non-operational !!!!\n",
 374                     ioc->name, __func__);
 375
 376                 /*
 377                  * Call mptscsih_flush_pending_cmds callback so that we
 378                  * flush all pending commands back to OS.
 379                  * This call is required to aovid deadlock at block layer.
 380                  * Dead IOC will fail to do diag reset,and this call is safe
 381                  * since dead ioc will never return any command back from HW.
 382                  */
 383                 hd = shost_priv(ioc->sh);
 384                 ioc->schedule_dead_ioc_flush_running_cmds(hd);
 385
 386                 /*Remove the Dead Host */
 387                 p = kthread_run(mpt_remove_dead_ioc_func, ioc,
 388                                 "mpt_dead_ioc_%d", ioc->id);
 389                 if (IS_ERR(p))  {
 390                         printk(MYIOC_s_ERR_FMT
 391                                 "%s: Running mpt_dead_ioc thread failed !\n",
 392                                 ioc->name, __func__);
 393                 } else {
 394                         printk(MYIOC_s_WARN_FMT
 395                                 "%s: Running mpt_dead_ioc thread success !\n",
 396                                 ioc->name, __func__);
 397                 }
 398                 return; /* don't rearm timer */
 399         }
 400
 401         if ((ioc_raw_state & MPI_IOC_STATE_MASK)
 402                         == MPI_IOC_STATE_FAULT) {
 403                 printk(MYIOC_s_WARN_FMT "IOC is in FAULT state (%04xh)!!!\n",
 404                        ioc->name, ioc_raw_state & MPI_DOORBELL_DATA_MASK);
 405                 printk(MYIOC_s_WARN_FMT "Issuing HardReset from %s!!\n",
 406                        ioc->name, __func__);
 407                 rc = mpt_HardResetHandler(ioc, CAN_SLEEP);
 408                 printk(MYIOC_s_WARN_FMT "%s: HardReset: %s\n", ioc->name,
 409                        __func__, (rc == 0) ? "success" : "failed");
 410                 ioc_raw_state = mpt_GetIocState(ioc, 0);
 411                 if ((ioc_raw_state & MPI_IOC_STATE_MASK) == MPI_IOC_STATE_FAULT)
 412                         printk(MYIOC_s_WARN_FMT "IOC is in FAULT state after "
 413                             "reset (%04xh)\n", ioc->name, ioc_raw_state &
 414                             MPI_DOORBELL_DATA_MASK);
 415         } else if (ioc->bus_type == SAS && ioc->sas_discovery_quiesce_io) {
 416                 if ((mpt_is_discovery_complete(ioc))) {
 417                         devtprintk(ioc, printk(MYIOC_s_DEBUG_FMT "clearing "
 418                             "discovery_quiesce_io flag\n", ioc->name));
 419                         ioc->sas_discovery_quiesce_io = 0;
 420                 }
 421         }
 422
 423  out:
 424         /*
 425          * Take turns polling alternate controller
 426          */
 427         if (ioc->alt_ioc)
 428                 ioc = ioc->alt_ioc;
 429
 430         /* rearm the timer */
 431         spin_lock_irqsave(&ioc->taskmgmt_lock, flags);
 432         if (ioc->reset_work_q)
 433                 queue_delayed_work(ioc->reset_work_q, &ioc->fault_reset_work,
 434                         msecs_to_jiffies(MPT_POLLING_INTERVAL));
 435         spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
 436 }
 437
 438
 439 /*
 440  *  Process turbo (context) reply...
 441  */
 442 static void
 443 mpt_turbo_reply(MPT_ADAPTER *ioc, u32 pa)
 444 {
 445         MPT_FRAME_HDR *mf = NULL;
 446         MPT_FRAME_HDR *mr = NULL;
 447         u16 req_idx = 0;
 448         u8 cb_idx;
 449
 450         dmfprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Got TURBO reply req_idx=%08x\n",
 451                                 ioc->name, pa));
 452
 453         switch (pa >> MPI_CONTEXT_REPLY_TYPE_SHIFT) {
 454         case MPI_CONTEXT_REPLY_TYPE_SCSI_INIT:
 455                 req_idx = pa & 0x0000FFFF;
 456                 cb_idx = (pa & 0x00FF0000) >> 16;
 457                 mf = MPT_INDEX_2_MFPTR(ioc, req_idx);
 458                 break;
 459         case MPI_CONTEXT_REPLY_TYPE_LAN:
 460                 cb_idx = mpt_get_cb_idx(MPTLAN_DRIVER);
 461                 /*
 462                  *  Blind set of mf to NULL here was fatal
 463                  *  after lan_reply says "freeme"
 464                  *  Fix sort of combined with an optimization here;
 465                  *  added explicit check for case where lan_reply
 466                  *  was just returning 1 and doing nothing else.
 467                  *  For this case skip the callback, but set up
 468                  *  proper mf value first here:-)
 469                  */
 470                 if ((pa & 0x58000000) == 0x58000000) {
 471                         req_idx = pa & 0x0000FFFF;
 472                         mf = MPT_INDEX_2_MFPTR(ioc, req_idx);
 473                         mpt_free_msg_frame(ioc, mf);
 474                         mb();
 475                         return;
 476                 }
 477                 mr = (MPT_FRAME_HDR *) CAST_U32_TO_PTR(pa);
 478                 break;
 479         case MPI_CONTEXT_REPLY_TYPE_SCSI_TARGET:
 480                 cb_idx = mpt_get_cb_idx(MPTSTM_DRIVER);
 481                 mr = (MPT_FRAME_HDR *) CAST_U32_TO_PTR(pa);
 482                 break;
 483         default:
 484                 cb_idx = 0;
 485                 BUG();
 486         }
 487
 488         /*  Check for (valid) IO callback!  */
 489         if (!cb_idx || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS ||
 490                 MptCallbacks[cb_idx] == NULL) {
 491                 printk(MYIOC_s_WARN_FMT "%s: Invalid cb_idx (%d)!\n",
 492                                 __func__, ioc->name, cb_idx);
 493                 goto out;
 494         }
 495
 496         if (MptCallbacks[cb_idx](ioc, mf, mr))
 497                 mpt_free_msg_frame(ioc, mf);
 498  out:
 499         mb();
 500 }
 501
 502 static void
 503 mpt_reply(MPT_ADAPTER *ioc, u32 pa)
 504 {
 505         MPT_FRAME_HDR   *mf;
 506         MPT_FRAME_HDR   *mr;
 507         u16              req_idx;
 508         u8               cb_idx;
 509         int              freeme;
 510
 511         u32 reply_dma_low;
 512         u16 ioc_stat;
 513
 514         /* non-TURBO reply!  Hmmm, something may be up...
 515          *  Newest turbo reply mechanism; get address
 516          *  via left shift 1 (get rid of MPI_ADDRESS_REPLY_A_BIT)!
 517          */
 518
 519         /* Map DMA address of reply header to cpu address.
 520          * pa is 32 bits - but the dma address may be 32 or 64 bits
 521          * get offset based only only the low addresses
 522          */
 523
 524         reply_dma_low = (pa <<= 1);
 525         mr = (MPT_FRAME_HDR *)((u8 *)ioc->reply_frames +
 526                          (reply_dma_low - ioc->reply_frames_low_dma));
 527
 528         req_idx = le16_to_cpu(mr->u.frame.hwhdr.msgctxu.fld.req_idx);
 529         cb_idx = mr->u.frame.hwhdr.msgctxu.fld.cb_idx;
 530         mf = MPT_INDEX_2_MFPTR(ioc, req_idx);
 531
 532         dmfprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Got non-TURBO reply=%p req_idx=%x cb_idx=%x Function=%x\n",
 533                         ioc->name, mr, req_idx, cb_idx, mr->u.hdr.Function));
 534         DBG_DUMP_REPLY_FRAME(ioc, (u32 *)mr);
 535
 536          /*  Check/log IOC log info
 537          */
 538         ioc_stat = le16_to_cpu(mr->u.reply.IOCStatus);
 539         if (ioc_stat & MPI_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE) {
 540                 u32      log_info = le32_to_cpu(mr->u.reply.IOCLogInfo);
 541                 if (ioc->bus_type == FC)
 542                         mpt_fc_log_info(ioc, log_info);
 543                 else if (ioc->bus_type == SPI)
 544                         mpt_spi_log_info(ioc, log_info);
 545                 else if (ioc->bus_type == SAS)
 546                         mpt_sas_log_info(ioc, log_info, cb_idx);
 547         }
 548
 549         if (ioc_stat & MPI_IOCSTATUS_MASK)
 550                 mpt_iocstatus_info(ioc, (u32)ioc_stat, mf);
 551
 552         /*  Check for (valid) IO callback!  */
 553         if (!cb_idx || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS ||
 554                 MptCallbacks[cb_idx] == NULL) {
 555                 printk(MYIOC_s_WARN_FMT "%s: Invalid cb_idx (%d)!\n",
 556                                 __func__, ioc->name, cb_idx);
 557                 freeme = 0;
 558                 goto out;
 559         }
 560
 561         freeme = MptCallbacks[cb_idx](ioc, mf, mr);
 562
 563  out:
 564         /*  Flush (non-TURBO) reply with a WRITE!  */
 565         CHIPREG_WRITE32(&ioc->chip->ReplyFifo, pa);
 566
 567         if (freeme)
 568                 mpt_free_msg_frame(ioc, mf);
 569         mb();
 570 }
 571
 572 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
 573 /**
 574  *      mpt_interrupt - MPT adapter (IOC) specific interrupt handler.
 575  *      @irq: irq number (not used)
 576  *      @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure
 577  *
 578  *      This routine is registered via the request_irq() kernel API call,
 579  *      and handles all interrupts generated from a specific MPT adapter
 580  *      (also referred to as a IO Controller or IOC).
 581  *      This routine must clear the interrupt from the adapter and does
 582  *      so by reading the reply FIFO.  Multiple replies may be processed
 583  *      per single call to this routine.
 584  *
 585  *      This routine handles register-level access of the adapter but
 586  *      dispatches (calls) a protocol-specific callback routine to handle
 587  *      the protocol-specific details of the MPT request completion.
 588  */
 589 static irqreturn_t
 590 mpt_interrupt(int irq, void *bus_id)
 591 {
 592         MPT_ADAPTER *ioc = bus_id;
 593         u32 pa = CHIPREG_READ32_dmasync(&ioc->chip->ReplyFifo);
 594
 595         if (pa == 0xFFFFFFFF)
 596                 return IRQ_NONE;
 597
 598         /*
 599          *  Drain the reply FIFO!
 600          */
 601         do {
 602                 if (pa & MPI_ADDRESS_REPLY_A_BIT)
 603                         mpt_reply(ioc, pa);
 604                 else
 605                         mpt_turbo_reply(ioc, pa);
 606                 pa = CHIPREG_READ32_dmasync(&ioc->chip->ReplyFifo);
 607         } while (pa != 0xFFFFFFFF);
 608
 609         return IRQ_HANDLED;
 610 }
 611
 612 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
 613 /**
 614  *      mptbase_reply - MPT base driver's callback routine
 615  *      @ioc: Pointer to MPT_ADAPTER structure
 616  *      @req: Pointer to original MPT request frame
 617  *      @reply: Pointer to MPT reply frame (NULL if TurboReply)
 618  *
 619  *      MPT base driver's callback routine; all base driver
 620  *      "internal" request/reply processing is routed here.
 621  *      Currently used for EventNotification and EventAck handling.
 622  *
 623  *      Returns 1 indicating original alloc'd request frame ptr
 624  *      should be freed, or 0 if it shouldn't.
 625  */
 626 static int
 627 mptbase_reply(MPT_ADAPTER *ioc, MPT_FRAME_HDR *req, MPT_FRAME_HDR *reply)
 628 {
 629         EventNotificationReply_t *pEventReply;
 630         u8 event;
 631         int evHandlers;
 632         int freereq = 1;
 633
 634         switch (reply->u.hdr.Function) {
 635         case MPI_FUNCTION_EVENT_NOTIFICATION:
 636                 pEventReply = (EventNotificationReply_t *)reply;
 637                 evHandlers = 0;
 638                 ProcessEventNotification(ioc, pEventReply, &evHandlers);
 639                 event = le32_to_cpu(pEventReply->Event) & 0xFF;
 640                 if (pEventReply->MsgFlags & MPI_MSGFLAGS_CONTINUATION_REPLY)
 641                         freereq = 0;
 642                 if (event != MPI_EVENT_EVENT_CHANGE)
 643                         break;
 644                 fallthrough;
 645         case MPI_FUNCTION_CONFIG:
 646         case MPI_FUNCTION_SAS_IO_UNIT_CONTROL:
 647                 ioc->mptbase_cmds.status |= MPT_MGMT_STATUS_COMMAND_GOOD;
 648                 ioc->mptbase_cmds.status |= MPT_MGMT_STATUS_RF_VALID;
 649                 memcpy(ioc->mptbase_cmds.reply, reply,
 650                     min(MPT_DEFAULT_FRAME_SIZE,
 651                         4 * reply->u.reply.MsgLength));
 652                 if (ioc->mptbase_cmds.status & MPT_MGMT_STATUS_PENDING) {
 653                         ioc->mptbase_cmds.status &= ~MPT_MGMT_STATUS_PENDING;
 654                         complete(&ioc->mptbase_cmds.done);
 655                 } else
 656                         freereq = 0;
 657                 if (ioc->mptbase_cmds.status & MPT_MGMT_STATUS_FREE_MF)
 658                         freereq = 1;
 659                 break;
 660         case MPI_FUNCTION_EVENT_ACK:
 661                 devtverboseprintk(ioc, printk(MYIOC_s_DEBUG_FMT
 662                     "EventAck reply received\n", ioc->name));
 663                 break;
 664         default:
 665                 printk(MYIOC_s_ERR_FMT
 666                     "Unexpected msg function (=%02Xh) reply received!\n",
 667                     ioc->name, reply->u.hdr.Function);
 668                 break;
 669         }
 670
 671         /*
 672          *      Conditionally tell caller to free the original
 673          *      EventNotification/EventAck/unexpected request frame!
 674          */
 675         return freereq;
 676 }
 677
 678 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
 679 /**
 680  *      mpt_register - Register protocol-specific main callback handler.
 681  *      @cbfunc: callback function pointer
 682  *      @dclass: Protocol driver's class (%MPT_DRIVER_CLASS enum value)
 683  *      @func_name: call function's name
 684  *
 685  *      This routine is called by a protocol-specific driver (SCSI host,
 686  *      LAN, SCSI target) to register its reply callback routine.  Each
 687  *      protocol-specific driver must do this before it will be able to
 688  *      use any IOC resources, such as obtaining request frames.
 689  *
 690  *      NOTES: The SCSI protocol driver currently calls this routine thrice
 691  *      in order to register separate callbacks; one for "normal" SCSI IO;
 692  *      one for MptScsiTaskMgmt requests; one for Scan/DV requests.
 693  *
 694  *      Returns u8 valued "handle" in the range (and S.O.D. order)
 695  *      {N,...,7,6,5,...,1} if successful.
 696  *      A return value of MPT_MAX_PROTOCOL_DRIVERS (including zero!) should be
 697  *      considered an error by the caller.
 698  */
 699 u8
 700 mpt_register(MPT_CALLBACK cbfunc, MPT_DRIVER_CLASS dclass, char *func_name)
 701 {
 702         u8 cb_idx;
 703         last_drv_idx = MPT_MAX_PROTOCOL_DRIVERS;
 704
 705         /*
 706          *  Search for empty callback slot in this order: {N,...,7,6,5,...,1}
 707          *  (slot/handle 0 is reserved!)
 708          */
 709         for (cb_idx = MPT_MAX_PROTOCOL_DRIVERS-1; cb_idx; cb_idx--) {
 710                 if (MptCallbacks[cb_idx] == NULL) {
 711                         MptCallbacks[cb_idx] = cbfunc;
 712                         MptDriverClass[cb_idx] = dclass;
 713                         MptEvHandlers[cb_idx] = NULL;
 714                         last_drv_idx = cb_idx;
 715                         strlcpy(MptCallbacksName[cb_idx], func_name,
 716                                 MPT_MAX_CALLBACKNAME_LEN+1);
 717                         break;
 718                 }
 719         }
 720
 721         return last_drv_idx;
 722 }
 723
 724 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
 725 /**
 726  *      mpt_deregister - Deregister a protocol drivers resources.
 727  *      @cb_idx: previously registered callback handle
 728  *
 729  *      Each protocol-specific driver should call this routine when its
 730  *      module is unloaded.
 731  */
 732 void
 733 mpt_deregister(u8 cb_idx)
 734 {
 735         if (cb_idx && (cb_idx < MPT_MAX_PROTOCOL_DRIVERS)) {
 736                 MptCallbacks[cb_idx] = NULL;
 737                 MptDriverClass[cb_idx] = MPTUNKNOWN_DRIVER;
 738                 MptEvHandlers[cb_idx] = NULL;
 739
 740                 last_drv_idx++;
 741         }
 742 }
 743
 744 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
 745 /**
 746  *      mpt_event_register - Register protocol-specific event callback handler.
 747  *      @cb_idx: previously registered (via mpt_register) callback handle
 748  *      @ev_cbfunc: callback function
 749  *
 750  *      This routine can be called by one or more protocol-specific drivers
 751  *      if/when they choose to be notified of MPT events.
 752  *
 753  *      Returns 0 for success.
 754  */
 755 int
 756 mpt_event_register(u8 cb_idx, MPT_EVHANDLER ev_cbfunc)
 757 {
 758         if (!cb_idx || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
 759                 return -1;
 760
 761         MptEvHandlers[cb_idx] = ev_cbfunc;
 762         return 0;
 763 }
 764
 765 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
 766 /**
 767  *      mpt_event_deregister - Deregister protocol-specific event callback handler
 768  *      @cb_idx: previously registered callback handle
 769  *
 770  *      Each protocol-specific driver should call this routine
 771  *      when it does not (or can no longer) handle events,
 772  *      or when its module is unloaded.
 773  */
 774 void
 775 mpt_event_deregister(u8 cb_idx)
 776 {
 777         if (!cb_idx || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
 778                 return;
 779
 780         MptEvHandlers[cb_idx] = NULL;
 781 }
 782
 783 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
 784 /**
 785  *      mpt_reset_register - Register protocol-specific IOC reset handler.
 786  *      @cb_idx: previously registered (via mpt_register) callback handle
 787  *      @reset_func: reset function
 788  *
 789  *      This routine can be called by one or more protocol-specific drivers
 790  *      if/when they choose to be notified of IOC resets.
 791  *
 792  *      Returns 0 for success.
 793  */
 794 int
 795 mpt_reset_register(u8 cb_idx, MPT_RESETHANDLER reset_func)
 796 {
 797         if (!cb_idx || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
 798                 return -1;
 799
 800         MptResetHandlers[cb_idx] = reset_func;
 801         return 0;
 802 }
 803
 804 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
 805 /**
 806  *      mpt_reset_deregister - Deregister protocol-specific IOC reset handler.
 807  *      @cb_idx: previously registered callback handle
 808  *
 809  *      Each protocol-specific driver should call this routine
 810  *      when it does not (or can no longer) handle IOC reset handling,
 811  *      or when its module is unloaded.
 812  */
 813 void
 814 mpt_reset_deregister(u8 cb_idx)
 815 {
 816         if (!cb_idx || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
 817                 return;
 818
 819         MptResetHandlers[cb_idx] = NULL;
 820 }
 821
 822 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
 823 /**
 824  *      mpt_device_driver_register - Register device driver hooks
 825  *      @dd_cbfunc: driver callbacks struct
 826  *      @cb_idx: MPT protocol driver index
 827  */
 828 int
 829 mpt_device_driver_register(struct mpt_pci_driver * dd_cbfunc, u8 cb_idx)
 830 {
 831         MPT_ADAPTER     *ioc;
 832         const struct pci_device_id *id;
 833
 834         if (!cb_idx || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
 835                 return -EINVAL;
 836
 837         MptDeviceDriverHandlers[cb_idx] = dd_cbfunc;
 838
 839         /* call per pci device probe entry point */
 840         list_for_each_entry(ioc, &ioc_list, list) {
 841                 id = ioc->pcidev->driver ?
 842                     ioc->pcidev->driver->id_table : NULL;
 843                 if (dd_cbfunc->probe)
 844                         dd_cbfunc->probe(ioc->pcidev, id);
 845          }
 846
 847         return 0;
 848 }
 849
 850 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
 851 /**
 852  *      mpt_device_driver_deregister - DeRegister device driver hooks
 853  *      @cb_idx: MPT protocol driver index
 854  */
 855 void
 856 mpt_device_driver_deregister(u8 cb_idx)
 857 {
 858         struct mpt_pci_driver *dd_cbfunc;
 859         MPT_ADAPTER     *ioc;
 860
 861         if (!cb_idx || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
 862                 return;
 863
 864         dd_cbfunc = MptDeviceDriverHandlers[cb_idx];
 865
 866         list_for_each_entry(ioc, &ioc_list, list) {
 867                 if (dd_cbfunc->remove)
 868                         dd_cbfunc->remove(ioc->pcidev);
 869         }
 870
 871         MptDeviceDriverHandlers[cb_idx] = NULL;
 872 }
 873
 874
 875 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
 876 /**
 877  *      mpt_get_msg_frame - Obtain an MPT request frame from the pool
 878  *      @cb_idx: Handle of registered MPT protocol driver
 879  *      @ioc: Pointer to MPT adapter structure
 880  *
 881  *      Obtain an MPT request frame from the pool (of 1024) that are
 882  *      allocated per MPT adapter.
 883  *
 884  *      Returns pointer to a MPT request frame or %NULL if none are available
 885  *      or IOC is not active.
 886  */
 887 MPT_FRAME_HDR*
 888 mpt_get_msg_frame(u8 cb_idx, MPT_ADAPTER *ioc)
 889 {
 890         MPT_FRAME_HDR *mf;
 891         unsigned long flags;
 892         u16      req_idx;       /* Request index */
 893
 894         /* validate handle and ioc identifier */
 895
 896 #ifdef MFCNT
 897         if (!ioc->active)
 898                 printk(MYIOC_s_WARN_FMT "IOC Not Active! mpt_get_msg_frame "
 899                     "returning NULL!\n", ioc->name);
 900 #endif
 901
 902         /* If interrupts are not attached, do not return a request frame */
 903         if (!ioc->active)
 904                 return NULL;
 905
 906         spin_lock_irqsave(&ioc->FreeQlock, flags);
 907         if (!list_empty(&ioc->FreeQ)) {
 908                 int req_offset;
 909
 910                 mf = list_entry(ioc->FreeQ.next, MPT_FRAME_HDR,
 911                                 u.frame.linkage.list);
 912                 list_del(&mf->u.frame.linkage.list);
 913                 mf->u.frame.linkage.arg1 = 0;
 914                 mf->u.frame.hwhdr.msgctxu.fld.cb_idx = cb_idx;  /* byte */
 915                 req_offset = (u8 *)mf - (u8 *)ioc->req_frames;
 916                                                                 /* u16! */
 917                 req_idx = req_offset / ioc->req_sz;
 918                 mf->u.frame.hwhdr.msgctxu.fld.req_idx = cpu_to_le16(req_idx);
 919                 mf->u.frame.hwhdr.msgctxu.fld.rsvd = 0;
 920                 /* Default, will be changed if necessary in SG generation */
 921                 ioc->RequestNB[req_idx] = ioc->NB_for_64_byte_frame;
 922 #ifdef MFCNT
 923                 ioc->mfcnt++;
 924 #endif
 925         }
 926         else
 927                 mf = NULL;
 928         spin_unlock_irqrestore(&ioc->FreeQlock, flags);
 929
 930 #ifdef MFCNT
 931         if (mf == NULL)
 932                 printk(MYIOC_s_WARN_FMT "IOC Active. No free Msg Frames! "
 933                     "Count 0x%x Max 0x%x\n", ioc->name, ioc->mfcnt,
 934                     ioc->req_depth);
 935         mfcounter++;
 936         if (mfcounter == PRINT_MF_COUNT)
 937                 printk(MYIOC_s_INFO_FMT "MF Count 0x%x Max 0x%x \n", ioc->name,
 938                     ioc->mfcnt, ioc->req_depth);
 939 #endif
 940
 941         dmfprintk(ioc, printk(MYIOC_s_DEBUG_FMT "mpt_get_msg_frame(%d,%d), got mf=%p\n",
 942             ioc->name, cb_idx, ioc->id, mf));
 943         return mf;
 944 }
 945
 946 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
 947 /**
 948  *      mpt_put_msg_frame - Send a protocol-specific MPT request frame to an IOC
 949  *      @cb_idx: Handle of registered MPT protocol driver
 950  *      @ioc: Pointer to MPT adapter structure
 951  *      @mf: Pointer to MPT request frame
 952  *
 953  *      This routine posts an MPT request frame to the request post FIFO of a
 954  *      specific MPT adapter.
 955  */
 956 void
 957 mpt_put_msg_frame(u8 cb_idx, MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf)
 958 {
 959         u32 mf_dma_addr;
 960         int req_offset;
 961         u16 req_idx;    /* Request index */
 962
 963         /* ensure values are reset properly! */
 964         mf->u.frame.hwhdr.msgctxu.fld.cb_idx = cb_idx;          /* byte */
 965         req_offset = (u8 *)mf - (u8 *)ioc->req_frames;
 966                                                                 /* u16! */
 967         req_idx = req_offset / ioc->req_sz;
 968         mf->u.frame.hwhdr.msgctxu.fld.req_idx = cpu_to_le16(req_idx);
 969         mf->u.frame.hwhdr.msgctxu.fld.rsvd = 0;
 970
 971         DBG_DUMP_PUT_MSG_FRAME(ioc, (u32 *)mf);
 972
 973         mf_dma_addr = (ioc->req_frames_low_dma + req_offset) | ioc->RequestNB[req_idx];
 974         dsgprintk(ioc, printk(MYIOC_s_DEBUG_FMT "mf_dma_addr=%x req_idx=%d "
 975             "RequestNB=%x\n", ioc->name, mf_dma_addr, req_idx,
 976             ioc->RequestNB[req_idx]));
 977         CHIPREG_WRITE32(&ioc->chip->RequestFifo, mf_dma_addr);
 978 }
 979
 980 /**
 981  *      mpt_put_msg_frame_hi_pri - Send a hi-pri protocol-specific MPT request frame
 982  *      @cb_idx: Handle of registered MPT protocol driver
 983  *      @ioc: Pointer to MPT adapter structure
 984  *      @mf: Pointer to MPT request frame
 985  *
 986  *      Send a protocol-specific MPT request frame to an IOC using
 987  *      hi-priority request queue.
 988  *
 989  *      This routine posts an MPT request frame to the request post FIFO of a
 990  *      specific MPT adapter.
 991  **/
 992 void
 993 mpt_put_msg_frame_hi_pri(u8 cb_idx, MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf)
 994 {
 995         u32 mf_dma_addr;
 996         int req_offset;
 997         u16 req_idx;    /* Request index */
 998
 999         /* ensure values are reset properly! */
1000         mf->u.frame.hwhdr.msgctxu.fld.cb_idx = cb_idx;
1001         req_offset = (u8 *)mf - (u8 *)ioc->req_frames;
1002         req_idx = req_offset / ioc->req_sz;
1003         mf->u.frame.hwhdr.msgctxu.fld.req_idx = cpu_to_le16(req_idx);
1004         mf->u.frame.hwhdr.msgctxu.fld.rsvd = 0;
1005
1006         DBG_DUMP_PUT_MSG_FRAME(ioc, (u32 *)mf);
1007
1008         mf_dma_addr = (ioc->req_frames_low_dma + req_offset);
1009         dsgprintk(ioc, printk(MYIOC_s_DEBUG_FMT "mf_dma_addr=%x req_idx=%d\n",
1010                 ioc->name, mf_dma_addr, req_idx));
1011         CHIPREG_WRITE32(&ioc->chip->RequestHiPriFifo, mf_dma_addr);
1012 }
1013
1014 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1015 /**
1016  *      mpt_free_msg_frame - Place MPT request frame back on FreeQ.
1017  *      @ioc: Pointer to MPT adapter structure
1018  *      @mf: Pointer to MPT request frame
1019  *
1020  *      This routine places a MPT request frame back on the MPT adapter's
1021  *      FreeQ.
1022  */
1023 void
1024 mpt_free_msg_frame(MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf)
1025 {
1026         unsigned long flags;
1027
1028         /*  Put Request back on FreeQ!  */
1029         spin_lock_irqsave(&ioc->FreeQlock, flags);
1030         if (cpu_to_le32(mf->u.frame.linkage.arg1) == 0xdeadbeaf)
1031                 goto out;
1032         /* signature to know if this mf is freed */
1033         mf->u.frame.linkage.arg1 = cpu_to_le32(0xdeadbeaf);
1034         list_add(&mf->u.frame.linkage.list, &ioc->FreeQ);
1035 #ifdef MFCNT
1036         ioc->mfcnt--;
1037 #endif
1038  out:
1039         spin_unlock_irqrestore(&ioc->FreeQlock, flags);
1040 }
1041
1042 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1043 /**
1044  *      mpt_add_sge - Place a simple 32 bit SGE at address pAddr.
1045  *      @pAddr: virtual address for SGE
1046  *      @flagslength: SGE flags and data transfer length
1047  *      @dma_addr: Physical address
1048  *
1049  *      This routine places a MPT request frame back on the MPT adapter's
1050  *      FreeQ.
1051  */
1052 static void
1053 mpt_add_sge(void *pAddr, u32 flagslength, dma_addr_t dma_addr)
1054 {
1055         SGESimple32_t *pSge = (SGESimple32_t *) pAddr;
1056         pSge->FlagsLength = cpu_to_le32(flagslength);
1057         pSge->Address = cpu_to_le32(dma_addr);
1058 }
1059
1060 /**
1061  *      mpt_add_sge_64bit - Place a simple 64 bit SGE at address pAddr.
1062  *      @pAddr: virtual address for SGE
1063  *      @flagslength: SGE flags and data transfer length
1064  *      @dma_addr: Physical address
1065  *
1066  *      This routine places a MPT request frame back on the MPT adapter's
1067  *      FreeQ.
1068  **/
1069 static void
1070 mpt_add_sge_64bit(void *pAddr, u32 flagslength, dma_addr_t dma_addr)
1071 {
1072         SGESimple64_t *pSge = (SGESimple64_t *) pAddr;
1073         pSge->Address.Low = cpu_to_le32
1074                         (lower_32_bits(dma_addr));
1075         pSge->Address.High = cpu_to_le32
1076                         (upper_32_bits(dma_addr));
1077         pSge->FlagsLength = cpu_to_le32
1078                         ((flagslength | MPT_SGE_FLAGS_64_BIT_ADDRESSING));
1079 }
1080
1081 /**
1082  *      mpt_add_sge_64bit_1078 - Place a simple 64 bit SGE at address pAddr (1078 workaround).
1083  *      @pAddr: virtual address for SGE
1084  *      @flagslength: SGE flags and data transfer length
1085  *      @dma_addr: Physical address
1086  *
1087  *      This routine places a MPT request frame back on the MPT adapter's
1088  *      FreeQ.
1089  **/
1090 static void
1091 mpt_add_sge_64bit_1078(void *pAddr, u32 flagslength, dma_addr_t dma_addr)
1092 {
1093         SGESimple64_t *pSge = (SGESimple64_t *) pAddr;
1094         u32 tmp;
1095
1096         pSge->Address.Low = cpu_to_le32
1097                         (lower_32_bits(dma_addr));
1098         tmp = (u32)(upper_32_bits(dma_addr));
1099
1100         /*
1101          * 1078 errata workaround for the 36GB limitation
1102          */
1103         if ((((u64)dma_addr + MPI_SGE_LENGTH(flagslength)) >> 32)  == 9) {
1104                 flagslength |=
1105                     MPI_SGE_SET_FLAGS(MPI_SGE_FLAGS_LOCAL_ADDRESS);
1106                 tmp |= (1<<31);
1107                 if (mpt_debug_level & MPT_DEBUG_36GB_MEM)
1108                         printk(KERN_DEBUG "1078 P0M2 addressing for "
1109                             "addr = 0x%llx len = %d\n",
1110                             (unsigned long long)dma_addr,
1111                             MPI_SGE_LENGTH(flagslength));
1112         }
1113
1114         pSge->Address.High = cpu_to_le32(tmp);
1115         pSge->FlagsLength = cpu_to_le32(
1116                 (flagslength | MPT_SGE_FLAGS_64_BIT_ADDRESSING));
1117 }
1118
1119 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1120 /**
1121  *      mpt_add_chain - Place a 32 bit chain SGE at address pAddr.
1122  *      @pAddr: virtual address for SGE
1123  *      @next: nextChainOffset value (u32's)
1124  *      @length: length of next SGL segment
1125  *      @dma_addr: Physical address
1126  *
1127  */
1128 static void
1129 mpt_add_chain(void *pAddr, u8 next, u16 length, dma_addr_t dma_addr)
1130 {
1131         SGEChain32_t *pChain = (SGEChain32_t *) pAddr;
1132
1133         pChain->Length = cpu_to_le16(length);
1134         pChain->Flags = MPI_SGE_FLAGS_CHAIN_ELEMENT;
1135         pChain->NextChainOffset = next;
1136         pChain->Address = cpu_to_le32(dma_addr);
1137 }
1138
1139 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1140 /**
1141  *      mpt_add_chain_64bit - Place a 64 bit chain SGE at address pAddr.
1142  *      @pAddr: virtual address for SGE
1143  *      @next: nextChainOffset value (u32's)
1144  *      @length: length of next SGL segment
1145  *      @dma_addr: Physical address
1146  *
1147  */
1148 static void
1149 mpt_add_chain_64bit(void *pAddr, u8 next, u16 length, dma_addr_t dma_addr)
1150 {
1151         SGEChain64_t *pChain = (SGEChain64_t *) pAddr;
1152         u32 tmp = dma_addr & 0xFFFFFFFF;
1153
1154         pChain->Length = cpu_to_le16(length);
1155         pChain->Flags = (MPI_SGE_FLAGS_CHAIN_ELEMENT |
1156                          MPI_SGE_FLAGS_64_BIT_ADDRESSING);
1157
1158         pChain->NextChainOffset = next;
1159
1160         pChain->Address.Low = cpu_to_le32(tmp);
1161         tmp = (u32)(upper_32_bits(dma_addr));
1162         pChain->Address.High = cpu_to_le32(tmp);
1163 }
1164
1165 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1166 /**
1167  *      mpt_send_handshake_request - Send MPT request via doorbell handshake method.
1168  *      @cb_idx: Handle of registered MPT protocol driver
1169  *      @ioc: Pointer to MPT adapter structure
1170  *      @reqBytes: Size of the request in bytes
1171  *      @req: Pointer to MPT request frame
1172  *      @sleepFlag: Use schedule if CAN_SLEEP else use udelay.
1173  *
1174  *      This routine is used exclusively to send MptScsiTaskMgmt
1175  *      requests since they are required to be sent via doorbell handshake.
1176  *
1177  *      NOTE: It is the callers responsibility to byte-swap fields in the
1178  *      request which are greater than 1 byte in size.
1179  *
1180  *      Returns 0 for success, non-zero for failure.
1181  */
1182 int
1183 mpt_send_handshake_request(u8 cb_idx, MPT_ADAPTER *ioc, int reqBytes, u32 *req, int sleepFlag)
1184 {
1185         int     r = 0;
1186         u8      *req_as_bytes;
1187         int      ii;
1188
1189         /* State is known to be good upon entering
1190          * this function so issue the bus reset
1191          * request.
1192          */
1193
1194         /*
1195          * Emulate what mpt_put_msg_frame() does /wrt to sanity
1196          * setting cb_idx/req_idx.  But ONLY if this request
1197          * is in proper (pre-alloc'd) request buffer range...
1198          */
1199         ii = MFPTR_2_MPT_INDEX(ioc,(MPT_FRAME_HDR*)req);
1200         if (reqBytes >= 12 && ii >= 0 && ii < ioc->req_depth) {
1201                 MPT_FRAME_HDR *mf = (MPT_FRAME_HDR*)req;
1202                 mf->u.frame.hwhdr.msgctxu.fld.req_idx = cpu_to_le16(ii);
1203                 mf->u.frame.hwhdr.msgctxu.fld.cb_idx = cb_idx;
1204         }
1205
1206         /* Make sure there are no doorbells */
1207         CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
1208
1209         CHIPREG_WRITE32(&ioc->chip->Doorbell,
1210                         ((MPI_FUNCTION_HANDSHAKE<<MPI_DOORBELL_FUNCTION_SHIFT) |
1211                          ((reqBytes/4)<<MPI_DOORBELL_ADD_DWORDS_SHIFT)));
1212
1213         /* Wait for IOC doorbell int */
1214         if ((ii = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0) {
1215                 return ii;
1216         }
1217
1218         /* Read doorbell and check for active bit */
1219         if (!(CHIPREG_READ32(&ioc->chip->Doorbell) & MPI_DOORBELL_ACTIVE))
1220                 return -5;
1221
1222         dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "mpt_send_handshake_request start, WaitCnt=%d\n",
1223                 ioc->name, ii));
1224
1225         CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
1226
1227         if ((r = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0) {
1228                 return -2;
1229         }
1230
1231         /* Send request via doorbell handshake */
1232         req_as_bytes = (u8 *) req;
1233         for (ii = 0; ii < reqBytes/4; ii++) {
1234                 u32 word;
1235
1236                 word = ((req_as_bytes[(ii*4) + 0] <<  0) |
1237                         (req_as_bytes[(ii*4) + 1] <<  8) |
1238                         (req_as_bytes[(ii*4) + 2] << 16) |
1239                         (req_as_bytes[(ii*4) + 3] << 24));
1240                 CHIPREG_WRITE32(&ioc->chip->Doorbell, word);
1241                 if ((r = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0) {
1242                         r = -3;
1243                         break;
1244                 }
1245         }
1246
1247         if (r >= 0 && WaitForDoorbellInt(ioc, 10, sleepFlag) >= 0)
1248                 r = 0;
1249         else
1250                 r = -4;
1251
1252         /* Make sure there are no doorbells */
1253         CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
1254
1255         return r;
1256 }
1257
1258 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1259 /**
1260  * mpt_host_page_access_control - control the IOC's Host Page Buffer access
1261  * @ioc: Pointer to MPT adapter structure
1262  * @access_control_value: define bits below
1263  * @sleepFlag: Specifies whether the process can sleep
1264  *
1265  * Provides mechanism for the host driver to control the IOC's
1266  * Host Page Buffer access.
1267  *
1268  * Access Control Value - bits[15:12]
1269  * 0h Reserved
1270  * 1h Enable Access { MPI_DB_HPBAC_ENABLE_ACCESS }
1271  * 2h Disable Access { MPI_DB_HPBAC_DISABLE_ACCESS }
1272  * 3h Free Buffer { MPI_DB_HPBAC_FREE_BUFFER }
1273  *
1274  * Returns 0 for success, non-zero for failure.
1275  */
1276
1277 static int
1278 mpt_host_page_access_control(MPT_ADAPTER *ioc, u8 access_control_value, int sleepFlag)
1279 {
1280         int      r = 0;
1281
1282         /* return if in use */
1283         if (CHIPREG_READ32(&ioc->chip->Doorbell)
1284             & MPI_DOORBELL_ACTIVE)
1285             return -1;
1286
1287         CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
1288
1289         CHIPREG_WRITE32(&ioc->chip->Doorbell,
1290                 ((MPI_FUNCTION_HOST_PAGEBUF_ACCESS_CONTROL
1291                  <<MPI_DOORBELL_FUNCTION_SHIFT) |
1292                  (access_control_value<<12)));
1293
1294         /* Wait for IOC to clear Doorbell Status bit */
1295         if ((r = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0) {
1296                 return -2;
1297         }else
1298                 return 0;
1299 }
1300
1301 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1302 /**
1303  *      mpt_host_page_alloc - allocate system memory for the fw
1304  *      @ioc: Pointer to pointer to IOC adapter
1305  *      @ioc_init: Pointer to ioc init config page
1306  *
1307  *      If we already allocated memory in past, then resend the same pointer.
1308  *      Returns 0 for success, non-zero for failure.
1309  */
1310 static int
1311 mpt_host_page_alloc(MPT_ADAPTER *ioc, pIOCInit_t ioc_init)
1312 {
1313         char    *psge;
1314         int     flags_length;
1315         u32     host_page_buffer_sz=0;
1316
1317         if(!ioc->HostPageBuffer) {
1318
1319                 host_page_buffer_sz =
1320                     le32_to_cpu(ioc->facts.HostPageBufferSGE.FlagsLength) & 0xFFFFFF;
1321
1322                 if(!host_page_buffer_sz)
1323                         return 0; /* fw doesn't need any host buffers */
1324
1325                 /* spin till we get enough memory */
1326                 while (host_page_buffer_sz > 0) {
1327                         ioc->HostPageBuffer =
1328                                 dma_alloc_coherent(&ioc->pcidev->dev,
1329                                                 host_page_buffer_sz,
1330                                                 &ioc->HostPageBuffer_dma,
1331                                                 GFP_KERNEL);
1332                         if (ioc->HostPageBuffer) {
1333                                 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT
1334                                     "host_page_buffer @ %p, dma @ %x, sz=%d bytes\n",
1335                                     ioc->name, ioc->HostPageBuffer,
1336                                     (u32)ioc->HostPageBuffer_dma,
1337                                     host_page_buffer_sz));
1338                                 ioc->alloc_total += host_page_buffer_sz;
1339                                 ioc->HostPageBuffer_sz = host_page_buffer_sz;
1340                                 break;
1341                         }
1342
1343                         host_page_buffer_sz -= (4*1024);
1344                 }
1345         }
1346
1347         if(!ioc->HostPageBuffer) {
1348                 printk(MYIOC_s_ERR_FMT
1349                     "Failed to alloc memory for host_page_buffer!\n",
1350                     ioc->name);
1351                 return -999;
1352         }
1353
1354         psge = (char *)&ioc_init->HostPageBufferSGE;
1355         flags_length = MPI_SGE_FLAGS_SIMPLE_ELEMENT |
1356             MPI_SGE_FLAGS_SYSTEM_ADDRESS |
1357             MPI_SGE_FLAGS_HOST_TO_IOC |
1358             MPI_SGE_FLAGS_END_OF_BUFFER;
1359         flags_length = flags_length << MPI_SGE_FLAGS_SHIFT;
1360         flags_length |= ioc->HostPageBuffer_sz;
1361         ioc->add_sge(psge, flags_length, ioc->HostPageBuffer_dma);
1362         ioc->facts.HostPageBufferSGE = ioc_init->HostPageBufferSGE;
1363
1364         return 0;
1365 }
1366
1367 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1368 /**
1369  *      mpt_verify_adapter - Given IOC identifier, set pointer to its adapter structure.
1370  *      @iocid: IOC unique identifier (integer)
1371  *      @iocpp: Pointer to pointer to IOC adapter
1372  *
1373  *      Given a unique IOC identifier, set pointer to the associated MPT
1374  *      adapter structure.
1375  *
1376  *      Returns iocid and sets iocpp if iocid is found.
1377  *      Returns -1 if iocid is not found.
1378  */
1379 int
1380 mpt_verify_adapter(int iocid, MPT_ADAPTER **iocpp)
1381 {
1382         MPT_ADAPTER *ioc;
1383
1384         list_for_each_entry(ioc,&ioc_list,list) {
1385                 if (ioc->id == iocid) {
1386                         *iocpp =ioc;
1387                         return iocid;
1388                 }
1389         }
1390
1391         *iocpp = NULL;
1392         return -1;
1393 }
1394
1395 /**
1396  *      mpt_get_product_name - returns product string
1397  *      @vendor: pci vendor id
1398  *      @device: pci device id
1399  *      @revision: pci revision id
1400  *
1401  *      Returns product string displayed when driver loads,
1402  *      in /proc/mpt/summary and /sysfs/class/scsi_host/host<X>/version_product
1403  *
1404  **/
1405 static const char*
1406 mpt_get_product_name(u16 vendor, u16 device, u8 revision)
1407 {
1408         char *product_str = NULL;
1409
1410         if (vendor == PCI_VENDOR_ID_BROCADE) {
1411                 switch (device)
1412                 {
1413                 case MPI_MANUFACTPAGE_DEVICEID_FC949E:
1414                         switch (revision)
1415                         {
1416                         case 0x00:
1417                                 product_str = "BRE040 A0";
1418                                 break;
1419                         case 0x01:
1420                                 product_str = "BRE040 A1";
1421                                 break;
1422                         default:
1423                                 product_str = "BRE040";
1424                                 break;
1425                         }
1426                         break;
1427                 }
1428                 goto out;
1429         }
1430
1431         switch (device)
1432         {
1433         case MPI_MANUFACTPAGE_DEVICEID_FC909:
1434                 product_str = "LSIFC909 B1";
1435                 break;
1436         case MPI_MANUFACTPAGE_DEVICEID_FC919:
1437                 product_str = "LSIFC919 B0";
1438                 break;
1439         case MPI_MANUFACTPAGE_DEVICEID_FC929:
1440                 product_str = "LSIFC929 B0";
1441                 break;
1442         case MPI_MANUFACTPAGE_DEVICEID_FC919X:
1443                 if (revision < 0x80)
1444                         product_str = "LSIFC919X A0";
1445                 else
1446                         product_str = "LSIFC919XL A1";
1447                 break;
1448         case MPI_MANUFACTPAGE_DEVICEID_FC929X:
1449                 if (revision < 0x80)
1450                         product_str = "LSIFC929X A0";
1451                 else
1452                         product_str = "LSIFC929XL A1";
1453                 break;
1454         case MPI_MANUFACTPAGE_DEVICEID_FC939X:
1455                 product_str = "LSIFC939X A1";
1456                 break;
1457         case MPI_MANUFACTPAGE_DEVICEID_FC949X:
1458                 product_str = "LSIFC949X A1";
1459                 break;
1460         case MPI_MANUFACTPAGE_DEVICEID_FC949E:
1461                 switch (revision)
1462                 {
1463                 case 0x00:
1464                         product_str = "LSIFC949E A0";
1465                         break;
1466                 case 0x01:
1467                         product_str = "LSIFC949E A1";
1468                         break;
1469                 default:
1470                         product_str = "LSIFC949E";
1471                         break;
1472                 }
1473                 break;
1474         case MPI_MANUFACTPAGE_DEVID_53C1030:
1475                 switch (revision)
1476                 {
1477                 case 0x00:
1478                         product_str = "LSI53C1030 A0";
1479                         break;
1480                 case 0x01:
1481                         product_str = "LSI53C1030 B0";
1482                         break;
1483                 case 0x03:
1484                         product_str = "LSI53C1030 B1";
1485                         break;
1486                 case 0x07:
1487                         product_str = "LSI53C1030 B2";
1488                         break;
1489                 case 0x08:
1490                         product_str = "LSI53C1030 C0";
1491                         break;
1492                 case 0x80:
1493                         product_str = "LSI53C1030T A0";
1494                         break;
1495                 case 0x83:
1496                         product_str = "LSI53C1030T A2";
1497                         break;
1498                 case 0x87:
1499                         product_str = "LSI53C1030T A3";
1500                         break;
1501                 case 0xc1:
1502                         product_str = "LSI53C1020A A1";
1503                         break;
1504                 default:
1505                         product_str = "LSI53C1030";
1506                         break;
1507                 }
1508                 break;
1509         case MPI_MANUFACTPAGE_DEVID_1030_53C1035:
1510                 switch (revision)
1511                 {
1512                 case 0x03:
1513                         product_str = "LSI53C1035 A2";
1514                         break;
1515                 case 0x04:
1516                         product_str = "LSI53C1035 B0";
1517                         break;
1518                 default:
1519                         product_str = "LSI53C1035";
1520                         break;
1521                 }
1522                 break;
1523         case MPI_MANUFACTPAGE_DEVID_SAS1064:
1524                 switch (revision)
1525                 {
1526                 case 0x00:
1527                         product_str = "LSISAS1064 A1";
1528                         break;
1529                 case 0x01:
1530                         product_str = "LSISAS1064 A2";
1531                         break;
1532                 case 0x02:
1533                         product_str = "LSISAS1064 A3";
1534                         break;
1535                 case 0x03:
1536                         product_str = "LSISAS1064 A4";
1537                         break;
1538                 default:
1539                         product_str = "LSISAS1064";
1540                         break;
1541                 }
1542                 break;
1543         case MPI_MANUFACTPAGE_DEVID_SAS1064E:
1544                 switch (revision)
1545                 {
1546                 case 0x00:
1547                         product_str = "LSISAS1064E A0";
1548                         break;
1549                 case 0x01:
1550                         product_str = "LSISAS1064E B0";
1551                         break;
1552                 case 0x02:
1553                         product_str = "LSISAS1064E B1";
1554                         break;
1555                 case 0x04:
1556                         product_str = "LSISAS1064E B2";
1557                         break;
1558                 case 0x08:
1559                         product_str = "LSISAS1064E B3";
1560                         break;
1561                 default:
1562                         product_str = "LSISAS1064E";
1563                         break;
1564                 }
1565                 break;
1566         case MPI_MANUFACTPAGE_DEVID_SAS1068:
1567                 switch (revision)
1568                 {
1569                 case 0x00:
1570                         product_str = "LSISAS1068 A0";
1571                         break;
1572                 case 0x01:
1573                         product_str = "LSISAS1068 B0";
1574                         break;
1575                 case 0x02:
1576                         product_str = "LSISAS1068 B1";
1577                         break;
1578                 default:
1579                         product_str = "LSISAS1068";
1580                         break;
1581                 }
1582                 break;
1583         case MPI_MANUFACTPAGE_DEVID_SAS1068E:
1584                 switch (revision)
1585                 {
1586                 case 0x00:
1587                         product_str = "LSISAS1068E A0";
1588                         break;
1589                 case 0x01:
1590                         product_str = "LSISAS1068E B0";
1591                         break;
1592                 case 0x02:
1593                         product_str = "LSISAS1068E B1";
1594                         break;
1595                 case 0x04:
1596                         product_str = "LSISAS1068E B2";
1597                         break;
1598                 case 0x08:
1599                         product_str = "LSISAS1068E B3";
1600                         break;
1601                 default:
1602                         product_str = "LSISAS1068E";
1603                         break;
1604                 }
1605                 break;
1606         case MPI_MANUFACTPAGE_DEVID_SAS1078:
1607                 switch (revision)
1608                 {
1609                 case 0x00:
1610                         product_str = "LSISAS1078 A0";
1611                         break;
1612                 case 0x01:
1613                         product_str = "LSISAS1078 B0";
1614                         break;
1615                 case 0x02:
1616                         product_str = "LSISAS1078 C0";
1617                         break;
1618                 case 0x03:
1619                         product_str = "LSISAS1078 C1";
1620                         break;
1621                 case 0x04:
1622                         product_str = "LSISAS1078 C2";
1623                         break;
1624                 default:
1625                         product_str = "LSISAS1078";
1626                         break;
1627                 }
1628                 break;
1629         }
1630
1631  out:
1632         return product_str;
1633 }
1634
1635 /**
1636  *      mpt_mapresources - map in memory mapped io
1637  *      @ioc: Pointer to pointer to IOC adapter
1638  *
1639  **/
1640 static int
1641 mpt_mapresources(MPT_ADAPTER *ioc)
1642 {
1643         u8              __iomem *mem;
1644         int              ii;
1645         resource_size_t  mem_phys;
1646         unsigned long    port;
1647         u32              msize;
1648         u32              psize;
1649         int              r = -ENODEV;
1650         struct pci_dev *pdev;
1651
1652         pdev = ioc->pcidev;
1653         ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM);
1654         if (pci_enable_device_mem(pdev)) {
1655                 printk(MYIOC_s_ERR_FMT "pci_enable_device_mem() "
1656                     "failed\n", ioc->name);
1657                 return r;
1658         }
1659         if (pci_request_selected_regions(pdev, ioc->bars, "mpt")) {
1660                 printk(MYIOC_s_ERR_FMT "pci_request_selected_regions() with "
1661                     "MEM failed\n", ioc->name);
1662                 goto out_pci_disable_device;
1663         }
1664
1665         if (sizeof(dma_addr_t) > 4) {
1666                 const uint64_t required_mask = dma_get_required_mask
1667                     (&pdev->dev);
1668                 if (required_mask > DMA_BIT_MASK(32)
1669                         && !pci_set_dma_mask(pdev, DMA_BIT_MASK(64))
1670                         && !pci_set_consistent_dma_mask(pdev,
1671                                                  DMA_BIT_MASK(64))) {
1672                         ioc->dma_mask = DMA_BIT_MASK(64);
1673                         dinitprintk(ioc, printk(MYIOC_s_INFO_FMT
1674                                 ": 64 BIT PCI BUS DMA ADDRESSING SUPPORTED\n",
1675                                 ioc->name));
1676                 } else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
1677                         && !pci_set_consistent_dma_mask(pdev,
1678                                                 DMA_BIT_MASK(32))) {
1679                         ioc->dma_mask = DMA_BIT_MASK(32);
1680                         dinitprintk(ioc, printk(MYIOC_s_INFO_FMT
1681                                 ": 32 BIT PCI BUS DMA ADDRESSING SUPPORTED\n",
1682                                 ioc->name));
1683                 } else {
1684                         printk(MYIOC_s_WARN_FMT "no suitable DMA mask for %s\n",
1685                             ioc->name, pci_name(pdev));
1686                         goto out_pci_release_region;
1687                 }
1688         } else {
1689                 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
1690                         && !pci_set_consistent_dma_mask(pdev,
1691                                                 DMA_BIT_MASK(32))) {
1692                         ioc->dma_mask = DMA_BIT_MASK(32);
1693                         dinitprintk(ioc, printk(MYIOC_s_INFO_FMT
1694                                 ": 32 BIT PCI BUS DMA ADDRESSING SUPPORTED\n",
1695                                 ioc->name));
1696                 } else {
1697                         printk(MYIOC_s_WARN_FMT "no suitable DMA mask for %s\n",
1698                             ioc->name, pci_name(pdev));
1699                         goto out_pci_release_region;
1700                 }
1701         }
1702
1703         mem_phys = msize = 0;
1704         port = psize = 0;
1705         for (ii = 0; ii < DEVICE_COUNT_RESOURCE; ii++) {
1706                 if (pci_resource_flags(pdev, ii) & PCI_BASE_ADDRESS_SPACE_IO) {
1707                         if (psize)
1708                                 continue;
1709                         /* Get I/O space! */
1710                         port = pci_resource_start(pdev, ii);
1711                         psize = pci_resource_len(pdev, ii);
1712                 } else {
1713                         if (msize)
1714                                 continue;
1715                         /* Get memmap */
1716                         mem_phys = pci_resource_start(pdev, ii);
1717                         msize = pci_resource_len(pdev, ii);
1718                 }
1719         }
1720         ioc->mem_size = msize;
1721
1722         mem = NULL;
1723         /* Get logical ptr for PciMem0 space */
1724         /*mem = ioremap(mem_phys, msize);*/
1725         mem = ioremap(mem_phys, msize);
1726         if (mem == NULL) {
1727                 printk(MYIOC_s_ERR_FMT ": ERROR - Unable to map adapter"
1728                         " memory!\n", ioc->name);
1729                 r = -EINVAL;
1730                 goto out_pci_release_region;
1731         }
1732         ioc->memmap = mem;
1733         dinitprintk(ioc, printk(MYIOC_s_INFO_FMT "mem = %p, mem_phys = %llx\n",
1734             ioc->name, mem, (unsigned long long)mem_phys));
1735
1736         ioc->mem_phys = mem_phys;
1737         ioc->chip = (SYSIF_REGS __iomem *)mem;
1738
1739         /* Save Port IO values in case we need to do downloadboot */
1740         ioc->pio_mem_phys = port;
1741         ioc->pio_chip = (SYSIF_REGS __iomem *)port;
1742
1743         return 0;
1744
1745 out_pci_release_region:
1746         pci_release_selected_regions(pdev, ioc->bars);
1747 out_pci_disable_device:
1748         pci_disable_device(pdev);
1749         return r;
1750 }
1751
1752 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1753 /**
1754  *      mpt_attach - Install a PCI intelligent MPT adapter.
1755  *      @pdev: Pointer to pci_dev structure
1756  *      @id: PCI device ID information
1757  *
1758  *      This routine performs all the steps necessary to bring the IOC of
1759  *      a MPT adapter to a OPERATIONAL state.  This includes registering
1760  *      memory regions, registering the interrupt, and allocating request
1761  *      and reply memory pools.
1762  *
1763  *      This routine also pre-fetches the LAN MAC address of a Fibre Channel
1764  *      MPT adapter.
1765  *
1766  *      Returns 0 for success, non-zero for failure.
1767  *
1768  *      TODO: Add support for polled controllers
1769  */
1770 int
1771 mpt_attach(struct pci_dev *pdev, const struct pci_device_id *id)
1772 {
1773         MPT_ADAPTER     *ioc;
1774         u8               cb_idx;
1775         int              r = -ENODEV;
1776         u8               pcixcmd;
1777         static int       mpt_ids = 0;
1778 #ifdef CONFIG_PROC_FS
1779         struct proc_dir_entry *dent;
1780 #endif
1781
1782         ioc = kzalloc(sizeof(MPT_ADAPTER), GFP_KERNEL);
1783         if (ioc == NULL) {
1784                 printk(KERN_ERR MYNAM ": ERROR - Insufficient memory to add adapter!\n");
1785                 return -ENOMEM;
1786         }
1787
1788         ioc->id = mpt_ids++;
1789         sprintf(ioc->name, "ioc%d", ioc->id);
1790         dinitprintk(ioc, printk(KERN_WARNING MYNAM ": mpt_adapter_install\n"));
1791
1792         /*
1793          * set initial debug level
1794          * (refer to mptdebug.h)
1795          *
1796          */
1797         ioc->debug_level = mpt_debug_level;
1798         if (mpt_debug_level)
1799                 printk(KERN_INFO "mpt_debug_level=%xh\n", mpt_debug_level);
1800
1801         dinitprintk(ioc, printk(MYIOC_s_INFO_FMT ": mpt_adapter_install\n", ioc->name));
1802
1803         ioc->pcidev = pdev;
1804         if (mpt_mapresources(ioc)) {
1805                 goto out_free_ioc;
1806         }
1807
1808         /*
1809          * Setting up proper handlers for scatter gather handling
1810          */
1811         if (ioc->dma_mask == DMA_BIT_MASK(64)) {
1812                 if (pdev->device == MPI_MANUFACTPAGE_DEVID_SAS1078)
1813                         ioc->add_sge = &mpt_add_sge_64bit_1078;
1814                 else
1815                         ioc->add_sge = &mpt_add_sge_64bit;
1816                 ioc->add_chain = &mpt_add_chain_64bit;
1817                 ioc->sg_addr_size = 8;
1818         } else {
1819                 ioc->add_sge = &mpt_add_sge;
1820                 ioc->add_chain = &mpt_add_chain;
1821                 ioc->sg_addr_size = 4;
1822         }
1823         ioc->SGE_size = sizeof(u32) + ioc->sg_addr_size;
1824
1825         ioc->alloc_total = sizeof(MPT_ADAPTER);
1826         ioc->req_sz = MPT_DEFAULT_FRAME_SIZE;           /* avoid div by zero! */
1827         ioc->reply_sz = MPT_REPLY_FRAME_SIZE;
1828
1829
1830         spin_lock_init(&ioc->taskmgmt_lock);
1831         mutex_init(&ioc->internal_cmds.mutex);
1832         init_completion(&ioc->internal_cmds.done);
1833         mutex_init(&ioc->mptbase_cmds.mutex);
1834         init_completion(&ioc->mptbase_cmds.done);
1835         mutex_init(&ioc->taskmgmt_cmds.mutex);
1836         init_completion(&ioc->taskmgmt_cmds.done);
1837
1838         /* Initialize the event logging.
1839          */
1840         ioc->eventTypes = 0;    /* None */
1841         ioc->eventContext = 0;
1842         ioc->eventLogSize = 0;
1843         ioc->events = NULL;
1844
1845 #ifdef MFCNT
1846         ioc->mfcnt = 0;
1847 #endif
1848
1849         ioc->sh = NULL;
1850         ioc->cached_fw = NULL;
1851
1852         /* Initialize SCSI Config Data structure
1853          */
1854         memset(&ioc->spi_data, 0, sizeof(SpiCfgData));
1855
1856         /* Initialize the fc rport list head.
1857          */
1858         INIT_LIST_HEAD(&ioc->fc_rports);
1859
1860         /* Find lookup slot. */
1861         INIT_LIST_HEAD(&ioc->list);
1862
1863
1864         /* Initialize workqueue */
1865         INIT_DELAYED_WORK(&ioc->fault_reset_work, mpt_fault_reset_work);
1866
1867         snprintf(ioc->reset_work_q_name, MPT_KOBJ_NAME_LEN,
1868                  "mpt_poll_%d", ioc->id);
1869         ioc->reset_work_q = alloc_workqueue(ioc->reset_work_q_name,
1870                                             WQ_MEM_RECLAIM, 0);
1871         if (!ioc->reset_work_q) {
1872                 printk(MYIOC_s_ERR_FMT "Insufficient memory to add adapter!\n",
1873                     ioc->name);
1874                 r = -ENOMEM;
1875                 goto out_unmap_resources;
1876         }
1877
1878         dinitprintk(ioc, printk(MYIOC_s_INFO_FMT "facts @ %p, pfacts[0] @ %p\n",
1879             ioc->name, &ioc->facts, &ioc->pfacts[0]));
1880
1881         ioc->prod_name = mpt_get_product_name(pdev->vendor, pdev->device,
1882                                               pdev->revision);
1883
1884         switch (pdev->device)
1885         {
1886         case MPI_MANUFACTPAGE_DEVICEID_FC939X:
1887         case MPI_MANUFACTPAGE_DEVICEID_FC949X:
1888                 ioc->errata_flag_1064 = 1;
1889                 fallthrough;
1890         case MPI_MANUFACTPAGE_DEVICEID_FC909:
1891         case MPI_MANUFACTPAGE_DEVICEID_FC929:
1892         case MPI_MANUFACTPAGE_DEVICEID_FC919:
1893         case MPI_MANUFACTPAGE_DEVICEID_FC949E:
1894                 ioc->bus_type = FC;
1895                 break;
1896
1897         case MPI_MANUFACTPAGE_DEVICEID_FC929X:
1898                 if (pdev->revision < XL_929) {
1899                         /* 929X Chip Fix. Set Split transactions level
1900                         * for PCIX. Set MOST bits to zero.
1901                         */
1902                         pci_read_config_byte(pdev, 0x6a, &pcixcmd);
1903                         pcixcmd &= 0x8F;
1904                         pci_write_config_byte(pdev, 0x6a, pcixcmd);
1905                 } else {
1906                         /* 929XL Chip Fix. Set MMRBC to 0x08.
1907                         */
1908                         pci_read_config_byte(pdev, 0x6a, &pcixcmd);
1909                         pcixcmd |= 0x08;
1910                         pci_write_config_byte(pdev, 0x6a, pcixcmd);
1911                 }
1912                 ioc->bus_type = FC;
1913                 break;
1914
1915         case MPI_MANUFACTPAGE_DEVICEID_FC919X:
1916                 /* 919X Chip Fix. Set Split transactions level
1917                  * for PCIX. Set MOST bits to zero.
1918                  */
1919                 pci_read_config_byte(pdev, 0x6a, &pcixcmd);
1920                 pcixcmd &= 0x8F;
1921                 pci_write_config_byte(pdev, 0x6a, pcixcmd);
1922                 ioc->bus_type = FC;
1923                 break;
1924
1925         case MPI_MANUFACTPAGE_DEVID_53C1030:
1926                 /* 1030 Chip Fix. Disable Split transactions
1927                  * for PCIX. Set MOST bits to zero if Rev < C0( = 8).
1928                  */
1929                 if (pdev->revision < C0_1030) {
1930                         pci_read_config_byte(pdev, 0x6a, &pcixcmd);
1931                         pcixcmd &= 0x8F;
1932                         pci_write_config_byte(pdev, 0x6a, pcixcmd);
1933                 }
1934                 fallthrough;
1935
1936         case MPI_MANUFACTPAGE_DEVID_1030_53C1035:
1937                 ioc->bus_type = SPI;
1938                 break;
1939
1940         case MPI_MANUFACTPAGE_DEVID_SAS1064:
1941         case MPI_MANUFACTPAGE_DEVID_SAS1068:
1942                 ioc->errata_flag_1064 = 1;
1943                 ioc->bus_type = SAS;
1944                 break;
1945
1946         case MPI_MANUFACTPAGE_DEVID_SAS1064E:
1947         case MPI_MANUFACTPAGE_DEVID_SAS1068E:
1948         case MPI_MANUFACTPAGE_DEVID_SAS1078:
1949                 ioc->bus_type = SAS;
1950                 break;
1951         }
1952
1953
1954         switch (ioc->bus_type) {
1955
1956         case SAS:
1957                 ioc->msi_enable = mpt_msi_enable_sas;
1958                 break;
1959
1960         case SPI:
1961                 ioc->msi_enable = mpt_msi_enable_spi;
1962                 break;
1963
1964         case FC:
1965                 ioc->msi_enable = mpt_msi_enable_fc;
1966                 break;
1967
1968         default:
1969                 ioc->msi_enable = 0;
1970                 break;
1971         }
1972
1973         ioc->fw_events_off = 1;
1974
1975         if (ioc->errata_flag_1064)
1976                 pci_disable_io_access(pdev);
1977
1978         spin_lock_init(&ioc->FreeQlock);
1979
1980         /* Disable all! */
1981         CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
1982         ioc->active = 0;
1983         CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
1984
1985         /* Set IOC ptr in the pcidev's driver data. */
1986         pci_set_drvdata(ioc->pcidev, ioc);
1987
1988         /* Set lookup ptr. */
1989         list_add_tail(&ioc->list, &ioc_list);
1990
1991         /* Check for "bound ports" (929, 929X, 1030, 1035) to reduce redundant resets.
1992          */
1993         mpt_detect_bound_ports(ioc, pdev);
1994
1995         INIT_LIST_HEAD(&ioc->fw_event_list);
1996         spin_lock_init(&ioc->fw_event_lock);
1997         snprintf(ioc->fw_event_q_name, MPT_KOBJ_NAME_LEN, "mpt/%d", ioc->id);
1998         ioc->fw_event_q = alloc_workqueue(ioc->fw_event_q_name,
1999                                           WQ_MEM_RECLAIM, 0);
2000         if (!ioc->fw_event_q) {
2001                 printk(MYIOC_s_ERR_FMT "Insufficient memory to add adapter!\n",
2002                     ioc->name);
2003                 r = -ENOMEM;
2004                 goto out_remove_ioc;
2005         }
2006
2007         if ((r = mpt_do_ioc_recovery(ioc, MPT_HOSTEVENT_IOC_BRINGUP,
2008             CAN_SLEEP)) != 0){
2009                 printk(MYIOC_s_ERR_FMT "didn't initialize properly! (%d)\n",
2010                     ioc->name, r);
2011
2012                 destroy_workqueue(ioc->fw_event_q);
2013                 ioc->fw_event_q = NULL;
2014
2015                 list_del(&ioc->list);
2016                 if (ioc->alt_ioc)
2017                         ioc->alt_ioc->alt_ioc = NULL;
2018                 iounmap(ioc->memmap);
2019                 if (pci_is_enabled(pdev))
2020                         pci_disable_device(pdev);
2021                 if (r != -5)
2022                         pci_release_selected_regions(pdev, ioc->bars);
2023
2024                 destroy_workqueue(ioc->reset_work_q);
2025                 ioc->reset_work_q = NULL;
2026
2027                 kfree(ioc);
2028                 return r;
2029         }
2030
2031         /* call per device driver probe entry point */
2032         for(cb_idx = 0; cb_idx < MPT_MAX_PROTOCOL_DRIVERS; cb_idx++) {
2033                 if(MptDeviceDriverHandlers[cb_idx] &&
2034                   MptDeviceDriverHandlers[cb_idx]->probe) {
2035                         MptDeviceDriverHandlers[cb_idx]->probe(pdev,id);
2036                 }
2037         }
2038
2039 #ifdef CONFIG_PROC_FS
2040         /*
2041          *  Create "/proc/mpt/iocN" subdirectory entry for each MPT adapter.
2042          */
2043         dent = proc_mkdir(ioc->name, mpt_proc_root_dir);
2044         if (dent) {
2045                 proc_create_single_data("info", S_IRUGO, dent,
2046                                 mpt_iocinfo_proc_show, ioc);
2047                 proc_create_single_data("summary", S_IRUGO, dent,
2048                                 mpt_summary_proc_show, ioc);
2049         }
2050 #endif
2051
2052         if (!ioc->alt_ioc)
2053                 queue_delayed_work(ioc->reset_work_q, &ioc->fault_reset_work,
2054                         msecs_to_jiffies(MPT_POLLING_INTERVAL));
2055
2056         return 0;
2057
2058 out_remove_ioc:
2059         list_del(&ioc->list);
2060         if (ioc->alt_ioc)
2061                 ioc->alt_ioc->alt_ioc = NULL;
2062
2063         destroy_workqueue(ioc->reset_work_q);
2064         ioc->reset_work_q = NULL;
2065
2066 out_unmap_resources:
2067         iounmap(ioc->memmap);
2068         pci_disable_device(pdev);
2069         pci_release_selected_regions(pdev, ioc->bars);
2070
2071 out_free_ioc:
2072         kfree(ioc);
2073
2074         return r;
2075 }
2076
2077 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2078 /**
2079  *      mpt_detach - Remove a PCI intelligent MPT adapter.
2080  *      @pdev: Pointer to pci_dev structure
2081  */
2082
2083 void
2084 mpt_detach(struct pci_dev *pdev)
2085 {
2086         MPT_ADAPTER     *ioc = pci_get_drvdata(pdev);
2087         char pname[64];
2088         u8 cb_idx;
2089         unsigned long flags;
2090         struct workqueue_struct *wq;
2091
2092         /*
2093          * Stop polling ioc for fault condition
2094          */
2095         spin_lock_irqsave(&ioc->taskmgmt_lock, flags);
2096         wq = ioc->reset_work_q;
2097         ioc->reset_work_q = NULL;
2098         spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
2099         cancel_delayed_work(&ioc->fault_reset_work);
2100         destroy_workqueue(wq);
2101
2102         spin_lock_irqsave(&ioc->fw_event_lock, flags);
2103         wq = ioc->fw_event_q;
2104         ioc->fw_event_q = NULL;
2105         spin_unlock_irqrestore(&ioc->fw_event_lock, flags);
2106         destroy_workqueue(wq);
2107
2108         snprintf(pname, sizeof(pname), MPT_PROCFS_MPTBASEDIR "/%s/summary", ioc->name);
2109         remove_proc_entry(pname, NULL);
2110         snprintf(pname, sizeof(pname), MPT_PROCFS_MPTBASEDIR "/%s/info", ioc->name);
2111         remove_proc_entry(pname, NULL);
2112         snprintf(pname, sizeof(pname), MPT_PROCFS_MPTBASEDIR "/%s", ioc->name);
2113         remove_proc_entry(pname, NULL);
2114
2115         /* call per device driver remove entry point */
2116         for(cb_idx = 0; cb_idx < MPT_MAX_PROTOCOL_DRIVERS; cb_idx++) {
2117                 if(MptDeviceDriverHandlers[cb_idx] &&
2118                   MptDeviceDriverHandlers[cb_idx]->remove) {
2119                         MptDeviceDriverHandlers[cb_idx]->remove(pdev);
2120                 }
2121         }
2122
2123         /* Disable interrupts! */
2124         CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
2125
2126         ioc->active = 0;
2127         synchronize_irq(pdev->irq);
2128
2129         /* Clear any lingering interrupt */
2130         CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
2131
2132         CHIPREG_READ32(&ioc->chip->IntStatus);
2133
2134         mpt_adapter_dispose(ioc);
2135
2136 }
2137
2138 /**************************************************************************
2139  * Power Management
2140  */
2141 #ifdef CONFIG_PM
2142 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2143 /**
2144  *      mpt_suspend - Fusion MPT base driver suspend routine.
2145  *      @pdev: Pointer to pci_dev structure
2146  *      @state: new state to enter
2147  */
2148 int
2149 mpt_suspend(struct pci_dev *pdev, pm_message_t state)
2150 {
2151         u32 device_state;
2152         MPT_ADAPTER *ioc = pci_get_drvdata(pdev);
2153
2154         device_state = pci_choose_state(pdev, state);
2155         printk(MYIOC_s_INFO_FMT "pci-suspend: pdev=0x%p, slot=%s, Entering "
2156             "operating state [D%d]\n", ioc->name, pdev, pci_name(pdev),
2157             device_state);
2158
2159         /* put ioc into READY_STATE */
2160         if (SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET, CAN_SLEEP)) {
2161                 printk(MYIOC_s_ERR_FMT
2162                 "pci-suspend:  IOC msg unit reset failed!\n", ioc->name);
2163         }
2164
2165         /* disable interrupts */
2166         CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
2167         ioc->active = 0;
2168
2169         /* Clear any lingering interrupt */
2170         CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
2171
2172         free_irq(ioc->pci_irq, ioc);
2173         if (ioc->msi_enable)
2174                 pci_disable_msi(ioc->pcidev);
2175         ioc->pci_irq = -1;
2176         pci_save_state(pdev);
2177         pci_disable_device(pdev);
2178         pci_release_selected_regions(pdev, ioc->bars);
2179         pci_set_power_state(pdev, device_state);
2180         return 0;
2181 }
2182
2183 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2184 /**
2185  *      mpt_resume - Fusion MPT base driver resume routine.
2186  *      @pdev: Pointer to pci_dev structure
2187  */
2188 int
2189 mpt_resume(struct pci_dev *pdev)
2190 {
2191         MPT_ADAPTER *ioc = pci_get_drvdata(pdev);
2192         u32 device_state = pdev->current_state;
2193         int recovery_state;
2194         int err;
2195
2196         printk(MYIOC_s_INFO_FMT "pci-resume: pdev=0x%p, slot=%s, Previous "
2197             "operating state [D%d]\n", ioc->name, pdev, pci_name(pdev),
2198             device_state);
2199
2200         pci_set_power_state(pdev, PCI_D0);
2201         pci_enable_wake(pdev, PCI_D0, 0);
2202         pci_restore_state(pdev);
2203         ioc->pcidev = pdev;
2204         err = mpt_mapresources(ioc);
2205         if (err)
2206                 return err;
2207
2208         if (ioc->dma_mask == DMA_BIT_MASK(64)) {
2209                 if (pdev->device == MPI_MANUFACTPAGE_DEVID_SAS1078)
2210                         ioc->add_sge = &mpt_add_sge_64bit_1078;
2211                 else
2212                         ioc->add_sge = &mpt_add_sge_64bit;
2213                 ioc->add_chain = &mpt_add_chain_64bit;
2214                 ioc->sg_addr_size = 8;
2215         } else {
2216
2217                 ioc->add_sge = &mpt_add_sge;
2218                 ioc->add_chain = &mpt_add_chain;
2219                 ioc->sg_addr_size = 4;
2220         }
2221         ioc->SGE_size = sizeof(u32) + ioc->sg_addr_size;
2222
2223         printk(MYIOC_s_INFO_FMT "pci-resume: ioc-state=0x%x,doorbell=0x%x\n",
2224             ioc->name, (mpt_GetIocState(ioc, 1) >> MPI_IOC_STATE_SHIFT),
2225             CHIPREG_READ32(&ioc->chip->Doorbell));
2226
2227         /*
2228          * Errata workaround for SAS pci express:
2229          * Upon returning to the D0 state, the contents of the doorbell will be
2230          * stale data, and this will incorrectly signal to the host driver that
2231          * the firmware is ready to process mpt commands.   The workaround is
2232          * to issue a diagnostic reset.
2233          */
2234         if (ioc->bus_type == SAS && (pdev->device ==
2235             MPI_MANUFACTPAGE_DEVID_SAS1068E || pdev->device ==
2236             MPI_MANUFACTPAGE_DEVID_SAS1064E)) {
2237                 if (KickStart(ioc, 1, CAN_SLEEP) < 0) {
2238                         printk(MYIOC_s_WARN_FMT "pci-resume: Cannot recover\n",
2239                             ioc->name);
2240                         goto out;
2241                 }
2242         }
2243
2244         /* bring ioc to operational state */
2245         printk(MYIOC_s_INFO_FMT "Sending mpt_do_ioc_recovery\n", ioc->name);
2246         recovery_state = mpt_do_ioc_recovery(ioc, MPT_HOSTEVENT_IOC_BRINGUP,
2247                                                  CAN_SLEEP);
2248         if (recovery_state != 0)
2249                 printk(MYIOC_s_WARN_FMT "pci-resume: Cannot recover, "
2250                     "error:[%x]\n", ioc->name, recovery_state);
2251         else
2252                 printk(MYIOC_s_INFO_FMT
2253                     "pci-resume: success\n", ioc->name);
2254  out:
2255         return 0;
2256
2257 }
2258 #endif
2259
2260 static int
2261 mpt_signal_reset(u8 index, MPT_ADAPTER *ioc, int reset_phase)
2262 {
2263         if ((MptDriverClass[index] == MPTSPI_DRIVER &&
2264              ioc->bus_type != SPI) ||
2265             (MptDriverClass[index] == MPTFC_DRIVER &&
2266              ioc->bus_type != FC) ||
2267             (MptDriverClass[index] == MPTSAS_DRIVER &&
2268              ioc->bus_type != SAS))
2269                 /* make sure we only call the relevant reset handler
2270                  * for the bus */
2271                 return 0;
2272         return (MptResetHandlers[index])(ioc, reset_phase);
2273 }
2274
2275 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2276 /**
2277  *      mpt_do_ioc_recovery - Initialize or recover MPT adapter.
2278  *      @ioc: Pointer to MPT adapter structure
2279  *      @reason: Event word / reason
2280  *      @sleepFlag: Use schedule if CAN_SLEEP else use udelay.
2281  *
2282  *      This routine performs all the steps necessary to bring the IOC
2283  *      to a OPERATIONAL state.
2284  *
2285  *      This routine also pre-fetches the LAN MAC address of a Fibre Channel
2286  *      MPT adapter.
2287  *
2288  *      Returns:
2289  *               0 for success
2290  *              -1 if failed to get board READY
2291  *              -2 if READY but IOCFacts Failed
2292  *              -3 if READY but PrimeIOCFifos Failed
2293  *              -4 if READY but IOCInit Failed
2294  *              -5 if failed to enable_device and/or request_selected_regions
2295  *              -6 if failed to upload firmware
2296  */
2297 static int
2298 mpt_do_ioc_recovery(MPT_ADAPTER *ioc, u32 reason, int sleepFlag)
2299 {
2300         int      hard_reset_done = 0;
2301         int      alt_ioc_ready = 0;
2302         int      hard;
2303         int      rc=0;
2304         int      ii;
2305         int      ret = 0;
2306         int      reset_alt_ioc_active = 0;
2307         int      irq_allocated = 0;
2308         u8      *a;
2309
2310         printk(MYIOC_s_INFO_FMT "Initiating %s\n", ioc->name,
2311             reason == MPT_HOSTEVENT_IOC_BRINGUP ? "bringup" : "recovery");
2312
2313         /* Disable reply interrupts (also blocks FreeQ) */
2314         CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
2315         ioc->active = 0;
2316
2317         if (ioc->alt_ioc) {
2318                 if (ioc->alt_ioc->active ||
2319                     reason == MPT_HOSTEVENT_IOC_RECOVER) {
2320                         reset_alt_ioc_active = 1;
2321                         /* Disable alt-IOC's reply interrupts
2322                          *  (and FreeQ) for a bit
2323                          **/
2324                         CHIPREG_WRITE32(&ioc->alt_ioc->chip->IntMask,
2325                                 0xFFFFFFFF);
2326                         ioc->alt_ioc->active = 0;
2327                 }
2328         }
2329
2330         hard = 1;
2331         if (reason == MPT_HOSTEVENT_IOC_BRINGUP)
2332                 hard = 0;
2333
2334         if ((hard_reset_done = MakeIocReady(ioc, hard, sleepFlag)) < 0) {
2335                 if (hard_reset_done == -4) {
2336                         printk(MYIOC_s_WARN_FMT "Owned by PEER..skipping!\n",
2337                             ioc->name);
2338
2339                         if (reset_alt_ioc_active && ioc->alt_ioc) {
2340                                 /* (re)Enable alt-IOC! (reply interrupt, FreeQ) */
2341                                 dprintk(ioc, printk(MYIOC_s_INFO_FMT
2342                                     "alt_ioc reply irq re-enabled\n", ioc->alt_ioc->name));
2343                                 CHIPREG_WRITE32(&ioc->alt_ioc->chip->IntMask, MPI_HIM_DIM);
2344                                 ioc->alt_ioc->active = 1;
2345                         }
2346
2347                 } else {
2348                         printk(MYIOC_s_WARN_FMT
2349                             "NOT READY WARNING!\n", ioc->name);
2350                 }
2351                 ret = -1;
2352                 goto out;
2353         }
2354
2355         /* hard_reset_done = 0 if a soft reset was performed
2356          * and 1 if a hard reset was performed.
2357          */
2358         if (hard_reset_done && reset_alt_ioc_active && ioc->alt_ioc) {
2359                 if ((rc = MakeIocReady(ioc->alt_ioc, 0, sleepFlag)) == 0)
2360                         alt_ioc_ready = 1;
2361                 else
2362                         printk(MYIOC_s_WARN_FMT
2363                             ": alt-ioc Not ready WARNING!\n",
2364                             ioc->alt_ioc->name);
2365         }
2366
2367         for (ii=0; ii<5; ii++) {
2368                 /* Get IOC facts! Allow 5 retries */
2369                 if ((rc = GetIocFacts(ioc, sleepFlag, reason)) == 0)
2370                         break;
2371         }
2372
2373
2374         if (ii == 5) {
2375                 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2376                     "Retry IocFacts failed rc=%x\n", ioc->name, rc));
2377                 ret = -2;
2378         } else if (reason == MPT_HOSTEVENT_IOC_BRINGUP) {
2379                 MptDisplayIocCapabilities(ioc);
2380         }
2381
2382         if (alt_ioc_ready) {
2383                 if ((rc = GetIocFacts(ioc->alt_ioc, sleepFlag, reason)) != 0) {
2384                         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2385                             "Initial Alt IocFacts failed rc=%x\n",
2386                             ioc->name, rc));
2387                         /* Retry - alt IOC was initialized once
2388                          */
2389                         rc = GetIocFacts(ioc->alt_ioc, sleepFlag, reason);
2390                 }
2391                 if (rc) {
2392                         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2393                             "Retry Alt IocFacts failed rc=%x\n", ioc->name, rc));
2394                         alt_ioc_ready = 0;
2395                         reset_alt_ioc_active = 0;
2396                 } else if (reason == MPT_HOSTEVENT_IOC_BRINGUP) {
2397                         MptDisplayIocCapabilities(ioc->alt_ioc);
2398                 }
2399         }
2400
2401         if ((ret == 0) && (reason == MPT_HOSTEVENT_IOC_BRINGUP) &&
2402             (ioc->facts.Flags & MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT)) {
2403                 pci_release_selected_regions(ioc->pcidev, ioc->bars);
2404                 ioc->bars = pci_select_bars(ioc->pcidev, IORESOURCE_MEM |
2405                     IORESOURCE_IO);
2406                 if (pci_enable_device(ioc->pcidev))
2407                         return -5;
2408                 if (pci_request_selected_regions(ioc->pcidev, ioc->bars,
2409                         "mpt"))
2410                         return -5;
2411         }
2412
2413         /*
2414          * Device is reset now. It must have de-asserted the interrupt line
2415          * (if it was asserted) and it should be safe to register for the
2416          * interrupt now.
2417          */
2418         if ((ret == 0) && (reason == MPT_HOSTEVENT_IOC_BRINGUP)) {
2419                 ioc->pci_irq = -1;
2420                 if (ioc->pcidev->irq) {
2421                         if (ioc->msi_enable && !pci_enable_msi(ioc->pcidev))
2422                                 printk(MYIOC_s_INFO_FMT "PCI-MSI enabled\n",
2423                                     ioc->name);
2424                         else
2425                                 ioc->msi_enable = 0;
2426                         rc = request_irq(ioc->pcidev->irq, mpt_interrupt,
2427                             IRQF_SHARED, ioc->name, ioc);
2428                         if (rc < 0) {
2429                                 printk(MYIOC_s_ERR_FMT "Unable to allocate "
2430                                     "interrupt %d!\n",
2431                                     ioc->name, ioc->pcidev->irq);
2432                                 if (ioc->msi_enable)
2433                                         pci_disable_msi(ioc->pcidev);
2434                                 ret = -EBUSY;
2435                                 goto out;
2436                         }
2437                         irq_allocated = 1;
2438                         ioc->pci_irq = ioc->pcidev->irq;
2439                         pci_set_master(ioc->pcidev);            /* ?? */
2440                         pci_set_drvdata(ioc->pcidev, ioc);
2441                         dinitprintk(ioc, printk(MYIOC_s_INFO_FMT
2442                             "installed at interrupt %d\n", ioc->name,
2443                             ioc->pcidev->irq));
2444                 }
2445         }
2446
2447         /* Prime reply & request queues!
2448          * (mucho alloc's) Must be done prior to
2449          * init as upper addresses are needed for init.
2450          * If fails, continue with alt-ioc processing
2451          */
2452         dinitprintk(ioc, printk(MYIOC_s_INFO_FMT "PrimeIocFifos\n",
2453             ioc->name));
2454         if ((ret == 0) && ((rc = PrimeIocFifos(ioc)) != 0))
2455                 ret = -3;
2456
2457         /* May need to check/upload firmware & data here!
2458          * If fails, continue with alt-ioc processing
2459          */
2460         dinitprintk(ioc, printk(MYIOC_s_INFO_FMT "SendIocInit\n",
2461             ioc->name));
2462         if ((ret == 0) && ((rc = SendIocInit(ioc, sleepFlag)) != 0))
2463                 ret = -4;
2464 // NEW!
2465         if (alt_ioc_ready && ((rc = PrimeIocFifos(ioc->alt_ioc)) != 0)) {
2466                 printk(MYIOC_s_WARN_FMT
2467                     ": alt-ioc (%d) FIFO mgmt alloc WARNING!\n",
2468                     ioc->alt_ioc->name, rc);
2469                 alt_ioc_ready = 0;
2470                 reset_alt_ioc_active = 0;
2471         }
2472
2473         if (alt_ioc_ready) {
2474                 if ((rc = SendIocInit(ioc->alt_ioc, sleepFlag)) != 0) {
2475                         alt_ioc_ready = 0;
2476                         reset_alt_ioc_active = 0;
2477                         printk(MYIOC_s_WARN_FMT
2478                                 ": alt-ioc: (%d) init failure WARNING!\n",
2479                                         ioc->alt_ioc->name, rc);
2480                 }
2481         }
2482
2483         if (reason == MPT_HOSTEVENT_IOC_BRINGUP){
2484                 if (ioc->upload_fw) {
2485                         ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2486                             "firmware upload required!\n", ioc->name));
2487
2488                         /* Controller is not operational, cannot do upload
2489                          */
2490                         if (ret == 0) {
2491                                 rc = mpt_do_upload(ioc, sleepFlag);
2492                                 if (rc == 0) {
2493                                         if (ioc->alt_ioc && ioc->alt_ioc->cached_fw) {
2494                                                 /*
2495                                                  * Maintain only one pointer to FW memory
2496                                                  * so there will not be two attempt to
2497                                                  * downloadboot onboard dual function
2498                                                  * chips (mpt_adapter_disable,
2499                                                  * mpt_diag_reset)
2500                                                  */
2501                                                 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2502                                                     "mpt_upload:  alt_%s has cached_fw=%p \n",
2503                                                     ioc->name, ioc->alt_ioc->name, ioc->alt_ioc->cached_fw));
2504                                                 ioc->cached_fw = NULL;
2505                                         }
2506                                 } else {
2507                                         printk(MYIOC_s_WARN_FMT
2508                                             "firmware upload failure!\n", ioc->name);
2509                                         ret = -6;
2510                                 }
2511                         }
2512                 }
2513         }
2514
2515         /*  Enable MPT base driver management of EventNotification
2516          *  and EventAck handling.
2517          */
2518         if ((ret == 0) && (!ioc->facts.EventState)) {
2519                 dinitprintk(ioc, printk(MYIOC_s_INFO_FMT
2520                         "SendEventNotification\n",
2521                     ioc->name));
2522                 ret = SendEventNotification(ioc, 1, sleepFlag); /* 1=Enable */
2523         }
2524
2525         if (ioc->alt_ioc && alt_ioc_ready && !ioc->alt_ioc->facts.EventState)
2526                 rc = SendEventNotification(ioc->alt_ioc, 1, sleepFlag);
2527
2528         if (ret == 0) {
2529                 /* Enable! (reply interrupt) */
2530                 CHIPREG_WRITE32(&ioc->chip->IntMask, MPI_HIM_DIM);
2531                 ioc->active = 1;
2532         }
2533         if (rc == 0) {  /* alt ioc */
2534                 if (reset_alt_ioc_active && ioc->alt_ioc) {
2535                         /* (re)Enable alt-IOC! (reply interrupt) */
2536                         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "alt-ioc"
2537                                 "reply irq re-enabled\n",
2538                                 ioc->alt_ioc->name));
2539                         CHIPREG_WRITE32(&ioc->alt_ioc->chip->IntMask,
2540                                 MPI_HIM_DIM);
2541                         ioc->alt_ioc->active = 1;
2542                 }
2543         }
2544
2545
2546         /*      Add additional "reason" check before call to GetLanConfigPages
2547          *      (combined with GetIoUnitPage2 call).  This prevents a somewhat
2548          *      recursive scenario; GetLanConfigPages times out, timer expired
2549          *      routine calls HardResetHandler, which calls into here again,
2550          *      and we try GetLanConfigPages again...
2551          */
2552         if ((ret == 0) && (reason == MPT_HOSTEVENT_IOC_BRINGUP)) {
2553
2554                 /*
2555                  * Initialize link list for inactive raid volumes.
2556                  */
2557                 mutex_init(&ioc->raid_data.inactive_list_mutex);
2558                 INIT_LIST_HEAD(&ioc->raid_data.inactive_list);
2559
2560                 switch (ioc->bus_type) {
2561
2562                 case SAS:
2563                         /* clear persistency table */
2564                         if(ioc->facts.IOCExceptions &
2565                             MPI_IOCFACTS_EXCEPT_PERSISTENT_TABLE_FULL) {
2566                                 ret = mptbase_sas_persist_operation(ioc,
2567                                     MPI_SAS_OP_CLEAR_NOT_PRESENT);
2568                                 if(ret != 0)
2569                                         goto out;
2570                         }
2571
2572                         /* Find IM volumes
2573                          */
2574                         mpt_findImVolumes(ioc);
2575
2576                         /* Check, and possibly reset, the coalescing value
2577                          */
2578                         mpt_read_ioc_pg_1(ioc);
2579
2580                         break;
2581
2582                 case FC:
2583                         if ((ioc->pfacts[0].ProtocolFlags &
2584                                 MPI_PORTFACTS_PROTOCOL_LAN) &&
2585                             (ioc->lan_cnfg_page0.Header.PageLength == 0)) {
2586                                 /*
2587                                  *  Pre-fetch the ports LAN MAC address!
2588                                  *  (LANPage1_t stuff)
2589                                  */
2590                                 (void) GetLanConfigPages(ioc);
2591                                 a = (u8*)&ioc->lan_cnfg_page1.HardwareAddressLow;
2592                                 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2593                                         "LanAddr = %pMR\n", ioc->name, a));
2594                         }
2595                         break;
2596
2597                 case SPI:
2598                         /* Get NVRAM and adapter maximums from SPP 0 and 2
2599                          */
2600                         mpt_GetScsiPortSettings(ioc, 0);
2601
2602                         /* Get version and length of SDP 1
2603                          */
2604                         mpt_readScsiDevicePageHeaders(ioc, 0);
2605
2606                         /* Find IM volumes
2607                          */
2608                         if (ioc->facts.MsgVersion >= MPI_VERSION_01_02)
2609                                 mpt_findImVolumes(ioc);
2610
2611                         /* Check, and possibly reset, the coalescing value
2612                          */
2613                         mpt_read_ioc_pg_1(ioc);
2614
2615                         mpt_read_ioc_pg_4(ioc);
2616
2617                         break;
2618                 }
2619
2620                 GetIoUnitPage2(ioc);
2621                 mpt_get_manufacturing_pg_0(ioc);
2622         }
2623
2624  out:
2625         if ((ret != 0) && irq_allocated) {
2626                 free_irq(ioc->pci_irq, ioc);
2627                 if (ioc->msi_enable)
2628                         pci_disable_msi(ioc->pcidev);
2629         }
2630         return ret;
2631 }
2632
2633 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2634 /**
2635  *      mpt_detect_bound_ports - Search for matching PCI bus/dev_function
2636  *      @ioc: Pointer to MPT adapter structure
2637  *      @pdev: Pointer to (struct pci_dev) structure
2638  *
2639  *      Search for PCI bus/dev_function which matches
2640  *      PCI bus/dev_function (+/-1) for newly discovered 929,
2641  *      929X, 1030 or 1035.
2642  *
2643  *      If match on PCI dev_function +/-1 is found, bind the two MPT adapters
2644  *      using alt_ioc pointer fields in their %MPT_ADAPTER structures.
2645  */
2646 static void
2647 mpt_detect_bound_ports(MPT_ADAPTER *ioc, struct pci_dev *pdev)
2648 {
2649         struct pci_dev *peer=NULL;
2650         unsigned int slot = PCI_SLOT(pdev->devfn);
2651         unsigned int func = PCI_FUNC(pdev->devfn);
2652         MPT_ADAPTER *ioc_srch;
2653
2654         dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "PCI device %s devfn=%x/%x,"
2655             " searching for devfn match on %x or %x\n",
2656             ioc->name, pci_name(pdev), pdev->bus->number,
2657             pdev->devfn, func-1, func+1));
2658
2659         peer = pci_get_slot(pdev->bus, PCI_DEVFN(slot,func-1));
2660         if (!peer) {
2661                 peer = pci_get_slot(pdev->bus, PCI_DEVFN(slot,func+1));
2662                 if (!peer)
2663                         return;
2664         }
2665
2666         list_for_each_entry(ioc_srch, &ioc_list, list) {
2667                 struct pci_dev *_pcidev = ioc_srch->pcidev;
2668                 if (_pcidev == peer) {
2669                         /* Paranoia checks */
2670                         if (ioc->alt_ioc != NULL) {
2671                                 printk(MYIOC_s_WARN_FMT
2672                                     "Oops, already bound (%s <==> %s)!\n",
2673                                     ioc->name, ioc->name, ioc->alt_ioc->name);
2674                                 break;
2675                         } else if (ioc_srch->alt_ioc != NULL) {
2676                                 printk(MYIOC_s_WARN_FMT
2677                                     "Oops, already bound (%s <==> %s)!\n",
2678                                     ioc_srch->name, ioc_srch->name,
2679                                     ioc_srch->alt_ioc->name);
2680                                 break;
2681                         }
2682                         dprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2683                                 "FOUND! binding %s <==> %s\n",
2684                                 ioc->name, ioc->name, ioc_srch->name));
2685                         ioc_srch->alt_ioc = ioc;
2686                         ioc->alt_ioc = ioc_srch;
2687                 }
2688         }
2689         pci_dev_put(peer);
2690 }
2691
2692 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2693 /**
2694  *      mpt_adapter_disable - Disable misbehaving MPT adapter.
2695  *      @ioc: Pointer to MPT adapter structure
2696  */
2697 static void
2698 mpt_adapter_disable(MPT_ADAPTER *ioc)
2699 {
2700         int sz;
2701         int ret;
2702
2703         if (ioc->cached_fw != NULL) {
2704                 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2705                         "%s: Pushing FW onto adapter\n", __func__, ioc->name));
2706                 if ((ret = mpt_downloadboot(ioc, (MpiFwHeader_t *)
2707                     ioc->cached_fw, CAN_SLEEP)) < 0) {
2708                         printk(MYIOC_s_WARN_FMT
2709                             ": firmware downloadboot failure (%d)!\n",
2710                             ioc->name, ret);
2711                 }
2712         }
2713
2714         /*
2715          * Put the controller into ready state (if its not already)
2716          */
2717         if (mpt_GetIocState(ioc, 1) != MPI_IOC_STATE_READY) {
2718                 if (!SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET,
2719                     CAN_SLEEP)) {
2720                         if (mpt_GetIocState(ioc, 1) != MPI_IOC_STATE_READY)
2721                                 printk(MYIOC_s_ERR_FMT "%s:  IOC msg unit "
2722                                     "reset failed to put ioc in ready state!\n",
2723                                     ioc->name, __func__);
2724                 } else
2725                         printk(MYIOC_s_ERR_FMT "%s:  IOC msg unit reset "
2726                             "failed!\n", ioc->name, __func__);
2727         }
2728
2729
2730         /* Disable adapter interrupts! */
2731         synchronize_irq(ioc->pcidev->irq);
2732         CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
2733         ioc->active = 0;
2734
2735         /* Clear any lingering interrupt */
2736         CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
2737         CHIPREG_READ32(&ioc->chip->IntStatus);
2738
2739         if (ioc->alloc != NULL) {
2740                 sz = ioc->alloc_sz;
2741                 dexitprintk(ioc, printk(MYIOC_s_INFO_FMT "free  @ %p, sz=%d bytes\n",
2742                     ioc->name, ioc->alloc, ioc->alloc_sz));
2743                 dma_free_coherent(&ioc->pcidev->dev, sz, ioc->alloc,
2744                                 ioc->alloc_dma);
2745                 ioc->reply_frames = NULL;
2746                 ioc->req_frames = NULL;
2747                 ioc->alloc = NULL;
2748                 ioc->alloc_total -= sz;
2749         }
2750
2751         if (ioc->sense_buf_pool != NULL) {
2752                 sz = (ioc->req_depth * MPT_SENSE_BUFFER_ALLOC);
2753                 dma_free_coherent(&ioc->pcidev->dev, sz, ioc->sense_buf_pool,
2754                                 ioc->sense_buf_pool_dma);
2755                 ioc->sense_buf_pool = NULL;
2756                 ioc->alloc_total -= sz;
2757         }
2758
2759         if (ioc->events != NULL){
2760                 sz = MPTCTL_EVENT_LOG_SIZE * sizeof(MPT_IOCTL_EVENTS);
2761                 kfree(ioc->events);
2762                 ioc->events = NULL;
2763                 ioc->alloc_total -= sz;
2764         }
2765
2766         mpt_free_fw_memory(ioc);
2767
2768         kfree(ioc->spi_data.nvram);
2769         mpt_inactive_raid_list_free(ioc);
2770         kfree(ioc->raid_data.pIocPg2);
2771         kfree(ioc->raid_data.pIocPg3);
2772         ioc->spi_data.nvram = NULL;
2773         ioc->raid_data.pIocPg3 = NULL;
2774
2775         if (ioc->spi_data.pIocPg4 != NULL) {
2776                 sz = ioc->spi_data.IocPg4Sz;
2777                 pci_free_consistent(ioc->pcidev, sz,
2778                         ioc->spi_data.pIocPg4,
2779                         ioc->spi_data.IocPg4_dma);
2780                 ioc->spi_data.pIocPg4 = NULL;
2781                 ioc->alloc_total -= sz;
2782         }
2783
2784         if (ioc->ReqToChain != NULL) {
2785                 kfree(ioc->ReqToChain);
2786                 kfree(ioc->RequestNB);
2787                 ioc->ReqToChain = NULL;
2788         }
2789
2790         kfree(ioc->ChainToChain);
2791         ioc->ChainToChain = NULL;
2792
2793         if (ioc->HostPageBuffer != NULL) {
2794                 if((ret = mpt_host_page_access_control(ioc,
2795                     MPI_DB_HPBAC_FREE_BUFFER, NO_SLEEP)) != 0) {
2796                         printk(MYIOC_s_ERR_FMT
2797                            ": %s: host page buffers free failed (%d)!\n",
2798                             ioc->name, __func__, ret);
2799                 }
2800                 dexitprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2801                         "HostPageBuffer free  @ %p, sz=%d bytes\n",
2802                         ioc->name, ioc->HostPageBuffer,
2803                         ioc->HostPageBuffer_sz));
2804                 dma_free_coherent(&ioc->pcidev->dev, ioc->HostPageBuffer_sz,
2805                     ioc->HostPageBuffer, ioc->HostPageBuffer_dma);
2806                 ioc->HostPageBuffer = NULL;
2807                 ioc->HostPageBuffer_sz = 0;
2808                 ioc->alloc_total -= ioc->HostPageBuffer_sz;
2809         }
2810
2811         pci_set_drvdata(ioc->pcidev, NULL);
2812 }
2813 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2814 /**
2815  *      mpt_adapter_dispose - Free all resources associated with an MPT adapter
2816  *      @ioc: Pointer to MPT adapter structure
2817  *
2818  *      This routine unregisters h/w resources and frees all alloc'd memory
2819  *      associated with a MPT adapter structure.
2820  */
2821 static void
2822 mpt_adapter_dispose(MPT_ADAPTER *ioc)
2823 {
2824         int sz_first, sz_last;
2825
2826         if (ioc == NULL)
2827                 return;
2828
2829         sz_first = ioc->alloc_total;
2830
2831         mpt_adapter_disable(ioc);
2832
2833         if (ioc->pci_irq != -1) {
2834                 free_irq(ioc->pci_irq, ioc);
2835                 if (ioc->msi_enable)
2836                         pci_disable_msi(ioc->pcidev);
2837                 ioc->pci_irq = -1;
2838         }
2839
2840         if (ioc->memmap != NULL) {
2841                 iounmap(ioc->memmap);
2842                 ioc->memmap = NULL;
2843         }
2844
2845         pci_disable_device(ioc->pcidev);
2846         pci_release_selected_regions(ioc->pcidev, ioc->bars);
2847
2848         /*  Zap the adapter lookup ptr!  */
2849         list_del(&ioc->list);
2850
2851         sz_last = ioc->alloc_total;
2852         dprintk(ioc, printk(MYIOC_s_INFO_FMT "free'd %d of %d bytes\n",
2853             ioc->name, sz_first-sz_last+(int)sizeof(*ioc), sz_first));
2854
2855         if (ioc->alt_ioc)
2856                 ioc->alt_ioc->alt_ioc = NULL;
2857
2858         kfree(ioc);
2859 }
2860
2861 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2862 /**
2863  *      MptDisplayIocCapabilities - Disply IOC's capabilities.
2864  *      @ioc: Pointer to MPT adapter structure
2865  */
2866 static void
2867 MptDisplayIocCapabilities(MPT_ADAPTER *ioc)
2868 {
2869         int i = 0;
2870
2871         printk(KERN_INFO "%s: ", ioc->name);
2872         if (ioc->prod_name)
2873                 pr_cont("%s: ", ioc->prod_name);
2874         pr_cont("Capabilities={");
2875
2876         if (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_INITIATOR) {
2877                 pr_cont("Initiator");
2878                 i++;
2879         }
2880
2881         if (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_TARGET) {
2882                 pr_cont("%sTarget", i ? "," : "");
2883                 i++;
2884         }
2885
2886         if (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_LAN) {
2887                 pr_cont("%sLAN", i ? "," : "");
2888                 i++;
2889         }
2890
2891 #if 0
2892         /*
2893          *  This would probably evoke more questions than it's worth
2894          */
2895         if (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_TARGET) {
2896                 pr_cont("%sLogBusAddr", i ? "," : "");
2897                 i++;
2898         }
2899 #endif
2900
2901         pr_cont("}\n");
2902 }
2903
2904 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2905 /**
2906  *      MakeIocReady - Get IOC to a READY state, using KickStart if needed.
2907  *      @ioc: Pointer to MPT_ADAPTER structure
2908  *      @force: Force hard KickStart of IOC
2909  *      @sleepFlag: Specifies whether the process can sleep
2910  *
2911  *      Returns:
2912  *               1 - DIAG reset and READY
2913  *               0 - READY initially OR soft reset and READY
2914  *              -1 - Any failure on KickStart
2915  *              -2 - Msg Unit Reset Failed
2916  *              -3 - IO Unit Reset Failed
2917  *              -4 - IOC owned by a PEER
2918  */
2919 static int
2920 MakeIocReady(MPT_ADAPTER *ioc, int force, int sleepFlag)
2921 {
2922         u32      ioc_state;
2923         int      statefault = 0;
2924         int      cntdn;
2925         int      hard_reset_done = 0;
2926         int      r;
2927         int      ii;
2928         int      whoinit;
2929
2930         /* Get current [raw] IOC state  */
2931         ioc_state = mpt_GetIocState(ioc, 0);
2932         dhsprintk(ioc, printk(MYIOC_s_INFO_FMT "MakeIocReady [raw] state=%08x\n", ioc->name, ioc_state));
2933
2934         /*
2935          *      Check to see if IOC got left/stuck in doorbell handshake
2936          *      grip of death.  If so, hard reset the IOC.
2937          */
2938         if (ioc_state & MPI_DOORBELL_ACTIVE) {
2939                 statefault = 1;
2940                 printk(MYIOC_s_WARN_FMT "Unexpected doorbell active!\n",
2941                                 ioc->name);
2942         }
2943
2944         /* Is it already READY? */
2945         if (!statefault &&
2946             ((ioc_state & MPI_IOC_STATE_MASK) == MPI_IOC_STATE_READY)) {
2947                 dinitprintk(ioc, printk(MYIOC_s_INFO_FMT
2948                     "IOC is in READY state\n", ioc->name));
2949                 return 0;
2950         }
2951
2952         /*
2953          *      Check to see if IOC is in FAULT state.
2954          */
2955         if ((ioc_state & MPI_IOC_STATE_MASK) == MPI_IOC_STATE_FAULT) {
2956                 statefault = 2;
2957                 printk(MYIOC_s_WARN_FMT "IOC is in FAULT state!!!\n",
2958                     ioc->name);
2959                 printk(MYIOC_s_WARN_FMT "           FAULT code = %04xh\n",
2960                     ioc->name, ioc_state & MPI_DOORBELL_DATA_MASK);
2961         }
2962
2963         /*
2964          *      Hmmm...  Did it get left operational?
2965          */
2966         if ((ioc_state & MPI_IOC_STATE_MASK) == MPI_IOC_STATE_OPERATIONAL) {
2967                 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "IOC operational unexpected\n",
2968                                 ioc->name));
2969
2970                 /* Check WhoInit.
2971                  * If PCI Peer, exit.
2972                  * Else, if no fault conditions are present, issue a MessageUnitReset
2973                  * Else, fall through to KickStart case
2974                  */
2975                 whoinit = (ioc_state & MPI_DOORBELL_WHO_INIT_MASK) >> MPI_DOORBELL_WHO_INIT_SHIFT;
2976                 dinitprintk(ioc, printk(MYIOC_s_INFO_FMT
2977                         "whoinit 0x%x statefault %d force %d\n",
2978                         ioc->name, whoinit, statefault, force));
2979                 if (whoinit == MPI_WHOINIT_PCI_PEER)
2980                         return -4;
2981                 else {
2982                         if ((statefault == 0 ) && (force == 0)) {
2983                                 if ((r = SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET, sleepFlag)) == 0)
2984                                         return 0;
2985                         }
2986                         statefault = 3;
2987                 }
2988         }
2989
2990         hard_reset_done = KickStart(ioc, statefault||force, sleepFlag);
2991         if (hard_reset_done < 0)
2992                 return -1;
2993
2994         /*
2995          *  Loop here waiting for IOC to come READY.
2996          */
2997         ii = 0;
2998         cntdn = ((sleepFlag == CAN_SLEEP) ? HZ : 1000) * 5;     /* 5 seconds */
2999
3000         while ((ioc_state = mpt_GetIocState(ioc, 1)) != MPI_IOC_STATE_READY) {
3001                 if (ioc_state == MPI_IOC_STATE_OPERATIONAL) {
3002                         /*
3003                          *  BIOS or previous driver load left IOC in OP state.
3004                          *  Reset messaging FIFOs.
3005                          */
3006                         if ((r = SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET, sleepFlag)) != 0) {
3007                                 printk(MYIOC_s_ERR_FMT "IOC msg unit reset failed!\n", ioc->name);
3008                                 return -2;
3009                         }
3010                 } else if (ioc_state == MPI_IOC_STATE_RESET) {
3011                         /*
3012                          *  Something is wrong.  Try to get IOC back
3013                          *  to a known state.
3014                          */
3015                         if ((r = SendIocReset(ioc, MPI_FUNCTION_IO_UNIT_RESET, sleepFlag)) != 0) {
3016                                 printk(MYIOC_s_ERR_FMT "IO unit reset failed!\n", ioc->name);
3017                                 return -3;
3018                         }
3019                 }
3020
3021                 ii++; cntdn--;
3022                 if (!cntdn) {
3023                         printk(MYIOC_s_ERR_FMT
3024                                 "Wait IOC_READY state (0x%x) timeout(%d)!\n",
3025                                 ioc->name, ioc_state, (int)((ii+5)/HZ));
3026                         return -ETIME;
3027                 }
3028
3029                 if (sleepFlag == CAN_SLEEP) {
3030                         msleep(1);
3031                 } else {
3032                         mdelay (1);     /* 1 msec delay */
3033                 }
3034
3035         }
3036
3037         if (statefault < 3) {
3038                 printk(MYIOC_s_INFO_FMT "Recovered from %s\n", ioc->name,
3039                         statefault == 1 ? "stuck handshake" : "IOC FAULT");
3040         }
3041
3042         return hard_reset_done;
3043 }
3044
3045 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3046 /**
3047  *      mpt_GetIocState - Get the current state of a MPT adapter.
3048  *      @ioc: Pointer to MPT_ADAPTER structure
3049  *      @cooked: Request raw or cooked IOC state
3050  *
3051  *      Returns all IOC Doorbell register bits if cooked==0, else just the
3052  *      Doorbell bits in MPI_IOC_STATE_MASK.
3053  */
3054 u32
3055 mpt_GetIocState(MPT_ADAPTER *ioc, int cooked)
3056 {
3057         u32 s, sc;
3058
3059         /*  Get!  */
3060         s = CHIPREG_READ32(&ioc->chip->Doorbell);
3061         sc = s & MPI_IOC_STATE_MASK;
3062
3063         /*  Save!  */
3064         ioc->last_state = sc;
3065
3066         return cooked ? sc : s;
3067 }
3068
3069 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3070 /**
3071  *      GetIocFacts - Send IOCFacts request to MPT adapter.
3072  *      @ioc: Pointer to MPT_ADAPTER structure
3073  *      @sleepFlag: Specifies whether the process can sleep
3074  *      @reason: If recovery, only update facts.
3075  *
3076  *      Returns 0 for success, non-zero for failure.
3077  */
3078 static int
3079 GetIocFacts(MPT_ADAPTER *ioc, int sleepFlag, int reason)
3080 {
3081         IOCFacts_t               get_facts;
3082         IOCFactsReply_t         *facts;
3083         int                      r;
3084         int                      req_sz;
3085         int                      reply_sz;
3086         int                      sz;
3087         u32                      status, vv;
3088         u8                       shiftFactor=1;
3089
3090         /* IOC *must* NOT be in RESET state! */
3091         if (ioc->last_state == MPI_IOC_STATE_RESET) {
3092                 printk(KERN_ERR MYNAM
3093                     ": ERROR - Can't get IOCFacts, %s NOT READY! (%08x)\n",
3094                     ioc->name, ioc->last_state);
3095                 return -44;
3096         }
3097
3098         facts = &ioc->facts;
3099
3100         /* Destination (reply area)... */
3101         reply_sz = sizeof(*facts);
3102         memset(facts, 0, reply_sz);
3103
3104         /* Request area (get_facts on the stack right now!) */
3105         req_sz = sizeof(get_facts);
3106         memset(&get_facts, 0, req_sz);
3107
3108         get_facts.Function = MPI_FUNCTION_IOC_FACTS;
3109         /* Assert: All other get_facts fields are zero! */
3110
3111         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT
3112             "Sending get IocFacts request req_sz=%d reply_sz=%d\n",
3113             ioc->name, req_sz, reply_sz));
3114
3115         /* No non-zero fields in the get_facts request are greater than
3116          * 1 byte in size, so we can just fire it off as is.
3117          */
3118         r = mpt_handshake_req_reply_wait(ioc, req_sz, (u32*)&get_facts,
3119                         reply_sz, (u16*)facts, 5 /*seconds*/, sleepFlag);
3120         if (r != 0)
3121                 return r;
3122
3123         /*
3124          * Now byte swap (GRRR) the necessary fields before any further
3125          * inspection of reply contents.
3126          *
3127          * But need to do some sanity checks on MsgLength (byte) field
3128          * to make sure we don't zero IOC's req_sz!
3129          */
3130         /* Did we get a valid reply? */
3131         if (facts->MsgLength > offsetof(IOCFactsReply_t, RequestFrameSize)/sizeof(u32)) {
3132                 if (reason == MPT_HOSTEVENT_IOC_BRINGUP) {
3133                         /*
3134                          * If not been here, done that, save off first WhoInit value
3135                          */
3136                         if (ioc->FirstWhoInit == WHOINIT_UNKNOWN)
3137                                 ioc->FirstWhoInit = facts->WhoInit;
3138                 }
3139
3140                 facts->MsgVersion = le16_to_cpu(facts->MsgVersion);
3141                 facts->MsgContext = le32_to_cpu(facts->MsgContext);
3142                 facts->IOCExceptions = le16_to_cpu(facts->IOCExceptions);
3143                 facts->IOCStatus = le16_to_cpu(facts->IOCStatus);
3144                 facts->IOCLogInfo = le32_to_cpu(facts->IOCLogInfo);
3145                 status = le16_to_cpu(facts->IOCStatus) & MPI_IOCSTATUS_MASK;
3146                 /* CHECKME! IOCStatus, IOCLogInfo */
3147
3148                 facts->ReplyQueueDepth = le16_to_cpu(facts->ReplyQueueDepth);
3149                 facts->RequestFrameSize = le16_to_cpu(facts->RequestFrameSize);
3150
3151                 /*
3152                  * FC f/w version changed between 1.1 and 1.2
3153                  *      Old: u16{Major(4),Minor(4),SubMinor(8)}
3154                  *      New: u32{Major(8),Minor(8),Unit(8),Dev(8)}
3155                  */
3156                 if (facts->MsgVersion < MPI_VERSION_01_02) {
3157                         /*
3158                          *      Handle old FC f/w style, convert to new...
3159                          */
3160                         u16      oldv = le16_to_cpu(facts->Reserved_0101_FWVersion);
3161                         facts->FWVersion.Word =
3162                                         ((oldv<<12) & 0xFF000000) |
3163                                         ((oldv<<8)  & 0x000FFF00);
3164                 } else
3165                         facts->FWVersion.Word = le32_to_cpu(facts->FWVersion.Word);
3166
3167                 facts->ProductID = le16_to_cpu(facts->ProductID);
3168
3169                 if ((ioc->facts.ProductID & MPI_FW_HEADER_PID_PROD_MASK)
3170                     > MPI_FW_HEADER_PID_PROD_TARGET_SCSI)
3171                         ioc->ir_firmware = 1;
3172
3173                 facts->CurrentHostMfaHighAddr =
3174                                 le32_to_cpu(facts->CurrentHostMfaHighAddr);
3175                 facts->GlobalCredits = le16_to_cpu(facts->GlobalCredits);
3176                 facts->CurrentSenseBufferHighAddr =
3177                                 le32_to_cpu(facts->CurrentSenseBufferHighAddr);
3178                 facts->CurReplyFrameSize =
3179                                 le16_to_cpu(facts->CurReplyFrameSize);
3180                 facts->IOCCapabilities = le32_to_cpu(facts->IOCCapabilities);
3181
3182                 /*
3183                  * Handle NEW (!) IOCFactsReply fields in MPI-1.01.xx
3184                  * Older MPI-1.00.xx struct had 13 dwords, and enlarged
3185                  * to 14 in MPI-1.01.0x.
3186                  */
3187                 if (facts->MsgLength >= (offsetof(IOCFactsReply_t,FWImageSize) + 7)/4 &&
3188                     facts->MsgVersion > MPI_VERSION_01_00) {
3189                         facts->FWImageSize = le32_to_cpu(facts->FWImageSize);
3190                 }
3191
3192                 facts->FWImageSize = ALIGN(facts->FWImageSize, 4);
3193
3194                 if (!facts->RequestFrameSize) {
3195                         /*  Something is wrong!  */
3196                         printk(MYIOC_s_ERR_FMT "IOC reported invalid 0 request size!\n",
3197                                         ioc->name);
3198                         return -55;
3199                 }
3200
3201                 r = sz = facts->BlockSize;
3202                 vv = ((63 / (sz * 4)) + 1) & 0x03;
3203                 ioc->NB_for_64_byte_frame = vv;
3204                 while ( sz )
3205                 {
3206                         shiftFactor++;
3207                         sz = sz >> 1;
3208                 }
3209                 ioc->NBShiftFactor  = shiftFactor;
3210                 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT
3211                     "NB_for_64_byte_frame=%x NBShiftFactor=%x BlockSize=%x\n",
3212                     ioc->name, vv, shiftFactor, r));
3213
3214                 if (reason == MPT_HOSTEVENT_IOC_BRINGUP) {
3215                         /*
3216                          * Set values for this IOC's request & reply frame sizes,
3217                          * and request & reply queue depths...
3218                          */
3219                         ioc->req_sz = min(MPT_DEFAULT_FRAME_SIZE, facts->RequestFrameSize * 4);
3220                         ioc->req_depth = min_t(int, MPT_MAX_REQ_DEPTH, facts->GlobalCredits);
3221                         ioc->reply_sz = MPT_REPLY_FRAME_SIZE;
3222                         ioc->reply_depth = min_t(int, MPT_DEFAULT_REPLY_DEPTH, facts->ReplyQueueDepth);
3223
3224                         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "reply_sz=%3d, reply_depth=%4d\n",
3225                                 ioc->name, ioc->reply_sz, ioc->reply_depth));
3226                         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "req_sz  =%3d, req_depth  =%4d\n",
3227                                 ioc->name, ioc->req_sz, ioc->req_depth));
3228
3229                         /* Get port facts! */
3230                         if ( (r = GetPortFacts(ioc, 0, sleepFlag)) != 0 )
3231                                 return r;
3232                 }
3233         } else {
3234                 printk(MYIOC_s_ERR_FMT
3235                      "Invalid IOC facts reply, msgLength=%d offsetof=%zd!\n",
3236                      ioc->name, facts->MsgLength, (offsetof(IOCFactsReply_t,
3237                      RequestFrameSize)/sizeof(u32)));
3238                 return -66;
3239         }
3240
3241         return 0;
3242 }
3243
3244 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3245 /**
3246  *      GetPortFacts - Send PortFacts request to MPT adapter.
3247  *      @ioc: Pointer to MPT_ADAPTER structure
3248  *      @portnum: Port number
3249  *      @sleepFlag: Specifies whether the process can sleep
3250  *
3251  *      Returns 0 for success, non-zero for failure.
3252  */
3253 static int
3254 GetPortFacts(MPT_ADAPTER *ioc, int portnum, int sleepFlag)
3255 {
3256         PortFacts_t              get_pfacts;
3257         PortFactsReply_t        *pfacts;
3258         int                      ii;
3259         int                      req_sz;
3260         int                      reply_sz;
3261         int                      max_id;
3262
3263         /* IOC *must* NOT be in RESET state! */
3264         if (ioc->last_state == MPI_IOC_STATE_RESET) {
3265                 printk(MYIOC_s_ERR_FMT "Can't get PortFacts NOT READY! (%08x)\n",
3266                     ioc->name, ioc->last_state );
3267                 return -4;
3268         }
3269
3270         pfacts = &ioc->pfacts[portnum];
3271
3272         /* Destination (reply area)...  */
3273         reply_sz = sizeof(*pfacts);
3274         memset(pfacts, 0, reply_sz);
3275
3276         /* Request area (get_pfacts on the stack right now!) */
3277         req_sz = sizeof(get_pfacts);
3278         memset(&get_pfacts, 0, req_sz);
3279
3280         get_pfacts.Function = MPI_FUNCTION_PORT_FACTS;
3281         get_pfacts.PortNumber = portnum;
3282         /* Assert: All other get_pfacts fields are zero! */
3283
3284         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending get PortFacts(%d) request\n",
3285                         ioc->name, portnum));
3286
3287         /* No non-zero fields in the get_pfacts request are greater than
3288          * 1 byte in size, so we can just fire it off as is.
3289          */
3290         ii = mpt_handshake_req_reply_wait(ioc, req_sz, (u32*)&get_pfacts,
3291                                 reply_sz, (u16*)pfacts, 5 /*seconds*/, sleepFlag);
3292         if (ii != 0)
3293                 return ii;
3294
3295         /* Did we get a valid reply? */
3296
3297         /* Now byte swap the necessary fields in the response. */
3298         pfacts->MsgContext = le32_to_cpu(pfacts->MsgContext);
3299         pfacts->IOCStatus = le16_to_cpu(pfacts->IOCStatus);
3300         pfacts->IOCLogInfo = le32_to_cpu(pfacts->IOCLogInfo);
3301         pfacts->MaxDevices = le16_to_cpu(pfacts->MaxDevices);
3302         pfacts->PortSCSIID = le16_to_cpu(pfacts->PortSCSIID);
3303         pfacts->ProtocolFlags = le16_to_cpu(pfacts->ProtocolFlags);
3304         pfacts->MaxPostedCmdBuffers = le16_to_cpu(pfacts->MaxPostedCmdBuffers);
3305         pfacts->MaxPersistentIDs = le16_to_cpu(pfacts->MaxPersistentIDs);
3306         pfacts->MaxLanBuckets = le16_to_cpu(pfacts->MaxLanBuckets);
3307
3308         max_id = (ioc->bus_type == SAS) ? pfacts->PortSCSIID :
3309             pfacts->MaxDevices;
3310         ioc->devices_per_bus = (max_id > 255) ? 256 : max_id;
3311         ioc->number_of_buses = (ioc->devices_per_bus < 256) ? 1 : max_id/256;
3312
3313         /*
3314          * Place all the devices on channels
3315          *
3316          * (for debuging)
3317          */
3318         if (mpt_channel_mapping) {
3319                 ioc->devices_per_bus = 1;
3320                 ioc->number_of_buses = (max_id > 255) ? 255 : max_id;
3321         }
3322
3323         return 0;
3324 }
3325
3326 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3327 /**
3328  *      SendIocInit - Send IOCInit request to MPT adapter.
3329  *      @ioc: Pointer to MPT_ADAPTER structure
3330  *      @sleepFlag: Specifies whether the process can sleep
3331  *
3332  *      Send IOCInit followed by PortEnable to bring IOC to OPERATIONAL state.
3333  *
3334  *      Returns 0 for success, non-zero for failure.
3335  */
3336 static int
3337 SendIocInit(MPT_ADAPTER *ioc, int sleepFlag)
3338 {
3339         IOCInit_t                ioc_init;
3340         MPIDefaultReply_t        init_reply;
3341         u32                      state;
3342         int                      r;
3343         int                      count;
3344         int                      cntdn;
3345
3346         memset(&ioc_init, 0, sizeof(ioc_init));
3347         memset(&init_reply, 0, sizeof(init_reply));
3348
3349         ioc_init.WhoInit = MPI_WHOINIT_HOST_DRIVER;
3350         ioc_init.Function = MPI_FUNCTION_IOC_INIT;
3351
3352         /* If we are in a recovery mode and we uploaded the FW image,
3353          * then this pointer is not NULL. Skip the upload a second time.
3354          * Set this flag if cached_fw set for either IOC.
3355          */
3356         if (ioc->facts.Flags & MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT)
3357                 ioc->upload_fw = 1;
3358         else
3359                 ioc->upload_fw = 0;
3360         ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "upload_fw %d facts.Flags=%x\n",
3361                    ioc->name, ioc->upload_fw, ioc->facts.Flags));
3362
3363         ioc_init.MaxDevices = (U8)ioc->devices_per_bus;
3364         ioc_init.MaxBuses = (U8)ioc->number_of_buses;
3365
3366         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "facts.MsgVersion=%x\n",
3367                    ioc->name, ioc->facts.MsgVersion));
3368         if (ioc->facts.MsgVersion >= MPI_VERSION_01_05) {
3369                 // set MsgVersion and HeaderVersion host driver was built with
3370                 ioc_init.MsgVersion = cpu_to_le16(MPI_VERSION);
3371                 ioc_init.HeaderVersion = cpu_to_le16(MPI_HEADER_VERSION);
3372
3373                 if (ioc->facts.Flags & MPI_IOCFACTS_FLAGS_HOST_PAGE_BUFFER_PERSISTENT) {
3374                         ioc_init.HostPageBufferSGE = ioc->facts.HostPageBufferSGE;
3375                 } else if(mpt_host_page_alloc(ioc, &ioc_init))
3376                         return -99;
3377         }
3378         ioc_init.ReplyFrameSize = cpu_to_le16(ioc->reply_sz);   /* in BYTES */
3379
3380         if (ioc->sg_addr_size == sizeof(u64)) {
3381                 /* Save the upper 32-bits of the request
3382                  * (reply) and sense buffers.
3383                  */
3384                 ioc_init.HostMfaHighAddr = cpu_to_le32((u32)((u64)ioc->alloc_dma >> 32));
3385                 ioc_init.SenseBufferHighAddr = cpu_to_le32((u32)((u64)ioc->sense_buf_pool_dma >> 32));
3386         } else {
3387                 /* Force 32-bit addressing */
3388                 ioc_init.HostMfaHighAddr = cpu_to_le32(0);
3389                 ioc_init.SenseBufferHighAddr = cpu_to_le32(0);
3390         }
3391
3392         ioc->facts.CurrentHostMfaHighAddr = ioc_init.HostMfaHighAddr;
3393         ioc->facts.CurrentSenseBufferHighAddr = ioc_init.SenseBufferHighAddr;
3394         ioc->facts.MaxDevices = ioc_init.MaxDevices;
3395         ioc->facts.MaxBuses = ioc_init.MaxBuses;
3396
3397         dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending IOCInit (req @ %p)\n",
3398                         ioc->name, &ioc_init));
3399
3400         r = mpt_handshake_req_reply_wait(ioc, sizeof(IOCInit_t), (u32*)&ioc_init,
3401                                 sizeof(MPIDefaultReply_t), (u16*)&init_reply, 10 /*seconds*/, sleepFlag);
3402         if (r != 0) {
3403                 printk(MYIOC_s_ERR_FMT "Sending IOCInit failed(%d)!\n",ioc->name, r);
3404                 return r;
3405         }
3406
3407         /* No need to byte swap the multibyte fields in the reply
3408          * since we don't even look at its contents.
3409          */
3410
3411         dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending PortEnable (req @ %p)\n",
3412                         ioc->name, &ioc_init));
3413
3414         if ((r = SendPortEnable(ioc, 0, sleepFlag)) != 0) {
3415                 printk(MYIOC_s_ERR_FMT "Sending PortEnable failed(%d)!\n",ioc->name, r);
3416                 return r;
3417         }
3418
3419         /* YIKES!  SUPER IMPORTANT!!!
3420          *  Poll IocState until _OPERATIONAL while IOC is doing
3421          *  LoopInit and TargetDiscovery!
3422          */
3423         count = 0;
3424         cntdn = ((sleepFlag == CAN_SLEEP) ? HZ : 1000) * 60;    /* 60 seconds */
3425         state = mpt_GetIocState(ioc, 1);
3426         while (state != MPI_IOC_STATE_OPERATIONAL && --cntdn) {
3427                 if (sleepFlag == CAN_SLEEP) {
3428                         msleep(1);
3429                 } else {
3430                         mdelay(1);
3431                 }
3432
3433                 if (!cntdn) {
3434                         printk(MYIOC_s_ERR_FMT "Wait IOC_OP state timeout(%d)!\n",
3435                                         ioc->name, (int)((count+5)/HZ));
3436                         return -9;
3437                 }
3438
3439                 state = mpt_GetIocState(ioc, 1);
3440                 count++;
3441         }
3442         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Wait IOC_OPERATIONAL state (cnt=%d)\n",
3443                         ioc->name, count));
3444
3445         ioc->aen_event_read_flag=0;
3446         return r;
3447 }
3448
3449 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3450 /**
3451  *      SendPortEnable - Send PortEnable request to MPT adapter port.
3452  *      @ioc: Pointer to MPT_ADAPTER structure
3453  *      @portnum: Port number to enable
3454  *      @sleepFlag: Specifies whether the process can sleep
3455  *
3456  *      Send PortEnable to bring IOC to OPERATIONAL state.
3457  *
3458  *      Returns 0 for success, non-zero for failure.
3459  */
3460 static int
3461 SendPortEnable(MPT_ADAPTER *ioc, int portnum, int sleepFlag)
3462 {
3463         PortEnable_t             port_enable;
3464         MPIDefaultReply_t        reply_buf;
3465         int      rc;
3466         int      req_sz;
3467         int      reply_sz;
3468
3469         /*  Destination...  */
3470         reply_sz = sizeof(MPIDefaultReply_t);
3471         memset(&reply_buf, 0, reply_sz);
3472
3473         req_sz = sizeof(PortEnable_t);
3474         memset(&port_enable, 0, req_sz);
3475
3476         port_enable.Function = MPI_FUNCTION_PORT_ENABLE;
3477         port_enable.PortNumber = portnum;
3478 /*      port_enable.ChainOffset = 0;            */
3479 /*      port_enable.MsgFlags = 0;               */
3480 /*      port_enable.MsgContext = 0;             */
3481
3482         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending Port(%d)Enable (req @ %p)\n",
3483                         ioc->name, portnum, &port_enable));
3484
3485         /* RAID FW may take a long time to enable
3486          */
3487         if (ioc->ir_firmware || ioc->bus_type == SAS) {
3488                 rc = mpt_handshake_req_reply_wait(ioc, req_sz,
3489                 (u32*)&port_enable, reply_sz, (u16*)&reply_buf,
3490                 300 /*seconds*/, sleepFlag);
3491         } else {
3492                 rc = mpt_handshake_req_reply_wait(ioc, req_sz,
3493                 (u32*)&port_enable, reply_sz, (u16*)&reply_buf,
3494                 30 /*seconds*/, sleepFlag);
3495         }
3496         return rc;
3497 }
3498
3499 /**
3500  *      mpt_alloc_fw_memory - allocate firmware memory
3501  *      @ioc: Pointer to MPT_ADAPTER structure
3502  *      @size: total FW bytes
3503  *
3504  *      If memory has already been allocated, the same (cached) value
3505  *      is returned.
3506  *
3507  *      Return 0 if successful, or non-zero for failure
3508  **/
3509 int
3510 mpt_alloc_fw_memory(MPT_ADAPTER *ioc, int size)
3511 {
3512         int rc;
3513
3514         if (ioc->cached_fw) {
3515                 rc = 0;  /* use already allocated memory */
3516                 goto out;
3517         }
3518         else if (ioc->alt_ioc && ioc->alt_ioc->cached_fw) {
3519                 ioc->cached_fw = ioc->alt_ioc->cached_fw;  /* use alt_ioc's memory */
3520                 ioc->cached_fw_dma = ioc->alt_ioc->cached_fw_dma;
3521                 rc = 0;
3522                 goto out;
3523         }
3524         ioc->cached_fw = pci_alloc_consistent(ioc->pcidev, size, &ioc->cached_fw_dma);
3525         if (!ioc->cached_fw) {
3526                 printk(MYIOC_s_ERR_FMT "Unable to allocate memory for the cached firmware image!\n",
3527                     ioc->name);
3528                 rc = -1;
3529         } else {
3530                 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "FW Image  @ %p[%p], sz=%d[%x] bytes\n",
3531                     ioc->name, ioc->cached_fw, (void *)(ulong)ioc->cached_fw_dma, size, size));
3532                 ioc->alloc_total += size;
3533                 rc = 0;
3534         }
3535  out:
3536         return rc;
3537 }
3538
3539 /**
3540  *      mpt_free_fw_memory - free firmware memory
3541  *      @ioc: Pointer to MPT_ADAPTER structure
3542  *
3543  *      If alt_img is NULL, delete from ioc structure.
3544  *      Else, delete a secondary image in same format.
3545  **/
3546 void
3547 mpt_free_fw_memory(MPT_ADAPTER *ioc)
3548 {
3549         int sz;
3550
3551         if (!ioc->cached_fw)
3552                 return;
3553
3554         sz = ioc->facts.FWImageSize;
3555         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "free_fw_memory: FW Image  @ %p[%p], sz=%d[%x] bytes\n",
3556                  ioc->name, ioc->cached_fw, (void *)(ulong)ioc->cached_fw_dma, sz, sz));
3557         pci_free_consistent(ioc->pcidev, sz, ioc->cached_fw, ioc->cached_fw_dma);
3558         ioc->alloc_total -= sz;
3559         ioc->cached_fw = NULL;
3560 }
3561
3562 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3563 /**
3564  *      mpt_do_upload - Construct and Send FWUpload request to MPT adapter port.
3565  *      @ioc: Pointer to MPT_ADAPTER structure
3566  *      @sleepFlag: Specifies whether the process can sleep
3567  *
3568  *      Returns 0 for success, >0 for handshake failure
3569  *              <0 for fw upload failure.
3570  *
3571  *      Remark: If bound IOC and a successful FWUpload was performed
3572  *      on the bound IOC, the second image is discarded
3573  *      and memory is free'd. Both channels must upload to prevent
3574  *      IOC from running in degraded mode.
3575  */
3576 static int
3577 mpt_do_upload(MPT_ADAPTER *ioc, int sleepFlag)
3578 {
3579         u8                       reply[sizeof(FWUploadReply_t)];
3580         FWUpload_t              *prequest;
3581         FWUploadReply_t         *preply;
3582         FWUploadTCSGE_t         *ptcsge;
3583         u32                      flagsLength;
3584         int                      ii, sz, reply_sz;
3585         int                      cmdStatus;
3586         int                     request_size;
3587         /* If the image size is 0, we are done.
3588          */
3589         if ((sz = ioc->facts.FWImageSize) == 0)
3590                 return 0;
3591
3592         if (mpt_alloc_fw_memory(ioc, ioc->facts.FWImageSize) != 0)
3593                 return -ENOMEM;
3594
3595         dinitprintk(ioc, printk(MYIOC_s_INFO_FMT ": FW Image  @ %p[%p], sz=%d[%x] bytes\n",
3596             ioc->name, ioc->cached_fw, (void *)(ulong)ioc->cached_fw_dma, sz, sz));
3597
3598         prequest = (sleepFlag == NO_SLEEP) ? kzalloc(ioc->req_sz, GFP_ATOMIC) :
3599             kzalloc(ioc->req_sz, GFP_KERNEL);
3600         if (!prequest) {
3601                 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "fw upload failed "
3602                     "while allocating memory \n", ioc->name));
3603                 mpt_free_fw_memory(ioc);
3604                 return -ENOMEM;
3605         }
3606
3607         preply = (FWUploadReply_t *)&reply;
3608
3609         reply_sz = sizeof(reply);
3610         memset(preply, 0, reply_sz);
3611
3612         prequest->ImageType = MPI_FW_UPLOAD_ITYPE_FW_IOC_MEM;
3613         prequest->Function = MPI_FUNCTION_FW_UPLOAD;
3614
3615         ptcsge = (FWUploadTCSGE_t *) &prequest->SGL;
3616         ptcsge->DetailsLength = 12;
3617         ptcsge->Flags = MPI_SGE_FLAGS_TRANSACTION_ELEMENT;
3618         ptcsge->ImageSize = cpu_to_le32(sz);
3619         ptcsge++;
3620
3621         flagsLength = MPT_SGE_FLAGS_SSIMPLE_READ | sz;
3622         ioc->add_sge((char *)ptcsge, flagsLength, ioc->cached_fw_dma);
3623         request_size = offsetof(FWUpload_t, SGL) + sizeof(FWUploadTCSGE_t) +
3624             ioc->SGE_size;
3625         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending FW Upload "
3626             " (req @ %p) fw_size=%d mf_request_size=%d\n", ioc->name, prequest,
3627             ioc->facts.FWImageSize, request_size));
3628         DBG_DUMP_FW_REQUEST_FRAME(ioc, (u32 *)prequest);
3629
3630         ii = mpt_handshake_req_reply_wait(ioc, request_size, (u32 *)prequest,
3631             reply_sz, (u16 *)preply, 65 /*seconds*/, sleepFlag);
3632
3633         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "FW Upload completed "
3634             "rc=%x \n", ioc->name, ii));
3635
3636         cmdStatus = -EFAULT;
3637         if (ii == 0) {
3638                 /* Handshake transfer was complete and successful.
3639                  * Check the Reply Frame.
3640                  */
3641                 int status;
3642                 status = le16_to_cpu(preply->IOCStatus) &
3643                                 MPI_IOCSTATUS_MASK;
3644                 if (status == MPI_IOCSTATUS_SUCCESS &&
3645                     ioc->facts.FWImageSize ==
3646                     le32_to_cpu(preply->ActualImageSize))
3647                                 cmdStatus = 0;
3648         }
3649         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT ": do_upload cmdStatus=%d \n",
3650                         ioc->name, cmdStatus));
3651
3652
3653         if (cmdStatus) {
3654                 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "fw upload failed, "
3655                     "freeing image \n", ioc->name));
3656                 mpt_free_fw_memory(ioc);
3657         }
3658         kfree(prequest);
3659
3660         return cmdStatus;
3661 }
3662
3663 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3664 /**
3665  *      mpt_downloadboot - DownloadBoot code
3666  *      @ioc: Pointer to MPT_ADAPTER structure
3667  *      @pFwHeader: Pointer to firmware header info
3668  *      @sleepFlag: Specifies whether the process can sleep
3669  *
3670  *      FwDownloadBoot requires Programmed IO access.
3671  *
3672  *      Returns 0 for success
3673  *              -1 FW Image size is 0
3674  *              -2 No valid cached_fw Pointer
3675  *              <0 for fw upload failure.
3676  */
3677 static int
3678 mpt_downloadboot(MPT_ADAPTER *ioc, MpiFwHeader_t *pFwHeader, int sleepFlag)
3679 {
3680         MpiExtImageHeader_t     *pExtImage;
3681         u32                      fwSize;
3682         u32                      diag0val;
3683         int                      count;
3684         u32                     *ptrFw;
3685         u32                      diagRwData;
3686         u32                      nextImage;
3687         u32                      load_addr;
3688         u32                      ioc_state=0;
3689
3690         ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "downloadboot: fw size 0x%x (%d), FW Ptr %p\n",
3691                                 ioc->name, pFwHeader->ImageSize, pFwHeader->ImageSize, pFwHeader));
3692
3693         CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
3694         CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_1ST_KEY_VALUE);
3695         CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_2ND_KEY_VALUE);
3696         CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_3RD_KEY_VALUE);
3697         CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_4TH_KEY_VALUE);
3698         CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_5TH_KEY_VALUE);
3699
3700         CHIPREG_WRITE32(&ioc->chip->Diagnostic, (MPI_DIAG_PREVENT_IOC_BOOT | MPI_DIAG_DISABLE_ARM));
3701
3702         /* wait 1 msec */
3703         if (sleepFlag == CAN_SLEEP) {
3704                 msleep(1);
3705         } else {
3706                 mdelay (1);
3707         }
3708
3709         diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3710         CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val | MPI_DIAG_RESET_ADAPTER);
3711
3712         for (count = 0; count < 30; count ++) {
3713                 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3714                 if (!(diag0val & MPI_DIAG_RESET_ADAPTER)) {
3715                         ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "RESET_ADAPTER cleared, count=%d\n",
3716                                 ioc->name, count));
3717                         break;
3718                 }
3719                 /* wait .1 sec */
3720                 if (sleepFlag == CAN_SLEEP) {
3721                         msleep (100);
3722                 } else {
3723                         mdelay (100);
3724                 }
3725         }
3726
3727         if ( count == 30 ) {
3728                 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "downloadboot failed! "
3729                 "Unable to get MPI_DIAG_DRWE mode, diag0val=%x\n",
3730                 ioc->name, diag0val));
3731                 return -3;
3732         }
3733
3734         CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
3735         CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_1ST_KEY_VALUE);
3736         CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_2ND_KEY_VALUE);
3737         CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_3RD_KEY_VALUE);
3738         CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_4TH_KEY_VALUE);
3739         CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_5TH_KEY_VALUE);
3740
3741         /* Set the DiagRwEn and Disable ARM bits */
3742         CHIPREG_WRITE32(&ioc->chip->Diagnostic, (MPI_DIAG_RW_ENABLE | MPI_DIAG_DISABLE_ARM));
3743
3744         fwSize = (pFwHeader->ImageSize + 3)/4;
3745         ptrFw = (u32 *) pFwHeader;
3746
3747         /* Write the LoadStartAddress to the DiagRw Address Register
3748          * using Programmed IO
3749          */
3750         if (ioc->errata_flag_1064)
3751                 pci_enable_io_access(ioc->pcidev);
3752
3753         CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, pFwHeader->LoadStartAddress);
3754         ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "LoadStart addr written 0x%x \n",
3755                 ioc->name, pFwHeader->LoadStartAddress));
3756
3757         ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Write FW Image: 0x%x bytes @ %p\n",
3758                                 ioc->name, fwSize*4, ptrFw));
3759         while (fwSize--) {
3760                 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwData, *ptrFw++);
3761         }
3762
3763         nextImage = pFwHeader->NextImageHeaderOffset;
3764         while (nextImage) {
3765                 pExtImage = (MpiExtImageHeader_t *) ((char *)pFwHeader + nextImage);
3766
3767                 load_addr = pExtImage->LoadStartAddress;
3768
3769                 fwSize = (pExtImage->ImageSize + 3) >> 2;
3770                 ptrFw = (u32 *)pExtImage;
3771
3772                 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Write Ext Image: 0x%x (%d) bytes @ %p load_addr=%x\n",
3773                                                 ioc->name, fwSize*4, fwSize*4, ptrFw, load_addr));
3774                 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, load_addr);
3775
3776                 while (fwSize--) {
3777                         CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwData, *ptrFw++);
3778                 }
3779                 nextImage = pExtImage->NextImageHeaderOffset;
3780         }
3781
3782         /* Write the IopResetVectorRegAddr */
3783         ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Write IopResetVector Addr=%x! \n", ioc->name,  pFwHeader->IopResetRegAddr));
3784         CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, pFwHeader->IopResetRegAddr);
3785
3786         /* Write the IopResetVectorValue */
3787         ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Write IopResetVector Value=%x! \n", ioc->name, pFwHeader->IopResetVectorValue));
3788         CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwData, pFwHeader->IopResetVectorValue);
3789
3790         /* Clear the internal flash bad bit - autoincrementing register,
3791          * so must do two writes.
3792          */
3793         if (ioc->bus_type == SPI) {
3794                 /*
3795                  * 1030 and 1035 H/W errata, workaround to access
3796                  * the ClearFlashBadSignatureBit
3797                  */
3798                 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, 0x3F000000);
3799                 diagRwData = CHIPREG_PIO_READ32(&ioc->pio_chip->DiagRwData);
3800                 diagRwData |= 0x40000000;
3801                 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, 0x3F000000);
3802                 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwData, diagRwData);
3803
3804         } else /* if((ioc->bus_type == SAS) || (ioc->bus_type == FC)) */ {
3805                 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3806                 CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val |
3807                     MPI_DIAG_CLEAR_FLASH_BAD_SIG);
3808
3809                 /* wait 1 msec */
3810                 if (sleepFlag == CAN_SLEEP) {
3811                         msleep (1);
3812                 } else {
3813                         mdelay (1);
3814                 }
3815         }
3816
3817         if (ioc->errata_flag_1064)
3818                 pci_disable_io_access(ioc->pcidev);
3819
3820         diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3821         ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "downloadboot diag0val=%x, "
3822                 "turning off PREVENT_IOC_BOOT, DISABLE_ARM, RW_ENABLE\n",
3823                 ioc->name, diag0val));
3824         diag0val &= ~(MPI_DIAG_PREVENT_IOC_BOOT | MPI_DIAG_DISABLE_ARM | MPI_DIAG_RW_ENABLE);
3825         ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "downloadboot now diag0val=%x\n",
3826                 ioc->name, diag0val));
3827         CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val);
3828
3829         /* Write 0xFF to reset the sequencer */
3830         CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
3831
3832         if (ioc->bus_type == SAS) {
3833                 ioc_state = mpt_GetIocState(ioc, 0);
3834                 if ( (GetIocFacts(ioc, sleepFlag,
3835                                 MPT_HOSTEVENT_IOC_BRINGUP)) != 0 ) {
3836                         ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "GetIocFacts failed: IocState=%x\n",
3837                                         ioc->name, ioc_state));
3838                         return -EFAULT;
3839                 }
3840         }
3841
3842         for (count=0; count<HZ*20; count++) {
3843                 if ((ioc_state = mpt_GetIocState(ioc, 0)) & MPI_IOC_STATE_READY) {
3844                         ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT
3845                                 "downloadboot successful! (count=%d) IocState=%x\n",
3846                                 ioc->name, count, ioc_state));
3847                         if (ioc->bus_type == SAS) {
3848                                 return 0;
3849                         }
3850                         if ((SendIocInit(ioc, sleepFlag)) != 0) {
3851                                 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT
3852                                         "downloadboot: SendIocInit failed\n",
3853                                         ioc->name));
3854                                 return -EFAULT;
3855                         }
3856                         ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT
3857                                         "downloadboot: SendIocInit successful\n",
3858                                         ioc->name));
3859                         return 0;
3860                 }
3861                 if (sleepFlag == CAN_SLEEP) {
3862                         msleep (10);
3863                 } else {
3864                         mdelay (10);
3865                 }
3866         }
3867         ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT
3868                 "downloadboot failed! IocState=%x\n",ioc->name, ioc_state));
3869         return -EFAULT;
3870 }
3871
3872 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3873 /**
3874  *      KickStart - Perform hard reset of MPT adapter.
3875  *      @ioc: Pointer to MPT_ADAPTER structure
3876  *      @force: Force hard reset
3877  *      @sleepFlag: Specifies whether the process can sleep
3878  *
3879  *      This routine places MPT adapter in diagnostic mode via the
3880  *      WriteSequence register, and then performs a hard reset of adapter
3881  *      via the Diagnostic register.
3882  *
3883  *      Inputs:   sleepflag - CAN_SLEEP (non-interrupt thread)
3884  *                      or NO_SLEEP (interrupt thread, use mdelay)
3885  *                force - 1 if doorbell active, board fault state
3886  *                              board operational, IOC_RECOVERY or
3887  *                              IOC_BRINGUP and there is an alt_ioc.
3888  *                        0 else
3889  *
3890  *      Returns:
3891  *               1 - hard reset, READY
3892  *               0 - no reset due to History bit, READY
3893  *              -1 - no reset due to History bit but not READY
3894  *                   OR reset but failed to come READY
3895  *              -2 - no reset, could not enter DIAG mode
3896  *              -3 - reset but bad FW bit
3897  */
3898 static int
3899 KickStart(MPT_ADAPTER *ioc, int force, int sleepFlag)
3900 {
3901         int hard_reset_done = 0;
3902         u32 ioc_state=0;
3903         int cnt,cntdn;
3904
3905         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "KickStarting!\n", ioc->name));
3906         if (ioc->bus_type == SPI) {
3907                 /* Always issue a Msg Unit Reset first. This will clear some
3908                  * SCSI bus hang conditions.
3909                  */
3910                 SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET, sleepFlag);
3911
3912                 if (sleepFlag == CAN_SLEEP) {
3913                         msleep (1000);
3914                 } else {
3915                         mdelay (1000);
3916                 }
3917         }
3918
3919         hard_reset_done = mpt_diag_reset(ioc, force, sleepFlag);
3920         if (hard_reset_done < 0)
3921                 return hard_reset_done;
3922
3923         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Diagnostic reset successful!\n",
3924                 ioc->name));
3925
3926         cntdn = ((sleepFlag == CAN_SLEEP) ? HZ : 1000) * 2;     /* 2 seconds */
3927         for (cnt=0; cnt<cntdn; cnt++) {
3928                 ioc_state = mpt_GetIocState(ioc, 1);
3929                 if ((ioc_state == MPI_IOC_STATE_READY) || (ioc_state == MPI_IOC_STATE_OPERATIONAL)) {
3930                         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "KickStart successful! (cnt=%d)\n",
3931                                         ioc->name, cnt));
3932                         return hard_reset_done;
3933                 }
3934                 if (sleepFlag == CAN_SLEEP) {
3935                         msleep (10);
3936                 } else {
3937                         mdelay (10);
3938                 }
3939         }
3940
3941         dinitprintk(ioc, printk(MYIOC_s_ERR_FMT "Failed to come READY after reset! IocState=%x\n",
3942                 ioc->name, mpt_GetIocState(ioc, 0)));
3943         return -1;
3944 }
3945
3946 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3947 /**
3948  *      mpt_diag_reset - Perform hard reset of the adapter.
3949  *      @ioc: Pointer to MPT_ADAPTER structure
3950  *      @ignore: Set if to honor and clear to ignore
3951  *              the reset history bit
3952  *      @sleepFlag: CAN_SLEEP if called in a non-interrupt thread,
3953  *              else set to NO_SLEEP (use mdelay instead)
3954  *
3955  *      This routine places the adapter in diagnostic mode via the
3956  *      WriteSequence register and then performs a hard reset of adapter
3957  *      via the Diagnostic register. Adapter should be in ready state
3958  *      upon successful completion.
3959  *
3960  *      Returns:  1  hard reset successful
3961  *                0  no reset performed because reset history bit set
3962  *               -2  enabling diagnostic mode failed
3963  *               -3  diagnostic reset failed
3964  */
3965 static int
3966 mpt_diag_reset(MPT_ADAPTER *ioc, int ignore, int sleepFlag)
3967 {
3968         u32 diag0val;
3969         u32 doorbell;
3970         int hard_reset_done = 0;
3971         int count = 0;
3972         u32 diag1val = 0;
3973         MpiFwHeader_t *cached_fw;       /* Pointer to FW */
3974         u8       cb_idx;
3975
3976         /* Clear any existing interrupts */
3977         CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
3978
3979         if (ioc->pcidev->device == MPI_MANUFACTPAGE_DEVID_SAS1078) {
3980
3981                 if (!ignore)
3982                         return 0;
3983
3984                 drsprintk(ioc, printk(MYIOC_s_WARN_FMT "%s: Doorbell=%p; 1078 reset "
3985                         "address=%p\n",  ioc->name, __func__,
3986                         &ioc->chip->Doorbell, &ioc->chip->Reset_1078));
3987                 CHIPREG_WRITE32(&ioc->chip->Reset_1078, 0x07);
3988                 if (sleepFlag == CAN_SLEEP)
3989                         msleep(1);
3990                 else
3991                         mdelay(1);
3992
3993                 /*
3994                  * Call each currently registered protocol IOC reset handler
3995                  * with pre-reset indication.
3996                  * NOTE: If we're doing _IOC_BRINGUP, there can be no
3997                  * MptResetHandlers[] registered yet.
3998                  */
3999                 for (cb_idx = MPT_MAX_PROTOCOL_DRIVERS-1; cb_idx; cb_idx--) {
4000                         if (MptResetHandlers[cb_idx])
4001                                 (*(MptResetHandlers[cb_idx]))(ioc,
4002                                                 MPT_IOC_PRE_RESET);
4003                 }
4004
4005                 for (count = 0; count < 60; count ++) {
4006                         doorbell = CHIPREG_READ32(&ioc->chip->Doorbell);
4007                         doorbell &= MPI_IOC_STATE_MASK;
4008
4009                         drsprintk(ioc, printk(MYIOC_s_DEBUG_FMT
4010                                 "looking for READY STATE: doorbell=%x"
4011                                 " count=%d\n",
4012                                 ioc->name, doorbell, count));
4013
4014                         if (doorbell == MPI_IOC_STATE_READY) {
4015                                 return 1;
4016                         }
4017
4018                         /* wait 1 sec */
4019                         if (sleepFlag == CAN_SLEEP)
4020                                 msleep(1000);
4021                         else
4022                                 mdelay(1000);
4023                 }
4024                 return -1;
4025         }
4026
4027         /* Use "Diagnostic reset" method! (only thing available!) */
4028         diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
4029
4030         if (ioc->debug_level & MPT_DEBUG) {
4031                 if (ioc->alt_ioc)
4032                         diag1val = CHIPREG_READ32(&ioc->alt_ioc->chip->Diagnostic);
4033                 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "DbG1: diag0=%08x, diag1=%08x\n",
4034                         ioc->name, diag0val, diag1val));
4035         }
4036
4037         /* Do the reset if we are told to ignore the reset history
4038          * or if the reset history is 0
4039          */
4040         if (ignore || !(diag0val & MPI_DIAG_RESET_HISTORY)) {
4041                 while ((diag0val & MPI_DIAG_DRWE) == 0) {
4042                         /* Write magic sequence to WriteSequence register
4043                          * Loop until in diagnostic mode
4044                          */
4045                         CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
4046                         CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_1ST_KEY_VALUE);
4047                         CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_2ND_KEY_VALUE);
4048                         CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_3RD_KEY_VALUE);
4049                         CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_4TH_KEY_VALUE);
4050                         CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_5TH_KEY_VALUE);
4051
4052                         /* wait 100 msec */
4053                         if (sleepFlag == CAN_SLEEP) {
4054                                 msleep (100);
4055                         } else {
4056                                 mdelay (100);
4057                         }
4058
4059                         count++;
4060                         if (count > 20) {
4061                                 printk(MYIOC_s_ERR_FMT "Enable Diagnostic mode FAILED! (%02xh)\n",
4062                                                 ioc->name, diag0val);
4063                                 return -2;
4064
4065                         }
4066
4067                         diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
4068
4069                         dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Wrote magic DiagWriteEn sequence (%x)\n",
4070                                         ioc->name, diag0val));
4071                 }
4072
4073                 if (ioc->debug_level & MPT_DEBUG) {
4074                         if (ioc->alt_ioc)
4075                                 diag1val = CHIPREG_READ32(&ioc->alt_ioc->chip->Diagnostic);
4076                         dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "DbG2: diag0=%08x, diag1=%08x\n",
4077                                 ioc->name, diag0val, diag1val));
4078                 }
4079                 /*
4080                  * Disable the ARM (Bug fix)
4081                  *
4082                  */
4083                 CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val | MPI_DIAG_DISABLE_ARM);
4084                 mdelay(1);
4085
4086                 /*
4087                  * Now hit the reset bit in the Diagnostic register
4088                  * (THE BIG HAMMER!) (Clears DRWE bit).
4089                  */
4090                 CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val | MPI_DIAG_RESET_ADAPTER);
4091                 hard_reset_done = 1;
4092                 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Diagnostic reset performed\n",
4093                                 ioc->name));
4094
4095                 /*
4096                  * Call each currently registered protocol IOC reset handler
4097                  * with pre-reset indication.
4098                  * NOTE: If we're doing _IOC_BRINGUP, there can be no
4099                  * MptResetHandlers[] registered yet.
4100                  */
4101                 for (cb_idx = MPT_MAX_PROTOCOL_DRIVERS-1; cb_idx; cb_idx--) {
4102                         if (MptResetHandlers[cb_idx]) {
4103                                 mpt_signal_reset(cb_idx,
4104                                         ioc, MPT_IOC_PRE_RESET);
4105                                 if (ioc->alt_ioc) {
4106                                         mpt_signal_reset(cb_idx,
4107                                         ioc->alt_ioc, MPT_IOC_PRE_RESET);
4108                                 }
4109                         }
4110                 }
4111
4112                 if (ioc->cached_fw)
4113                         cached_fw = (MpiFwHeader_t *)ioc->cached_fw;
4114                 else if (ioc->alt_ioc && ioc->alt_ioc->cached_fw)
4115                         cached_fw = (MpiFwHeader_t *)ioc->alt_ioc->cached_fw;
4116                 else
4117                         cached_fw = NULL;
4118                 if (cached_fw) {
4119                         /* If the DownloadBoot operation fails, the
4120                          * IOC will be left unusable. This is a fatal error
4121                          * case.  _diag_reset will return < 0
4122                          */
4123                         for (count = 0; count < 30; count ++) {
4124                                 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
4125                                 if (!(diag0val & MPI_DIAG_RESET_ADAPTER)) {
4126                                         break;
4127                                 }
4128
4129                                 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "cached_fw: diag0val=%x count=%d\n",
4130                                         ioc->name, diag0val, count));
4131                                 /* wait 1 sec */
4132                                 if (sleepFlag == CAN_SLEEP) {
4133                                         msleep (1000);
4134                                 } else {
4135                                         mdelay (1000);
4136                                 }
4137                         }
4138                         if ((count = mpt_downloadboot(ioc, cached_fw, sleepFlag)) < 0) {
4139                                 printk(MYIOC_s_WARN_FMT
4140                                         "firmware downloadboot failure (%d)!\n", ioc->name, count);
4141                         }
4142
4143                 } else {
4144                         /* Wait for FW to reload and for board
4145                          * to go to the READY state.
4146                          * Maximum wait is 60 seconds.
4147                          * If fail, no error will check again
4148                          * with calling program.
4149                          */
4150                         for (count = 0; count < 60; count ++) {
4151                                 doorbell = CHIPREG_READ32(&ioc->chip->Doorbell);
4152                                 doorbell &= MPI_IOC_STATE_MASK;
4153
4154                                 drsprintk(ioc, printk(MYIOC_s_DEBUG_FMT
4155                                     "looking for READY STATE: doorbell=%x"
4156                                     " count=%d\n", ioc->name, doorbell, count));
4157
4158                                 if (doorbell == MPI_IOC_STATE_READY) {
4159                                         break;
4160                                 }
4161
4162                                 /* wait 1 sec */
4163                                 if (sleepFlag == CAN_SLEEP) {
4164                                         msleep (1000);
4165                                 } else {
4166                                         mdelay (1000);
4167                                 }
4168                         }
4169
4170                         if (doorbell != MPI_IOC_STATE_READY)
4171                                 printk(MYIOC_s_ERR_FMT "Failed to come READY "
4172                                     "after reset! IocState=%x", ioc->name,
4173                                     doorbell);
4174                 }
4175         }
4176
4177         diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
4178         if (ioc->debug_level & MPT_DEBUG) {
4179                 if (ioc->alt_ioc)
4180                         diag1val = CHIPREG_READ32(&ioc->alt_ioc->chip->Diagnostic);
4181                 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "DbG3: diag0=%08x, diag1=%08x\n",
4182                         ioc->name, diag0val, diag1val));
4183         }
4184
4185         /* Clear RESET_HISTORY bit!  Place board in the
4186          * diagnostic mode to update the diag register.
4187          */
4188         diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
4189         count = 0;
4190         while ((diag0val & MPI_DIAG_DRWE) == 0) {
4191                 /* Write magic sequence to WriteSequence register
4192                  * Loop until in diagnostic mode
4193                  */
4194                 CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
4195                 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_1ST_KEY_VALUE);
4196                 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_2ND_KEY_VALUE);
4197                 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_3RD_KEY_VALUE);
4198                 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_4TH_KEY_VALUE);
4199                 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_5TH_KEY_VALUE);
4200
4201                 /* wait 100 msec */
4202                 if (sleepFlag == CAN_SLEEP) {
4203                         msleep (100);
4204                 } else {
4205                         mdelay (100);
4206                 }
4207
4208                 count++;
4209                 if (count > 20) {
4210                         printk(MYIOC_s_ERR_FMT "Enable Diagnostic mode FAILED! (%02xh)\n",
4211                                         ioc->name, diag0val);
4212                         break;
4213                 }
4214                 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
4215         }
4216         diag0val &= ~MPI_DIAG_RESET_HISTORY;
4217         CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val);
4218         diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
4219         if (diag0val & MPI_DIAG_RESET_HISTORY) {
4220                 printk(MYIOC_s_WARN_FMT "ResetHistory bit failed to clear!\n",
4221                                 ioc->name);
4222         }
4223
4224         /* Disable Diagnostic Mode
4225          */
4226         CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFFFFFFFF);
4227
4228         /* Check FW reload status flags.
4229          */
4230         diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
4231         if (diag0val & (MPI_DIAG_FLASH_BAD_SIG | MPI_DIAG_RESET_ADAPTER | MPI_DIAG_DISABLE_ARM)) {
4232                 printk(MYIOC_s_ERR_FMT "Diagnostic reset FAILED! (%02xh)\n",
4233                                 ioc->name, diag0val);
4234                 return -3;
4235         }
4236
4237         if (ioc->debug_level & MPT_DEBUG) {
4238                 if (ioc->alt_ioc)
4239                         diag1val = CHIPREG_READ32(&ioc->alt_ioc->chip->Diagnostic);
4240                 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "DbG4: diag0=%08x, diag1=%08x\n",
4241                         ioc->name, diag0val, diag1val));
4242         }
4243
4244         /*
4245          * Reset flag that says we've enabled event notification
4246          */
4247         ioc->facts.EventState = 0;
4248
4249         if (ioc->alt_ioc)
4250                 ioc->alt_ioc->facts.EventState = 0;
4251
4252         return hard_reset_done;
4253 }
4254
4255 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4256 /**
4257  *      SendIocReset - Send IOCReset request to MPT adapter.
4258  *      @ioc: Pointer to MPT_ADAPTER structure
4259  *      @reset_type: reset type, expected values are
4260  *      %MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET or %MPI_FUNCTION_IO_UNIT_RESET
4261  *      @sleepFlag: Specifies whether the process can sleep
4262  *
4263  *      Send IOCReset request to the MPT adapter.
4264  *
4265  *      Returns 0 for success, non-zero for failure.
4266  */
4267 static int
4268 SendIocReset(MPT_ADAPTER *ioc, u8 reset_type, int sleepFlag)
4269 {
4270         int r;
4271         u32 state;
4272         int cntdn, count;
4273
4274         drsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending IOC reset(0x%02x)!\n",
4275                         ioc->name, reset_type));
4276         CHIPREG_WRITE32(&ioc->chip->Doorbell, reset_type<<MPI_DOORBELL_FUNCTION_SHIFT);
4277         if ((r = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0)
4278                 return r;
4279
4280         /* FW ACK'd request, wait for READY state
4281          */
4282         count = 0;
4283         cntdn = ((sleepFlag == CAN_SLEEP) ? HZ : 1000) * 15;    /* 15 seconds */
4284
4285         while ((state = mpt_GetIocState(ioc, 1)) != MPI_IOC_STATE_READY) {
4286                 cntdn--;
4287                 count++;
4288                 if (!cntdn) {
4289                         if (sleepFlag != CAN_SLEEP)
4290                                 count *= 10;
4291
4292                         printk(MYIOC_s_ERR_FMT
4293                             "Wait IOC_READY state (0x%x) timeout(%d)!\n",
4294                             ioc->name, state, (int)((count+5)/HZ));
4295                         return -ETIME;
4296                 }
4297
4298                 if (sleepFlag == CAN_SLEEP) {
4299                         msleep(1);
4300                 } else {
4301                         mdelay (1);     /* 1 msec delay */
4302                 }
4303         }
4304
4305         /* TODO!
4306          *  Cleanup all event stuff for this IOC; re-issue EventNotification
4307          *  request if needed.
4308          */
4309         if (ioc->facts.Function)
4310                 ioc->facts.EventState = 0;
4311
4312         return 0;
4313 }
4314
4315 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4316 /**
4317  *      initChainBuffers - Allocate memory for and initialize chain buffers
4318  *      @ioc: Pointer to MPT_ADAPTER structure
4319  *
4320  *      Allocates memory for and initializes chain buffers,
4321  *      chain buffer control arrays and spinlock.
4322  */
4323 static int
4324 initChainBuffers(MPT_ADAPTER *ioc)
4325 {
4326         u8              *mem;
4327         int             sz, ii, num_chain;
4328         int             scale, num_sge, numSGE;
4329
4330         /* ReqToChain size must equal the req_depth
4331          * index = req_idx
4332          */
4333         if (ioc->ReqToChain == NULL) {
4334                 sz = ioc->req_depth * sizeof(int);
4335                 mem = kmalloc(sz, GFP_ATOMIC);
4336                 if (mem == NULL)
4337                         return -1;
4338
4339                 ioc->ReqToChain = (int *) mem;
4340                 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ReqToChain alloc  @ %p, sz=%d bytes\n",
4341                                 ioc->name, mem, sz));
4342                 mem = kmalloc(sz, GFP_ATOMIC);
4343                 if (mem == NULL)
4344                         return -1;
4345
4346                 ioc->RequestNB = (int *) mem;
4347                 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "RequestNB alloc  @ %p, sz=%d bytes\n",
4348                                 ioc->name, mem, sz));
4349         }
4350         for (ii = 0; ii < ioc->req_depth; ii++) {
4351                 ioc->ReqToChain[ii] = MPT_HOST_NO_CHAIN;
4352         }
4353
4354         /* ChainToChain size must equal the total number
4355          * of chain buffers to be allocated.
4356          * index = chain_idx
4357          *
4358          * Calculate the number of chain buffers needed(plus 1) per I/O
4359          * then multiply the maximum number of simultaneous cmds
4360          *
4361          * num_sge = num sge in request frame + last chain buffer
4362          * scale = num sge per chain buffer if no chain element
4363          */
4364         scale = ioc->req_sz / ioc->SGE_size;
4365         if (ioc->sg_addr_size == sizeof(u64))
4366                 num_sge =  scale + (ioc->req_sz - 60) / ioc->SGE_size;
4367         else
4368                 num_sge =  1 + scale + (ioc->req_sz - 64) / ioc->SGE_size;
4369
4370         if (ioc->sg_addr_size == sizeof(u64)) {
4371                 numSGE = (scale - 1) * (ioc->facts.MaxChainDepth-1) + scale +
4372                         (ioc->req_sz - 60) / ioc->SGE_size;
4373         } else {
4374                 numSGE = 1 + (scale - 1) * (ioc->facts.MaxChainDepth-1) +
4375                     scale + (ioc->req_sz - 64) / ioc->SGE_size;
4376         }
4377         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "num_sge=%d numSGE=%d\n",
4378                 ioc->name, num_sge, numSGE));
4379
4380         if (ioc->bus_type == FC) {
4381                 if (numSGE > MPT_SCSI_FC_SG_DEPTH)
4382                         numSGE = MPT_SCSI_FC_SG_DEPTH;
4383         } else {
4384                 if (numSGE > MPT_SCSI_SG_DEPTH)
4385                         numSGE = MPT_SCSI_SG_DEPTH;
4386         }
4387
4388         num_chain = 1;
4389         while (numSGE - num_sge > 0) {
4390                 num_chain++;
4391                 num_sge += (scale - 1);
4392         }
4393         num_chain++;
4394
4395         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Now numSGE=%d num_sge=%d num_chain=%d\n",
4396                 ioc->name, numSGE, num_sge, num_chain));
4397
4398         if (ioc->bus_type == SPI)
4399                 num_chain *= MPT_SCSI_CAN_QUEUE;
4400         else if (ioc->bus_type == SAS)
4401                 num_chain *= MPT_SAS_CAN_QUEUE;
4402         else
4403                 num_chain *= MPT_FC_CAN_QUEUE;
4404
4405         ioc->num_chain = num_chain;
4406
4407         sz = num_chain * sizeof(int);
4408         if (ioc->ChainToChain == NULL) {
4409                 mem = kmalloc(sz, GFP_ATOMIC);
4410                 if (mem == NULL)
4411                         return -1;
4412
4413                 ioc->ChainToChain = (int *) mem;
4414                 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ChainToChain alloc @ %p, sz=%d bytes\n",
4415                                 ioc->name, mem, sz));
4416         } else {
4417                 mem = (u8 *) ioc->ChainToChain;
4418         }
4419         memset(mem, 0xFF, sz);
4420         return num_chain;
4421 }
4422
4423 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4424 /**
4425  *      PrimeIocFifos - Initialize IOC request and reply FIFOs.
4426  *      @ioc: Pointer to MPT_ADAPTER structure
4427  *
4428  *      This routine allocates memory for the MPT reply and request frame
4429  *      pools (if necessary), and primes the IOC reply FIFO with
4430  *      reply frames.
4431  *
4432  *      Returns 0 for success, non-zero for failure.
4433  */
4434 static int
4435 PrimeIocFifos(MPT_ADAPTER *ioc)
4436 {
4437         MPT_FRAME_HDR *mf;
4438         unsigned long flags;
4439         dma_addr_t alloc_dma;
4440         u8 *mem;
4441         int i, reply_sz, sz, total_size, num_chain;
4442         u64     dma_mask;
4443
4444         dma_mask = 0;
4445
4446         /*  Prime reply FIFO...  */
4447
4448         if (ioc->reply_frames == NULL) {
4449                 if ( (num_chain = initChainBuffers(ioc)) < 0)
4450                         return -1;
4451                 /*
4452                  * 1078 errata workaround for the 36GB limitation
4453                  */
4454                 if (ioc->pcidev->device == MPI_MANUFACTPAGE_DEVID_SAS1078 &&
4455                     ioc->dma_mask > DMA_BIT_MASK(35)) {
4456                         if (!pci_set_dma_mask(ioc->pcidev, DMA_BIT_MASK(32))
4457                             && !pci_set_consistent_dma_mask(ioc->pcidev,
4458                             DMA_BIT_MASK(32))) {
4459                                 dma_mask = DMA_BIT_MASK(35);
4460                                 d36memprintk(ioc, printk(MYIOC_s_DEBUG_FMT
4461                                     "setting 35 bit addressing for "
4462                                     "Request/Reply/Chain and Sense Buffers\n",
4463                                     ioc->name));
4464                         } else {
4465                                 /*Reseting DMA mask to 64 bit*/
4466                                 pci_set_dma_mask(ioc->pcidev,
4467                                         DMA_BIT_MASK(64));
4468                                 pci_set_consistent_dma_mask(ioc->pcidev,
4469                                         DMA_BIT_MASK(64));
4470
4471                                 printk(MYIOC_s_ERR_FMT
4472                                     "failed setting 35 bit addressing for "
4473                                     "Request/Reply/Chain and Sense Buffers\n",
4474                                     ioc->name);
4475                                 return -1;
4476                         }
4477                 }
4478
4479                 total_size = reply_sz = (ioc->reply_sz * ioc->reply_depth);
4480                 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ReplyBuffer sz=%d bytes, ReplyDepth=%d\n",
4481                                 ioc->name, ioc->reply_sz, ioc->reply_depth));
4482                 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ReplyBuffer sz=%d[%x] bytes\n",
4483                                 ioc->name, reply_sz, reply_sz));
4484
4485                 sz = (ioc->req_sz * ioc->req_depth);
4486                 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "RequestBuffer sz=%d bytes, RequestDepth=%d\n",
4487                                 ioc->name, ioc->req_sz, ioc->req_depth));
4488                 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "RequestBuffer sz=%d[%x] bytes\n",
4489                                 ioc->name, sz, sz));
4490                 total_size += sz;
4491
4492                 sz = num_chain * ioc->req_sz; /* chain buffer pool size */
4493                 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ChainBuffer sz=%d bytes, ChainDepth=%d\n",
4494                                 ioc->name, ioc->req_sz, num_chain));
4495                 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ChainBuffer sz=%d[%x] bytes num_chain=%d\n",
4496                                 ioc->name, sz, sz, num_chain));
4497
4498                 total_size += sz;
4499                 mem = dma_alloc_coherent(&ioc->pcidev->dev, total_size,
4500                                 &alloc_dma, GFP_KERNEL);
4501                 if (mem == NULL) {
4502                         printk(MYIOC_s_ERR_FMT "Unable to allocate Reply, Request, Chain Buffers!\n",
4503                                 ioc->name);
4504                         goto out_fail;
4505                 }
4506
4507                 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Total alloc @ %p[%p], sz=%d[%x] bytes\n",
4508                                 ioc->name, mem, (void *)(ulong)alloc_dma, total_size, total_size));
4509
4510                 memset(mem, 0, total_size);
4511                 ioc->alloc_total += total_size;
4512                 ioc->alloc = mem;
4513                 ioc->alloc_dma = alloc_dma;
4514                 ioc->alloc_sz = total_size;
4515                 ioc->reply_frames = (MPT_FRAME_HDR *) mem;
4516                 ioc->reply_frames_low_dma = (u32) (alloc_dma & 0xFFFFFFFF);
4517
4518                 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ReplyBuffers @ %p[%p]\n",
4519                         ioc->name, ioc->reply_frames, (void *)(ulong)alloc_dma));
4520
4521                 alloc_dma += reply_sz;
4522                 mem += reply_sz;
4523
4524                 /*  Request FIFO - WE manage this!  */
4525
4526                 ioc->req_frames = (MPT_FRAME_HDR *) mem;
4527                 ioc->req_frames_dma = alloc_dma;
4528
4529                 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "RequestBuffers @ %p[%p]\n",
4530                                 ioc->name, mem, (void *)(ulong)alloc_dma));
4531
4532                 ioc->req_frames_low_dma = (u32) (alloc_dma & 0xFFFFFFFF);
4533
4534                 for (i = 0; i < ioc->req_depth; i++) {
4535                         alloc_dma += ioc->req_sz;
4536                         mem += ioc->req_sz;
4537                 }
4538
4539                 ioc->ChainBuffer = mem;
4540                 ioc->ChainBufferDMA = alloc_dma;
4541
4542                 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ChainBuffers @ %p(%p)\n",
4543                         ioc->name, ioc->ChainBuffer, (void *)(ulong)ioc->ChainBufferDMA));
4544
4545                 /* Initialize the free chain Q.
4546                 */
4547
4548                 INIT_LIST_HEAD(&ioc->FreeChainQ);
4549
4550                 /* Post the chain buffers to the FreeChainQ.
4551                 */
4552                 mem = (u8 *)ioc->ChainBuffer;
4553                 for (i=0; i < num_chain; i++) {
4554                         mf = (MPT_FRAME_HDR *) mem;
4555                         list_add_tail(&mf->u.frame.linkage.list, &ioc->FreeChainQ);
4556                         mem += ioc->req_sz;
4557                 }
4558
4559                 /* Initialize Request frames linked list
4560                  */
4561                 alloc_dma = ioc->req_frames_dma;
4562                 mem = (u8 *) ioc->req_frames;
4563
4564                 spin_lock_irqsave(&ioc->FreeQlock, flags);
4565                 INIT_LIST_HEAD(&ioc->FreeQ);
4566                 for (i = 0; i < ioc->req_depth; i++) {
4567                         mf = (MPT_FRAME_HDR *) mem;
4568
4569                         /*  Queue REQUESTs *internally*!  */
4570                         list_add_tail(&mf->u.frame.linkage.list, &ioc->FreeQ);
4571
4572                         mem += ioc->req_sz;
4573                 }
4574                 spin_unlock_irqrestore(&ioc->FreeQlock, flags);
4575
4576                 sz = (ioc->req_depth * MPT_SENSE_BUFFER_ALLOC);
4577                 ioc->sense_buf_pool = dma_alloc_coherent(&ioc->pcidev->dev, sz,
4578                                 &ioc->sense_buf_pool_dma, GFP_KERNEL);
4579                 if (ioc->sense_buf_pool == NULL) {
4580                         printk(MYIOC_s_ERR_FMT "Unable to allocate Sense Buffers!\n",
4581                                 ioc->name);
4582                         goto out_fail;
4583                 }
4584
4585                 ioc->sense_buf_low_dma = (u32) (ioc->sense_buf_pool_dma & 0xFFFFFFFF);
4586                 ioc->alloc_total += sz;
4587                 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "SenseBuffers @ %p[%p]\n",
4588                         ioc->name, ioc->sense_buf_pool, (void *)(ulong)ioc->sense_buf_pool_dma));
4589
4590         }
4591
4592         /* Post Reply frames to FIFO
4593          */
4594         alloc_dma = ioc->alloc_dma;
4595         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ReplyBuffers @ %p[%p]\n",
4596                 ioc->name, ioc->reply_frames, (void *)(ulong)alloc_dma));
4597
4598         for (i = 0; i < ioc->reply_depth; i++) {
4599                 /*  Write each address to the IOC!  */
4600                 CHIPREG_WRITE32(&ioc->chip->ReplyFifo, alloc_dma);
4601                 alloc_dma += ioc->reply_sz;
4602         }
4603
4604         if (dma_mask == DMA_BIT_MASK(35) && !pci_set_dma_mask(ioc->pcidev,
4605             ioc->dma_mask) && !pci_set_consistent_dma_mask(ioc->pcidev,
4606             ioc->dma_mask))
4607                 d36memprintk(ioc, printk(MYIOC_s_DEBUG_FMT
4608                     "restoring 64 bit addressing\n", ioc->name));
4609
4610         return 0;
4611
4612 out_fail:
4613
4614         if (ioc->alloc != NULL) {
4615                 sz = ioc->alloc_sz;
4616                 dma_free_coherent(&ioc->pcidev->dev, sz, ioc->alloc,
4617                                 ioc->alloc_dma);
4618                 ioc->reply_frames = NULL;
4619                 ioc->req_frames = NULL;
4620                 ioc->alloc_total -= sz;
4621         }
4622         if (ioc->sense_buf_pool != NULL) {
4623                 sz = (ioc->req_depth * MPT_SENSE_BUFFER_ALLOC);
4624                 dma_free_coherent(&ioc->pcidev->dev, sz, ioc->sense_buf_pool,
4625                                 ioc->sense_buf_pool_dma);
4626                 ioc->sense_buf_pool = NULL;
4627         }
4628
4629         if (dma_mask == DMA_BIT_MASK(35) && !pci_set_dma_mask(ioc->pcidev,
4630             DMA_BIT_MASK(64)) && !pci_set_consistent_dma_mask(ioc->pcidev,
4631             DMA_BIT_MASK(64)))
4632                 d36memprintk(ioc, printk(MYIOC_s_DEBUG_FMT
4633                     "restoring 64 bit addressing\n", ioc->name));
4634
4635         return -1;
4636 }
4637
4638 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4639 /**
4640  *      mpt_handshake_req_reply_wait - Send MPT request to and receive reply
4641  *      from IOC via doorbell handshake method.
4642  *      @ioc: Pointer to MPT_ADAPTER structure
4643  *      @reqBytes: Size of the request in bytes
4644  *      @req: Pointer to MPT request frame
4645  *      @replyBytes: Expected size of the reply in bytes
4646  *      @u16reply: Pointer to area where reply should be written
4647  *      @maxwait: Max wait time for a reply (in seconds)
4648  *      @sleepFlag: Specifies whether the process can sleep
4649  *
4650  *      NOTES: It is the callers responsibility to byte-swap fields in the
4651  *      request which are greater than 1 byte in size.  It is also the
4652  *      callers responsibility to byte-swap response fields which are
4653  *      greater than 1 byte in size.
4654  *
4655  *      Returns 0 for success, non-zero for failure.
4656  */
4657 static int
4658 mpt_handshake_req_reply_wait(MPT_ADAPTER *ioc, int reqBytes, u32 *req,
4659                 int replyBytes, u16 *u16reply, int maxwait, int sleepFlag)
4660 {
4661         MPIDefaultReply_t *mptReply;
4662         int failcnt = 0;
4663         int t;
4664
4665         /*
4666          * Get ready to cache a handshake reply
4667          */
4668         ioc->hs_reply_idx = 0;
4669         mptReply = (MPIDefaultReply_t *) ioc->hs_reply;
4670         mptReply->MsgLength = 0;
4671
4672         /*
4673          * Make sure there are no doorbells (WRITE 0 to IntStatus reg),
4674          * then tell IOC that we want to handshake a request of N words.
4675          * (WRITE u32val to Doorbell reg).
4676          */
4677         CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
4678         CHIPREG_WRITE32(&ioc->chip->Doorbell,
4679                         ((MPI_FUNCTION_HANDSHAKE<<MPI_DOORBELL_FUNCTION_SHIFT) |
4680                          ((reqBytes/4)<<MPI_DOORBELL_ADD_DWORDS_SHIFT)));
4681
4682         /*
4683          * Wait for IOC's doorbell handshake int
4684          */
4685         if ((t = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0)
4686                 failcnt++;
4687
4688         dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "HandShake request start reqBytes=%d, WaitCnt=%d%s\n",
4689                         ioc->name, reqBytes, t, failcnt ? " - MISSING DOORBELL HANDSHAKE!" : ""));
4690
4691         /* Read doorbell and check for active bit */
4692         if (!(CHIPREG_READ32(&ioc->chip->Doorbell) & MPI_DOORBELL_ACTIVE))
4693                         return -1;
4694
4695         /*
4696          * Clear doorbell int (WRITE 0 to IntStatus reg),
4697          * then wait for IOC to ACKnowledge that it's ready for
4698          * our handshake request.
4699          */
4700         CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
4701         if (!failcnt && (t = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0)
4702                 failcnt++;
4703
4704         if (!failcnt) {
4705                 int      ii;
4706                 u8      *req_as_bytes = (u8 *) req;
4707
4708                 /*
4709                  * Stuff request words via doorbell handshake,
4710                  * with ACK from IOC for each.
4711                  */
4712                 for (ii = 0; !failcnt && ii < reqBytes/4; ii++) {
4713                         u32 word = ((req_as_bytes[(ii*4) + 0] <<  0) |
4714                                     (req_as_bytes[(ii*4) + 1] <<  8) |
4715                                     (req_as_bytes[(ii*4) + 2] << 16) |
4716                                     (req_as_bytes[(ii*4) + 3] << 24));
4717
4718                         CHIPREG_WRITE32(&ioc->chip->Doorbell, word);
4719                         if ((t = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0)
4720                                 failcnt++;
4721                 }
4722
4723                 dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Handshake request frame (@%p) header\n", ioc->name, req));
4724                 DBG_DUMP_REQUEST_FRAME_HDR(ioc, (u32 *)req);
4725
4726                 dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "HandShake request post done, WaitCnt=%d%s\n",
4727                                 ioc->name, t, failcnt ? " - MISSING DOORBELL ACK!" : ""));
4728
4729                 /*
4730                  * Wait for completion of doorbell handshake reply from the IOC
4731                  */
4732                 if (!failcnt && (t = WaitForDoorbellReply(ioc, maxwait, sleepFlag)) < 0)
4733                         failcnt++;
4734
4735                 dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "HandShake reply count=%d%s\n",
4736                                 ioc->name, t, failcnt ? " - MISSING DOORBELL REPLY!" : ""));
4737
4738                 /*
4739                  * Copy out the cached reply...
4740                  */
4741                 for (ii=0; ii < min(replyBytes/2,mptReply->MsgLength*2); ii++)
4742                         u16reply[ii] = ioc->hs_reply[ii];
4743         } else {
4744                 return -99;
4745         }
4746
4747         return -failcnt;
4748 }
4749
4750 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4751 /**
4752  *      WaitForDoorbellAck - Wait for IOC doorbell handshake acknowledge
4753  *      @ioc: Pointer to MPT_ADAPTER structure
4754  *      @howlong: How long to wait (in seconds)
4755  *      @sleepFlag: Specifies whether the process can sleep
4756  *
4757  *      This routine waits (up to ~2 seconds max) for IOC doorbell
4758  *      handshake ACKnowledge, indicated by the IOP_DOORBELL_STATUS
4759  *      bit in its IntStatus register being clear.
4760  *
4761  *      Returns a negative value on failure, else wait loop count.
4762  */
4763 static int
4764 WaitForDoorbellAck(MPT_ADAPTER *ioc, int howlong, int sleepFlag)
4765 {
4766         int cntdn;
4767         int count = 0;
4768         u32 intstat=0;
4769
4770         cntdn = 1000 * howlong;
4771
4772         if (sleepFlag == CAN_SLEEP) {
4773                 while (--cntdn) {
4774                         msleep (1);
4775                         intstat = CHIPREG_READ32(&ioc->chip->IntStatus);
4776                         if (! (intstat & MPI_HIS_IOP_DOORBELL_STATUS))
4777                                 break;
4778                         count++;
4779                 }
4780         } else {
4781                 while (--cntdn) {
4782                         udelay (1000);
4783                         intstat = CHIPREG_READ32(&ioc->chip->IntStatus);
4784                         if (! (intstat & MPI_HIS_IOP_DOORBELL_STATUS))
4785                                 break;
4786                         count++;
4787                 }
4788         }
4789
4790         if (cntdn) {
4791                 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "WaitForDoorbell ACK (count=%d)\n",
4792                                 ioc->name, count));
4793                 return count;
4794         }
4795
4796         printk(MYIOC_s_ERR_FMT "Doorbell ACK timeout (count=%d), IntStatus=%x!\n",
4797                         ioc->name, count, intstat);
4798         return -1;
4799 }
4800
4801 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4802 /**
4803  *      WaitForDoorbellInt - Wait for IOC to set its doorbell interrupt bit
4804  *      @ioc: Pointer to MPT_ADAPTER structure
4805  *      @howlong: How long to wait (in seconds)
4806  *      @sleepFlag: Specifies whether the process can sleep
4807  *
4808  *      This routine waits (up to ~2 seconds max) for IOC doorbell interrupt
4809  *      (MPI_HIS_DOORBELL_INTERRUPT) to be set in the IntStatus register.
4810  *
4811  *      Returns a negative value on failure, else wait loop count.
4812  */
4813 static int
4814 WaitForDoorbellInt(MPT_ADAPTER *ioc, int howlong, int sleepFlag)
4815 {
4816         int cntdn;
4817         int count = 0;
4818         u32 intstat=0;
4819
4820         cntdn = 1000 * howlong;
4821         if (sleepFlag == CAN_SLEEP) {
4822                 while (--cntdn) {
4823                         intstat = CHIPREG_READ32(&ioc->chip->IntStatus);
4824                         if (intstat & MPI_HIS_DOORBELL_INTERRUPT)
4825                                 break;
4826                         msleep(1);
4827                         count++;
4828                 }
4829         } else {
4830                 while (--cntdn) {
4831                         intstat = CHIPREG_READ32(&ioc->chip->IntStatus);
4832                         if (intstat & MPI_HIS_DOORBELL_INTERRUPT)
4833                                 break;
4834                         udelay (1000);
4835                         count++;
4836                 }
4837         }
4838
4839         if (cntdn) {
4840                 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "WaitForDoorbell INT (cnt=%d) howlong=%d\n",
4841                                 ioc->name, count, howlong));
4842                 return count;
4843         }
4844
4845         printk(MYIOC_s_ERR_FMT "Doorbell INT timeout (count=%d), IntStatus=%x!\n",
4846                         ioc->name, count, intstat);
4847         return -1;
4848 }
4849
4850 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4851 /**
4852  *      WaitForDoorbellReply - Wait for and capture an IOC handshake reply.
4853  *      @ioc: Pointer to MPT_ADAPTER structure
4854  *      @howlong: How long to wait (in seconds)
4855  *      @sleepFlag: Specifies whether the process can sleep
4856  *
4857  *      This routine polls the IOC for a handshake reply, 16 bits at a time.
4858  *      Reply is cached to IOC private area large enough to hold a maximum
4859  *      of 128 bytes of reply data.
4860  *
4861  *      Returns a negative value on failure, else size of reply in WORDS.
4862  */
4863 static int
4864 WaitForDoorbellReply(MPT_ADAPTER *ioc, int howlong, int sleepFlag)
4865 {
4866         int u16cnt = 0;
4867         int failcnt = 0;
4868         int t;
4869         u16 *hs_reply = ioc->hs_reply;
4870         volatile MPIDefaultReply_t *mptReply = (MPIDefaultReply_t *) ioc->hs_reply;
4871         u16 hword;
4872
4873         hs_reply[0] = hs_reply[1] = hs_reply[7] = 0;
4874
4875         /*
4876          * Get first two u16's so we can look at IOC's intended reply MsgLength
4877          */
4878         u16cnt=0;
4879         if ((t = WaitForDoorbellInt(ioc, howlong, sleepFlag)) < 0) {
4880                 failcnt++;
4881         } else {
4882                 hs_reply[u16cnt++] = le16_to_cpu(CHIPREG_READ32(&ioc->chip->Doorbell) & 0x0000FFFF);
4883                 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
4884                 if ((t = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0)
4885                         failcnt++;
4886                 else {
4887                         hs_reply[u16cnt++] = le16_to_cpu(CHIPREG_READ32(&ioc->chip->Doorbell) & 0x0000FFFF);
4888                         CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
4889                 }
4890         }
4891
4892         dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "WaitCnt=%d First handshake reply word=%08x%s\n",
4893                         ioc->name, t, le32_to_cpu(*(u32 *)hs_reply),
4894                         failcnt ? " - MISSING DOORBELL HANDSHAKE!" : ""));
4895
4896         /*
4897          * If no error (and IOC said MsgLength is > 0), piece together
4898          * reply 16 bits at a time.
4899          */
4900         for (u16cnt=2; !failcnt && u16cnt < (2 * mptReply->MsgLength); u16cnt++) {
4901                 if ((t = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0)
4902                         failcnt++;
4903                 hword = le16_to_cpu(CHIPREG_READ32(&ioc->chip->Doorbell) & 0x0000FFFF);
4904                 /* don't overflow our IOC hs_reply[] buffer! */
4905                 if (u16cnt < ARRAY_SIZE(ioc->hs_reply))
4906                         hs_reply[u16cnt] = hword;
4907                 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
4908         }
4909
4910         if (!failcnt && (t = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0)
4911                 failcnt++;
4912         CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
4913
4914         if (failcnt) {
4915                 printk(MYIOC_s_ERR_FMT "Handshake reply failure!\n",
4916                                 ioc->name);
4917                 return -failcnt;
4918         }
4919 #if 0
4920         else if (u16cnt != (2 * mptReply->MsgLength)) {
4921                 return -101;
4922         }
4923         else if ((mptReply->IOCStatus & MPI_IOCSTATUS_MASK) != MPI_IOCSTATUS_SUCCESS) {
4924                 return -102;
4925         }
4926 #endif
4927
4928         dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Got Handshake reply:\n", ioc->name));
4929         DBG_DUMP_REPLY_FRAME(ioc, (u32 *)mptReply);
4930
4931         dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "WaitForDoorbell REPLY WaitCnt=%d (sz=%d)\n",
4932                         ioc->name, t, u16cnt/2));
4933         return u16cnt/2;
4934 }
4935
4936 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4937 /**
4938  *      GetLanConfigPages - Fetch LANConfig pages.
4939  *      @ioc: Pointer to MPT_ADAPTER structure
4940  *
4941  *      Return: 0 for success
4942  *      -ENOMEM if no memory available
4943  *              -EPERM if not allowed due to ISR context
4944  *              -EAGAIN if no msg frames currently available
4945  *              -EFAULT for non-successful reply or no reply (timeout)
4946  */
4947 static int
4948 GetLanConfigPages(MPT_ADAPTER *ioc)
4949 {
4950         ConfigPageHeader_t       hdr;
4951         CONFIGPARMS              cfg;
4952         LANPage0_t              *ppage0_alloc;
4953         dma_addr_t               page0_dma;
4954         LANPage1_t              *ppage1_alloc;
4955         dma_addr_t               page1_dma;
4956         int                      rc = 0;
4957         int                      data_sz;
4958         int                      copy_sz;
4959
4960         /* Get LAN Page 0 header */
4961         hdr.PageVersion = 0;
4962         hdr.PageLength = 0;
4963         hdr.PageNumber = 0;
4964         hdr.PageType = MPI_CONFIG_PAGETYPE_LAN;
4965         cfg.cfghdr.hdr = &hdr;
4966         cfg.physAddr = -1;
4967         cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
4968         cfg.dir = 0;
4969         cfg.pageAddr = 0;
4970         cfg.timeout = 0;
4971
4972         if ((rc = mpt_config(ioc, &cfg)) != 0)
4973                 return rc;
4974
4975         if (hdr.PageLength > 0) {
4976                 data_sz = hdr.PageLength * 4;
4977                 ppage0_alloc = (LANPage0_t *) pci_alloc_consistent(ioc->pcidev, data_sz, &page0_dma);
4978                 rc = -ENOMEM;
4979                 if (ppage0_alloc) {
4980                         memset((u8 *)ppage0_alloc, 0, data_sz);
4981                         cfg.physAddr = page0_dma;
4982                         cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
4983
4984                         if ((rc = mpt_config(ioc, &cfg)) == 0) {
4985                                 /* save the data */
4986                                 copy_sz = min_t(int, sizeof(LANPage0_t), data_sz);
4987                                 memcpy(&ioc->lan_cnfg_page0, ppage0_alloc, copy_sz);
4988
4989                         }
4990
4991                         pci_free_consistent(ioc->pcidev, data_sz, (u8 *) ppage0_alloc, page0_dma);
4992
4993                         /* FIXME!
4994                          *      Normalize endianness of structure data,
4995                          *      by byte-swapping all > 1 byte fields!
4996                          */
4997
4998                 }
4999
5000                 if (rc)
5001                         return rc;
5002         }
5003
5004         /* Get LAN Page 1 header */
5005         hdr.PageVersion = 0;
5006         hdr.PageLength = 0;
5007         hdr.PageNumber = 1;
5008         hdr.PageType = MPI_CONFIG_PAGETYPE_LAN;
5009         cfg.cfghdr.hdr = &hdr;
5010         cfg.physAddr = -1;
5011         cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
5012         cfg.dir = 0;
5013         cfg.pageAddr = 0;
5014
5015         if ((rc = mpt_config(ioc, &cfg)) != 0)
5016                 return rc;
5017
5018         if (hdr.PageLength == 0)
5019                 return 0;
5020
5021         data_sz = hdr.PageLength * 4;
5022         rc = -ENOMEM;
5023         ppage1_alloc = (LANPage1_t *) pci_alloc_consistent(ioc->pcidev, data_sz, &page1_dma);
5024         if (ppage1_alloc) {
5025                 memset((u8 *)ppage1_alloc, 0, data_sz);
5026                 cfg.physAddr = page1_dma;
5027                 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
5028
5029                 if ((rc = mpt_config(ioc, &cfg)) == 0) {
5030                         /* save the data */
5031                         copy_sz = min_t(int, sizeof(LANPage1_t), data_sz);
5032                         memcpy(&ioc->lan_cnfg_page1, ppage1_alloc, copy_sz);
5033                 }
5034
5035                 pci_free_consistent(ioc->pcidev, data_sz, (u8 *) ppage1_alloc, page1_dma);
5036
5037                 /* FIXME!
5038                  *      Normalize endianness of structure data,
5039                  *      by byte-swapping all > 1 byte fields!
5040                  */
5041
5042         }
5043
5044         return rc;
5045 }
5046
5047 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5048 /**
5049  *      mptbase_sas_persist_operation - Perform operation on SAS Persistent Table
5050  *      @ioc: Pointer to MPT_ADAPTER structure
5051  *      @persist_opcode: see below
5052  *
5053  *      ===============================  ======================================
5054  *      MPI_SAS_OP_CLEAR_NOT_PRESENT     Free all persist TargetID mappings for
5055  *                                       devices not currently present.
5056  *      MPI_SAS_OP_CLEAR_ALL_PERSISTENT  Clear al persist TargetID mappings
5057  *      ===============================  ======================================
5058  *
5059  *      NOTE: Don't use not this function during interrupt time.
5060  *
5061  *      Returns 0 for success, non-zero error
5062  */
5063
5064 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5065 int
5066 mptbase_sas_persist_operation(MPT_ADAPTER *ioc, u8 persist_opcode)
5067 {
5068         SasIoUnitControlRequest_t       *sasIoUnitCntrReq;
5069         SasIoUnitControlReply_t         *sasIoUnitCntrReply;
5070         MPT_FRAME_HDR                   *mf = NULL;
5071         MPIHeader_t                     *mpi_hdr;
5072         int                             ret = 0;
5073         unsigned long                   timeleft;
5074
5075         mutex_lock(&ioc->mptbase_cmds.mutex);
5076
5077         /* init the internal cmd struct */
5078         memset(ioc->mptbase_cmds.reply, 0 , MPT_DEFAULT_FRAME_SIZE);
5079         INITIALIZE_MGMT_STATUS(ioc->mptbase_cmds.status)
5080
5081         /* insure garbage is not sent to fw */
5082         switch(persist_opcode) {
5083
5084         case MPI_SAS_OP_CLEAR_NOT_PRESENT:
5085         case MPI_SAS_OP_CLEAR_ALL_PERSISTENT:
5086                 break;
5087
5088         default:
5089                 ret = -1;
5090                 goto out;
5091         }
5092
5093         printk(KERN_DEBUG  "%s: persist_opcode=%x\n",
5094                 __func__, persist_opcode);
5095
5096         /* Get a MF for this command.
5097          */
5098         if ((mf = mpt_get_msg_frame(mpt_base_index, ioc)) == NULL) {
5099                 printk(KERN_DEBUG "%s: no msg frames!\n", __func__);
5100                 ret = -1;
5101                 goto out;
5102         }
5103
5104         mpi_hdr = (MPIHeader_t *) mf;
5105         sasIoUnitCntrReq = (SasIoUnitControlRequest_t *)mf;
5106         memset(sasIoUnitCntrReq,0,sizeof(SasIoUnitControlRequest_t));
5107         sasIoUnitCntrReq->Function = MPI_FUNCTION_SAS_IO_UNIT_CONTROL;
5108         sasIoUnitCntrReq->MsgContext = mpi_hdr->MsgContext;
5109         sasIoUnitCntrReq->Operation = persist_opcode;
5110
5111         mpt_put_msg_frame(mpt_base_index, ioc, mf);
5112         timeleft = wait_for_completion_timeout(&ioc->mptbase_cmds.done, 10*HZ);
5113         if (!(ioc->mptbase_cmds.status & MPT_MGMT_STATUS_COMMAND_GOOD)) {
5114                 ret = -ETIME;
5115                 printk(KERN_DEBUG "%s: failed\n", __func__);
5116                 if (ioc->mptbase_cmds.status & MPT_MGMT_STATUS_DID_IOCRESET)
5117                         goto out;
5118                 if (!timeleft) {
5119                         printk(MYIOC_s_WARN_FMT
5120                                "Issuing Reset from %s!!, doorbell=0x%08x\n",
5121                                ioc->name, __func__, mpt_GetIocState(ioc, 0));
5122                         mpt_Soft_Hard_ResetHandler(ioc, CAN_SLEEP);
5123                         mpt_free_msg_frame(ioc, mf);
5124                 }
5125                 goto out;
5126         }
5127
5128         if (!(ioc->mptbase_cmds.status & MPT_MGMT_STATUS_RF_VALID)) {
5129                 ret = -1;
5130                 goto out;
5131         }
5132
5133         sasIoUnitCntrReply =
5134             (SasIoUnitControlReply_t *)ioc->mptbase_cmds.reply;
5135         if (le16_to_cpu(sasIoUnitCntrReply->IOCStatus) != MPI_IOCSTATUS_SUCCESS) {
5136                 printk(KERN_DEBUG "%s: IOCStatus=0x%X IOCLogInfo=0x%X\n",
5137                     __func__, sasIoUnitCntrReply->IOCStatus,
5138                     sasIoUnitCntrReply->IOCLogInfo);
5139                 printk(KERN_DEBUG "%s: failed\n", __func__);
5140                 ret = -1;
5141         } else
5142                 printk(KERN_DEBUG "%s: success\n", __func__);
5143  out:
5144
5145         CLEAR_MGMT_STATUS(ioc->mptbase_cmds.status)
5146         mutex_unlock(&ioc->mptbase_cmds.mutex);
5147         return ret;
5148 }
5149
5150 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5151
5152 static void
5153 mptbase_raid_process_event_data(MPT_ADAPTER *ioc,
5154     MpiEventDataRaid_t * pRaidEventData)
5155 {
5156         int     volume;
5157         int     reason;
5158         int     disk;
5159         int     status;
5160         int     flags;
5161         int     state;
5162
5163         volume  = pRaidEventData->VolumeID;
5164         reason  = pRaidEventData->ReasonCode;
5165         disk    = pRaidEventData->PhysDiskNum;
5166         status  = le32_to_cpu(pRaidEventData->SettingsStatus);
5167         flags   = (status >> 0) & 0xff;
5168         state   = (status >> 8) & 0xff;
5169
5170         if (reason == MPI_EVENT_RAID_RC_DOMAIN_VAL_NEEDED) {
5171                 return;
5172         }
5173
5174         if ((reason >= MPI_EVENT_RAID_RC_PHYSDISK_CREATED &&
5175              reason <= MPI_EVENT_RAID_RC_PHYSDISK_STATUS_CHANGED) ||
5176             (reason == MPI_EVENT_RAID_RC_SMART_DATA)) {
5177                 printk(MYIOC_s_INFO_FMT "RAID STATUS CHANGE for PhysDisk %d id=%d\n",
5178                         ioc->name, disk, volume);
5179         } else {
5180                 printk(MYIOC_s_INFO_FMT "RAID STATUS CHANGE for VolumeID %d\n",
5181                         ioc->name, volume);
5182         }
5183
5184         switch(reason) {
5185         case MPI_EVENT_RAID_RC_VOLUME_CREATED:
5186                 printk(MYIOC_s_INFO_FMT "  volume has been created\n",
5187                         ioc->name);
5188                 break;
5189
5190         case MPI_EVENT_RAID_RC_VOLUME_DELETED:
5191
5192                 printk(MYIOC_s_INFO_FMT "  volume has been deleted\n",
5193                         ioc->name);
5194                 break;
5195
5196         case MPI_EVENT_RAID_RC_VOLUME_SETTINGS_CHANGED:
5197                 printk(MYIOC_s_INFO_FMT "  volume settings have been changed\n",
5198                         ioc->name);
5199                 break;
5200
5201         case MPI_EVENT_RAID_RC_VOLUME_STATUS_CHANGED:
5202                 printk(MYIOC_s_INFO_FMT "  volume is now %s%s%s%s\n",
5203                         ioc->name,
5204                         state == MPI_RAIDVOL0_STATUS_STATE_OPTIMAL
5205                          ? "optimal"
5206                          : state == MPI_RAIDVOL0_STATUS_STATE_DEGRADED
5207                           ? "degraded"
5208                           : state == MPI_RAIDVOL0_STATUS_STATE_FAILED
5209                            ? "failed"
5210                            : "state unknown",
5211                         flags & MPI_RAIDVOL0_STATUS_FLAG_ENABLED
5212                          ? ", enabled" : "",
5213                         flags & MPI_RAIDVOL0_STATUS_FLAG_QUIESCED
5214                          ? ", quiesced" : "",
5215                         flags & MPI_RAIDVOL0_STATUS_FLAG_RESYNC_IN_PROGRESS
5216                          ? ", resync in progress" : "" );
5217                 break;
5218
5219         case MPI_EVENT_RAID_RC_VOLUME_PHYSDISK_CHANGED:
5220                 printk(MYIOC_s_INFO_FMT "  volume membership of PhysDisk %d has changed\n",
5221                         ioc->name, disk);
5222                 break;
5223
5224         case MPI_EVENT_RAID_RC_PHYSDISK_CREATED:
5225                 printk(MYIOC_s_INFO_FMT "  PhysDisk has been created\n",
5226                         ioc->name);
5227                 break;
5228
5229         case MPI_EVENT_RAID_RC_PHYSDISK_DELETED:
5230                 printk(MYIOC_s_INFO_FMT "  PhysDisk has been deleted\n",
5231                         ioc->name);
5232                 break;
5233
5234         case MPI_EVENT_RAID_RC_PHYSDISK_SETTINGS_CHANGED:
5235                 printk(MYIOC_s_INFO_FMT "  PhysDisk settings have been changed\n",
5236                         ioc->name);
5237                 break;
5238
5239         case MPI_EVENT_RAID_RC_PHYSDISK_STATUS_CHANGED:
5240                 printk(MYIOC_s_INFO_FMT "  PhysDisk is now %s%s%s\n",
5241                         ioc->name,
5242                         state == MPI_PHYSDISK0_STATUS_ONLINE
5243                          ? "online"
5244                          : state == MPI_PHYSDISK0_STATUS_MISSING
5245                           ? "missing"
5246                           : state == MPI_PHYSDISK0_STATUS_NOT_COMPATIBLE
5247                            ? "not compatible"
5248                            : state == MPI_PHYSDISK0_STATUS_FAILED
5249                             ? "failed"
5250                             : state == MPI_PHYSDISK0_STATUS_INITIALIZING
5251                              ? "initializing"
5252                              : state == MPI_PHYSDISK0_STATUS_OFFLINE_REQUESTED
5253                               ? "offline requested"
5254                               : state == MPI_PHYSDISK0_STATUS_FAILED_REQUESTED
5255                                ? "failed requested"
5256                                : state == MPI_PHYSDISK0_STATUS_OTHER_OFFLINE
5257                                 ? "offline"
5258                                 : "state unknown",
5259                         flags & MPI_PHYSDISK0_STATUS_FLAG_OUT_OF_SYNC
5260                          ? ", out of sync" : "",
5261                         flags & MPI_PHYSDISK0_STATUS_FLAG_QUIESCED
5262                          ? ", quiesced" : "" );
5263                 break;
5264
5265         case MPI_EVENT_RAID_RC_DOMAIN_VAL_NEEDED:
5266                 printk(MYIOC_s_INFO_FMT "  Domain Validation needed for PhysDisk %d\n",
5267                         ioc->name, disk);
5268                 break;
5269
5270         case MPI_EVENT_RAID_RC_SMART_DATA:
5271                 printk(MYIOC_s_INFO_FMT "  SMART data received, ASC/ASCQ = %02xh/%02xh\n",
5272                         ioc->name, pRaidEventData->ASC, pRaidEventData->ASCQ);
5273                 break;
5274
5275         case MPI_EVENT_RAID_RC_REPLACE_ACTION_STARTED:
5276                 printk(MYIOC_s_INFO_FMT "  replacement of PhysDisk %d has started\n",
5277                         ioc->name, disk);
5278                 break;
5279         }
5280 }
5281
5282 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5283 /**
5284  *      GetIoUnitPage2 - Retrieve BIOS version and boot order information.
5285  *      @ioc: Pointer to MPT_ADAPTER structure
5286  *
5287  *      Returns: 0 for success
5288  *      -ENOMEM if no memory available
5289  *              -EPERM if not allowed due to ISR context
5290  *              -EAGAIN if no msg frames currently available
5291  *              -EFAULT for non-successful reply or no reply (timeout)
5292  */
5293 static int
5294 GetIoUnitPage2(MPT_ADAPTER *ioc)
5295 {
5296         ConfigPageHeader_t       hdr;
5297         CONFIGPARMS              cfg;
5298         IOUnitPage2_t           *ppage_alloc;
5299         dma_addr_t               page_dma;
5300         int                      data_sz;
5301         int                      rc;
5302
5303         /* Get the page header */
5304         hdr.PageVersion = 0;
5305         hdr.PageLength = 0;
5306         hdr.PageNumber = 2;
5307         hdr.PageType = MPI_CONFIG_PAGETYPE_IO_UNIT;
5308         cfg.cfghdr.hdr = &hdr;
5309         cfg.physAddr = -1;
5310         cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
5311         cfg.dir = 0;
5312         cfg.pageAddr = 0;
5313         cfg.timeout = 0;
5314
5315         if ((rc = mpt_config(ioc, &cfg)) != 0)
5316                 return rc;
5317
5318         if (hdr.PageLength == 0)
5319                 return 0;
5320
5321         /* Read the config page */
5322         data_sz = hdr.PageLength * 4;
5323         rc = -ENOMEM;
5324         ppage_alloc = (IOUnitPage2_t *) pci_alloc_consistent(ioc->pcidev, data_sz, &page_dma);
5325         if (ppage_alloc) {
5326                 memset((u8 *)ppage_alloc, 0, data_sz);
5327                 cfg.physAddr = page_dma;
5328                 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
5329
5330                 /* If Good, save data */
5331                 if ((rc = mpt_config(ioc, &cfg)) == 0)
5332                         ioc->biosVersion = le32_to_cpu(ppage_alloc->BiosVersion);
5333
5334                 pci_free_consistent(ioc->pcidev, data_sz, (u8 *) ppage_alloc, page_dma);
5335         }
5336
5337         return rc;
5338 }
5339
5340 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5341 /**
5342  *      mpt_GetScsiPortSettings - read SCSI Port Page 0 and 2
5343  *      @ioc: Pointer to a Adapter Strucutre
5344  *      @portnum: IOC port number
5345  *
5346  *      Return: -EFAULT if read of config page header fails
5347  *                      or if no nvram
5348  *      If read of SCSI Port Page 0 fails,
5349  *              NVRAM = MPT_HOST_NVRAM_INVALID  (0xFFFFFFFF)
5350  *              Adapter settings: async, narrow
5351  *              Return 1
5352  *      If read of SCSI Port Page 2 fails,
5353  *              Adapter settings valid
5354  *              NVRAM = MPT_HOST_NVRAM_INVALID  (0xFFFFFFFF)
5355  *              Return 1
5356  *      Else
5357  *              Both valid
5358  *              Return 0
5359  *      CHECK - what type of locking mechanisms should be used????
5360  */
5361 static int
5362 mpt_GetScsiPortSettings(MPT_ADAPTER *ioc, int portnum)
5363 {
5364         u8                      *pbuf;
5365         dma_addr_t               buf_dma;
5366         CONFIGPARMS              cfg;
5367         ConfigPageHeader_t       header;
5368         int                      ii;
5369         int                      data, rc = 0;
5370
5371         /* Allocate memory
5372          */
5373         if (!ioc->spi_data.nvram) {
5374                 int      sz;
5375                 u8      *mem;
5376                 sz = MPT_MAX_SCSI_DEVICES * sizeof(int);
5377                 mem = kmalloc(sz, GFP_ATOMIC);
5378                 if (mem == NULL)
5379                         return -EFAULT;
5380
5381                 ioc->spi_data.nvram = (int *) mem;
5382
5383                 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "SCSI device NVRAM settings @ %p, sz=%d\n",
5384                         ioc->name, ioc->spi_data.nvram, sz));
5385         }
5386
5387         /* Invalidate NVRAM information
5388          */
5389         for (ii=0; ii < MPT_MAX_SCSI_DEVICES; ii++) {
5390                 ioc->spi_data.nvram[ii] = MPT_HOST_NVRAM_INVALID;
5391         }
5392
5393         /* Read SPP0 header, allocate memory, then read page.
5394          */
5395         header.PageVersion = 0;
5396         header.PageLength = 0;
5397         header.PageNumber = 0;
5398         header.PageType = MPI_CONFIG_PAGETYPE_SCSI_PORT;
5399         cfg.cfghdr.hdr = &header;
5400         cfg.physAddr = -1;
5401         cfg.pageAddr = portnum;
5402         cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
5403         cfg.dir = 0;
5404         cfg.timeout = 0;        /* use default */
5405         if (mpt_config(ioc, &cfg) != 0)
5406                  return -EFAULT;
5407
5408         if (header.PageLength > 0) {
5409                 pbuf = pci_alloc_consistent(ioc->pcidev, header.PageLength * 4, &buf_dma);
5410                 if (pbuf) {
5411                         cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
5412                         cfg.physAddr = buf_dma;
5413                         if (mpt_config(ioc, &cfg) != 0) {
5414                                 ioc->spi_data.maxBusWidth = MPT_NARROW;
5415                                 ioc->spi_data.maxSyncOffset = 0;
5416                                 ioc->spi_data.minSyncFactor = MPT_ASYNC;
5417                                 ioc->spi_data.busType = MPT_HOST_BUS_UNKNOWN;
5418                                 rc = 1;
5419                                 ddvprintk(ioc, printk(MYIOC_s_DEBUG_FMT
5420                                         "Unable to read PortPage0 minSyncFactor=%x\n",
5421                                         ioc->name, ioc->spi_data.minSyncFactor));
5422                         } else {
5423                                 /* Save the Port Page 0 data
5424                                  */
5425                                 SCSIPortPage0_t  *pPP0 = (SCSIPortPage0_t  *) pbuf;
5426                                 pPP0->Capabilities = le32_to_cpu(pPP0->Capabilities);
5427                                 pPP0->PhysicalInterface = le32_to_cpu(pPP0->PhysicalInterface);
5428
5429                                 if ( (pPP0->Capabilities & MPI_SCSIPORTPAGE0_CAP_QAS) == 0 ) {
5430                                         ioc->spi_data.noQas |= MPT_TARGET_NO_NEGO_QAS;
5431                                         ddvprintk(ioc, printk(MYIOC_s_DEBUG_FMT
5432                                                 "noQas due to Capabilities=%x\n",
5433                                                 ioc->name, pPP0->Capabilities));
5434                                 }
5435                                 ioc->spi_data.maxBusWidth = pPP0->Capabilities & MPI_SCSIPORTPAGE0_CAP_WIDE ? 1 : 0;
5436                                 data = pPP0->Capabilities & MPI_SCSIPORTPAGE0_CAP_MAX_SYNC_OFFSET_MASK;
5437                                 if (data) {
5438                                         ioc->spi_data.maxSyncOffset = (u8) (data >> 16);
5439                                         data = pPP0->Capabilities & MPI_SCSIPORTPAGE0_CAP_MIN_SYNC_PERIOD_MASK;
5440                                         ioc->spi_data.minSyncFactor = (u8) (data >> 8);
5441                                         ddvprintk(ioc, printk(MYIOC_s_DEBUG_FMT
5442                                                 "PortPage0 minSyncFactor=%x\n",
5443                                                 ioc->name, ioc->spi_data.minSyncFactor));
5444                                 } else {
5445                                         ioc->spi_data.maxSyncOffset = 0;
5446                                         ioc->spi_data.minSyncFactor = MPT_ASYNC;
5447                                 }
5448
5449                                 ioc->spi_data.busType = pPP0->PhysicalInterface & MPI_SCSIPORTPAGE0_PHY_SIGNAL_TYPE_MASK;
5450
5451                                 /* Update the minSyncFactor based on bus type.
5452                                  */
5453                                 if ((ioc->spi_data.busType == MPI_SCSIPORTPAGE0_PHY_SIGNAL_HVD) ||
5454                                         (ioc->spi_data.busType == MPI_SCSIPORTPAGE0_PHY_SIGNAL_SE))  {
5455
5456                                         if (ioc->spi_data.minSyncFactor < MPT_ULTRA) {
5457                                                 ioc->spi_data.minSyncFactor = MPT_ULTRA;
5458                                                 ddvprintk(ioc, printk(MYIOC_s_DEBUG_FMT
5459                                                         "HVD or SE detected, minSyncFactor=%x\n",
5460                                                         ioc->name, ioc->spi_data.minSyncFactor));
5461                                         }
5462                                 }
5463                         }
5464                         if (pbuf) {
5465                                 pci_free_consistent(ioc->pcidev, header.PageLength * 4, pbuf, buf_dma);
5466                         }
5467                 }
5468         }
5469
5470         /* SCSI Port Page 2 - Read the header then the page.
5471          */
5472         header.PageVersion = 0;
5473         header.PageLength = 0;
5474         header.PageNumber = 2;
5475         header.PageType = MPI_CONFIG_PAGETYPE_SCSI_PORT;
5476         cfg.cfghdr.hdr = &header;
5477         cfg.physAddr = -1;
5478         cfg.pageAddr = portnum;
5479         cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
5480         cfg.dir = 0;
5481         if (mpt_config(ioc, &cfg) != 0)
5482                 return -EFAULT;
5483
5484         if (header.PageLength > 0) {
5485                 /* Allocate memory and read SCSI Port Page 2
5486                  */
5487                 pbuf = pci_alloc_consistent(ioc->pcidev, header.PageLength * 4, &buf_dma);
5488                 if (pbuf) {
5489                         cfg.action = MPI_CONFIG_ACTION_PAGE_READ_NVRAM;
5490                         cfg.physAddr = buf_dma;
5491                         if (mpt_config(ioc, &cfg) != 0) {
5492                                 /* Nvram data is left with INVALID mark
5493                                  */
5494                                 rc = 1;
5495                         } else if (ioc->pcidev->vendor == PCI_VENDOR_ID_ATTO) {
5496
5497                                 /* This is an ATTO adapter, read Page2 accordingly
5498                                 */
5499                                 ATTO_SCSIPortPage2_t *pPP2 = (ATTO_SCSIPortPage2_t  *) pbuf;
5500                                 ATTODeviceInfo_t *pdevice = NULL;
5501                                 u16 ATTOFlags;
5502
5503                                 /* Save the Port Page 2 data
5504                                  * (reformat into a 32bit quantity)
5505                                  */
5506                                 for (ii=0; ii < MPT_MAX_SCSI_DEVICES; ii++) {
5507                                   pdevice = &pPP2->DeviceSettings[ii];
5508                                   ATTOFlags = le16_to_cpu(pdevice->ATTOFlags);
5509                                   data = 0;
5510
5511                                   /* Translate ATTO device flags to LSI format
5512                                    */
5513                                   if (ATTOFlags & ATTOFLAG_DISC)
5514                                     data |= (MPI_SCSIPORTPAGE2_DEVICE_DISCONNECT_ENABLE);
5515                                   if (ATTOFlags & ATTOFLAG_ID_ENB)
5516                                     data |= (MPI_SCSIPORTPAGE2_DEVICE_ID_SCAN_ENABLE);
5517                                   if (ATTOFlags & ATTOFLAG_LUN_ENB)
5518                                     data |= (MPI_SCSIPORTPAGE2_DEVICE_LUN_SCAN_ENABLE);
5519                                   if (ATTOFlags & ATTOFLAG_TAGGED)
5520                                     data |= (MPI_SCSIPORTPAGE2_DEVICE_TAG_QUEUE_ENABLE);
5521                                   if (!(ATTOFlags & ATTOFLAG_WIDE_ENB))
5522                                     data |= (MPI_SCSIPORTPAGE2_DEVICE_WIDE_DISABLE);
5523
5524                                   data = (data << 16) | (pdevice->Period << 8) | 10;
5525                                   ioc->spi_data.nvram[ii] = data;
5526                                 }
5527                         } else {
5528                                 SCSIPortPage2_t *pPP2 = (SCSIPortPage2_t  *) pbuf;
5529                                 MpiDeviceInfo_t *pdevice = NULL;
5530
5531                                 /*
5532                                  * Save "Set to Avoid SCSI Bus Resets" flag
5533                                  */
5534                                 ioc->spi_data.bus_reset =
5535                                     (le32_to_cpu(pPP2->PortFlags) &
5536                                 MPI_SCSIPORTPAGE2_PORT_FLAGS_AVOID_SCSI_RESET) ?
5537                                     0 : 1 ;
5538
5539                                 /* Save the Port Page 2 data
5540                                  * (reformat into a 32bit quantity)
5541                                  */
5542                                 data = le32_to_cpu(pPP2->PortFlags) & MPI_SCSIPORTPAGE2_PORT_FLAGS_DV_MASK;
5543                                 ioc->spi_data.PortFlags = data;
5544                                 for (ii=0; ii < MPT_MAX_SCSI_DEVICES; ii++) {
5545                                         pdevice = &pPP2->DeviceSettings[ii];
5546                                         data = (le16_to_cpu(pdevice->DeviceFlags) << 16) |
5547                                                 (pdevice->SyncFactor << 8) | pdevice->Timeout;
5548                                         ioc->spi_data.nvram[ii] = data;
5549                                 }
5550                         }
5551
5552                         pci_free_consistent(ioc->pcidev, header.PageLength * 4, pbuf, buf_dma);
5553                 }
5554         }
5555
5556         /* Update Adapter limits with those from NVRAM
5557          * Comment: Don't need to do this. Target performance
5558          * parameters will never exceed the adapters limits.
5559          */
5560
5561         return rc;
5562 }
5563
5564 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5565 /**
5566  *      mpt_readScsiDevicePageHeaders - save version and length of SDP1
5567  *      @ioc: Pointer to a Adapter Strucutre
5568  *      @portnum: IOC port number
5569  *
5570  *      Return: -EFAULT if read of config page header fails
5571  *              or 0 if success.
5572  */
5573 static int
5574 mpt_readScsiDevicePageHeaders(MPT_ADAPTER *ioc, int portnum)
5575 {
5576         CONFIGPARMS              cfg;
5577         ConfigPageHeader_t       header;
5578
5579         /* Read the SCSI Device Page 1 header
5580          */
5581         header.PageVersion = 0;
5582         header.PageLength = 0;
5583         header.PageNumber = 1;
5584         header.PageType = MPI_CONFIG_PAGETYPE_SCSI_DEVICE;
5585         cfg.cfghdr.hdr = &header;
5586         cfg.physAddr = -1;
5587         cfg.pageAddr = portnum;
5588         cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
5589         cfg.dir = 0;
5590         cfg.timeout = 0;
5591         if (mpt_config(ioc, &cfg) != 0)
5592                  return -EFAULT;
5593
5594         ioc->spi_data.sdp1version = cfg.cfghdr.hdr->PageVersion;
5595         ioc->spi_data.sdp1length = cfg.cfghdr.hdr->PageLength;
5596
5597         header.PageVersion = 0;
5598         header.PageLength = 0;
5599         header.PageNumber = 0;
5600         header.PageType = MPI_CONFIG_PAGETYPE_SCSI_DEVICE;
5601         if (mpt_config(ioc, &cfg) != 0)
5602                  return -EFAULT;
5603
5604         ioc->spi_data.sdp0version = cfg.cfghdr.hdr->PageVersion;
5605         ioc->spi_data.sdp0length = cfg.cfghdr.hdr->PageLength;
5606
5607         dcprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Headers: 0: version %d length %d\n",
5608                         ioc->name, ioc->spi_data.sdp0version, ioc->spi_data.sdp0length));
5609
5610         dcprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Headers: 1: version %d length %d\n",
5611                         ioc->name, ioc->spi_data.sdp1version, ioc->spi_data.sdp1length));
5612         return 0;
5613 }
5614
5615 /**
5616  * mpt_inactive_raid_list_free - This clears this link list.
5617  * @ioc : pointer to per adapter structure
5618  **/
5619 static void
5620 mpt_inactive_raid_list_free(MPT_ADAPTER *ioc)
5621 {
5622         struct inactive_raid_component_info *component_info, *pNext;
5623
5624         if (list_empty(&ioc->raid_data.inactive_list))
5625                 return;
5626
5627         mutex_lock(&ioc->raid_data.inactive_list_mutex);
5628         list_for_each_entry_safe(component_info, pNext,
5629             &ioc->raid_data.inactive_list, list) {
5630                 list_del(&component_info->list);
5631                 kfree(component_info);
5632         }
5633         mutex_unlock(&ioc->raid_data.inactive_list_mutex);
5634 }
5635
5636 /**
5637  * mpt_inactive_raid_volumes - sets up link list of phy_disk_nums for devices belonging in an inactive volume
5638  *
5639  * @ioc : pointer to per adapter structure
5640  * @channel : volume channel
5641  * @id : volume target id
5642  **/
5643 static void
5644 mpt_inactive_raid_volumes(MPT_ADAPTER *ioc, u8 channel, u8 id)
5645 {
5646         CONFIGPARMS                     cfg;
5647         ConfigPageHeader_t              hdr;
5648         dma_addr_t                      dma_handle;
5649         pRaidVolumePage0_t              buffer = NULL;
5650         int                             i;
5651         RaidPhysDiskPage0_t             phys_disk;
5652         struct inactive_raid_component_info *component_info;
5653         int                             handle_inactive_volumes;
5654
5655         memset(&cfg, 0 , sizeof(CONFIGPARMS));
5656         memset(&hdr, 0 , sizeof(ConfigPageHeader_t));
5657         hdr.PageType = MPI_CONFIG_PAGETYPE_RAID_VOLUME;
5658         cfg.pageAddr = (channel << 8) + id;
5659         cfg.cfghdr.hdr = &hdr;
5660         cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
5661
5662         if (mpt_config(ioc, &cfg) != 0)
5663                 goto out;
5664
5665         if (!hdr.PageLength)
5666                 goto out;
5667
5668         buffer = pci_alloc_consistent(ioc->pcidev, hdr.PageLength * 4,
5669             &dma_handle);
5670
5671         if (!buffer)
5672                 goto out;
5673
5674         cfg.physAddr = dma_handle;
5675         cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
5676
5677         if (mpt_config(ioc, &cfg) != 0)
5678                 goto out;
5679
5680         if (!buffer->NumPhysDisks)
5681                 goto out;
5682
5683         handle_inactive_volumes =
5684            (buffer->VolumeStatus.Flags & MPI_RAIDVOL0_STATUS_FLAG_VOLUME_INACTIVE ||
5685            (buffer->VolumeStatus.Flags & MPI_RAIDVOL0_STATUS_FLAG_ENABLED) == 0 ||
5686             buffer->VolumeStatus.State == MPI_RAIDVOL0_STATUS_STATE_FAILED ||
5687             buffer->VolumeStatus.State == MPI_RAIDVOL0_STATUS_STATE_MISSING) ? 1 : 0;
5688
5689         if (!handle_inactive_volumes)
5690                 goto out;
5691
5692         mutex_lock(&ioc->raid_data.inactive_list_mutex);
5693         for (i = 0; i < buffer->NumPhysDisks; i++) {
5694                 if(mpt_raid_phys_disk_pg0(ioc,
5695                     buffer->PhysDisk[i].PhysDiskNum, &phys_disk) != 0)
5696                         continue;
5697
5698                 if ((component_info = kmalloc(sizeof (*component_info),
5699                  GFP_KERNEL)) == NULL)
5700                         continue;
5701
5702                 component_info->volumeID = id;
5703                 component_info->volumeBus = channel;
5704                 component_info->d.PhysDiskNum = phys_disk.PhysDiskNum;
5705                 component_info->d.PhysDiskBus = phys_disk.PhysDiskBus;
5706                 component_info->d.PhysDiskID = phys_disk.PhysDiskID;
5707                 component_info->d.PhysDiskIOC = phys_disk.PhysDiskIOC;
5708
5709                 list_add_tail(&component_info->list,
5710                     &ioc->raid_data.inactive_list);
5711         }
5712         mutex_unlock(&ioc->raid_data.inactive_list_mutex);
5713
5714  out:
5715         if (buffer)
5716                 pci_free_consistent(ioc->pcidev, hdr.PageLength * 4, buffer,
5717                     dma_handle);
5718 }
5719
5720 /**
5721  *      mpt_raid_phys_disk_pg0 - returns phys disk page zero
5722  *      @ioc: Pointer to a Adapter Structure
5723  *      @phys_disk_num: io unit unique phys disk num generated by the ioc
5724  *      @phys_disk: requested payload data returned
5725  *
5726  *      Return:
5727  *      0 on success
5728  *      -EFAULT if read of config page header fails or data pointer not NULL
5729  *      -ENOMEM if pci_alloc failed
5730  **/
5731 int
5732 mpt_raid_phys_disk_pg0(MPT_ADAPTER *ioc, u8 phys_disk_num,
5733                         RaidPhysDiskPage0_t *phys_disk)
5734 {
5735         CONFIGPARMS                     cfg;
5736         ConfigPageHeader_t              hdr;
5737         dma_addr_t                      dma_handle;
5738         pRaidPhysDiskPage0_t            buffer = NULL;
5739         int                             rc;
5740
5741         memset(&cfg, 0 , sizeof(CONFIGPARMS));
5742         memset(&hdr, 0 , sizeof(ConfigPageHeader_t));
5743         memset(phys_disk, 0, sizeof(RaidPhysDiskPage0_t));
5744
5745         hdr.PageVersion = MPI_RAIDPHYSDISKPAGE0_PAGEVERSION;
5746         hdr.PageType = MPI_CONFIG_PAGETYPE_RAID_PHYSDISK;
5747         cfg.cfghdr.hdr = &hdr;
5748         cfg.physAddr = -1;
5749         cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
5750
5751         if (mpt_config(ioc, &cfg) != 0) {
5752                 rc = -EFAULT;
5753                 goto out;
5754         }
5755
5756         if (!hdr.PageLength) {
5757                 rc = -EFAULT;
5758                 goto out;
5759         }
5760
5761         buffer = pci_alloc_consistent(ioc->pcidev, hdr.PageLength * 4,
5762             &dma_handle);
5763
5764         if (!buffer) {
5765                 rc = -ENOMEM;
5766                 goto out;
5767         }
5768
5769         cfg.physAddr = dma_handle;
5770         cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
5771         cfg.pageAddr = phys_disk_num;
5772
5773         if (mpt_config(ioc, &cfg) != 0) {
5774                 rc = -EFAULT;
5775                 goto out;
5776         }
5777
5778         rc = 0;
5779         memcpy(phys_disk, buffer, sizeof(*buffer));
5780         phys_disk->MaxLBA = le32_to_cpu(buffer->MaxLBA);
5781
5782  out:
5783
5784         if (buffer)
5785                 pci_free_consistent(ioc->pcidev, hdr.PageLength * 4, buffer,
5786                     dma_handle);
5787
5788         return rc;
5789 }
5790
5791 /**
5792  *      mpt_raid_phys_disk_get_num_paths - returns number paths associated to this phys_num
5793  *      @ioc: Pointer to a Adapter Structure
5794  *      @phys_disk_num: io unit unique phys disk num generated by the ioc
5795  *
5796  *      Return:
5797  *      returns number paths
5798  **/
5799 int
5800 mpt_raid_phys_disk_get_num_paths(MPT_ADAPTER *ioc, u8 phys_disk_num)
5801 {
5802         CONFIGPARMS                     cfg;
5803         ConfigPageHeader_t              hdr;
5804         dma_addr_t                      dma_handle;
5805         pRaidPhysDiskPage1_t            buffer = NULL;
5806         int                             rc;
5807
5808         memset(&cfg, 0 , sizeof(CONFIGPARMS));
5809         memset(&hdr, 0 , sizeof(ConfigPageHeader_t));
5810
5811         hdr.PageVersion = MPI_RAIDPHYSDISKPAGE1_PAGEVERSION;
5812         hdr.PageType = MPI_CONFIG_PAGETYPE_RAID_PHYSDISK;
5813         hdr.PageNumber = 1;
5814         cfg.cfghdr.hdr = &hdr;
5815         cfg.physAddr = -1;
5816         cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
5817
5818         if (mpt_config(ioc, &cfg) != 0) {
5819                 rc = 0;
5820                 goto out;
5821         }
5822
5823         if (!hdr.PageLength) {
5824                 rc = 0;
5825                 goto out;
5826         }
5827
5828         buffer = pci_alloc_consistent(ioc->pcidev, hdr.PageLength * 4,
5829             &dma_handle);
5830
5831         if (!buffer) {
5832                 rc = 0;
5833                 goto out;
5834         }
5835
5836         cfg.physAddr = dma_handle;
5837         cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
5838         cfg.pageAddr = phys_disk_num;
5839
5840         if (mpt_config(ioc, &cfg) != 0) {
5841                 rc = 0;
5842                 goto out;
5843         }
5844
5845         rc = buffer->NumPhysDiskPaths;
5846  out:
5847
5848         if (buffer)
5849                 pci_free_consistent(ioc->pcidev, hdr.PageLength * 4, buffer,
5850                     dma_handle);
5851
5852         return rc;
5853 }
5854 EXPORT_SYMBOL(mpt_raid_phys_disk_get_num_paths);
5855
5856 /**
5857  *      mpt_raid_phys_disk_pg1 - returns phys disk page 1
5858  *      @ioc: Pointer to a Adapter Structure
5859  *      @phys_disk_num: io unit unique phys disk num generated by the ioc
5860  *      @phys_disk: requested payload data returned
5861  *
5862  *      Return:
5863  *      0 on success
5864  *      -EFAULT if read of config page header fails or data pointer not NULL
5865  *      -ENOMEM if pci_alloc failed
5866  **/
5867 int
5868 mpt_raid_phys_disk_pg1(MPT_ADAPTER *ioc, u8 phys_disk_num,
5869                 RaidPhysDiskPage1_t *phys_disk)
5870 {
5871         CONFIGPARMS                     cfg;
5872         ConfigPageHeader_t              hdr;
5873         dma_addr_t                      dma_handle;
5874         pRaidPhysDiskPage1_t            buffer = NULL;
5875         int                             rc;
5876         int                             i;
5877         __le64                          sas_address;
5878
5879         memset(&cfg, 0 , sizeof(CONFIGPARMS));
5880         memset(&hdr, 0 , sizeof(ConfigPageHeader_t));
5881         rc = 0;
5882
5883         hdr.PageVersion = MPI_RAIDPHYSDISKPAGE1_PAGEVERSION;
5884         hdr.PageType = MPI_CONFIG_PAGETYPE_RAID_PHYSDISK;
5885         hdr.PageNumber = 1;
5886         cfg.cfghdr.hdr = &hdr;
5887         cfg.physAddr = -1;
5888         cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
5889
5890         if (mpt_config(ioc, &cfg) != 0) {
5891                 rc = -EFAULT;
5892                 goto out;
5893         }
5894
5895         if (!hdr.PageLength) {
5896                 rc = -EFAULT;
5897                 goto out;
5898         }
5899
5900         buffer = pci_alloc_consistent(ioc->pcidev, hdr.PageLength * 4,
5901             &dma_handle);
5902
5903         if (!buffer) {
5904                 rc = -ENOMEM;
5905                 goto out;
5906         }
5907
5908         cfg.physAddr = dma_handle;
5909         cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
5910         cfg.pageAddr = phys_disk_num;
5911
5912         if (mpt_config(ioc, &cfg) != 0) {
5913                 rc = -EFAULT;
5914                 goto out;
5915         }
5916
5917         phys_disk->NumPhysDiskPaths = buffer->NumPhysDiskPaths;
5918         phys_disk->PhysDiskNum = phys_disk_num;
5919         for (i = 0; i < phys_disk->NumPhysDiskPaths; i++) {
5920                 phys_disk->Path[i].PhysDiskID = buffer->Path[i].PhysDiskID;
5921                 phys_disk->Path[i].PhysDiskBus = buffer->Path[i].PhysDiskBus;
5922                 phys_disk->Path[i].OwnerIdentifier =
5923                                 buffer->Path[i].OwnerIdentifier;
5924                 phys_disk->Path[i].Flags = le16_to_cpu(buffer->Path[i].Flags);
5925                 memcpy(&sas_address, &buffer->Path[i].WWID, sizeof(__le64));
5926                 sas_address = le64_to_cpu(sas_address);
5927                 memcpy(&phys_disk->Path[i].WWID, &sas_address, sizeof(__le64));
5928                 memcpy(&sas_address,
5929                                 &buffer->Path[i].OwnerWWID, sizeof(__le64));
5930                 sas_address = le64_to_cpu(sas_address);
5931                 memcpy(&phys_disk->Path[i].OwnerWWID,
5932                                 &sas_address, sizeof(__le64));
5933         }
5934
5935  out:
5936
5937         if (buffer)
5938                 pci_free_consistent(ioc->pcidev, hdr.PageLength * 4, buffer,
5939                     dma_handle);
5940
5941         return rc;
5942 }
5943 EXPORT_SYMBOL(mpt_raid_phys_disk_pg1);
5944
5945
5946 /**
5947  *      mpt_findImVolumes - Identify IDs of hidden disks and RAID Volumes
5948  *      @ioc: Pointer to a Adapter Strucutre
5949  *
5950  *      Return:
5951  *      0 on success
5952  *      -EFAULT if read of config page header fails or data pointer not NULL
5953  *      -ENOMEM if pci_alloc failed
5954  **/
5955 int
5956 mpt_findImVolumes(MPT_ADAPTER *ioc)
5957 {
5958         IOCPage2_t              *pIoc2;
5959         u8                      *mem;
5960         dma_addr_t               ioc2_dma;
5961         CONFIGPARMS              cfg;
5962         ConfigPageHeader_t       header;
5963         int                      rc = 0;
5964         int                      iocpage2sz;
5965         int                      i;
5966
5967         if (!ioc->ir_firmware)
5968                 return 0;
5969
5970         /* Free the old page
5971          */
5972         kfree(ioc->raid_data.pIocPg2);
5973         ioc->raid_data.pIocPg2 = NULL;
5974         mpt_inactive_raid_list_free(ioc);
5975
5976         /* Read IOCP2 header then the page.
5977          */
5978         header.PageVersion = 0;
5979         header.PageLength = 0;
5980         header.PageNumber = 2;
5981         header.PageType = MPI_CONFIG_PAGETYPE_IOC;
5982         cfg.cfghdr.hdr = &header;
5983         cfg.physAddr = -1;
5984         cfg.pageAddr = 0;
5985         cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
5986         cfg.dir = 0;
5987         cfg.timeout = 0;
5988         if (mpt_config(ioc, &cfg) != 0)
5989                  return -EFAULT;
5990
5991         if (header.PageLength == 0)
5992                 return -EFAULT;
5993
5994         iocpage2sz = header.PageLength * 4;
5995         pIoc2 = pci_alloc_consistent(ioc->pcidev, iocpage2sz, &ioc2_dma);
5996         if (!pIoc2)
5997                 return -ENOMEM;
5998
5999         cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
6000         cfg.physAddr = ioc2_dma;
6001         if (mpt_config(ioc, &cfg) != 0)
6002                 goto out;
6003
6004         mem = kmemdup(pIoc2, iocpage2sz, GFP_KERNEL);
6005         if (!mem) {
6006                 rc = -ENOMEM;
6007                 goto out;
6008         }
6009
6010         ioc->raid_data.pIocPg2 = (IOCPage2_t *) mem;
6011
6012         mpt_read_ioc_pg_3(ioc);
6013
6014         for (i = 0; i < pIoc2->NumActiveVolumes ; i++)
6015                 mpt_inactive_raid_volumes(ioc,
6016                     pIoc2->RaidVolume[i].VolumeBus,
6017                     pIoc2->RaidVolume[i].VolumeID);
6018
6019  out:
6020         pci_free_consistent(ioc->pcidev, iocpage2sz, pIoc2, ioc2_dma);
6021
6022         return rc;
6023 }
6024
6025 static int
6026 mpt_read_ioc_pg_3(MPT_ADAPTER *ioc)
6027 {
6028         IOCPage3_t              *pIoc3;
6029         u8                      *mem;
6030         CONFIGPARMS              cfg;
6031         ConfigPageHeader_t       header;
6032         dma_addr_t               ioc3_dma;
6033         int                      iocpage3sz = 0;
6034
6035         /* Free the old page
6036          */
6037         kfree(ioc->raid_data.pIocPg3);
6038         ioc->raid_data.pIocPg3 = NULL;
6039
6040         /* There is at least one physical disk.
6041          * Read and save IOC Page 3
6042          */
6043         header.PageVersion = 0;
6044         header.PageLength = 0;
6045         header.PageNumber = 3;
6046         header.PageType = MPI_CONFIG_PAGETYPE_IOC;
6047         cfg.cfghdr.hdr = &header;
6048         cfg.physAddr = -1;
6049         cfg.pageAddr = 0;
6050         cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
6051         cfg.dir = 0;
6052         cfg.timeout = 0;
6053         if (mpt_config(ioc, &cfg) != 0)
6054                 return 0;
6055
6056         if (header.PageLength == 0)
6057                 return 0;
6058
6059         /* Read Header good, alloc memory
6060          */
6061         iocpage3sz = header.PageLength * 4;
6062         pIoc3 = pci_alloc_consistent(ioc->pcidev, iocpage3sz, &ioc3_dma);
6063         if (!pIoc3)
6064                 return 0;
6065
6066         /* Read the Page and save the data
6067          * into malloc'd memory.
6068          */
6069         cfg.physAddr = ioc3_dma;
6070         cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
6071         if (mpt_config(ioc, &cfg) == 0) {
6072                 mem = kmalloc(iocpage3sz, GFP_KERNEL);
6073                 if (mem) {
6074                         memcpy(mem, (u8 *)pIoc3, iocpage3sz);
6075                         ioc->raid_data.pIocPg3 = (IOCPage3_t *) mem;
6076                 }
6077         }
6078
6079         pci_free_consistent(ioc->pcidev, iocpage3sz, pIoc3, ioc3_dma);
6080
6081         return 0;
6082 }
6083
6084 static void
6085 mpt_read_ioc_pg_4(MPT_ADAPTER *ioc)
6086 {
6087         IOCPage4_t              *pIoc4;
6088         CONFIGPARMS              cfg;
6089         ConfigPageHeader_t       header;
6090         dma_addr_t               ioc4_dma;
6091         int                      iocpage4sz;
6092
6093         /* Read and save IOC Page 4
6094          */
6095         header.PageVersion = 0;
6096         header.PageLength = 0;
6097         header.PageNumber = 4;
6098         header.PageType = MPI_CONFIG_PAGETYPE_IOC;
6099         cfg.cfghdr.hdr = &header;
6100         cfg.physAddr = -1;
6101         cfg.pageAddr = 0;
6102         cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
6103         cfg.dir = 0;
6104         cfg.timeout = 0;
6105         if (mpt_config(ioc, &cfg) != 0)
6106                 return;
6107
6108         if (header.PageLength == 0)
6109                 return;
6110
6111         if ( (pIoc4 = ioc->spi_data.pIocPg4) == NULL ) {
6112                 iocpage4sz = (header.PageLength + 4) * 4; /* Allow 4 additional SEP's */
6113                 pIoc4 = pci_alloc_consistent(ioc->pcidev, iocpage4sz, &ioc4_dma);
6114                 if (!pIoc4)
6115                         return;
6116                 ioc->alloc_total += iocpage4sz;
6117         } else {
6118                 ioc4_dma = ioc->spi_data.IocPg4_dma;
6119                 iocpage4sz = ioc->spi_data.IocPg4Sz;
6120         }
6121
6122         /* Read the Page into dma memory.
6123          */
6124         cfg.physAddr = ioc4_dma;
6125         cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
6126         if (mpt_config(ioc, &cfg) == 0) {
6127                 ioc->spi_data.pIocPg4 = (IOCPage4_t *) pIoc4;
6128                 ioc->spi_data.IocPg4_dma = ioc4_dma;
6129                 ioc->spi_data.IocPg4Sz = iocpage4sz;
6130         } else {
6131                 pci_free_consistent(ioc->pcidev, iocpage4sz, pIoc4, ioc4_dma);
6132                 ioc->spi_data.pIocPg4 = NULL;
6133                 ioc->alloc_total -= iocpage4sz;
6134         }
6135 }
6136
6137 static void
6138 mpt_read_ioc_pg_1(MPT_ADAPTER *ioc)
6139 {
6140         IOCPage1_t              *pIoc1;
6141         CONFIGPARMS              cfg;
6142         ConfigPageHeader_t       header;
6143         dma_addr_t               ioc1_dma;
6144         int                      iocpage1sz = 0;
6145         u32                      tmp;
6146
6147         /* Check the Coalescing Timeout in IOC Page 1
6148          */
6149         header.PageVersion = 0;
6150         header.PageLength = 0;
6151         header.PageNumber = 1;
6152         header.PageType = MPI_CONFIG_PAGETYPE_IOC;
6153         cfg.cfghdr.hdr = &header;
6154         cfg.physAddr = -1;
6155         cfg.pageAddr = 0;
6156         cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
6157         cfg.dir = 0;
6158         cfg.timeout = 0;
6159         if (mpt_config(ioc, &cfg) != 0)
6160                 return;
6161
6162         if (header.PageLength == 0)
6163                 return;
6164
6165         /* Read Header good, alloc memory
6166          */
6167         iocpage1sz = header.PageLength * 4;
6168         pIoc1 = pci_alloc_consistent(ioc->pcidev, iocpage1sz, &ioc1_dma);
6169         if (!pIoc1)
6170                 return;
6171
6172         /* Read the Page and check coalescing timeout
6173          */
6174         cfg.physAddr = ioc1_dma;
6175         cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
6176         if (mpt_config(ioc, &cfg) == 0) {
6177
6178                 tmp = le32_to_cpu(pIoc1->Flags) & MPI_IOCPAGE1_REPLY_COALESCING;
6179                 if (tmp == MPI_IOCPAGE1_REPLY_COALESCING) {
6180                         tmp = le32_to_cpu(pIoc1->CoalescingTimeout);
6181
6182                         dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Coalescing Enabled Timeout = %d\n",
6183                                         ioc->name, tmp));
6184
6185                         if (tmp > MPT_COALESCING_TIMEOUT) {
6186                                 pIoc1->CoalescingTimeout = cpu_to_le32(MPT_COALESCING_TIMEOUT);
6187
6188                                 /* Write NVRAM and current
6189                                  */
6190                                 cfg.dir = 1;
6191                                 cfg.action = MPI_CONFIG_ACTION_PAGE_WRITE_CURRENT;
6192                                 if (mpt_config(ioc, &cfg) == 0) {
6193                                         dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Reset Current Coalescing Timeout to = %d\n",
6194                                                         ioc->name, MPT_COALESCING_TIMEOUT));
6195
6196                                         cfg.action = MPI_CONFIG_ACTION_PAGE_WRITE_NVRAM;
6197                                         if (mpt_config(ioc, &cfg) == 0) {
6198                                                 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6199                                                                 "Reset NVRAM Coalescing Timeout to = %d\n",
6200                                                                 ioc->name, MPT_COALESCING_TIMEOUT));
6201                                         } else {
6202                                                 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6203                                                                 "Reset NVRAM Coalescing Timeout Failed\n",
6204                                                                 ioc->name));
6205                                         }
6206
6207                                 } else {
6208                                         dprintk(ioc, printk(MYIOC_s_WARN_FMT
6209                                                 "Reset of Current Coalescing Timeout Failed!\n",
6210                                                 ioc->name));
6211                                 }
6212                         }
6213
6214                 } else {
6215                         dprintk(ioc, printk(MYIOC_s_WARN_FMT "Coalescing Disabled\n", ioc->name));
6216                 }
6217         }
6218
6219         pci_free_consistent(ioc->pcidev, iocpage1sz, pIoc1, ioc1_dma);
6220
6221         return;
6222 }
6223
6224 static void
6225 mpt_get_manufacturing_pg_0(MPT_ADAPTER *ioc)
6226 {
6227         CONFIGPARMS             cfg;
6228         ConfigPageHeader_t      hdr;
6229         dma_addr_t              buf_dma;
6230         ManufacturingPage0_t    *pbuf = NULL;
6231
6232         memset(&cfg, 0 , sizeof(CONFIGPARMS));
6233         memset(&hdr, 0 , sizeof(ConfigPageHeader_t));
6234
6235         hdr.PageType = MPI_CONFIG_PAGETYPE_MANUFACTURING;
6236         cfg.cfghdr.hdr = &hdr;
6237         cfg.physAddr = -1;
6238         cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
6239         cfg.timeout = 10;
6240
6241         if (mpt_config(ioc, &cfg) != 0)
6242                 goto out;
6243
6244         if (!cfg.cfghdr.hdr->PageLength)
6245                 goto out;
6246
6247         cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
6248         pbuf = pci_alloc_consistent(ioc->pcidev, hdr.PageLength * 4, &buf_dma);
6249         if (!pbuf)
6250                 goto out;
6251
6252         cfg.physAddr = buf_dma;
6253
6254         if (mpt_config(ioc, &cfg) != 0)
6255                 goto out;
6256
6257         memcpy(ioc->board_name, pbuf->BoardName, sizeof(ioc->board_name));
6258         memcpy(ioc->board_assembly, pbuf->BoardAssembly, sizeof(ioc->board_assembly));
6259         memcpy(ioc->board_tracer, pbuf->BoardTracerNumber, sizeof(ioc->board_tracer));
6260
6261 out:
6262
6263         if (pbuf)
6264                 pci_free_consistent(ioc->pcidev, hdr.PageLength * 4, pbuf, buf_dma);
6265 }
6266
6267 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
6268 /**
6269  *      SendEventNotification - Send EventNotification (on or off) request to adapter
6270  *      @ioc: Pointer to MPT_ADAPTER structure
6271  *      @EvSwitch: Event switch flags
6272  *      @sleepFlag: Specifies whether the process can sleep
6273  */
6274 static int
6275 SendEventNotification(MPT_ADAPTER *ioc, u8 EvSwitch, int sleepFlag)
6276 {
6277         EventNotification_t     evn;
6278         MPIDefaultReply_t       reply_buf;
6279
6280         memset(&evn, 0, sizeof(EventNotification_t));
6281         memset(&reply_buf, 0, sizeof(MPIDefaultReply_t));
6282
6283         evn.Function = MPI_FUNCTION_EVENT_NOTIFICATION;
6284         evn.Switch = EvSwitch;
6285         evn.MsgContext = cpu_to_le32(mpt_base_index << 16);
6286
6287         devtverboseprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6288             "Sending EventNotification (%d) request %p\n",
6289             ioc->name, EvSwitch, &evn));
6290
6291         return mpt_handshake_req_reply_wait(ioc, sizeof(EventNotification_t),
6292             (u32 *)&evn, sizeof(MPIDefaultReply_t), (u16 *)&reply_buf, 30,
6293             sleepFlag);
6294 }
6295
6296 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
6297 /**
6298  *      SendEventAck - Send EventAck request to MPT adapter.
6299  *      @ioc: Pointer to MPT_ADAPTER structure
6300  *      @evnp: Pointer to original EventNotification request
6301  */
6302 static int
6303 SendEventAck(MPT_ADAPTER *ioc, EventNotificationReply_t *evnp)
6304 {
6305         EventAck_t      *pAck;
6306
6307         if ((pAck = (EventAck_t *) mpt_get_msg_frame(mpt_base_index, ioc)) == NULL) {
6308                 dfailprintk(ioc, printk(MYIOC_s_WARN_FMT "%s, no msg frames!!\n",
6309                     ioc->name, __func__));
6310                 return -1;
6311         }
6312
6313         devtverboseprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending EventAck\n", ioc->name));
6314
6315         pAck->Function     = MPI_FUNCTION_EVENT_ACK;
6316         pAck->ChainOffset  = 0;
6317         pAck->Reserved[0]  = pAck->Reserved[1] = 0;
6318         pAck->MsgFlags     = 0;
6319         pAck->Reserved1[0] = pAck->Reserved1[1] = pAck->Reserved1[2] = 0;
6320         pAck->Event        = evnp->Event;
6321         pAck->EventContext = evnp->EventContext;
6322
6323         mpt_put_msg_frame(mpt_base_index, ioc, (MPT_FRAME_HDR *)pAck);
6324
6325         return 0;
6326 }
6327
6328 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
6329 /**
6330  *      mpt_config - Generic function to issue config message
6331  *      @ioc:   Pointer to an adapter structure
6332  *      @pCfg:  Pointer to a configuration structure. Struct contains
6333  *              action, page address, direction, physical address
6334  *              and pointer to a configuration page header
6335  *              Page header is updated.
6336  *
6337  *      Returns 0 for success
6338  *      -EAGAIN if no msg frames currently available
6339  *      -EFAULT for non-successful reply or no reply (timeout)
6340  */
6341 int
6342 mpt_config(MPT_ADAPTER *ioc, CONFIGPARMS *pCfg)
6343 {
6344         Config_t        *pReq;
6345         ConfigReply_t   *pReply;
6346         ConfigExtendedPageHeader_t  *pExtHdr = NULL;
6347         MPT_FRAME_HDR   *mf;
6348         int              ii;
6349         int              flagsLength;
6350         long             timeout;
6351         int              ret;
6352         u8               page_type = 0, extend_page;
6353         unsigned long    timeleft;
6354         unsigned long    flags;
6355         u8               issue_hard_reset = 0;
6356         u8               retry_count = 0;
6357
6358         might_sleep();
6359
6360         /* don't send a config page during diag reset */
6361         spin_lock_irqsave(&ioc->taskmgmt_lock, flags);
6362         if (ioc->ioc_reset_in_progress) {
6363                 dfailprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6364                     "%s: busy with host reset\n", ioc->name, __func__));
6365                 spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
6366                 return -EBUSY;
6367         }
6368         spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
6369
6370         /* don't send if no chance of success */
6371         if (!ioc->active ||
6372             mpt_GetIocState(ioc, 1) != MPI_IOC_STATE_OPERATIONAL) {
6373                 dfailprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6374                     "%s: ioc not operational, %d, %xh\n",
6375                     ioc->name, __func__, ioc->active,
6376                     mpt_GetIocState(ioc, 0)));
6377                 return -EFAULT;
6378         }
6379
6380  retry_config:
6381         mutex_lock(&ioc->mptbase_cmds.mutex);
6382         /* init the internal cmd struct */
6383         memset(ioc->mptbase_cmds.reply, 0 , MPT_DEFAULT_FRAME_SIZE);
6384         INITIALIZE_MGMT_STATUS(ioc->mptbase_cmds.status)
6385
6386         /* Get and Populate a free Frame
6387          */
6388         if ((mf = mpt_get_msg_frame(mpt_base_index, ioc)) == NULL) {
6389                 dcprintk(ioc, printk(MYIOC_s_WARN_FMT
6390                 "mpt_config: no msg frames!\n", ioc->name));
6391                 ret = -EAGAIN;
6392                 goto out;
6393         }
6394
6395         pReq = (Config_t *)mf;
6396         pReq->Action = pCfg->action;
6397         pReq->Reserved = 0;
6398         pReq->ChainOffset = 0;
6399         pReq->Function = MPI_FUNCTION_CONFIG;
6400
6401         /* Assume page type is not extended and clear "reserved" fields. */
6402         pReq->ExtPageLength = 0;
6403         pReq->ExtPageType = 0;
6404         pReq->MsgFlags = 0;
6405
6406         for (ii=0; ii < 8; ii++)
6407                 pReq->Reserved2[ii] = 0;
6408
6409         pReq->Header.PageVersion = pCfg->cfghdr.hdr->PageVersion;
6410         pReq->Header.PageLength = pCfg->cfghdr.hdr->PageLength;
6411         pReq->Header.PageNumber = pCfg->cfghdr.hdr->PageNumber;
6412         pReq->Header.PageType = (pCfg->cfghdr.hdr->PageType & MPI_CONFIG_PAGETYPE_MASK);
6413
6414         if ((pCfg->cfghdr.hdr->PageType & MPI_CONFIG_PAGETYPE_MASK) == MPI_CONFIG_PAGETYPE_EXTENDED) {
6415                 pExtHdr = (ConfigExtendedPageHeader_t *)pCfg->cfghdr.ehdr;
6416                 pReq->ExtPageLength = cpu_to_le16(pExtHdr->ExtPageLength);
6417                 pReq->ExtPageType = pExtHdr->ExtPageType;
6418                 pReq->Header.PageType = MPI_CONFIG_PAGETYPE_EXTENDED;
6419
6420                 /* Page Length must be treated as a reserved field for the
6421                  * extended header.
6422                  */
6423                 pReq->Header.PageLength = 0;
6424         }
6425
6426         pReq->PageAddress = cpu_to_le32(pCfg->pageAddr);
6427
6428         /* Add a SGE to the config request.
6429          */
6430         if (pCfg->dir)
6431                 flagsLength = MPT_SGE_FLAGS_SSIMPLE_WRITE;
6432         else
6433                 flagsLength = MPT_SGE_FLAGS_SSIMPLE_READ;
6434
6435         if ((pCfg->cfghdr.hdr->PageType & MPI_CONFIG_PAGETYPE_MASK) ==
6436             MPI_CONFIG_PAGETYPE_EXTENDED) {
6437                 flagsLength |= pExtHdr->ExtPageLength * 4;
6438                 page_type = pReq->ExtPageType;
6439                 extend_page = 1;
6440         } else {
6441                 flagsLength |= pCfg->cfghdr.hdr->PageLength * 4;
6442                 page_type = pReq->Header.PageType;
6443                 extend_page = 0;
6444         }
6445
6446         dcprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6447             "Sending Config request type 0x%x, page 0x%x and action %d\n",
6448             ioc->name, page_type, pReq->Header.PageNumber, pReq->Action));
6449
6450         ioc->add_sge((char *)&pReq->PageBufferSGE, flagsLength, pCfg->physAddr);
6451         timeout = (pCfg->timeout < 15) ? HZ*15 : HZ*pCfg->timeout;
6452         mpt_put_msg_frame(mpt_base_index, ioc, mf);
6453         timeleft = wait_for_completion_timeout(&ioc->mptbase_cmds.done,
6454                 timeout);
6455         if (!(ioc->mptbase_cmds.status & MPT_MGMT_STATUS_COMMAND_GOOD)) {
6456                 ret = -ETIME;
6457                 dfailprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6458                     "Failed Sending Config request type 0x%x, page 0x%x,"
6459                     " action %d, status %xh, time left %ld\n\n",
6460                         ioc->name, page_type, pReq->Header.PageNumber,
6461                         pReq->Action, ioc->mptbase_cmds.status, timeleft));
6462                 if (ioc->mptbase_cmds.status & MPT_MGMT_STATUS_DID_IOCRESET)
6463                         goto out;
6464                 if (!timeleft) {
6465                         spin_lock_irqsave(&ioc->taskmgmt_lock, flags);
6466                         if (ioc->ioc_reset_in_progress) {
6467                                 spin_unlock_irqrestore(&ioc->taskmgmt_lock,
6468                                         flags);
6469                                 printk(MYIOC_s_INFO_FMT "%s: host reset in"
6470                                         " progress mpt_config timed out.!!\n",
6471                                         __func__, ioc->name);
6472                                 mutex_unlock(&ioc->mptbase_cmds.mutex);
6473                                 return -EFAULT;
6474                         }
6475                         spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
6476                         issue_hard_reset = 1;
6477                 }
6478                 goto out;
6479         }
6480
6481         if (!(ioc->mptbase_cmds.status & MPT_MGMT_STATUS_RF_VALID)) {
6482                 ret = -1;
6483                 goto out;
6484         }
6485         pReply = (ConfigReply_t *)ioc->mptbase_cmds.reply;
6486         ret = le16_to_cpu(pReply->IOCStatus) & MPI_IOCSTATUS_MASK;
6487         if (ret == MPI_IOCSTATUS_SUCCESS) {
6488                 if (extend_page) {
6489                         pCfg->cfghdr.ehdr->ExtPageLength =
6490                             le16_to_cpu(pReply->ExtPageLength);
6491                         pCfg->cfghdr.ehdr->ExtPageType =
6492                             pReply->ExtPageType;
6493                 }
6494                 pCfg->cfghdr.hdr->PageVersion = pReply->Header.PageVersion;
6495                 pCfg->cfghdr.hdr->PageLength = pReply->Header.PageLength;
6496                 pCfg->cfghdr.hdr->PageNumber = pReply->Header.PageNumber;
6497                 pCfg->cfghdr.hdr->PageType = pReply->Header.PageType;
6498
6499         }
6500
6501         if (retry_count)
6502                 printk(MYIOC_s_INFO_FMT "Retry completed "
6503                     "ret=0x%x timeleft=%ld\n",
6504                     ioc->name, ret, timeleft);
6505
6506         dcprintk(ioc, printk(KERN_DEBUG "IOCStatus=%04xh, IOCLogInfo=%08xh\n",
6507              ret, le32_to_cpu(pReply->IOCLogInfo)));
6508
6509 out:
6510
6511         CLEAR_MGMT_STATUS(ioc->mptbase_cmds.status)
6512         mutex_unlock(&ioc->mptbase_cmds.mutex);
6513         if (issue_hard_reset) {
6514                 issue_hard_reset = 0;
6515                 printk(MYIOC_s_WARN_FMT
6516                        "Issuing Reset from %s!!, doorbell=0x%08x\n",
6517                        ioc->name, __func__, mpt_GetIocState(ioc, 0));
6518                 if (retry_count == 0) {
6519                         if (mpt_Soft_Hard_ResetHandler(ioc, CAN_SLEEP) != 0)
6520                                 retry_count++;
6521                 } else
6522                         mpt_HardResetHandler(ioc, CAN_SLEEP);
6523
6524                 mpt_free_msg_frame(ioc, mf);
6525                 /* attempt one retry for a timed out command */
6526                 if (retry_count < 2) {
6527                         printk(MYIOC_s_INFO_FMT
6528                             "Attempting Retry Config request"
6529                             " type 0x%x, page 0x%x,"
6530                             " action %d\n", ioc->name, page_type,
6531                             pCfg->cfghdr.hdr->PageNumber, pCfg->action);
6532                         retry_count++;
6533                         goto retry_config;
6534                 }
6535         }
6536         return ret;
6537
6538 }
6539
6540 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
6541 /**
6542  *      mpt_ioc_reset - Base cleanup for hard reset
6543  *      @ioc: Pointer to the adapter structure
6544  *      @reset_phase: Indicates pre- or post-reset functionality
6545  *
6546  *      Remark: Frees resources with internally generated commands.
6547  */
6548 static int
6549 mpt_ioc_reset(MPT_ADAPTER *ioc, int reset_phase)
6550 {
6551         switch (reset_phase) {
6552         case MPT_IOC_SETUP_RESET:
6553                 ioc->taskmgmt_quiesce_io = 1;
6554                 dtmprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6555                     "%s: MPT_IOC_SETUP_RESET\n", ioc->name, __func__));
6556                 break;
6557         case MPT_IOC_PRE_RESET:
6558                 dtmprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6559                     "%s: MPT_IOC_PRE_RESET\n", ioc->name, __func__));
6560                 break;
6561         case MPT_IOC_POST_RESET:
6562                 dtmprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6563                     "%s: MPT_IOC_POST_RESET\n",  ioc->name, __func__));
6564 /* wake up mptbase_cmds */
6565                 if (ioc->mptbase_cmds.status & MPT_MGMT_STATUS_PENDING) {
6566                         ioc->mptbase_cmds.status |=
6567                             MPT_MGMT_STATUS_DID_IOCRESET;
6568                         complete(&ioc->mptbase_cmds.done);
6569                 }
6570 /* wake up taskmgmt_cmds */
6571                 if (ioc->taskmgmt_cmds.status & MPT_MGMT_STATUS_PENDING) {
6572                         ioc->taskmgmt_cmds.status |=
6573                                 MPT_MGMT_STATUS_DID_IOCRESET;
6574                         complete(&ioc->taskmgmt_cmds.done);
6575                 }
6576                 break;
6577         default:
6578                 break;
6579         }
6580
6581         return 1;               /* currently means nothing really */
6582 }
6583
6584
6585 #ifdef CONFIG_PROC_FS           /* { */
6586 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
6587 /*
6588  *      procfs (%MPT_PROCFS_MPTBASEDIR/...) support stuff...
6589  */
6590 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
6591 /**
6592  *      procmpt_create - Create %MPT_PROCFS_MPTBASEDIR entries.
6593  *
6594  *      Returns 0 for success, non-zero for failure.
6595  */
6596 static int
6597 procmpt_create(void)
6598 {
6599         mpt_proc_root_dir = proc_mkdir(MPT_PROCFS_MPTBASEDIR, NULL);
6600         if (mpt_proc_root_dir == NULL)
6601                 return -ENOTDIR;
6602
6603         proc_create_single("summary", S_IRUGO, mpt_proc_root_dir,
6604                         mpt_summary_proc_show);
6605         proc_create_single("version", S_IRUGO, mpt_proc_root_dir,
6606                         mpt_version_proc_show);
6607         return 0;
6608 }
6609
6610 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
6611 /**
6612  *      procmpt_destroy - Tear down %MPT_PROCFS_MPTBASEDIR entries.
6613  *
6614  *      Returns 0 for success, non-zero for failure.
6615  */
6616 static void
6617 procmpt_destroy(void)
6618 {
6619         remove_proc_entry("version", mpt_proc_root_dir);
6620         remove_proc_entry("summary", mpt_proc_root_dir);
6621         remove_proc_entry(MPT_PROCFS_MPTBASEDIR, NULL);
6622 }
6623
6624 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
6625 /*
6626  *      Handles read request from /proc/mpt/summary or /proc/mpt/iocN/summary.
6627  */
6628 static void seq_mpt_print_ioc_summary(MPT_ADAPTER *ioc, struct seq_file *m, int showlan);
6629
6630 static int mpt_summary_proc_show(struct seq_file *m, void *v)
6631 {
6632         MPT_ADAPTER *ioc = m->private;
6633
6634         if (ioc) {
6635                 seq_mpt_print_ioc_summary(ioc, m, 1);
6636         } else {
6637                 list_for_each_entry(ioc, &ioc_list, list) {
6638                         seq_mpt_print_ioc_summary(ioc, m, 1);
6639                 }
6640         }
6641
6642         return 0;
6643 }
6644
6645 static int mpt_version_proc_show(struct seq_file *m, void *v)
6646 {
6647         u8       cb_idx;
6648         int      scsi, fc, sas, lan, ctl, targ, dmp;
6649         char    *drvname;
6650
6651         seq_printf(m, "%s-%s\n", "mptlinux", MPT_LINUX_VERSION_COMMON);
6652         seq_printf(m, "  Fusion MPT base driver\n");
6653
6654         scsi = fc = sas = lan = ctl = targ = dmp = 0;
6655         for (cb_idx = MPT_MAX_PROTOCOL_DRIVERS-1; cb_idx; cb_idx--) {
6656                 drvname = NULL;
6657                 if (MptCallbacks[cb_idx]) {
6658                         switch (MptDriverClass[cb_idx]) {
6659                         case MPTSPI_DRIVER:
6660                                 if (!scsi++) drvname = "SPI host";
6661                                 break;
6662                         case MPTFC_DRIVER:
6663                                 if (!fc++) drvname = "FC host";
6664                                 break;
6665                         case MPTSAS_DRIVER:
6666                                 if (!sas++) drvname = "SAS host";
6667                                 break;
6668                         case MPTLAN_DRIVER:
6669                                 if (!lan++) drvname = "LAN";
6670                                 break;
6671                         case MPTSTM_DRIVER:
6672                                 if (!targ++) drvname = "SCSI target";
6673                                 break;
6674                         case MPTCTL_DRIVER:
6675                                 if (!ctl++) drvname = "ioctl";
6676                                 break;
6677                         }
6678
6679                         if (drvname)
6680                                 seq_printf(m, "  Fusion MPT %s driver\n", drvname);
6681                 }
6682         }
6683
6684         return 0;
6685 }
6686
6687 static int mpt_iocinfo_proc_show(struct seq_file *m, void *v)
6688 {
6689         MPT_ADAPTER     *ioc = m->private;
6690         char             expVer[32];
6691         int              sz;
6692         int              p;
6693
6694         mpt_get_fw_exp_ver(expVer, ioc);
6695
6696         seq_printf(m, "%s:", ioc->name);
6697         if (ioc->facts.Flags & MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT)
6698                 seq_printf(m, "  (f/w download boot flag set)");
6699 //      if (ioc->facts.IOCExceptions & MPI_IOCFACTS_EXCEPT_CONFIG_CHECKSUM_FAIL)
6700 //              seq_printf(m, "  CONFIG_CHECKSUM_FAIL!");
6701
6702         seq_printf(m, "\n  ProductID = 0x%04x (%s)\n",
6703                         ioc->facts.ProductID,
6704                         ioc->prod_name);
6705         seq_printf(m, "  FWVersion = 0x%08x%s", ioc->facts.FWVersion.Word, expVer);
6706         if (ioc->facts.FWImageSize)
6707                 seq_printf(m, " (fw_size=%d)", ioc->facts.FWImageSize);
6708         seq_printf(m, "\n  MsgVersion = 0x%04x\n", ioc->facts.MsgVersion);
6709         seq_printf(m, "  FirstWhoInit = 0x%02x\n", ioc->FirstWhoInit);
6710         seq_printf(m, "  EventState = 0x%02x\n", ioc->facts.EventState);
6711
6712         seq_printf(m, "  CurrentHostMfaHighAddr = 0x%08x\n",
6713                         ioc->facts.CurrentHostMfaHighAddr);
6714         seq_printf(m, "  CurrentSenseBufferHighAddr = 0x%08x\n",
6715                         ioc->facts.CurrentSenseBufferHighAddr);
6716
6717         seq_printf(m, "  MaxChainDepth = 0x%02x frames\n", ioc->facts.MaxChainDepth);
6718         seq_printf(m, "  MinBlockSize = 0x%02x bytes\n", 4*ioc->facts.BlockSize);
6719
6720         seq_printf(m, "  RequestFrames @ 0x%p (Dma @ 0x%p)\n",
6721                                         (void *)ioc->req_frames, (void *)(ulong)ioc->req_frames_dma);
6722         /*
6723          *  Rounding UP to nearest 4-kB boundary here...
6724          */
6725         sz = (ioc->req_sz * ioc->req_depth) + 128;
6726         sz = ((sz + 0x1000UL - 1UL) / 0x1000) * 0x1000;
6727         seq_printf(m, "    {CurReqSz=%d} x {CurReqDepth=%d} = %d bytes ^= 0x%x\n",
6728                                         ioc->req_sz, ioc->req_depth, ioc->req_sz*ioc->req_depth, sz);
6729         seq_printf(m, "    {MaxReqSz=%d}   {MaxReqDepth=%d}\n",
6730                                         4*ioc->facts.RequestFrameSize,
6731                                         ioc->facts.GlobalCredits);
6732
6733         seq_printf(m, "  Frames   @ 0x%p (Dma @ 0x%p)\n",
6734                                         (void *)ioc->alloc, (void *)(ulong)ioc->alloc_dma);
6735         sz = (ioc->reply_sz * ioc->reply_depth) + 128;
6736         seq_printf(m, "    {CurRepSz=%d} x {CurRepDepth=%d} = %d bytes ^= 0x%x\n",
6737                                         ioc->reply_sz, ioc->reply_depth, ioc->reply_sz*ioc->reply_depth, sz);
6738         seq_printf(m, "    {MaxRepSz=%d}   {MaxRepDepth=%d}\n",
6739                                         ioc->facts.CurReplyFrameSize,
6740                                         ioc->facts.ReplyQueueDepth);
6741
6742         seq_printf(m, "  MaxDevices = %d\n",
6743                         (ioc->facts.MaxDevices==0) ? 255 : ioc->facts.MaxDevices);
6744         seq_printf(m, "  MaxBuses = %d\n", ioc->facts.MaxBuses);
6745
6746         /* per-port info */
6747         for (p=0; p < ioc->facts.NumberOfPorts; p++) {
6748                 seq_printf(m, "  PortNumber = %d (of %d)\n",
6749                                 p+1,
6750                                 ioc->facts.NumberOfPorts);
6751                 if (ioc->bus_type == FC) {
6752                         if (ioc->pfacts[p].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_LAN) {
6753                                 u8 *a = (u8*)&ioc->lan_cnfg_page1.HardwareAddressLow;
6754                                 seq_printf(m, "    LanAddr = %pMR\n", a);
6755                         }
6756                         seq_printf(m, "    WWN = %08X%08X:%08X%08X\n",
6757                                         ioc->fc_port_page0[p].WWNN.High,
6758                                         ioc->fc_port_page0[p].WWNN.Low,
6759                                         ioc->fc_port_page0[p].WWPN.High,
6760                                         ioc->fc_port_page0[p].WWPN.Low);
6761                 }
6762         }
6763
6764         return 0;
6765 }
6766 #endif          /* CONFIG_PROC_FS } */
6767
6768 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
6769 static void
6770 mpt_get_fw_exp_ver(char *buf, MPT_ADAPTER *ioc)
6771 {
6772         buf[0] ='\0';
6773         if ((ioc->facts.FWVersion.Word >> 24) == 0x0E) {
6774                 sprintf(buf, " (Exp %02d%02d)",
6775                         (ioc->facts.FWVersion.Word >> 16) & 0x00FF,     /* Month */
6776                         (ioc->facts.FWVersion.Word >> 8) & 0x1F);       /* Day */
6777
6778                 /* insider hack! */
6779                 if ((ioc->facts.FWVersion.Word >> 8) & 0x80)
6780                         strcat(buf, " [MDBG]");
6781         }
6782 }
6783
6784 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
6785 /**
6786  *      mpt_print_ioc_summary - Write ASCII summary of IOC to a buffer.
6787  *      @ioc: Pointer to MPT_ADAPTER structure
6788  *      @buffer: Pointer to buffer where IOC summary info should be written
6789  *      @size: Pointer to number of bytes we wrote (set by this routine)
6790  *      @len: Offset at which to start writing in buffer
6791  *      @showlan: Display LAN stuff?
6792  *
6793  *      This routine writes (english readable) ASCII text, which represents
6794  *      a summary of IOC information, to a buffer.
6795  */
6796 void
6797 mpt_print_ioc_summary(MPT_ADAPTER *ioc, char *buffer, int *size, int len, int showlan)
6798 {
6799         char expVer[32];
6800         int y;
6801
6802         mpt_get_fw_exp_ver(expVer, ioc);
6803
6804         /*
6805          *  Shorter summary of attached ioc's...
6806          */
6807         y = sprintf(buffer+len, "%s: %s, %s%08xh%s, Ports=%d, MaxQ=%d",
6808                         ioc->name,
6809                         ioc->prod_name,
6810                         MPT_FW_REV_MAGIC_ID_STRING,     /* "FwRev=" or somesuch */
6811                         ioc->facts.FWVersion.Word,
6812                         expVer,
6813                         ioc->facts.NumberOfPorts,
6814                         ioc->req_depth);
6815
6816         if (showlan && (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_LAN)) {
6817                 u8 *a = (u8*)&ioc->lan_cnfg_page1.HardwareAddressLow;
6818                 y += sprintf(buffer+len+y, ", LanAddr=%pMR", a);
6819         }
6820
6821         y += sprintf(buffer+len+y, ", IRQ=%d", ioc->pci_irq);
6822
6823         if (!ioc->active)
6824                 y += sprintf(buffer+len+y, " (disabled)");
6825
6826         y += sprintf(buffer+len+y, "\n");
6827
6828         *size = y;
6829 }
6830
6831 #ifdef CONFIG_PROC_FS
6832 static void seq_mpt_print_ioc_summary(MPT_ADAPTER *ioc, struct seq_file *m, int showlan)
6833 {
6834         char expVer[32];
6835
6836         mpt_get_fw_exp_ver(expVer, ioc);
6837
6838         /*
6839          *  Shorter summary of attached ioc's...
6840          */
6841         seq_printf(m, "%s: %s, %s%08xh%s, Ports=%d, MaxQ=%d",
6842                         ioc->name,
6843                         ioc->prod_name,
6844                         MPT_FW_REV_MAGIC_ID_STRING,     /* "FwRev=" or somesuch */
6845                         ioc->facts.FWVersion.Word,
6846                         expVer,
6847                         ioc->facts.NumberOfPorts,
6848                         ioc->req_depth);
6849
6850         if (showlan && (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_LAN)) {
6851                 u8 *a = (u8*)&ioc->lan_cnfg_page1.HardwareAddressLow;
6852                 seq_printf(m, ", LanAddr=%pMR", a);
6853         }
6854
6855         seq_printf(m, ", IRQ=%d", ioc->pci_irq);
6856
6857         if (!ioc->active)
6858                 seq_printf(m, " (disabled)");
6859
6860         seq_putc(m, '\n');
6861 }
6862 #endif
6863
6864 /**
6865  *      mpt_set_taskmgmt_in_progress_flag - set flags associated with task management
6866  *      @ioc: Pointer to MPT_ADAPTER structure
6867  *
6868  *      Returns 0 for SUCCESS or -1 if FAILED.
6869  *
6870  *      If -1 is return, then it was not possible to set the flags
6871  **/
6872 int
6873 mpt_set_taskmgmt_in_progress_flag(MPT_ADAPTER *ioc)
6874 {
6875         unsigned long    flags;
6876         int              retval;
6877
6878         spin_lock_irqsave(&ioc->taskmgmt_lock, flags);
6879         if (ioc->ioc_reset_in_progress || ioc->taskmgmt_in_progress ||
6880             (ioc->alt_ioc && ioc->alt_ioc->taskmgmt_in_progress)) {
6881                 retval = -1;
6882                 goto out;
6883         }
6884         retval = 0;
6885         ioc->taskmgmt_in_progress = 1;
6886         ioc->taskmgmt_quiesce_io = 1;
6887         if (ioc->alt_ioc) {
6888                 ioc->alt_ioc->taskmgmt_in_progress = 1;
6889                 ioc->alt_ioc->taskmgmt_quiesce_io = 1;
6890         }
6891  out:
6892         spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
6893         return retval;
6894 }
6895 EXPORT_SYMBOL(mpt_set_taskmgmt_in_progress_flag);
6896
6897 /**
6898  *      mpt_clear_taskmgmt_in_progress_flag - clear flags associated with task management
6899  *      @ioc: Pointer to MPT_ADAPTER structure
6900  *
6901  **/
6902 void
6903 mpt_clear_taskmgmt_in_progress_flag(MPT_ADAPTER *ioc)
6904 {
6905         unsigned long    flags;
6906
6907         spin_lock_irqsave(&ioc->taskmgmt_lock, flags);
6908         ioc->taskmgmt_in_progress = 0;
6909         ioc->taskmgmt_quiesce_io = 0;
6910         if (ioc->alt_ioc) {
6911                 ioc->alt_ioc->taskmgmt_in_progress = 0;
6912                 ioc->alt_ioc->taskmgmt_quiesce_io = 0;
6913         }
6914         spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
6915 }
6916 EXPORT_SYMBOL(mpt_clear_taskmgmt_in_progress_flag);
6917
6918
6919 /**
6920  *      mpt_halt_firmware - Halts the firmware if it is operational and panic
6921  *      the kernel
6922  *      @ioc: Pointer to MPT_ADAPTER structure
6923  *
6924  **/
6925 void
6926 mpt_halt_firmware(MPT_ADAPTER *ioc)
6927 {
6928         u32      ioc_raw_state;
6929
6930         ioc_raw_state = mpt_GetIocState(ioc, 0);
6931
6932         if ((ioc_raw_state & MPI_IOC_STATE_MASK) == MPI_IOC_STATE_FAULT) {
6933                 printk(MYIOC_s_ERR_FMT "IOC is in FAULT state (%04xh)!!!\n",
6934                         ioc->name, ioc_raw_state & MPI_DOORBELL_DATA_MASK);
6935                 panic("%s: IOC Fault (%04xh)!!!\n", ioc->name,
6936                         ioc_raw_state & MPI_DOORBELL_DATA_MASK);
6937         } else {
6938                 CHIPREG_WRITE32(&ioc->chip->Doorbell, 0xC0FFEE00);
6939                 panic("%s: Firmware is halted due to command timeout\n",
6940                         ioc->name);
6941         }
6942 }
6943 EXPORT_SYMBOL(mpt_halt_firmware);
6944
6945 /**
6946  *      mpt_SoftResetHandler - Issues a less expensive reset
6947  *      @ioc: Pointer to MPT_ADAPTER structure
6948  *      @sleepFlag: Indicates if sleep or schedule must be called.
6949  *
6950  *      Returns 0 for SUCCESS or -1 if FAILED.
6951  *
6952  *      Message Unit Reset - instructs the IOC to reset the Reply Post and
6953  *      Free FIFO's. All the Message Frames on Reply Free FIFO are discarded.
6954  *      All posted buffers are freed, and event notification is turned off.
6955  *      IOC doesn't reply to any outstanding request. This will transfer IOC
6956  *      to READY state.
6957  **/
6958 static int
6959 mpt_SoftResetHandler(MPT_ADAPTER *ioc, int sleepFlag)
6960 {
6961         int              rc;
6962         int              ii;
6963         u8               cb_idx;
6964         unsigned long    flags;
6965         u32              ioc_state;
6966         unsigned long    time_count;
6967
6968         dtmprintk(ioc, printk(MYIOC_s_DEBUG_FMT "SoftResetHandler Entered!\n",
6969                 ioc->name));
6970
6971         ioc_state = mpt_GetIocState(ioc, 0) & MPI_IOC_STATE_MASK;
6972
6973         if (mpt_fwfault_debug)
6974                 mpt_halt_firmware(ioc);
6975
6976         if (ioc_state == MPI_IOC_STATE_FAULT ||
6977             ioc_state == MPI_IOC_STATE_RESET) {
6978                 dtmprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6979                     "skipping, either in FAULT or RESET state!\n", ioc->name));
6980                 return -1;
6981         }
6982
6983         if (ioc->bus_type == FC) {
6984                 dtmprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6985                     "skipping, because the bus type is FC!\n", ioc->name));
6986                 return -1;
6987         }
6988
6989         spin_lock_irqsave(&ioc->taskmgmt_lock, flags);
6990         if (ioc->ioc_reset_in_progress) {
6991                 spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
6992                 return -1;
6993         }
6994         ioc->ioc_reset_in_progress = 1;
6995         spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
6996
6997         rc = -1;
6998
6999         for (cb_idx = MPT_MAX_PROTOCOL_DRIVERS-1; cb_idx; cb_idx--) {
7000                 if (MptResetHandlers[cb_idx])
7001                         mpt_signal_reset(cb_idx, ioc, MPT_IOC_SETUP_RESET);
7002         }
7003
7004         spin_lock_irqsave(&ioc->taskmgmt_lock, flags);
7005         if (ioc->taskmgmt_in_progress) {
7006                 ioc->ioc_reset_in_progress = 0;
7007                 spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
7008                 return -1;
7009         }
7010         spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
7011         /* Disable reply interrupts (also blocks FreeQ) */
7012         CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
7013         ioc->active = 0;
7014         time_count = jiffies;
7015
7016         rc = SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET, sleepFlag);
7017
7018         for (cb_idx = MPT_MAX_PROTOCOL_DRIVERS-1; cb_idx; cb_idx--) {
7019                 if (MptResetHandlers[cb_idx])
7020                         mpt_signal_reset(cb_idx, ioc, MPT_IOC_PRE_RESET);
7021         }
7022
7023         if (rc)
7024                 goto out;
7025
7026         ioc_state = mpt_GetIocState(ioc, 0) & MPI_IOC_STATE_MASK;
7027         if (ioc_state != MPI_IOC_STATE_READY)
7028                 goto out;
7029
7030         for (ii = 0; ii < 5; ii++) {
7031                 /* Get IOC facts! Allow 5 retries */
7032                 rc = GetIocFacts(ioc, sleepFlag,
7033                         MPT_HOSTEVENT_IOC_RECOVER);
7034                 if (rc == 0)
7035                         break;
7036                 if (sleepFlag == CAN_SLEEP)
7037                         msleep(100);
7038                 else
7039                         mdelay(100);
7040         }
7041         if (ii == 5)
7042                 goto out;
7043
7044         rc = PrimeIocFifos(ioc);
7045         if (rc != 0)
7046                 goto out;
7047
7048         rc = SendIocInit(ioc, sleepFlag);
7049         if (rc != 0)
7050                 goto out;
7051
7052         rc = SendEventNotification(ioc, 1, sleepFlag);
7053         if (rc != 0)
7054                 goto out;
7055
7056         if (ioc->hard_resets < -1)
7057                 ioc->hard_resets++;
7058
7059         /*
7060          * At this point, we know soft reset succeeded.
7061          */
7062
7063         ioc->active = 1;
7064         CHIPREG_WRITE32(&ioc->chip->IntMask, MPI_HIM_DIM);
7065
7066  out:
7067         spin_lock_irqsave(&ioc->taskmgmt_lock, flags);
7068         ioc->ioc_reset_in_progress = 0;
7069         ioc->taskmgmt_quiesce_io = 0;
7070         ioc->taskmgmt_in_progress = 0;
7071         spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
7072
7073         if (ioc->active) {      /* otherwise, hard reset coming */
7074                 for (cb_idx = MPT_MAX_PROTOCOL_DRIVERS-1; cb_idx; cb_idx--) {
7075                         if (MptResetHandlers[cb_idx])
7076                                 mpt_signal_reset(cb_idx, ioc,
7077                                         MPT_IOC_POST_RESET);
7078                 }
7079         }
7080
7081         dtmprintk(ioc, printk(MYIOC_s_DEBUG_FMT
7082                 "SoftResetHandler: completed (%d seconds): %s\n",
7083                 ioc->name, jiffies_to_msecs(jiffies - time_count)/1000,
7084                 ((rc == 0) ? "SUCCESS" : "FAILED")));
7085
7086         return rc;
7087 }
7088
7089 /**
7090  *      mpt_Soft_Hard_ResetHandler - Try less expensive reset
7091  *      @ioc: Pointer to MPT_ADAPTER structure
7092  *      @sleepFlag: Indicates if sleep or schedule must be called.
7093  *
7094  *      Returns 0 for SUCCESS or -1 if FAILED.
7095  *      Try for softreset first, only if it fails go for expensive
7096  *      HardReset.
7097  **/
7098 int
7099 mpt_Soft_Hard_ResetHandler(MPT_ADAPTER *ioc, int sleepFlag) {
7100         int ret = -1;
7101
7102         ret = mpt_SoftResetHandler(ioc, sleepFlag);
7103         if (ret == 0)
7104                 return ret;
7105         ret = mpt_HardResetHandler(ioc, sleepFlag);
7106         return ret;
7107 }
7108 EXPORT_SYMBOL(mpt_Soft_Hard_ResetHandler);
7109
7110 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
7111 /*
7112  *      Reset Handling
7113  */
7114 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
7115 /**
7116  *      mpt_HardResetHandler - Generic reset handler
7117  *      @ioc: Pointer to MPT_ADAPTER structure
7118  *      @sleepFlag: Indicates if sleep or schedule must be called.
7119  *
7120  *      Issues SCSI Task Management call based on input arg values.
7121  *      If TaskMgmt fails, returns associated SCSI request.
7122  *
7123  *      Remark: _HardResetHandler can be invoked from an interrupt thread (timer)
7124  *      or a non-interrupt thread.  In the former, must not call schedule().
7125  *
7126  *      Note: A return of -1 is a FATAL error case, as it means a
7127  *      FW reload/initialization failed.
7128  *
7129  *      Returns 0 for SUCCESS or -1 if FAILED.
7130  */
7131 int
7132 mpt_HardResetHandler(MPT_ADAPTER *ioc, int sleepFlag)
7133 {
7134         int      rc;
7135         u8       cb_idx;
7136         unsigned long    flags;
7137         unsigned long    time_count;
7138
7139         dtmprintk(ioc, printk(MYIOC_s_DEBUG_FMT "HardResetHandler Entered!\n", ioc->name));
7140 #ifdef MFCNT
7141         printk(MYIOC_s_INFO_FMT "HardResetHandler Entered!\n", ioc->name);
7142         printk("MF count 0x%x !\n", ioc->mfcnt);
7143 #endif
7144         if (mpt_fwfault_debug)
7145                 mpt_halt_firmware(ioc);
7146
7147         /* Reset the adapter. Prevent more than 1 call to
7148          * mpt_do_ioc_recovery at any instant in time.
7149          */
7150         spin_lock_irqsave(&ioc->taskmgmt_lock, flags);
7151         if (ioc->ioc_reset_in_progress) {
7152                 spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
7153                 ioc->wait_on_reset_completion = 1;
7154                 do {
7155                         ssleep(1);
7156                 } while (ioc->ioc_reset_in_progress == 1);
7157                 ioc->wait_on_reset_completion = 0;
7158                 return ioc->reset_status;
7159         }
7160         if (ioc->wait_on_reset_completion) {
7161                 spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
7162                 rc = 0;
7163                 time_count = jiffies;
7164                 goto exit;
7165         }
7166         ioc->ioc_reset_in_progress = 1;
7167         if (ioc->alt_ioc)
7168                 ioc->alt_ioc->ioc_reset_in_progress = 1;
7169         spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
7170
7171
7172         /* The SCSI driver needs to adjust timeouts on all current
7173          * commands prior to the diagnostic reset being issued.
7174          * Prevents timeouts occurring during a diagnostic reset...very bad.
7175          * For all other protocol drivers, this is a no-op.
7176          */
7177         for (cb_idx = MPT_MAX_PROTOCOL_DRIVERS-1; cb_idx; cb_idx--) {
7178                 if (MptResetHandlers[cb_idx]) {
7179                         mpt_signal_reset(cb_idx, ioc, MPT_IOC_SETUP_RESET);
7180                         if (ioc->alt_ioc)
7181                                 mpt_signal_reset(cb_idx, ioc->alt_ioc,
7182                                         MPT_IOC_SETUP_RESET);
7183                 }
7184         }
7185
7186         time_count = jiffies;
7187         rc = mpt_do_ioc_recovery(ioc, MPT_HOSTEVENT_IOC_RECOVER, sleepFlag);
7188         if (rc != 0) {
7189                 printk(KERN_WARNING MYNAM
7190                        ": WARNING - (%d) Cannot recover %s, doorbell=0x%08x\n",
7191                        rc, ioc->name, mpt_GetIocState(ioc, 0));
7192         } else {
7193                 if (ioc->hard_resets < -1)
7194                         ioc->hard_resets++;
7195         }
7196
7197         spin_lock_irqsave(&ioc->taskmgmt_lock, flags);
7198         ioc->ioc_reset_in_progress = 0;
7199         ioc->taskmgmt_quiesce_io = 0;
7200         ioc->taskmgmt_in_progress = 0;
7201         ioc->reset_status = rc;
7202         if (ioc->alt_ioc) {
7203                 ioc->alt_ioc->ioc_reset_in_progress = 0;
7204                 ioc->alt_ioc->taskmgmt_quiesce_io = 0;
7205                 ioc->alt_ioc->taskmgmt_in_progress = 0;
7206         }
7207         spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
7208
7209         for (cb_idx = MPT_MAX_PROTOCOL_DRIVERS-1; cb_idx; cb_idx--) {
7210                 if (MptResetHandlers[cb_idx]) {
7211                         mpt_signal_reset(cb_idx, ioc, MPT_IOC_POST_RESET);
7212                         if (ioc->alt_ioc)
7213                                 mpt_signal_reset(cb_idx,
7214                                         ioc->alt_ioc, MPT_IOC_POST_RESET);
7215                 }
7216         }
7217 exit:
7218         dtmprintk(ioc,
7219             printk(MYIOC_s_DEBUG_FMT
7220                 "HardResetHandler: completed (%d seconds): %s\n", ioc->name,
7221                 jiffies_to_msecs(jiffies - time_count)/1000, ((rc == 0) ?
7222                 "SUCCESS" : "FAILED")));
7223
7224         return rc;
7225 }
7226
7227 #ifdef CONFIG_FUSION_LOGGING
7228 static void
7229 mpt_display_event_info(MPT_ADAPTER *ioc, EventNotificationReply_t *pEventReply)
7230 {
7231         char *ds = NULL;
7232         u32 evData0;
7233         int ii;
7234         u8 event;
7235         char *evStr = ioc->evStr;
7236
7237         event = le32_to_cpu(pEventReply->Event) & 0xFF;
7238         evData0 = le32_to_cpu(pEventReply->Data[0]);
7239
7240         switch(event) {
7241         case MPI_EVENT_NONE:
7242                 ds = "None";
7243                 break;
7244         case MPI_EVENT_LOG_DATA:
7245                 ds = "Log Data";
7246                 break;
7247         case MPI_EVENT_STATE_CHANGE:
7248                 ds = "State Change";
7249                 break;
7250         case MPI_EVENT_UNIT_ATTENTION:
7251                 ds = "Unit Attention";
7252                 break;
7253         case MPI_EVENT_IOC_BUS_RESET:
7254                 ds = "IOC Bus Reset";
7255                 break;
7256         case MPI_EVENT_EXT_BUS_RESET:
7257                 ds = "External Bus Reset";
7258                 break;
7259         case MPI_EVENT_RESCAN:
7260                 ds = "Bus Rescan Event";
7261                 break;
7262         case MPI_EVENT_LINK_STATUS_CHANGE:
7263                 if (evData0 == MPI_EVENT_LINK_STATUS_FAILURE)
7264                         ds = "Link Status(FAILURE) Change";
7265                 else
7266                         ds = "Link Status(ACTIVE) Change";
7267                 break;
7268         case MPI_EVENT_LOOP_STATE_CHANGE:
7269                 if (evData0 == MPI_EVENT_LOOP_STATE_CHANGE_LIP)
7270                         ds = "Loop State(LIP) Change";
7271                 else if (evData0 == MPI_EVENT_LOOP_STATE_CHANGE_LPE)
7272                         ds = "Loop State(LPE) Change";
7273                 else
7274                         ds = "Loop State(LPB) Change";
7275                 break;
7276         case MPI_EVENT_LOGOUT:
7277                 ds = "Logout";
7278                 break;
7279         case MPI_EVENT_EVENT_CHANGE:
7280                 if (evData0)
7281                         ds = "Events ON";
7282                 else
7283                         ds = "Events OFF";
7284                 break;
7285         case MPI_EVENT_INTEGRATED_RAID:
7286         {
7287                 u8 ReasonCode = (u8)(evData0 >> 16);
7288                 switch (ReasonCode) {
7289                 case MPI_EVENT_RAID_RC_VOLUME_CREATED :
7290                         ds = "Integrated Raid: Volume Created";
7291                         break;
7292                 case MPI_EVENT_RAID_RC_VOLUME_DELETED :
7293                         ds = "Integrated Raid: Volume Deleted";
7294                         break;
7295                 case MPI_EVENT_RAID_RC_VOLUME_SETTINGS_CHANGED :
7296                         ds = "Integrated Raid: Volume Settings Changed";
7297                         break;
7298                 case MPI_EVENT_RAID_RC_VOLUME_STATUS_CHANGED :
7299                         ds = "Integrated Raid: Volume Status Changed";
7300                         break;
7301                 case MPI_EVENT_RAID_RC_VOLUME_PHYSDISK_CHANGED :
7302                         ds = "Integrated Raid: Volume Physdisk Changed";
7303                         break;
7304                 case MPI_EVENT_RAID_RC_PHYSDISK_CREATED :
7305                         ds = "Integrated Raid: Physdisk Created";
7306                         break;
7307                 case MPI_EVENT_RAID_RC_PHYSDISK_DELETED :
7308                         ds = "Integrated Raid: Physdisk Deleted";
7309                         break;
7310                 case MPI_EVENT_RAID_RC_PHYSDISK_SETTINGS_CHANGED :
7311                         ds = "Integrated Raid: Physdisk Settings Changed";
7312                         break;
7313                 case MPI_EVENT_RAID_RC_PHYSDISK_STATUS_CHANGED :
7314                         ds = "Integrated Raid: Physdisk Status Changed";
7315                         break;
7316                 case MPI_EVENT_RAID_RC_DOMAIN_VAL_NEEDED :
7317                         ds = "Integrated Raid: Domain Validation Needed";
7318                         break;
7319                 case MPI_EVENT_RAID_RC_SMART_DATA :
7320                         ds = "Integrated Raid; Smart Data";
7321                         break;
7322                 case MPI_EVENT_RAID_RC_REPLACE_ACTION_STARTED :
7323                         ds = "Integrated Raid: Replace Action Started";
7324                         break;
7325                 default:
7326                         ds = "Integrated Raid";
7327                 break;
7328                 }
7329                 break;
7330         }
7331         case MPI_EVENT_SCSI_DEVICE_STATUS_CHANGE:
7332                 ds = "SCSI Device Status Change";
7333                 break;
7334         case MPI_EVENT_SAS_DEVICE_STATUS_CHANGE:
7335         {
7336                 u8 id = (u8)(evData0);
7337                 u8 channel = (u8)(evData0 >> 8);
7338                 u8 ReasonCode = (u8)(evData0 >> 16);
7339                 switch (ReasonCode) {
7340                 case MPI_EVENT_SAS_DEV_STAT_RC_ADDED:
7341                         snprintf(evStr, EVENT_DESCR_STR_SZ,
7342                             "SAS Device Status Change: Added: "
7343                             "id=%d channel=%d", id, channel);
7344                         break;
7345                 case MPI_EVENT_SAS_DEV_STAT_RC_NOT_RESPONDING:
7346                         snprintf(evStr, EVENT_DESCR_STR_SZ,
7347                             "SAS Device Status Change: Deleted: "
7348                             "id=%d channel=%d", id, channel);
7349                         break;
7350                 case MPI_EVENT_SAS_DEV_STAT_RC_SMART_DATA:
7351                         snprintf(evStr, EVENT_DESCR_STR_SZ,
7352                             "SAS Device Status Change: SMART Data: "
7353                             "id=%d channel=%d", id, channel);
7354                         break;
7355                 case MPI_EVENT_SAS_DEV_STAT_RC_NO_PERSIST_ADDED:
7356                         snprintf(evStr, EVENT_DESCR_STR_SZ,
7357                             "SAS Device Status Change: No Persistency: "
7358                             "id=%d channel=%d", id, channel);
7359                         break;
7360                 case MPI_EVENT_SAS_DEV_STAT_RC_UNSUPPORTED:
7361                         snprintf(evStr, EVENT_DESCR_STR_SZ,
7362                             "SAS Device Status Change: Unsupported Device "
7363                             "Discovered : id=%d channel=%d", id, channel);
7364                         break;
7365                 case MPI_EVENT_SAS_DEV_STAT_RC_INTERNAL_DEVICE_RESET:
7366                         snprintf(evStr, EVENT_DESCR_STR_SZ,
7367                             "SAS Device Status Change: Internal Device "
7368                             "Reset : id=%d channel=%d", id, channel);
7369                         break;
7370                 case MPI_EVENT_SAS_DEV_STAT_RC_TASK_ABORT_INTERNAL:
7371                         snprintf(evStr, EVENT_DESCR_STR_SZ,
7372                             "SAS Device Status Change: Internal Task "
7373                             "Abort : id=%d channel=%d", id, channel);
7374                         break;
7375                 case MPI_EVENT_SAS_DEV_STAT_RC_ABORT_TASK_SET_INTERNAL:
7376                         snprintf(evStr, EVENT_DESCR_STR_SZ,
7377                             "SAS Device Status Change: Internal Abort "
7378                             "Task Set : id=%d channel=%d", id, channel);
7379                         break;
7380                 case MPI_EVENT_SAS_DEV_STAT_RC_CLEAR_TASK_SET_INTERNAL:
7381                         snprintf(evStr, EVENT_DESCR_STR_SZ,
7382                             "SAS Device Status Change: Internal Clear "
7383                             "Task Set : id=%d channel=%d", id, channel);
7384                         break;
7385                 case MPI_EVENT_SAS_DEV_STAT_RC_QUERY_TASK_INTERNAL:
7386                         snprintf(evStr, EVENT_DESCR_STR_SZ,
7387                             "SAS Device Status Change: Internal Query "
7388                             "Task : id=%d channel=%d", id, channel);
7389                         break;
7390                 default:
7391                         snprintf(evStr, EVENT_DESCR_STR_SZ,
7392                             "SAS Device Status Change: Unknown: "
7393                             "id=%d channel=%d", id, channel);
7394                         break;
7395                 }
7396                 break;
7397         }
7398         case MPI_EVENT_ON_BUS_TIMER_EXPIRED:
7399                 ds = "Bus Timer Expired";
7400                 break;
7401         case MPI_EVENT_QUEUE_FULL:
7402         {
7403                 u16 curr_depth = (u16)(evData0 >> 16);
7404                 u8 channel = (u8)(evData0 >> 8);
7405                 u8 id = (u8)(evData0);
7406
7407                 snprintf(evStr, EVENT_DESCR_STR_SZ,
7408                    "Queue Full: channel=%d id=%d depth=%d",
7409                    channel, id, curr_depth);
7410                 break;
7411         }
7412         case MPI_EVENT_SAS_SES:
7413                 ds = "SAS SES Event";
7414                 break;
7415         case MPI_EVENT_PERSISTENT_TABLE_FULL:
7416                 ds = "Persistent Table Full";
7417                 break;
7418         case MPI_EVENT_SAS_PHY_LINK_STATUS:
7419         {
7420                 u8 LinkRates = (u8)(evData0 >> 8);
7421                 u8 PhyNumber = (u8)(evData0);
7422                 LinkRates = (LinkRates & MPI_EVENT_SAS_PLS_LR_CURRENT_MASK) >>
7423                         MPI_EVENT_SAS_PLS_LR_CURRENT_SHIFT;
7424                 switch (LinkRates) {
7425                 case MPI_EVENT_SAS_PLS_LR_RATE_UNKNOWN:
7426                         snprintf(evStr, EVENT_DESCR_STR_SZ,
7427                            "SAS PHY Link Status: Phy=%d:"
7428                            " Rate Unknown",PhyNumber);
7429                         break;
7430                 case MPI_EVENT_SAS_PLS_LR_RATE_PHY_DISABLED:
7431                         snprintf(evStr, EVENT_DESCR_STR_SZ,
7432                            "SAS PHY Link Status: Phy=%d:"
7433                            " Phy Disabled",PhyNumber);
7434                         break;
7435                 case MPI_EVENT_SAS_PLS_LR_RATE_FAILED_SPEED_NEGOTIATION:
7436                         snprintf(evStr, EVENT_DESCR_STR_SZ,
7437                            "SAS PHY Link Status: Phy=%d:"
7438                            " Failed Speed Nego",PhyNumber);
7439                         break;
7440                 case MPI_EVENT_SAS_PLS_LR_RATE_SATA_OOB_COMPLETE:
7441                         snprintf(evStr, EVENT_DESCR_STR_SZ,
7442                            "SAS PHY Link Status: Phy=%d:"
7443                            " Sata OOB Completed",PhyNumber);
7444                         break;
7445                 case MPI_EVENT_SAS_PLS_LR_RATE_1_5:
7446                         snprintf(evStr, EVENT_DESCR_STR_SZ,
7447                            "SAS PHY Link Status: Phy=%d:"
7448                            " Rate 1.5 Gbps",PhyNumber);
7449                         break;
7450                 case MPI_EVENT_SAS_PLS_LR_RATE_3_0:
7451                         snprintf(evStr, EVENT_DESCR_STR_SZ,
7452                            "SAS PHY Link Status: Phy=%d:"
7453                            " Rate 3.0 Gbps", PhyNumber);
7454                         break;
7455                 case MPI_EVENT_SAS_PLS_LR_RATE_6_0:
7456                         snprintf(evStr, EVENT_DESCR_STR_SZ,
7457                            "SAS PHY Link Status: Phy=%d:"
7458                            " Rate 6.0 Gbps", PhyNumber);
7459                         break;
7460                 default:
7461                         snprintf(evStr, EVENT_DESCR_STR_SZ,
7462                            "SAS PHY Link Status: Phy=%d", PhyNumber);
7463                         break;
7464                 }
7465                 break;
7466         }
7467         case MPI_EVENT_SAS_DISCOVERY_ERROR:
7468                 ds = "SAS Discovery Error";
7469                 break;
7470         case MPI_EVENT_IR_RESYNC_UPDATE:
7471         {
7472                 u8 resync_complete = (u8)(evData0 >> 16);
7473                 snprintf(evStr, EVENT_DESCR_STR_SZ,
7474                     "IR Resync Update: Complete = %d:",resync_complete);
7475                 break;
7476         }
7477         case MPI_EVENT_IR2:
7478         {
7479                 u8 id = (u8)(evData0);
7480                 u8 channel = (u8)(evData0 >> 8);
7481                 u8 phys_num = (u8)(evData0 >> 24);
7482                 u8 ReasonCode = (u8)(evData0 >> 16);
7483
7484                 switch (ReasonCode) {
7485                 case MPI_EVENT_IR2_RC_LD_STATE_CHANGED:
7486                         snprintf(evStr, EVENT_DESCR_STR_SZ,
7487                             "IR2: LD State Changed: "
7488                             "id=%d channel=%d phys_num=%d",
7489                             id, channel, phys_num);
7490                         break;
7491                 case MPI_EVENT_IR2_RC_PD_STATE_CHANGED:
7492                         snprintf(evStr, EVENT_DESCR_STR_SZ,
7493                             "IR2: PD State Changed "
7494                             "id=%d channel=%d phys_num=%d",
7495                             id, channel, phys_num);
7496                         break;
7497                 case MPI_EVENT_IR2_RC_BAD_BLOCK_TABLE_FULL:
7498                         snprintf(evStr, EVENT_DESCR_STR_SZ,
7499                             "IR2: Bad Block Table Full: "
7500                             "id=%d channel=%d phys_num=%d",
7501                             id, channel, phys_num);
7502                         break;
7503                 case MPI_EVENT_IR2_RC_PD_INSERTED:
7504                         snprintf(evStr, EVENT_DESCR_STR_SZ,
7505                             "IR2: PD Inserted: "
7506                             "id=%d channel=%d phys_num=%d",
7507                             id, channel, phys_num);
7508                         break;
7509                 case MPI_EVENT_IR2_RC_PD_REMOVED:
7510                         snprintf(evStr, EVENT_DESCR_STR_SZ,
7511                             "IR2: PD Removed: "
7512                             "id=%d channel=%d phys_num=%d",
7513                             id, channel, phys_num);
7514                         break;
7515                 case MPI_EVENT_IR2_RC_FOREIGN_CFG_DETECTED:
7516                         snprintf(evStr, EVENT_DESCR_STR_SZ,
7517                             "IR2: Foreign CFG Detected: "
7518                             "id=%d channel=%d phys_num=%d",
7519                             id, channel, phys_num);
7520                         break;
7521                 case MPI_EVENT_IR2_RC_REBUILD_MEDIUM_ERROR:
7522                         snprintf(evStr, EVENT_DESCR_STR_SZ,
7523                             "IR2: Rebuild Medium Error: "
7524                             "id=%d channel=%d phys_num=%d",
7525                             id, channel, phys_num);
7526                         break;
7527                 case MPI_EVENT_IR2_RC_DUAL_PORT_ADDED:
7528                         snprintf(evStr, EVENT_DESCR_STR_SZ,
7529                             "IR2: Dual Port Added: "
7530                             "id=%d channel=%d phys_num=%d",
7531                             id, channel, phys_num);
7532                         break;
7533                 case MPI_EVENT_IR2_RC_DUAL_PORT_REMOVED:
7534                         snprintf(evStr, EVENT_DESCR_STR_SZ,
7535                             "IR2: Dual Port Removed: "
7536                             "id=%d channel=%d phys_num=%d",
7537                             id, channel, phys_num);
7538                         break;
7539                 default:
7540                         ds = "IR2";
7541                 break;
7542                 }
7543                 break;
7544         }
7545         case MPI_EVENT_SAS_DISCOVERY:
7546         {
7547                 if (evData0)
7548                         ds = "SAS Discovery: Start";
7549                 else
7550                         ds = "SAS Discovery: Stop";
7551                 break;
7552         }
7553         case MPI_EVENT_LOG_ENTRY_ADDED:
7554                 ds = "SAS Log Entry Added";
7555                 break;
7556
7557         case MPI_EVENT_SAS_BROADCAST_PRIMITIVE:
7558         {
7559                 u8 phy_num = (u8)(evData0);
7560                 u8 port_num = (u8)(evData0 >> 8);
7561                 u8 port_width = (u8)(evData0 >> 16);
7562                 u8 primitive = (u8)(evData0 >> 24);
7563                 snprintf(evStr, EVENT_DESCR_STR_SZ,
7564                     "SAS Broadcast Primitive: phy=%d port=%d "
7565                     "width=%d primitive=0x%02x",
7566                     phy_num, port_num, port_width, primitive);
7567                 break;
7568         }
7569
7570         case MPI_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE:
7571         {
7572                 u8 reason = (u8)(evData0);
7573
7574                 switch (reason) {
7575                 case MPI_EVENT_SAS_INIT_RC_ADDED:
7576                         ds = "SAS Initiator Status Change: Added";
7577                         break;
7578                 case MPI_EVENT_SAS_INIT_RC_REMOVED:
7579                         ds = "SAS Initiator Status Change: Deleted";
7580                         break;
7581                 default:
7582                         ds = "SAS Initiator Status Change";
7583                         break;
7584                 }
7585                 break;
7586         }
7587
7588         case MPI_EVENT_SAS_INIT_TABLE_OVERFLOW:
7589         {
7590                 u8 max_init = (u8)(evData0);
7591                 u8 current_init = (u8)(evData0 >> 8);
7592
7593                 snprintf(evStr, EVENT_DESCR_STR_SZ,
7594                     "SAS Initiator Device Table Overflow: max initiators=%02d "
7595                     "current initiators=%02d",
7596                     max_init, current_init);
7597                 break;
7598         }
7599         case MPI_EVENT_SAS_SMP_ERROR:
7600         {
7601                 u8 status = (u8)(evData0);
7602                 u8 port_num = (u8)(evData0 >> 8);
7603                 u8 result = (u8)(evData0 >> 16);
7604
7605                 if (status == MPI_EVENT_SAS_SMP_FUNCTION_RESULT_VALID)
7606                         snprintf(evStr, EVENT_DESCR_STR_SZ,
7607                             "SAS SMP Error: port=%d result=0x%02x",
7608                             port_num, result);
7609                 else if (status == MPI_EVENT_SAS_SMP_CRC_ERROR)
7610                         snprintf(evStr, EVENT_DESCR_STR_SZ,
7611                             "SAS SMP Error: port=%d : CRC Error",
7612                             port_num);
7613                 else if (status == MPI_EVENT_SAS_SMP_TIMEOUT)
7614                         snprintf(evStr, EVENT_DESCR_STR_SZ,
7615                             "SAS SMP Error: port=%d : Timeout",
7616                             port_num);
7617                 else if (status == MPI_EVENT_SAS_SMP_NO_DESTINATION)
7618                         snprintf(evStr, EVENT_DESCR_STR_SZ,
7619                             "SAS SMP Error: port=%d : No Destination",
7620                             port_num);
7621                 else if (status == MPI_EVENT_SAS_SMP_BAD_DESTINATION)
7622                         snprintf(evStr, EVENT_DESCR_STR_SZ,
7623                             "SAS SMP Error: port=%d : Bad Destination",
7624                             port_num);
7625                 else
7626                         snprintf(evStr, EVENT_DESCR_STR_SZ,
7627                             "SAS SMP Error: port=%d : status=0x%02x",
7628                             port_num, status);
7629                 break;
7630         }
7631
7632         case MPI_EVENT_SAS_EXPANDER_STATUS_CHANGE:
7633         {
7634                 u8 reason = (u8)(evData0);
7635
7636                 switch (reason) {
7637                 case MPI_EVENT_SAS_EXP_RC_ADDED:
7638                         ds = "Expander Status Change: Added";
7639                         break;
7640                 case MPI_EVENT_SAS_EXP_RC_NOT_RESPONDING:
7641                         ds = "Expander Status Change: Deleted";
7642                         break;
7643                 default:
7644                         ds = "Expander Status Change";
7645                         break;
7646                 }
7647                 break;
7648         }
7649
7650         /*
7651          *  MPT base "custom" events may be added here...
7652          */
7653         default:
7654                 ds = "Unknown";
7655                 break;
7656         }
7657         if (ds)
7658                 strlcpy(evStr, ds, EVENT_DESCR_STR_SZ);
7659
7660
7661         devtprintk(ioc, printk(MYIOC_s_DEBUG_FMT
7662             "MPT event:(%02Xh) : %s\n",
7663             ioc->name, event, evStr));
7664
7665         devtverboseprintk(ioc, printk(KERN_DEBUG MYNAM
7666             ": Event data:\n"));
7667         for (ii = 0; ii < le16_to_cpu(pEventReply->EventDataLength); ii++)
7668                 devtverboseprintk(ioc, printk(" %08x",
7669                     le32_to_cpu(pEventReply->Data[ii])));
7670         devtverboseprintk(ioc, printk(KERN_DEBUG "\n"));
7671 }
7672 #endif
7673 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
7674 /**
7675  *      ProcessEventNotification - Route EventNotificationReply to all event handlers
7676  *      @ioc: Pointer to MPT_ADAPTER structure
7677  *      @pEventReply: Pointer to EventNotification reply frame
7678  *      @evHandlers: Pointer to integer, number of event handlers
7679  *
7680  *      Routes a received EventNotificationReply to all currently registered
7681  *      event handlers.
7682  *      Returns sum of event handlers return values.
7683  */
7684 static int
7685 ProcessEventNotification(MPT_ADAPTER *ioc, EventNotificationReply_t *pEventReply, int *evHandlers)
7686 {
7687         u16 evDataLen;
7688         u32 evData0 = 0;
7689         int ii;
7690         u8 cb_idx;
7691         int r = 0;
7692         int handlers = 0;
7693         u8 event;
7694
7695         /*
7696          *  Do platform normalization of values
7697          */
7698         event = le32_to_cpu(pEventReply->Event) & 0xFF;
7699         evDataLen = le16_to_cpu(pEventReply->EventDataLength);
7700         if (evDataLen) {
7701                 evData0 = le32_to_cpu(pEventReply->Data[0]);
7702         }
7703
7704 #ifdef CONFIG_FUSION_LOGGING
7705         if (evDataLen)
7706                 mpt_display_event_info(ioc, pEventReply);
7707 #endif
7708
7709         /*
7710          *  Do general / base driver event processing
7711          */
7712         switch(event) {
7713         case MPI_EVENT_EVENT_CHANGE:            /* 0A */
7714                 if (evDataLen) {
7715                         u8 evState = evData0 & 0xFF;
7716
7717                         /* CHECKME! What if evState unexpectedly says OFF (0)? */
7718
7719                         /* Update EventState field in cached IocFacts */
7720                         if (ioc->facts.Function) {
7721                                 ioc->facts.EventState = evState;
7722                         }
7723                 }
7724                 break;
7725         case MPI_EVENT_INTEGRATED_RAID:
7726                 mptbase_raid_process_event_data(ioc,
7727                     (MpiEventDataRaid_t *)pEventReply->Data);
7728                 break;
7729         default:
7730                 break;
7731         }
7732
7733         /*
7734          * Should this event be logged? Events are written sequentially.
7735          * When buffer is full, start again at the top.
7736          */
7737         if (ioc->events && (ioc->eventTypes & ( 1 << event))) {
7738                 int idx;
7739
7740                 idx = ioc->eventContext % MPTCTL_EVENT_LOG_SIZE;
7741
7742                 ioc->events[idx].event = event;
7743                 ioc->events[idx].eventContext = ioc->eventContext;
7744
7745                 for (ii = 0; ii < 2; ii++) {
7746                         if (ii < evDataLen)
7747                                 ioc->events[idx].data[ii] = le32_to_cpu(pEventReply->Data[ii]);
7748                         else
7749                                 ioc->events[idx].data[ii] =  0;
7750                 }
7751
7752                 ioc->eventContext++;
7753         }
7754
7755
7756         /*
7757          *  Call each currently registered protocol event handler.
7758          */
7759         for (cb_idx = MPT_MAX_PROTOCOL_DRIVERS-1; cb_idx; cb_idx--) {
7760                 if (MptEvHandlers[cb_idx]) {
7761                         devtverboseprintk(ioc, printk(MYIOC_s_DEBUG_FMT
7762                             "Routing Event to event handler #%d\n",
7763                             ioc->name, cb_idx));
7764                         r += (*(MptEvHandlers[cb_idx]))(ioc, pEventReply);
7765                         handlers++;
7766                 }
7767         }
7768         /* FIXME?  Examine results here? */
7769
7770         /*
7771          *  If needed, send (a single) EventAck.
7772          */
7773         if (pEventReply->AckRequired == MPI_EVENT_NOTIFICATION_ACK_REQUIRED) {
7774                 devtverboseprintk(ioc, printk(MYIOC_s_DEBUG_FMT
7775                         "EventAck required\n",ioc->name));
7776                 if ((ii = SendEventAck(ioc, pEventReply)) != 0) {
7777                         devtverboseprintk(ioc, printk(MYIOC_s_DEBUG_FMT "SendEventAck returned %d\n",
7778                                         ioc->name, ii));
7779                 }
7780         }
7781
7782         *evHandlers = handlers;
7783         return r;
7784 }
7785
7786 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
7787 /**
7788  *      mpt_fc_log_info - Log information returned from Fibre Channel IOC.
7789  *      @ioc: Pointer to MPT_ADAPTER structure
7790  *      @log_info: U32 LogInfo reply word from the IOC
7791  *
7792  *      Refer to lsi/mpi_log_fc.h.
7793  */
7794 static void
7795 mpt_fc_log_info(MPT_ADAPTER *ioc, u32 log_info)
7796 {
7797         char *desc = "unknown";
7798
7799         switch (log_info & 0xFF000000) {
7800         case MPI_IOCLOGINFO_FC_INIT_BASE:
7801                 desc = "FCP Initiator";
7802                 break;
7803         case MPI_IOCLOGINFO_FC_TARGET_BASE:
7804                 desc = "FCP Target";
7805                 break;
7806         case MPI_IOCLOGINFO_FC_LAN_BASE:
7807                 desc = "LAN";
7808                 break;
7809         case MPI_IOCLOGINFO_FC_MSG_BASE:
7810                 desc = "MPI Message Layer";
7811                 break;
7812         case MPI_IOCLOGINFO_FC_LINK_BASE:
7813                 desc = "FC Link";
7814                 break;
7815         case MPI_IOCLOGINFO_FC_CTX_BASE:
7816                 desc = "Context Manager";
7817                 break;
7818         case MPI_IOCLOGINFO_FC_INVALID_FIELD_BYTE_OFFSET:
7819                 desc = "Invalid Field Offset";
7820                 break;
7821         case MPI_IOCLOGINFO_FC_STATE_CHANGE:
7822                 desc = "State Change Info";
7823                 break;
7824         }
7825
7826         printk(MYIOC_s_INFO_FMT "LogInfo(0x%08x): SubClass={%s}, Value=(0x%06x)\n",
7827                         ioc->name, log_info, desc, (log_info & 0xFFFFFF));
7828 }
7829
7830 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
7831 /**
7832  *      mpt_spi_log_info - Log information returned from SCSI Parallel IOC.
7833  *      @ioc: Pointer to MPT_ADAPTER structure
7834  *      @log_info: U32 LogInfo word from the IOC
7835  *
7836  *      Refer to lsi/sp_log.h.
7837  */
7838 static void
7839 mpt_spi_log_info(MPT_ADAPTER *ioc, u32 log_info)
7840 {
7841         u32 info = log_info & 0x00FF0000;
7842         char *desc = "unknown";
7843
7844         switch (info) {
7845         case 0x00010000:
7846                 desc = "bug! MID not found";
7847                 break;
7848
7849         case 0x00020000:
7850                 desc = "Parity Error";
7851                 break;
7852
7853         case 0x00030000:
7854                 desc = "ASYNC Outbound Overrun";
7855                 break;
7856
7857         case 0x00040000:
7858                 desc = "SYNC Offset Error";
7859                 break;
7860
7861         case 0x00050000:
7862                 desc = "BM Change";
7863                 break;
7864
7865         case 0x00060000:
7866                 desc = "Msg In Overflow";
7867                 break;
7868
7869         case 0x00070000:
7870                 desc = "DMA Error";
7871                 break;
7872
7873         case 0x00080000:
7874                 desc = "Outbound DMA Overrun";
7875                 break;
7876
7877         case 0x00090000:
7878                 desc = "Task Management";
7879                 break;
7880
7881         case 0x000A0000:
7882                 desc = "Device Problem";
7883                 break;
7884
7885         case 0x000B0000:
7886                 desc = "Invalid Phase Change";
7887                 break;
7888
7889         case 0x000C0000:
7890                 desc = "Untagged Table Size";
7891                 break;
7892
7893         }
7894
7895         printk(MYIOC_s_INFO_FMT "LogInfo(0x%08x): F/W: %s\n", ioc->name, log_info, desc);
7896 }
7897
7898 /* strings for sas loginfo */
7899         static char *originator_str[] = {
7900                 "IOP",                                          /* 00h */
7901                 "PL",                                           /* 01h */
7902                 "IR"                                            /* 02h */
7903         };
7904         static char *iop_code_str[] = {
7905                 NULL,                                           /* 00h */
7906                 "Invalid SAS Address",                          /* 01h */
7907                 NULL,                                           /* 02h */
7908                 "Invalid Page",                                 /* 03h */
7909                 "Diag Message Error",                           /* 04h */
7910                 "Task Terminated",                              /* 05h */
7911                 "Enclosure Management",                         /* 06h */
7912                 "Target Mode"                                   /* 07h */
7913         };
7914         static char *pl_code_str[] = {
7915                 NULL,                                           /* 00h */
7916                 "Open Failure",                                 /* 01h */
7917                 "Invalid Scatter Gather List",                  /* 02h */
7918                 "Wrong Relative Offset or Frame Length",        /* 03h */
7919                 "Frame Transfer Error",                         /* 04h */
7920                 "Transmit Frame Connected Low",                 /* 05h */
7921                 "SATA Non-NCQ RW Error Bit Set",                /* 06h */
7922                 "SATA Read Log Receive Data Error",             /* 07h */
7923                 "SATA NCQ Fail All Commands After Error",       /* 08h */
7924                 "SATA Error in Receive Set Device Bit FIS",     /* 09h */
7925                 "Receive Frame Invalid Message",                /* 0Ah */
7926                 "Receive Context Message Valid Error",          /* 0Bh */
7927                 "Receive Frame Current Frame Error",            /* 0Ch */
7928                 "SATA Link Down",                               /* 0Dh */
7929                 "Discovery SATA Init W IOS",                    /* 0Eh */
7930                 "Config Invalid Page",                          /* 0Fh */
7931                 "Discovery SATA Init Timeout",                  /* 10h */
7932                 "Reset",                                        /* 11h */
7933                 "Abort",                                        /* 12h */
7934                 "IO Not Yet Executed",                          /* 13h */
7935                 "IO Executed",                                  /* 14h */
7936                 "Persistent Reservation Out Not Affiliation "
7937                     "Owner",                                    /* 15h */
7938                 "Open Transmit DMA Abort",                      /* 16h */
7939                 "IO Device Missing Delay Retry",                /* 17h */
7940                 "IO Cancelled Due to Receive Error",            /* 18h */
7941                 NULL,                                           /* 19h */
7942                 NULL,                                           /* 1Ah */
7943                 NULL,                                           /* 1Bh */
7944                 NULL,                                           /* 1Ch */
7945                 NULL,                                           /* 1Dh */
7946                 NULL,                                           /* 1Eh */
7947                 NULL,                                           /* 1Fh */
7948                 "Enclosure Management"                          /* 20h */
7949         };
7950         static char *ir_code_str[] = {
7951                 "Raid Action Error",                            /* 00h */
7952                 NULL,                                           /* 00h */
7953                 NULL,                                           /* 01h */
7954                 NULL,                                           /* 02h */
7955                 NULL,                                           /* 03h */
7956                 NULL,                                           /* 04h */
7957                 NULL,                                           /* 05h */
7958                 NULL,                                           /* 06h */
7959                 NULL                                            /* 07h */
7960         };
7961         static char *raid_sub_code_str[] = {
7962                 NULL,                                           /* 00h */
7963                 "Volume Creation Failed: Data Passed too "
7964                     "Large",                                    /* 01h */
7965                 "Volume Creation Failed: Duplicate Volumes "
7966                     "Attempted",                                /* 02h */
7967                 "Volume Creation Failed: Max Number "
7968                     "Supported Volumes Exceeded",               /* 03h */
7969                 "Volume Creation Failed: DMA Error",            /* 04h */
7970                 "Volume Creation Failed: Invalid Volume Type",  /* 05h */
7971                 "Volume Creation Failed: Error Reading "
7972                     "MFG Page 4",                               /* 06h */
7973                 "Volume Creation Failed: Creating Internal "
7974                     "Structures",                               /* 07h */
7975                 NULL,                                           /* 08h */
7976                 NULL,                                           /* 09h */
7977                 NULL,                                           /* 0Ah */
7978                 NULL,                                           /* 0Bh */
7979                 NULL,                                           /* 0Ch */
7980                 NULL,                                           /* 0Dh */
7981                 NULL,                                           /* 0Eh */
7982                 NULL,                                           /* 0Fh */
7983                 "Activation failed: Already Active Volume",     /* 10h */
7984                 "Activation failed: Unsupported Volume Type",   /* 11h */
7985                 "Activation failed: Too Many Active Volumes",   /* 12h */
7986                 "Activation failed: Volume ID in Use",          /* 13h */
7987                 "Activation failed: Reported Failure",          /* 14h */
7988                 "Activation failed: Importing a Volume",        /* 15h */
7989                 NULL,                                           /* 16h */
7990                 NULL,                                           /* 17h */
7991                 NULL,                                           /* 18h */
7992                 NULL,                                           /* 19h */
7993                 NULL,                                           /* 1Ah */
7994                 NULL,                                           /* 1Bh */
7995                 NULL,                                           /* 1Ch */
7996                 NULL,                                           /* 1Dh */
7997                 NULL,                                           /* 1Eh */
7998                 NULL,                                           /* 1Fh */
7999                 "Phys Disk failed: Too Many Phys Disks",        /* 20h */
8000                 "Phys Disk failed: Data Passed too Large",      /* 21h */
8001                 "Phys Disk failed: DMA Error",                  /* 22h */
8002                 "Phys Disk failed: Invalid <channel:id>",       /* 23h */
8003                 "Phys Disk failed: Creating Phys Disk Config "
8004                     "Page",                                     /* 24h */
8005                 NULL,                                           /* 25h */
8006                 NULL,                                           /* 26h */
8007                 NULL,                                           /* 27h */
8008                 NULL,                                           /* 28h */
8009                 NULL,                                           /* 29h */
8010                 NULL,                                           /* 2Ah */
8011                 NULL,                                           /* 2Bh */
8012                 NULL,                                           /* 2Ch */
8013                 NULL,                                           /* 2Dh */
8014                 NULL,                                           /* 2Eh */
8015                 NULL,                                           /* 2Fh */
8016                 "Compatibility Error: IR Disabled",             /* 30h */
8017                 "Compatibility Error: Inquiry Command Failed",  /* 31h */
8018                 "Compatibility Error: Device not Direct Access "
8019                     "Device ",                                  /* 32h */
8020                 "Compatibility Error: Removable Device Found",  /* 33h */
8021                 "Compatibility Error: Device SCSI Version not "
8022                     "2 or Higher",                              /* 34h */
8023                 "Compatibility Error: SATA Device, 48 BIT LBA "
8024                     "not Supported",                            /* 35h */
8025                 "Compatibility Error: Device doesn't have "
8026                     "512 Byte Block Sizes",                     /* 36h */
8027                 "Compatibility Error: Volume Type Check Failed", /* 37h */
8028                 "Compatibility Error: Volume Type is "
8029                     "Unsupported by FW",                        /* 38h */
8030                 "Compatibility Error: Disk Drive too Small for "
8031                     "use in Volume",                            /* 39h */
8032                 "Compatibility Error: Phys Disk for Create "
8033                     "Volume not Found",                         /* 3Ah */
8034                 "Compatibility Error: Too Many or too Few "
8035                     "Disks for Volume Type",                    /* 3Bh */
8036                 "Compatibility Error: Disk stripe Sizes "
8037                     "Must be 64KB",                             /* 3Ch */
8038                 "Compatibility Error: IME Size Limited to < 2TB", /* 3Dh */
8039         };
8040
8041 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
8042 /**
8043  *      mpt_sas_log_info - Log information returned from SAS IOC.
8044  *      @ioc: Pointer to MPT_ADAPTER structure
8045  *      @log_info: U32 LogInfo reply word from the IOC
8046  *      @cb_idx: callback function's handle
8047  *
8048  *      Refer to lsi/mpi_log_sas.h.
8049  **/
8050 static void
8051 mpt_sas_log_info(MPT_ADAPTER *ioc, u32 log_info, u8 cb_idx)
8052 {
8053         union loginfo_type {
8054                 u32     loginfo;
8055                 struct {
8056                         u32     subcode:16;
8057                         u32     code:8;
8058                         u32     originator:4;
8059                         u32     bus_type:4;
8060                 } dw;
8061         };
8062         union loginfo_type sas_loginfo;
8063         char *originator_desc = NULL;
8064         char *code_desc = NULL;
8065         char *sub_code_desc = NULL;
8066
8067         sas_loginfo.loginfo = log_info;
8068         if ((sas_loginfo.dw.bus_type != 3 /*SAS*/) &&
8069             (sas_loginfo.dw.originator < ARRAY_SIZE(originator_str)))
8070                 return;
8071
8072         originator_desc = originator_str[sas_loginfo.dw.originator];
8073
8074         switch (sas_loginfo.dw.originator) {
8075
8076                 case 0:  /* IOP */
8077                         if (sas_loginfo.dw.code <
8078                             ARRAY_SIZE(iop_code_str))
8079                                 code_desc = iop_code_str[sas_loginfo.dw.code];
8080                         break;
8081                 case 1:  /* PL */
8082                         if (sas_loginfo.dw.code <
8083                             ARRAY_SIZE(pl_code_str))
8084                                 code_desc = pl_code_str[sas_loginfo.dw.code];
8085                         break;
8086                 case 2:  /* IR */
8087                         if (sas_loginfo.dw.code >=
8088                             ARRAY_SIZE(ir_code_str))
8089                                 break;
8090                         code_desc = ir_code_str[sas_loginfo.dw.code];
8091                         if (sas_loginfo.dw.subcode >=
8092                             ARRAY_SIZE(raid_sub_code_str))
8093                                 break;
8094                         if (sas_loginfo.dw.code == 0)
8095                                 sub_code_desc =
8096                                     raid_sub_code_str[sas_loginfo.dw.subcode];
8097                         break;
8098                 default:
8099                         return;
8100         }
8101
8102         if (sub_code_desc != NULL)
8103                 printk(MYIOC_s_INFO_FMT
8104                         "LogInfo(0x%08x): Originator={%s}, Code={%s},"
8105                         " SubCode={%s} cb_idx %s\n",
8106                         ioc->name, log_info, originator_desc, code_desc,
8107                         sub_code_desc, MptCallbacksName[cb_idx]);
8108         else if (code_desc != NULL)
8109                 printk(MYIOC_s_INFO_FMT
8110                         "LogInfo(0x%08x): Originator={%s}, Code={%s},"
8111                         " SubCode(0x%04x) cb_idx %s\n",
8112                         ioc->name, log_info, originator_desc, code_desc,
8113                         sas_loginfo.dw.subcode, MptCallbacksName[cb_idx]);
8114         else
8115                 printk(MYIOC_s_INFO_FMT
8116                         "LogInfo(0x%08x): Originator={%s}, Code=(0x%02x),"
8117                         " SubCode(0x%04x) cb_idx %s\n",
8118                         ioc->name, log_info, originator_desc,
8119                         sas_loginfo.dw.code, sas_loginfo.dw.subcode,
8120                         MptCallbacksName[cb_idx]);
8121 }
8122
8123 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
8124 /**
8125  *      mpt_iocstatus_info_config - IOCSTATUS information for config pages
8126  *      @ioc: Pointer to MPT_ADAPTER structure
8127  *      @ioc_status: U32 IOCStatus word from IOC
8128  *      @mf: Pointer to MPT request frame
8129  *
8130  *      Refer to lsi/mpi.h.
8131  **/
8132 static void
8133 mpt_iocstatus_info_config(MPT_ADAPTER *ioc, u32 ioc_status, MPT_FRAME_HDR *mf)
8134 {
8135         Config_t *pReq = (Config_t *)mf;
8136         char extend_desc[EVENT_DESCR_STR_SZ];
8137         char *desc = NULL;
8138         u32 form;
8139         u8 page_type;
8140
8141         if (pReq->Header.PageType == MPI_CONFIG_PAGETYPE_EXTENDED)
8142                 page_type = pReq->ExtPageType;
8143         else
8144                 page_type = pReq->Header.PageType;
8145
8146         /*
8147          * ignore invalid page messages for GET_NEXT_HANDLE
8148          */
8149         form = le32_to_cpu(pReq->PageAddress);
8150         if (ioc_status == MPI_IOCSTATUS_CONFIG_INVALID_PAGE) {
8151                 if (page_type == MPI_CONFIG_EXTPAGETYPE_SAS_DEVICE ||
8152                     page_type == MPI_CONFIG_EXTPAGETYPE_SAS_EXPANDER ||
8153                     page_type == MPI_CONFIG_EXTPAGETYPE_ENCLOSURE) {
8154                         if ((form >> MPI_SAS_DEVICE_PGAD_FORM_SHIFT) ==
8155                                 MPI_SAS_DEVICE_PGAD_FORM_GET_NEXT_HANDLE)
8156                                 return;
8157                 }
8158                 if (page_type == MPI_CONFIG_PAGETYPE_FC_DEVICE)
8159                         if ((form & MPI_FC_DEVICE_PGAD_FORM_MASK) ==
8160                                 MPI_FC_DEVICE_PGAD_FORM_NEXT_DID)
8161                                 return;
8162         }
8163
8164         snprintf(extend_desc, EVENT_DESCR_STR_SZ,
8165             "type=%02Xh, page=%02Xh, action=%02Xh, form=%08Xh",
8166             page_type, pReq->Header.PageNumber, pReq->Action, form);
8167
8168         switch (ioc_status) {
8169
8170         case MPI_IOCSTATUS_CONFIG_INVALID_ACTION: /* 0x0020 */
8171                 desc = "Config Page Invalid Action";
8172                 break;
8173
8174         case MPI_IOCSTATUS_CONFIG_INVALID_TYPE:   /* 0x0021 */
8175                 desc = "Config Page Invalid Type";
8176                 break;
8177
8178         case MPI_IOCSTATUS_CONFIG_INVALID_PAGE:   /* 0x0022 */
8179                 desc = "Config Page Invalid Page";
8180                 break;
8181
8182         case MPI_IOCSTATUS_CONFIG_INVALID_DATA:   /* 0x0023 */
8183                 desc = "Config Page Invalid Data";
8184                 break;
8185
8186         case MPI_IOCSTATUS_CONFIG_NO_DEFAULTS:    /* 0x0024 */
8187                 desc = "Config Page No Defaults";
8188                 break;
8189
8190         case MPI_IOCSTATUS_CONFIG_CANT_COMMIT:    /* 0x0025 */
8191                 desc = "Config Page Can't Commit";
8192                 break;
8193         }
8194
8195         if (!desc)
8196                 return;
8197
8198         dreplyprintk(ioc, printk(MYIOC_s_DEBUG_FMT "IOCStatus(0x%04X): %s: %s\n",
8199             ioc->name, ioc_status, desc, extend_desc));
8200 }
8201
8202 /**
8203  *      mpt_iocstatus_info - IOCSTATUS information returned from IOC.
8204  *      @ioc: Pointer to MPT_ADAPTER structure
8205  *      @ioc_status: U32 IOCStatus word from IOC
8206  *      @mf: Pointer to MPT request frame
8207  *
8208  *      Refer to lsi/mpi.h.
8209  **/
8210 static void
8211 mpt_iocstatus_info(MPT_ADAPTER *ioc, u32 ioc_status, MPT_FRAME_HDR *mf)
8212 {
8213         u32 status = ioc_status & MPI_IOCSTATUS_MASK;
8214         char *desc = NULL;
8215
8216         switch (status) {
8217
8218 /****************************************************************************/
8219 /*  Common IOCStatus values for all replies                                 */
8220 /****************************************************************************/
8221
8222         case MPI_IOCSTATUS_INVALID_FUNCTION: /* 0x0001 */
8223                 desc = "Invalid Function";
8224                 break;
8225
8226         case MPI_IOCSTATUS_BUSY: /* 0x0002 */
8227                 desc = "Busy";
8228                 break;
8229
8230         case MPI_IOCSTATUS_INVALID_SGL: /* 0x0003 */
8231                 desc = "Invalid SGL";
8232                 break;
8233
8234         case MPI_IOCSTATUS_INTERNAL_ERROR: /* 0x0004 */
8235                 desc = "Internal Error";
8236                 break;
8237
8238         case MPI_IOCSTATUS_RESERVED: /* 0x0005 */
8239                 desc = "Reserved";
8240                 break;
8241
8242         case MPI_IOCSTATUS_INSUFFICIENT_RESOURCES: /* 0x0006 */
8243                 desc = "Insufficient Resources";
8244                 break;
8245
8246         case MPI_IOCSTATUS_INVALID_FIELD: /* 0x0007 */
8247                 desc = "Invalid Field";
8248                 break;
8249
8250         case MPI_IOCSTATUS_INVALID_STATE: /* 0x0008 */
8251                 desc = "Invalid State";
8252                 break;
8253
8254 /****************************************************************************/
8255 /*  Config IOCStatus values                                                 */
8256 /****************************************************************************/
8257
8258         case MPI_IOCSTATUS_CONFIG_INVALID_ACTION: /* 0x0020 */
8259         case MPI_IOCSTATUS_CONFIG_INVALID_TYPE:   /* 0x0021 */
8260         case MPI_IOCSTATUS_CONFIG_INVALID_PAGE:   /* 0x0022 */
8261         case MPI_IOCSTATUS_CONFIG_INVALID_DATA:   /* 0x0023 */
8262         case MPI_IOCSTATUS_CONFIG_NO_DEFAULTS:    /* 0x0024 */
8263         case MPI_IOCSTATUS_CONFIG_CANT_COMMIT:    /* 0x0025 */
8264                 mpt_iocstatus_info_config(ioc, status, mf);
8265                 break;
8266
8267 /****************************************************************************/
8268 /*  SCSIIO Reply (SPI, FCP, SAS) initiator values                           */
8269 /*                                                                          */
8270 /*  Look at mptscsih_iocstatus_info_scsiio in mptscsih.c */
8271 /*                                                                          */
8272 /****************************************************************************/
8273
8274         case MPI_IOCSTATUS_SCSI_RECOVERED_ERROR: /* 0x0040 */
8275         case MPI_IOCSTATUS_SCSI_DATA_UNDERRUN: /* 0x0045 */
8276         case MPI_IOCSTATUS_SCSI_INVALID_BUS: /* 0x0041 */
8277         case MPI_IOCSTATUS_SCSI_INVALID_TARGETID: /* 0x0042 */
8278         case MPI_IOCSTATUS_SCSI_DEVICE_NOT_THERE: /* 0x0043 */
8279         case MPI_IOCSTATUS_SCSI_DATA_OVERRUN: /* 0x0044 */
8280         case MPI_IOCSTATUS_SCSI_IO_DATA_ERROR: /* 0x0046 */
8281         case MPI_IOCSTATUS_SCSI_PROTOCOL_ERROR: /* 0x0047 */
8282         case MPI_IOCSTATUS_SCSI_TASK_TERMINATED: /* 0x0048 */
8283         case MPI_IOCSTATUS_SCSI_RESIDUAL_MISMATCH: /* 0x0049 */
8284         case MPI_IOCSTATUS_SCSI_TASK_MGMT_FAILED: /* 0x004A */
8285         case MPI_IOCSTATUS_SCSI_IOC_TERMINATED: /* 0x004B */
8286         case MPI_IOCSTATUS_SCSI_EXT_TERMINATED: /* 0x004C */
8287                 break;
8288
8289 /****************************************************************************/
8290 /*  SCSI Target values                                                      */
8291 /****************************************************************************/
8292
8293         case MPI_IOCSTATUS_TARGET_PRIORITY_IO: /* 0x0060 */
8294                 desc = "Target: Priority IO";
8295                 break;
8296
8297         case MPI_IOCSTATUS_TARGET_INVALID_PORT: /* 0x0061 */
8298                 desc = "Target: Invalid Port";
8299                 break;
8300
8301         case MPI_IOCSTATUS_TARGET_INVALID_IO_INDEX: /* 0x0062 */
8302                 desc = "Target Invalid IO Index:";
8303                 break;
8304
8305         case MPI_IOCSTATUS_TARGET_ABORTED: /* 0x0063 */
8306                 desc = "Target: Aborted";
8307                 break;
8308
8309         case MPI_IOCSTATUS_TARGET_NO_CONN_RETRYABLE: /* 0x0064 */
8310                 desc = "Target: No Conn Retryable";
8311                 break;
8312
8313         case MPI_IOCSTATUS_TARGET_NO_CONNECTION: /* 0x0065 */
8314                 desc = "Target: No Connection";
8315                 break;
8316
8317         case MPI_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH: /* 0x006A */
8318                 desc = "Target: Transfer Count Mismatch";
8319                 break;
8320
8321         case MPI_IOCSTATUS_TARGET_STS_DATA_NOT_SENT: /* 0x006B */
8322                 desc = "Target: STS Data not Sent";
8323                 break;
8324
8325         case MPI_IOCSTATUS_TARGET_DATA_OFFSET_ERROR: /* 0x006D */
8326                 desc = "Target: Data Offset Error";
8327                 break;
8328
8329         case MPI_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA: /* 0x006E */
8330                 desc = "Target: Too Much Write Data";
8331                 break;
8332
8333         case MPI_IOCSTATUS_TARGET_IU_TOO_SHORT: /* 0x006F */
8334                 desc = "Target: IU Too Short";
8335                 break;
8336
8337         case MPI_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT: /* 0x0070 */
8338                 desc = "Target: ACK NAK Timeout";
8339                 break;
8340
8341         case MPI_IOCSTATUS_TARGET_NAK_RECEIVED: /* 0x0071 */
8342                 desc = "Target: Nak Received";
8343                 break;
8344
8345 /****************************************************************************/
8346 /*  Fibre Channel Direct Access values                                      */
8347 /****************************************************************************/
8348
8349         case MPI_IOCSTATUS_FC_ABORTED: /* 0x0066 */
8350                 desc = "FC: Aborted";
8351                 break;
8352
8353         case MPI_IOCSTATUS_FC_RX_ID_INVALID: /* 0x0067 */
8354                 desc = "FC: RX ID Invalid";
8355                 break;
8356
8357         case MPI_IOCSTATUS_FC_DID_INVALID: /* 0x0068 */
8358                 desc = "FC: DID Invalid";
8359                 break;
8360
8361         case MPI_IOCSTATUS_FC_NODE_LOGGED_OUT: /* 0x0069 */
8362                 desc = "FC: Node Logged Out";
8363                 break;
8364
8365         case MPI_IOCSTATUS_FC_EXCHANGE_CANCELED: /* 0x006C */
8366                 desc = "FC: Exchange Canceled";
8367                 break;
8368
8369 /****************************************************************************/
8370 /*  LAN values                                                              */
8371 /****************************************************************************/
8372
8373         case MPI_IOCSTATUS_LAN_DEVICE_NOT_FOUND: /* 0x0080 */
8374                 desc = "LAN: Device not Found";
8375                 break;
8376
8377         case MPI_IOCSTATUS_LAN_DEVICE_FAILURE: /* 0x0081 */
8378                 desc = "LAN: Device Failure";
8379                 break;
8380
8381         case MPI_IOCSTATUS_LAN_TRANSMIT_ERROR: /* 0x0082 */
8382                 desc = "LAN: Transmit Error";
8383                 break;
8384
8385         case MPI_IOCSTATUS_LAN_TRANSMIT_ABORTED: /* 0x0083 */
8386                 desc = "LAN: Transmit Aborted";
8387                 break;
8388
8389         case MPI_IOCSTATUS_LAN_RECEIVE_ERROR: /* 0x0084 */
8390                 desc = "LAN: Receive Error";
8391                 break;
8392
8393         case MPI_IOCSTATUS_LAN_RECEIVE_ABORTED: /* 0x0085 */
8394                 desc = "LAN: Receive Aborted";
8395                 break;
8396
8397         case MPI_IOCSTATUS_LAN_PARTIAL_PACKET: /* 0x0086 */
8398                 desc = "LAN: Partial Packet";
8399                 break;
8400
8401         case MPI_IOCSTATUS_LAN_CANCELED: /* 0x0087 */
8402                 desc = "LAN: Canceled";
8403                 break;
8404
8405 /****************************************************************************/
8406 /*  Serial Attached SCSI values                                             */
8407 /****************************************************************************/
8408
8409         case MPI_IOCSTATUS_SAS_SMP_REQUEST_FAILED: /* 0x0090 */
8410                 desc = "SAS: SMP Request Failed";
8411                 break;
8412
8413         case MPI_IOCSTATUS_SAS_SMP_DATA_OVERRUN: /* 0x0090 */
8414                 desc = "SAS: SMP Data Overrun";
8415                 break;
8416
8417         default:
8418                 desc = "Others";
8419                 break;
8420         }
8421
8422         if (!desc)
8423                 return;
8424
8425         dreplyprintk(ioc, printk(MYIOC_s_DEBUG_FMT "IOCStatus(0x%04X): %s\n",
8426             ioc->name, status, desc));
8427 }
8428
8429 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
8430 EXPORT_SYMBOL(mpt_attach);
8431 EXPORT_SYMBOL(mpt_detach);
8432 #ifdef CONFIG_PM
8433 EXPORT_SYMBOL(mpt_resume);
8434 EXPORT_SYMBOL(mpt_suspend);
8435 #endif
8436 EXPORT_SYMBOL(ioc_list);
8437 EXPORT_SYMBOL(mpt_register);
8438 EXPORT_SYMBOL(mpt_deregister);
8439 EXPORT_SYMBOL(mpt_event_register);
8440 EXPORT_SYMBOL(mpt_event_deregister);
8441 EXPORT_SYMBOL(mpt_reset_register);
8442 EXPORT_SYMBOL(mpt_reset_deregister);
8443 EXPORT_SYMBOL(mpt_device_driver_register);
8444 EXPORT_SYMBOL(mpt_device_driver_deregister);
8445 EXPORT_SYMBOL(mpt_get_msg_frame);
8446 EXPORT_SYMBOL(mpt_put_msg_frame);
8447 EXPORT_SYMBOL(mpt_put_msg_frame_hi_pri);
8448 EXPORT_SYMBOL(mpt_free_msg_frame);
8449 EXPORT_SYMBOL(mpt_send_handshake_request);
8450 EXPORT_SYMBOL(mpt_verify_adapter);
8451 EXPORT_SYMBOL(mpt_GetIocState);
8452 EXPORT_SYMBOL(mpt_print_ioc_summary);
8453 EXPORT_SYMBOL(mpt_HardResetHandler);
8454 EXPORT_SYMBOL(mpt_config);
8455 EXPORT_SYMBOL(mpt_findImVolumes);
8456 EXPORT_SYMBOL(mpt_alloc_fw_memory);
8457 EXPORT_SYMBOL(mpt_free_fw_memory);
8458 EXPORT_SYMBOL(mptbase_sas_persist_operation);
8459 EXPORT_SYMBOL(mpt_raid_phys_disk_pg0);
8460
8461 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
8462 /**
8463  *      fusion_init - Fusion MPT base driver initialization routine.
8464  *
8465  *      Returns 0 for success, non-zero for failure.
8466  */
8467 static int __init
8468 fusion_init(void)
8469 {
8470         u8 cb_idx;
8471
8472         show_mptmod_ver(my_NAME, my_VERSION);
8473         printk(KERN_INFO COPYRIGHT "\n");
8474
8475         for (cb_idx = 0; cb_idx < MPT_MAX_PROTOCOL_DRIVERS; cb_idx++) {
8476                 MptCallbacks[cb_idx] = NULL;
8477                 MptDriverClass[cb_idx] = MPTUNKNOWN_DRIVER;
8478                 MptEvHandlers[cb_idx] = NULL;
8479                 MptResetHandlers[cb_idx] = NULL;
8480         }
8481
8482         /*  Register ourselves (mptbase) in order to facilitate
8483          *  EventNotification handling.
8484          */
8485         mpt_base_index = mpt_register(mptbase_reply, MPTBASE_DRIVER,
8486             "mptbase_reply");
8487
8488         /* Register for hard reset handling callbacks.
8489          */
8490         mpt_reset_register(mpt_base_index, mpt_ioc_reset);
8491
8492 #ifdef CONFIG_PROC_FS
8493         (void) procmpt_create();
8494 #endif
8495         return 0;
8496 }
8497
8498 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
8499 /**
8500  *      fusion_exit - Perform driver unload cleanup.
8501  *
8502  *      This routine frees all resources associated with each MPT adapter
8503  *      and removes all %MPT_PROCFS_MPTBASEDIR entries.
8504  */
8505 static void __exit
8506 fusion_exit(void)
8507 {
8508
8509         mpt_reset_deregister(mpt_base_index);
8510
8511 #ifdef CONFIG_PROC_FS
8512         procmpt_destroy();
8513 #endif
8514 }
8515
8516 module_init(fusion_init);
8517 module_exit(fusion_exit);