1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2015-2016 MediaTek Inc.
4 * Author: Yong Wu <yong.wu@mediatek.com>
7 #include <linux/component.h>
8 #include <linux/device.h>
11 #include <linux/module.h>
13 #include <linux/of_platform.h>
14 #include <linux/platform_device.h>
15 #include <linux/pm_runtime.h>
16 #include <soc/mediatek/smi.h>
17 #include <dt-bindings/memory/mt2701-larb-port.h>
18 #include <dt-bindings/memory/mtk-memory-port.h>
21 #define SMI_LARB_MMU_EN 0xf00
24 #define MT8167_SMI_LARB_MMU_EN 0xfc0
27 #define REG_SMI_SECUR_CON_BASE 0x5c0
29 /* every register control 8 port, register offset 0x4 */
30 #define REG_SMI_SECUR_CON_OFFSET(id) (((id) >> 3) << 2)
31 #define REG_SMI_SECUR_CON_ADDR(id) \
32 (REG_SMI_SECUR_CON_BASE + REG_SMI_SECUR_CON_OFFSET(id))
35 * every port have 4 bit to control, bit[port + 3] control virtual or physical,
36 * bit[port + 2 : port + 1] control the domain, bit[port] control the security
39 #define SMI_SECUR_CON_VAL_MSK(id) (~(0xf << (((id) & 0x7) << 2)))
40 #define SMI_SECUR_CON_VAL_VIRT(id) BIT((((id) & 0x7) << 2) + 3)
41 /* mt2701 domain should be set to 3 */
42 #define SMI_SECUR_CON_VAL_DOMAIN(id) (0x3 << ((((id) & 0x7) << 2) + 1))
45 #define SMI_LARB_NONSEC_CON(id) (0x380 + ((id) * 4))
46 #define F_MMU_EN BIT(0)
47 #define BANK_SEL(id) ({ \
48 u32 _id = (id) & 0x3; \
49 (_id << 8 | _id << 10 | _id << 12 | _id << 14); \
53 #define SMI_BUS_SEL 0x220
54 #define SMI_BUS_LARB_SHIFT(larbid) ((larbid) << 1)
55 /* All are MMU0 defaultly. Only specialize mmu1 here. */
56 #define F_MMU1_LARB(larbid) (0x1 << SMI_BUS_LARB_SHIFT(larbid))
63 #define MTK_SMI_CLK_NR_MAX 4
65 /* larbs: Require apb/smi clocks while gals is optional. */
66 static const char * const mtk_smi_larb_clks[] = {"apb", "smi", "gals"};
67 #define MTK_SMI_LARB_REQ_CLK_NR 2
68 #define MTK_SMI_LARB_OPT_CLK_NR 1
71 * common: Require these four clocks in has_gals case. Otherwise, only apb/smi are required.
73 static const char * const mtk_smi_common_clks[] = {"apb", "smi", "gals0", "gals1"};
74 #define MTK_SMI_COM_REQ_CLK_NR 2
75 #define MTK_SMI_COM_GALS_REQ_CLK_NR MTK_SMI_CLK_NR_MAX
77 struct mtk_smi_common_plat {
80 u32 bus_sel; /* Balance some larbs to enter mmu0 or mmu1 */
83 struct mtk_smi_larb_gen {
84 int port_in_larb[MTK_LARB_NR_MAX + 1];
85 void (*config_port)(struct device *dev);
86 unsigned int larb_direct_to_common_mask;
92 struct clk_bulk_data clks[MTK_SMI_CLK_NR_MAX];
93 struct clk *clk_async; /*only needed by mt2701*/
95 void __iomem *smi_ao_base; /* only for gen1 */
96 void __iomem *base; /* only for gen2 */
98 const struct mtk_smi_common_plat *plat;
101 struct mtk_smi_larb { /* larb: local arbiter */
104 struct device *smi_common_dev;
105 const struct mtk_smi_larb_gen *larb_gen;
111 int mtk_smi_larb_get(struct device *larbdev)
113 int ret = pm_runtime_resume_and_get(larbdev);
115 return (ret < 0) ? ret : 0;
117 EXPORT_SYMBOL_GPL(mtk_smi_larb_get);
119 void mtk_smi_larb_put(struct device *larbdev)
121 pm_runtime_put_sync(larbdev);
123 EXPORT_SYMBOL_GPL(mtk_smi_larb_put);
126 mtk_smi_larb_bind(struct device *dev, struct device *master, void *data)
128 struct mtk_smi_larb *larb = dev_get_drvdata(dev);
129 struct mtk_smi_larb_iommu *larb_mmu = data;
132 for (i = 0; i < MTK_LARB_NR_MAX; i++) {
133 if (dev == larb_mmu[i].dev) {
135 larb->mmu = &larb_mmu[i].mmu;
136 larb->bank = larb_mmu[i].bank;
143 static void mtk_smi_larb_config_port_gen2_general(struct device *dev)
145 struct mtk_smi_larb *larb = dev_get_drvdata(dev);
149 if (BIT(larb->larbid) & larb->larb_gen->larb_direct_to_common_mask)
152 for_each_set_bit(i, (unsigned long *)larb->mmu, 32) {
153 reg = readl_relaxed(larb->base + SMI_LARB_NONSEC_CON(i));
155 reg |= BANK_SEL(larb->bank[i]);
156 writel(reg, larb->base + SMI_LARB_NONSEC_CON(i));
160 static void mtk_smi_larb_config_port_mt8173(struct device *dev)
162 struct mtk_smi_larb *larb = dev_get_drvdata(dev);
164 writel(*larb->mmu, larb->base + SMI_LARB_MMU_EN);
167 static void mtk_smi_larb_config_port_mt8167(struct device *dev)
169 struct mtk_smi_larb *larb = dev_get_drvdata(dev);
171 writel(*larb->mmu, larb->base + MT8167_SMI_LARB_MMU_EN);
174 static void mtk_smi_larb_config_port_gen1(struct device *dev)
176 struct mtk_smi_larb *larb = dev_get_drvdata(dev);
177 const struct mtk_smi_larb_gen *larb_gen = larb->larb_gen;
178 struct mtk_smi *common = dev_get_drvdata(larb->smi_common_dev);
179 int i, m4u_port_id, larb_port_num;
180 u32 sec_con_val, reg_val;
182 m4u_port_id = larb_gen->port_in_larb[larb->larbid];
183 larb_port_num = larb_gen->port_in_larb[larb->larbid + 1]
184 - larb_gen->port_in_larb[larb->larbid];
186 for (i = 0; i < larb_port_num; i++, m4u_port_id++) {
187 if (*larb->mmu & BIT(i)) {
188 /* bit[port + 3] controls the virtual or physical */
189 sec_con_val = SMI_SECUR_CON_VAL_VIRT(m4u_port_id);
191 /* do not need to enable m4u for this port */
194 reg_val = readl(common->smi_ao_base
195 + REG_SMI_SECUR_CON_ADDR(m4u_port_id));
196 reg_val &= SMI_SECUR_CON_VAL_MSK(m4u_port_id);
197 reg_val |= sec_con_val;
198 reg_val |= SMI_SECUR_CON_VAL_DOMAIN(m4u_port_id);
201 + REG_SMI_SECUR_CON_ADDR(m4u_port_id));
206 mtk_smi_larb_unbind(struct device *dev, struct device *master, void *data)
208 /* Do nothing as the iommu is always enabled. */
211 static const struct component_ops mtk_smi_larb_component_ops = {
212 .bind = mtk_smi_larb_bind,
213 .unbind = mtk_smi_larb_unbind,
216 static const struct mtk_smi_larb_gen mtk_smi_larb_mt8173 = {
217 /* mt8173 do not need the port in larb */
218 .config_port = mtk_smi_larb_config_port_mt8173,
221 static const struct mtk_smi_larb_gen mtk_smi_larb_mt8167 = {
222 /* mt8167 do not need the port in larb */
223 .config_port = mtk_smi_larb_config_port_mt8167,
226 static const struct mtk_smi_larb_gen mtk_smi_larb_mt2701 = {
228 LARB0_PORT_OFFSET, LARB1_PORT_OFFSET,
229 LARB2_PORT_OFFSET, LARB3_PORT_OFFSET
231 .config_port = mtk_smi_larb_config_port_gen1,
234 static const struct mtk_smi_larb_gen mtk_smi_larb_mt2712 = {
235 .config_port = mtk_smi_larb_config_port_gen2_general,
236 .larb_direct_to_common_mask = BIT(8) | BIT(9), /* bdpsys */
239 static const struct mtk_smi_larb_gen mtk_smi_larb_mt6779 = {
240 .config_port = mtk_smi_larb_config_port_gen2_general,
241 .larb_direct_to_common_mask =
242 BIT(4) | BIT(6) | BIT(11) | BIT(12) | BIT(13),
243 /* DUMMY | IPU0 | IPU1 | CCU | MDLA */
246 static const struct mtk_smi_larb_gen mtk_smi_larb_mt8183 = {
247 .config_port = mtk_smi_larb_config_port_gen2_general,
248 .larb_direct_to_common_mask = BIT(2) | BIT(3) | BIT(7),
249 /* IPU0 | IPU1 | CCU */
252 static const struct mtk_smi_larb_gen mtk_smi_larb_mt8192 = {
253 .config_port = mtk_smi_larb_config_port_gen2_general,
256 static const struct of_device_id mtk_smi_larb_of_ids[] = {
258 .compatible = "mediatek,mt8167-smi-larb",
259 .data = &mtk_smi_larb_mt8167
262 .compatible = "mediatek,mt8173-smi-larb",
263 .data = &mtk_smi_larb_mt8173
266 .compatible = "mediatek,mt2701-smi-larb",
267 .data = &mtk_smi_larb_mt2701
270 .compatible = "mediatek,mt2712-smi-larb",
271 .data = &mtk_smi_larb_mt2712
274 .compatible = "mediatek,mt6779-smi-larb",
275 .data = &mtk_smi_larb_mt6779
278 .compatible = "mediatek,mt8183-smi-larb",
279 .data = &mtk_smi_larb_mt8183
282 .compatible = "mediatek,mt8192-smi-larb",
283 .data = &mtk_smi_larb_mt8192
288 static int mtk_smi_dts_clk_init(struct device *dev, struct mtk_smi *smi,
289 const char * const clks[],
290 unsigned int clk_nr_required,
291 unsigned int clk_nr_optional)
295 for (i = 0; i < clk_nr_required; i++)
296 smi->clks[i].id = clks[i];
297 ret = devm_clk_bulk_get(dev, clk_nr_required, smi->clks);
301 for (i = clk_nr_required; i < clk_nr_required + clk_nr_optional; i++)
302 smi->clks[i].id = clks[i];
303 ret = devm_clk_bulk_get_optional(dev, clk_nr_optional,
304 smi->clks + clk_nr_required);
305 smi->clk_num = clk_nr_required + clk_nr_optional;
309 static int mtk_smi_larb_probe(struct platform_device *pdev)
311 struct mtk_smi_larb *larb;
312 struct resource *res;
313 struct device *dev = &pdev->dev;
314 struct device_node *smi_node;
315 struct platform_device *smi_pdev;
316 struct device_link *link;
319 larb = devm_kzalloc(dev, sizeof(*larb), GFP_KERNEL);
323 larb->larb_gen = of_device_get_match_data(dev);
324 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
325 larb->base = devm_ioremap_resource(dev, res);
326 if (IS_ERR(larb->base))
327 return PTR_ERR(larb->base);
329 ret = mtk_smi_dts_clk_init(dev, &larb->smi, mtk_smi_larb_clks,
330 MTK_SMI_LARB_REQ_CLK_NR, MTK_SMI_LARB_OPT_CLK_NR);
335 smi_node = of_parse_phandle(dev->of_node, "mediatek,smi", 0);
339 smi_pdev = of_find_device_by_node(smi_node);
340 of_node_put(smi_node);
342 if (!platform_get_drvdata(smi_pdev))
343 return -EPROBE_DEFER;
344 larb->smi_common_dev = &smi_pdev->dev;
345 link = device_link_add(dev, larb->smi_common_dev,
346 DL_FLAG_PM_RUNTIME | DL_FLAG_STATELESS);
348 dev_err(dev, "Unable to link smi-common dev\n");
352 dev_err(dev, "Failed to get the smi_common device\n");
356 pm_runtime_enable(dev);
357 platform_set_drvdata(pdev, larb);
358 return component_add(dev, &mtk_smi_larb_component_ops);
361 static int mtk_smi_larb_remove(struct platform_device *pdev)
363 struct mtk_smi_larb *larb = platform_get_drvdata(pdev);
365 device_link_remove(&pdev->dev, larb->smi_common_dev);
366 pm_runtime_disable(&pdev->dev);
367 component_del(&pdev->dev, &mtk_smi_larb_component_ops);
371 static int __maybe_unused mtk_smi_larb_resume(struct device *dev)
373 struct mtk_smi_larb *larb = dev_get_drvdata(dev);
374 const struct mtk_smi_larb_gen *larb_gen = larb->larb_gen;
377 ret = clk_bulk_prepare_enable(larb->smi.clk_num, larb->smi.clks);
381 /* Configure the basic setting for this larb */
382 larb_gen->config_port(dev);
387 static int __maybe_unused mtk_smi_larb_suspend(struct device *dev)
389 struct mtk_smi_larb *larb = dev_get_drvdata(dev);
391 clk_bulk_disable_unprepare(larb->smi.clk_num, larb->smi.clks);
395 static const struct dev_pm_ops smi_larb_pm_ops = {
396 SET_RUNTIME_PM_OPS(mtk_smi_larb_suspend, mtk_smi_larb_resume, NULL)
397 SET_LATE_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
398 pm_runtime_force_resume)
401 static struct platform_driver mtk_smi_larb_driver = {
402 .probe = mtk_smi_larb_probe,
403 .remove = mtk_smi_larb_remove,
405 .name = "mtk-smi-larb",
406 .of_match_table = mtk_smi_larb_of_ids,
407 .pm = &smi_larb_pm_ops,
411 static const struct mtk_smi_common_plat mtk_smi_common_gen1 = {
415 static const struct mtk_smi_common_plat mtk_smi_common_gen2 = {
419 static const struct mtk_smi_common_plat mtk_smi_common_mt6779 = {
422 .bus_sel = F_MMU1_LARB(1) | F_MMU1_LARB(2) | F_MMU1_LARB(4) |
423 F_MMU1_LARB(5) | F_MMU1_LARB(6) | F_MMU1_LARB(7),
426 static const struct mtk_smi_common_plat mtk_smi_common_mt8183 = {
429 .bus_sel = F_MMU1_LARB(1) | F_MMU1_LARB(2) | F_MMU1_LARB(5) |
433 static const struct mtk_smi_common_plat mtk_smi_common_mt8192 = {
436 .bus_sel = F_MMU1_LARB(1) | F_MMU1_LARB(2) | F_MMU1_LARB(5) |
440 static const struct of_device_id mtk_smi_common_of_ids[] = {
442 .compatible = "mediatek,mt8173-smi-common",
443 .data = &mtk_smi_common_gen2,
446 .compatible = "mediatek,mt8167-smi-common",
447 .data = &mtk_smi_common_gen2,
450 .compatible = "mediatek,mt2701-smi-common",
451 .data = &mtk_smi_common_gen1,
454 .compatible = "mediatek,mt2712-smi-common",
455 .data = &mtk_smi_common_gen2,
458 .compatible = "mediatek,mt6779-smi-common",
459 .data = &mtk_smi_common_mt6779,
462 .compatible = "mediatek,mt8183-smi-common",
463 .data = &mtk_smi_common_mt8183,
466 .compatible = "mediatek,mt8192-smi-common",
467 .data = &mtk_smi_common_mt8192,
472 static int mtk_smi_common_probe(struct platform_device *pdev)
474 struct device *dev = &pdev->dev;
475 struct mtk_smi *common;
476 struct resource *res;
477 int ret, clk_required = MTK_SMI_COM_REQ_CLK_NR;
479 common = devm_kzalloc(dev, sizeof(*common), GFP_KERNEL);
483 common->plat = of_device_get_match_data(dev);
485 if (common->plat->has_gals)
486 clk_required = MTK_SMI_COM_GALS_REQ_CLK_NR;
487 ret = mtk_smi_dts_clk_init(dev, common, mtk_smi_common_clks, clk_required, 0);
492 * for mtk smi gen 1, we need to get the ao(always on) base to config
493 * m4u port, and we need to enable the aync clock for transform the smi
494 * clock into emi clock domain, but for mtk smi gen2, there's no smi ao
497 if (common->plat->gen == MTK_SMI_GEN1) {
498 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
499 common->smi_ao_base = devm_ioremap_resource(dev, res);
500 if (IS_ERR(common->smi_ao_base))
501 return PTR_ERR(common->smi_ao_base);
503 common->clk_async = devm_clk_get(dev, "async");
504 if (IS_ERR(common->clk_async))
505 return PTR_ERR(common->clk_async);
507 ret = clk_prepare_enable(common->clk_async);
511 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
512 common->base = devm_ioremap_resource(dev, res);
513 if (IS_ERR(common->base))
514 return PTR_ERR(common->base);
516 pm_runtime_enable(dev);
517 platform_set_drvdata(pdev, common);
521 static int mtk_smi_common_remove(struct platform_device *pdev)
523 pm_runtime_disable(&pdev->dev);
527 static int __maybe_unused mtk_smi_common_resume(struct device *dev)
529 struct mtk_smi *common = dev_get_drvdata(dev);
530 u32 bus_sel = common->plat->bus_sel;
533 ret = clk_bulk_prepare_enable(common->clk_num, common->clks);
537 if (common->plat->gen == MTK_SMI_GEN2 && bus_sel)
538 writel(bus_sel, common->base + SMI_BUS_SEL);
542 static int __maybe_unused mtk_smi_common_suspend(struct device *dev)
544 struct mtk_smi *common = dev_get_drvdata(dev);
546 clk_bulk_disable_unprepare(common->clk_num, common->clks);
550 static const struct dev_pm_ops smi_common_pm_ops = {
551 SET_RUNTIME_PM_OPS(mtk_smi_common_suspend, mtk_smi_common_resume, NULL)
552 SET_LATE_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
553 pm_runtime_force_resume)
556 static struct platform_driver mtk_smi_common_driver = {
557 .probe = mtk_smi_common_probe,
558 .remove = mtk_smi_common_remove,
560 .name = "mtk-smi-common",
561 .of_match_table = mtk_smi_common_of_ids,
562 .pm = &smi_common_pm_ops,
566 static struct platform_driver * const smidrivers[] = {
567 &mtk_smi_common_driver,
568 &mtk_smi_larb_driver,
571 static int __init mtk_smi_init(void)
573 return platform_register_drivers(smidrivers, ARRAY_SIZE(smidrivers));
575 module_init(mtk_smi_init);
577 static void __exit mtk_smi_exit(void)
579 platform_unregister_drivers(smidrivers, ARRAY_SIZE(smidrivers));
581 module_exit(mtk_smi_exit);
583 MODULE_DESCRIPTION("MediaTek SMI driver");
584 MODULE_LICENSE("GPL v2");