2 * saa7114 - Philips SAA7114H video decoder driver version 0.0.1
4 * Copyright (C) 2002 Maxim Yevtyushkin <max@linuxmedialabs.com>
6 * Based on saa7111 driver by Dave Perks
8 * Copyright (C) 1998 Dave Perks <dperks@ibm.net>
10 * Slight changes for video timing and attachment output by
11 * Wolfgang Scherr <scherr@net4you.net>
13 * Changes by Ronald Bultje <rbultje@ronald.bitfreak.net>
14 * - moved over to linux>=2.4.x i2c protocol (1/1/2003)
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License as published by
18 * the Free Software Foundation; either version 2 of the License, or
19 * (at your option) any later version.
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software
28 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/delay.h>
34 #include <linux/errno.h>
36 #include <linux/kernel.h>
37 #include <linux/major.h>
39 #include <linux/slab.h>
42 #include <linux/pci.h>
43 #include <linux/signal.h>
45 #include <asm/pgtable.h>
47 #include <linux/sched.h>
48 #include <linux/types.h>
50 #include <linux/videodev.h>
51 #include <asm/uaccess.h>
53 MODULE_DESCRIPTION("Philips SAA7114H video decoder driver");
54 MODULE_AUTHOR("Maxim Yevtyushkin");
55 MODULE_LICENSE("GPL");
57 #include <linux/i2c.h>
58 #include <linux/i2c-dev.h>
60 #define I2C_NAME(x) (x)->name
62 #include <linux/video_decoder.h>
65 module_param(debug, int, 0);
66 MODULE_PARM_DESC(debug, "Debug level (0-1)");
68 #define dprintk(num, format, args...) \
71 printk(format, ##args); \
74 /* ----------------------------------------------------------------------- */
77 unsigned char reg[0xf0 * 2];
89 #define I2C_SAA7114 0x42
90 #define I2C_SAA7114A 0x40
95 //#define SAA_7114_NTSC_HSYNC_START (-3)
96 //#define SAA_7114_NTSC_HSYNC_STOP (-18)
98 #define SAA_7114_NTSC_HSYNC_START (-17)
99 #define SAA_7114_NTSC_HSYNC_STOP (-32)
101 //#define SAA_7114_NTSC_HOFFSET (5)
102 #define SAA_7114_NTSC_HOFFSET (6)
103 #define SAA_7114_NTSC_VOFFSET (10)
104 #define SAA_7114_NTSC_WIDTH (720)
105 #define SAA_7114_NTSC_HEIGHT (250)
107 #define SAA_7114_SECAM_HSYNC_START (-17)
108 #define SAA_7114_SECAM_HSYNC_STOP (-32)
110 #define SAA_7114_SECAM_HOFFSET (2)
111 #define SAA_7114_SECAM_VOFFSET (10)
112 #define SAA_7114_SECAM_WIDTH (720)
113 #define SAA_7114_SECAM_HEIGHT (300)
115 #define SAA_7114_PAL_HSYNC_START (-17)
116 #define SAA_7114_PAL_HSYNC_STOP (-32)
118 #define SAA_7114_PAL_HOFFSET (2)
119 #define SAA_7114_PAL_VOFFSET (10)
120 #define SAA_7114_PAL_WIDTH (720)
121 #define SAA_7114_PAL_HEIGHT (300)
125 #define SAA_7114_VERTICAL_CHROMA_OFFSET 0 //0x50504040
126 #define SAA_7114_VERTICAL_LUMA_OFFSET 0
128 #define REG_ADDR(x) (((x) << 1) + 1)
129 #define LOBYTE(x) ((unsigned char)((x) & 0xff))
130 #define HIBYTE(x) ((unsigned char)(((x) >> 8) & 0xff))
131 #define LOWORD(x) ((unsigned short int)((x) & 0xffff))
132 #define HIWORD(x) ((unsigned short int)(((x) >> 16) & 0xffff))
135 /* ----------------------------------------------------------------------- */
138 saa7114_write (struct i2c_client *client,
142 /*struct saa7114 *decoder = i2c_get_clientdata(client);*/
144 /*decoder->reg[reg] = value;*/
145 return i2c_smbus_write_byte_data(client, reg, value);
149 saa7114_write_block (struct i2c_client *client,
156 /* the saa7114 has an autoincrement function, use it if
157 * the adapter understands raw I2C */
158 if (i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
159 /* do raw I2C, not smbus compatible */
160 /*struct saa7114 *decoder = i2c_get_clientdata(client);*/
164 msg.addr = client->addr;
167 msg.buf = (char *) block_data;
169 block_data[msg.len++] = reg = data[0];
171 block_data[msg.len++] =
172 /*decoder->reg[reg++] =*/ data[1];
175 } while (len >= 2 && data[0] == reg &&
177 if ((ret = i2c_transfer(client->adapter,
182 /* do some slow I2C emulation kind of thing */
185 if ((ret = saa7114_write(client, reg,
196 saa7114_read (struct i2c_client *client,
199 return i2c_smbus_read_byte_data(client, reg);
202 /* ----------------------------------------------------------------------- */
204 // initially set NTSC, composite
207 static const unsigned char init[] = {
208 0x00, 0x00, /* 00 - ID byte , chip version,
210 0x01, 0x08, /* 01 - X,X,X,X, IDEL3 to IDEL0 -
211 * horizontal increment delay,
212 * recommended position */
213 0x02, 0x00, /* 02 - FUSE=3, GUDL=2, MODE=0 ;
215 0x03, 0x10, /* 03 - HLNRS=0, VBSL=1, WPOFF=0,
216 * HOLDG=0, GAFIX=0, GAI1=256, GAI2=256 */
217 0x04, 0x90, /* 04 - GAI1=256 */
218 0x05, 0x90, /* 05 - GAI2=256 */
219 0x06, SAA_7114_NTSC_HSYNC_START, /* 06 - HSB: hsync start,
220 * depends on the video standard */
221 0x07, SAA_7114_NTSC_HSYNC_STOP, /* 07 - HSS: hsync stop, depends
222 *on the video standard */
223 0x08, 0xb8, /* 08 - AUFD=1, FSEL=1, EXFIL=0, VTRC=1,
224 * HPLL: free running in playback, locked
225 * in capture, VNOI=0 */
226 0x09, 0x80, /* 09 - BYPS=0, PREF=0, BPSS=0, VBLB=0,
227 * UPTCV=0, APER=1; depends from input */
228 0x0a, 0x80, /* 0a - BRIG=128 */
229 0x0b, 0x44, /* 0b - CONT=1.109 */
230 0x0c, 0x40, /* 0c - SATN=1.0 */
231 0x0d, 0x00, /* 0d - HUE=0 */
232 0x0e, 0x84, /* 0e - CDTO, CSTD2 to 0, DCVF, FCTC,
233 * CCOMB; depends from video standard */
234 0x0f, 0x24, /* 0f - ACGC,CGAIN6 to CGAIN0; depends
235 * from video standard */
236 0x10, 0x03, /* 10 - OFFU1 to 0, OFFV1 to 0, CHBW,
238 0x11, 0x59, /* 11 - COLO, RTP1, HEDL1 to 0, RTP0,
240 0x12, 0xc9, /* 12 - RT signal control RTSE13 to 10
242 0x13, 0x80, /* 13 - RT/X port output control */
243 0x14, 0x00, /* 14 - analog, ADC, compatibility control */
244 0x15, 0x00, /* 15 - VGATE start FID change */
245 0x16, 0xfe, /* 16 - VGATE stop */
246 0x17, 0x00, /* 17 - Misc., VGATE MSBs */
247 0x18, 0x40, /* RAWG */
248 0x19, 0x80, /* RAWO */
254 0x1f, 0x00, /* status byte, read only */
255 0x20, 0x00, /* video decoder reserved part */
271 0x30, 0xbc, /* audio clock generator */
287 0x40, 0x00, /* VBI data slicer */
311 0x58, 0x40, // framing code
312 0x59, 0x47, // horizontal offset
313 0x5a, 0x06, // vertical offset
314 0x5b, 0x83, // field offset
315 0x5c, 0x00, // reserved
316 0x5d, 0x3e, // header and data
317 0x5e, 0x00, // sliced data
318 0x5f, 0x00, // reserved
319 0x60, 0x00, /* video decoder reserved part */
335 0x70, 0x00, /* video decoder reserved part */
351 0x80, 0x00, /* X-port, I-port and scaler */
356 0x85, 0x0d, // hsync and vsync ?
367 0x90, 0x03, /* Task A definition */
371 0x94, 0x00, // window settings
383 0xa0, 0x01, /* horizontal integer prescaling ratio */
384 0xa1, 0x00, /* horizontal prescaler accumulation
386 0xa2, 0x00, /* UV FIR filter, Y FIR filter, prescaler
389 0xa4, 0x80, // luminance brightness
390 0xa5, 0x40, // luminance gain
391 0xa6, 0x40, // chrominance saturation
393 0xa8, 0x00, // horizontal luminance scaling increment
395 0xaa, 0x00, // horizontal luminance phase offset
397 0xac, 0x00, // horizontal chrominance scaling increment
399 0xae, 0x00, // horizontal chrominance phase offset
401 0xb0, 0x00, // vertical luminance scaling increment
403 0xb2, 0x00, // vertical chrominance scaling increment
417 0xc0, 0x02, // Task B definition
421 0xc4, 0x00, // window settings
433 0xd0, 0x01, // horizontal integer prescaling ratio
434 0xd1, 0x00, // horizontal prescaler accumulation sequence length
435 0xd2, 0x00, // UV FIR filter, Y FIR filter, prescaler DC gain
437 0xd4, 0x80, // luminance brightness
438 0xd5, 0x40, // luminance gain
439 0xd6, 0x40, // chrominance saturation
441 0xd8, 0x00, // horizontal luminance scaling increment
443 0xda, 0x00, // horizontal luminance phase offset
445 0xdc, 0x00, // horizontal chrominance scaling increment
447 0xde, 0x00, // horizontal chrominance phase offset
449 0xe0, 0x00, // vertical luminance scaling increment
451 0xe2, 0x00, // vertical chrominance scaling increment
468 saa7114_command (struct i2c_client *client,
472 struct saa7114 *decoder = i2c_get_clientdata(client);
477 //dprintk(1, KERN_INFO "%s: writing init\n", I2C_NAME(client));
478 //saa7114_write_block(client, init, sizeof(init));
485 dprintk(1, KERN_INFO "%s: decoder dump\n", I2C_NAME(client));
487 for (i = 0; i < 32; i += 16) {
490 printk(KERN_DEBUG "%s: %03x", I2C_NAME(client), i);
491 for (j = 0; j < 16; ++j) {
493 saa7114_read(client, i + j));
500 case DECODER_GET_CAPABILITIES:
502 struct video_decoder_capability *cap = arg;
504 dprintk(1, KERN_DEBUG "%s: decoder get capabilities\n",
507 cap->flags = VIDEO_DECODER_PAL |
516 case DECODER_GET_STATUS:
522 status = saa7114_read(client, 0x1f);
524 dprintk(1, KERN_DEBUG "%s status: 0x%02x\n", I2C_NAME(client),
527 if ((status & (1 << 6)) == 0) {
528 res |= DECODER_STATUS_GOOD;
530 switch (decoder->norm) {
531 case VIDEO_MODE_NTSC:
532 res |= DECODER_STATUS_NTSC;
535 res |= DECODER_STATUS_PAL;
537 case VIDEO_MODE_SECAM:
538 res |= DECODER_STATUS_SECAM;
541 case VIDEO_MODE_AUTO:
542 if ((status & (1 << 5)) != 0) {
543 res |= DECODER_STATUS_NTSC;
545 res |= DECODER_STATUS_PAL;
549 if ((status & (1 << 0)) != 0) {
550 res |= DECODER_STATUS_COLOR;
556 case DECODER_SET_NORM:
560 short int hoff = 0, voff = 0, w = 0, h = 0;
562 dprintk(1, KERN_DEBUG "%s: decoder set norm ",
566 case VIDEO_MODE_NTSC:
567 dprintk(1, "NTSC\n");
568 decoder->reg[REG_ADDR(0x06)] =
569 SAA_7114_NTSC_HSYNC_START;
570 decoder->reg[REG_ADDR(0x07)] =
571 SAA_7114_NTSC_HSYNC_STOP;
573 decoder->reg[REG_ADDR(0x08)] = decoder->playback ? 0x7c : 0xb8; // PLL free when playback, PLL close when capture
575 decoder->reg[REG_ADDR(0x0e)] = 0x85;
576 decoder->reg[REG_ADDR(0x0f)] = 0x24;
578 hoff = SAA_7114_NTSC_HOFFSET;
579 voff = SAA_7114_NTSC_VOFFSET;
580 w = SAA_7114_NTSC_WIDTH;
581 h = SAA_7114_NTSC_HEIGHT;
587 decoder->reg[REG_ADDR(0x06)] =
588 SAA_7114_PAL_HSYNC_START;
589 decoder->reg[REG_ADDR(0x07)] =
590 SAA_7114_PAL_HSYNC_STOP;
592 decoder->reg[REG_ADDR(0x08)] = decoder->playback ? 0x7c : 0xb8; // PLL free when playback, PLL close when capture
594 decoder->reg[REG_ADDR(0x0e)] = 0x81;
595 decoder->reg[REG_ADDR(0x0f)] = 0x24;
597 hoff = SAA_7114_PAL_HOFFSET;
598 voff = SAA_7114_PAL_VOFFSET;
599 w = SAA_7114_PAL_WIDTH;
600 h = SAA_7114_PAL_HEIGHT;
605 dprintk(1, " Unknown video mode!!!\n");
611 decoder->reg[REG_ADDR(0x94)] = LOBYTE(hoff); // hoffset low
612 decoder->reg[REG_ADDR(0x95)] = HIBYTE(hoff) & 0x0f; // hoffset high
613 decoder->reg[REG_ADDR(0x96)] = LOBYTE(w); // width low
614 decoder->reg[REG_ADDR(0x97)] = HIBYTE(w) & 0x0f; // width high
615 decoder->reg[REG_ADDR(0x98)] = LOBYTE(voff); // voffset low
616 decoder->reg[REG_ADDR(0x99)] = HIBYTE(voff) & 0x0f; // voffset high
617 decoder->reg[REG_ADDR(0x9a)] = LOBYTE(h + 2); // height low
618 decoder->reg[REG_ADDR(0x9b)] = HIBYTE(h + 2) & 0x0f; // height high
619 decoder->reg[REG_ADDR(0x9c)] = LOBYTE(w); // out width low
620 decoder->reg[REG_ADDR(0x9d)] = HIBYTE(w) & 0x0f; // out width high
621 decoder->reg[REG_ADDR(0x9e)] = LOBYTE(h); // out height low
622 decoder->reg[REG_ADDR(0x9f)] = HIBYTE(h) & 0x0f; // out height high
624 decoder->reg[REG_ADDR(0xc4)] = LOBYTE(hoff); // hoffset low
625 decoder->reg[REG_ADDR(0xc5)] = HIBYTE(hoff) & 0x0f; // hoffset high
626 decoder->reg[REG_ADDR(0xc6)] = LOBYTE(w); // width low
627 decoder->reg[REG_ADDR(0xc7)] = HIBYTE(w) & 0x0f; // width high
628 decoder->reg[REG_ADDR(0xc8)] = LOBYTE(voff); // voffset low
629 decoder->reg[REG_ADDR(0xc9)] = HIBYTE(voff) & 0x0f; // voffset high
630 decoder->reg[REG_ADDR(0xca)] = LOBYTE(h + 2); // height low
631 decoder->reg[REG_ADDR(0xcb)] = HIBYTE(h + 2) & 0x0f; // height high
632 decoder->reg[REG_ADDR(0xcc)] = LOBYTE(w); // out width low
633 decoder->reg[REG_ADDR(0xcd)] = HIBYTE(w) & 0x0f; // out width high
634 decoder->reg[REG_ADDR(0xce)] = LOBYTE(h); // out height low
635 decoder->reg[REG_ADDR(0xcf)] = HIBYTE(h) & 0x0f; // out height high
638 saa7114_write(client, 0x80, 0x06); // i-port and scaler back end clock selection, task A&B off
639 saa7114_write(client, 0x88, 0xd8); // sw reset scaler
640 saa7114_write(client, 0x88, 0xf8); // sw reset scaler release
642 saa7114_write_block(client, decoder->reg + (0x06 << 1),
644 saa7114_write_block(client, decoder->reg + (0x0e << 1),
646 saa7114_write_block(client, decoder->reg + (0x5a << 1),
649 saa7114_write_block(client, decoder->reg + (0x94 << 1),
650 (0x9f + 1 - 0x94) << 1);
651 saa7114_write_block(client, decoder->reg + (0xc4 << 1),
652 (0xcf + 1 - 0xc4) << 1);
654 saa7114_write(client, 0x88, 0xd8); // sw reset scaler
655 saa7114_write(client, 0x88, 0xf8); // sw reset scaler release
656 saa7114_write(client, 0x80, 0x36); // i-port and scaler back end clock selection
658 decoder->norm = *iarg;
662 case DECODER_SET_INPUT:
666 dprintk(1, KERN_DEBUG "%s: decoder set input (%d)\n",
667 I2C_NAME(client), *iarg);
668 if (*iarg < 0 || *iarg > 7) {
672 if (decoder->input != *iarg) {
673 dprintk(1, KERN_DEBUG "%s: now setting %s input\n",
675 *iarg >= 6 ? "S-Video" : "Composite");
676 decoder->input = *iarg;
679 decoder->reg[REG_ADDR(0x02)] =
681 reg[REG_ADDR(0x02)] & 0xf0) | (decoder->
684 saa7114_write(client, 0x02,
685 decoder->reg[REG_ADDR(0x02)]);
687 /* bypass chrominance trap for modes 6..9 */
688 decoder->reg[REG_ADDR(0x09)] =
690 reg[REG_ADDR(0x09)] & 0x7f) | (decoder->
694 saa7114_write(client, 0x09,
695 decoder->reg[REG_ADDR(0x09)]);
697 decoder->reg[REG_ADDR(0x0e)] =
700 reg[REG_ADDR(0x0e)] | 1 : decoder->
701 reg[REG_ADDR(0x0e)] & ~1;
702 saa7114_write(client, 0x0e,
703 decoder->reg[REG_ADDR(0x0e)]);
708 case DECODER_SET_OUTPUT:
712 dprintk(1, KERN_DEBUG "%s: decoder set output\n",
715 /* not much choice of outputs */
722 case DECODER_ENABLE_OUTPUT:
725 int enable = (*iarg != 0);
727 dprintk(1, KERN_DEBUG "%s: decoder %s output\n",
728 I2C_NAME(client), enable ? "enable" : "disable");
730 decoder->playback = !enable;
732 if (decoder->enable != enable) {
733 decoder->enable = enable;
735 /* RJ: If output should be disabled (for
736 * playing videos), we also need a open PLL.
737 * The input is set to 0 (where no input
738 * source is connected), although this
741 * If output should be enabled, we have to
745 if (decoder->enable) {
746 decoder->reg[REG_ADDR(0x08)] = 0xb8;
747 decoder->reg[REG_ADDR(0x12)] = 0xc9;
748 decoder->reg[REG_ADDR(0x13)] = 0x80;
749 decoder->reg[REG_ADDR(0x87)] = 0x01;
751 decoder->reg[REG_ADDR(0x08)] = 0x7c;
752 decoder->reg[REG_ADDR(0x12)] = 0x00;
753 decoder->reg[REG_ADDR(0x13)] = 0x00;
754 decoder->reg[REG_ADDR(0x87)] = 0x00;
757 saa7114_write_block(client,
758 decoder->reg + (0x12 << 1),
760 saa7114_write(client, 0x08,
761 decoder->reg[REG_ADDR(0x08)]);
762 saa7114_write(client, 0x87,
763 decoder->reg[REG_ADDR(0x87)]);
764 saa7114_write(client, 0x88, 0xd8); // sw reset scaler
765 saa7114_write(client, 0x88, 0xf8); // sw reset scaler release
766 saa7114_write(client, 0x80, 0x36);
772 case DECODER_SET_PICTURE:
774 struct video_picture *pic = arg;
778 "%s: decoder set picture bright=%d contrast=%d saturation=%d hue=%d\n",
779 I2C_NAME(client), pic->brightness, pic->contrast,
780 pic->colour, pic->hue);
782 if (decoder->bright != pic->brightness) {
783 /* We want 0 to 255 we get 0-65535 */
784 decoder->bright = pic->brightness;
785 saa7114_write(client, 0x0a, decoder->bright >> 8);
787 if (decoder->contrast != pic->contrast) {
788 /* We want 0 to 127 we get 0-65535 */
789 decoder->contrast = pic->contrast;
790 saa7114_write(client, 0x0b,
791 decoder->contrast >> 9);
793 if (decoder->sat != pic->colour) {
794 /* We want 0 to 127 we get 0-65535 */
795 decoder->sat = pic->colour;
796 saa7114_write(client, 0x0c, decoder->sat >> 9);
798 if (decoder->hue != pic->hue) {
799 /* We want -128 to 127 we get 0-65535 */
800 decoder->hue = pic->hue;
801 saa7114_write(client, 0x0d,
802 (decoder->hue - 32768) >> 8);
814 /* ----------------------------------------------------------------------- */
818 * concerning the addresses: i2c wants 7 bit (without the r/w bit), so '>>1'
820 static unsigned short normal_i2c[] =
821 { I2C_SAA7114 >> 1, I2C_SAA7114A >> 1, I2C_CLIENT_END };
823 static unsigned short ignore = I2C_CLIENT_END;
825 static struct i2c_client_address_data addr_data = {
826 .normal_i2c = normal_i2c,
831 static struct i2c_driver i2c_driver_saa7114;
834 saa7114_detect_client (struct i2c_adapter *adapter,
839 short int hoff = SAA_7114_NTSC_HOFFSET;
840 short int voff = SAA_7114_NTSC_VOFFSET;
841 short int w = SAA_7114_NTSC_WIDTH;
842 short int h = SAA_7114_NTSC_HEIGHT;
843 struct i2c_client *client;
844 struct saa7114 *decoder;
848 "saa7114.c: detecting saa7114 client on address 0x%x\n",
851 /* Check if the adapter supports the needed features */
852 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
855 client = kmalloc(sizeof(struct i2c_client), GFP_KERNEL);
858 memset(client, 0, sizeof(struct i2c_client));
859 client->addr = address;
860 client->adapter = adapter;
861 client->driver = &i2c_driver_saa7114;
862 strlcpy(I2C_NAME(client), "saa7114", sizeof(I2C_NAME(client)));
864 decoder = kmalloc(sizeof(struct saa7114), GFP_KERNEL);
865 if (decoder == NULL) {
869 memset(decoder, 0, sizeof(struct saa7114));
870 decoder->norm = VIDEO_MODE_NTSC;
873 decoder->bright = 32768;
874 decoder->contrast = 32768;
875 decoder->hue = 32768;
876 decoder->sat = 32768;
877 decoder->playback = 0; // initially capture mode useda
878 i2c_set_clientdata(client, decoder);
880 memcpy(decoder->reg, init, sizeof(init));
882 decoder->reg[REG_ADDR(0x94)] = LOBYTE(hoff); // hoffset low
883 decoder->reg[REG_ADDR(0x95)] = HIBYTE(hoff) & 0x0f; // hoffset high
884 decoder->reg[REG_ADDR(0x96)] = LOBYTE(w); // width low
885 decoder->reg[REG_ADDR(0x97)] = HIBYTE(w) & 0x0f; // width high
886 decoder->reg[REG_ADDR(0x98)] = LOBYTE(voff); // voffset low
887 decoder->reg[REG_ADDR(0x99)] = HIBYTE(voff) & 0x0f; // voffset high
888 decoder->reg[REG_ADDR(0x9a)] = LOBYTE(h + 2); // height low
889 decoder->reg[REG_ADDR(0x9b)] = HIBYTE(h + 2) & 0x0f; // height high
890 decoder->reg[REG_ADDR(0x9c)] = LOBYTE(w); // out width low
891 decoder->reg[REG_ADDR(0x9d)] = HIBYTE(w) & 0x0f; // out width high
892 decoder->reg[REG_ADDR(0x9e)] = LOBYTE(h); // out height low
893 decoder->reg[REG_ADDR(0x9f)] = HIBYTE(h) & 0x0f; // out height high
895 decoder->reg[REG_ADDR(0xc4)] = LOBYTE(hoff); // hoffset low
896 decoder->reg[REG_ADDR(0xc5)] = HIBYTE(hoff) & 0x0f; // hoffset high
897 decoder->reg[REG_ADDR(0xc6)] = LOBYTE(w); // width low
898 decoder->reg[REG_ADDR(0xc7)] = HIBYTE(w) & 0x0f; // width high
899 decoder->reg[REG_ADDR(0xc8)] = LOBYTE(voff); // voffset low
900 decoder->reg[REG_ADDR(0xc9)] = HIBYTE(voff) & 0x0f; // voffset high
901 decoder->reg[REG_ADDR(0xca)] = LOBYTE(h + 2); // height low
902 decoder->reg[REG_ADDR(0xcb)] = HIBYTE(h + 2) & 0x0f; // height high
903 decoder->reg[REG_ADDR(0xcc)] = LOBYTE(w); // out width low
904 decoder->reg[REG_ADDR(0xcd)] = HIBYTE(w) & 0x0f; // out width high
905 decoder->reg[REG_ADDR(0xce)] = LOBYTE(h); // out height low
906 decoder->reg[REG_ADDR(0xcf)] = HIBYTE(h) & 0x0f; // out height high
908 decoder->reg[REG_ADDR(0xb8)] =
909 LOBYTE(LOWORD(SAA_7114_VERTICAL_CHROMA_OFFSET));
910 decoder->reg[REG_ADDR(0xb9)] =
911 HIBYTE(LOWORD(SAA_7114_VERTICAL_CHROMA_OFFSET));
912 decoder->reg[REG_ADDR(0xba)] =
913 LOBYTE(HIWORD(SAA_7114_VERTICAL_CHROMA_OFFSET));
914 decoder->reg[REG_ADDR(0xbb)] =
915 HIBYTE(HIWORD(SAA_7114_VERTICAL_CHROMA_OFFSET));
917 decoder->reg[REG_ADDR(0xbc)] =
918 LOBYTE(LOWORD(SAA_7114_VERTICAL_LUMA_OFFSET));
919 decoder->reg[REG_ADDR(0xbd)] =
920 HIBYTE(LOWORD(SAA_7114_VERTICAL_LUMA_OFFSET));
921 decoder->reg[REG_ADDR(0xbe)] =
922 LOBYTE(HIWORD(SAA_7114_VERTICAL_LUMA_OFFSET));
923 decoder->reg[REG_ADDR(0xbf)] =
924 HIBYTE(HIWORD(SAA_7114_VERTICAL_LUMA_OFFSET));
926 decoder->reg[REG_ADDR(0xe8)] =
927 LOBYTE(LOWORD(SAA_7114_VERTICAL_CHROMA_OFFSET));
928 decoder->reg[REG_ADDR(0xe9)] =
929 HIBYTE(LOWORD(SAA_7114_VERTICAL_CHROMA_OFFSET));
930 decoder->reg[REG_ADDR(0xea)] =
931 LOBYTE(HIWORD(SAA_7114_VERTICAL_CHROMA_OFFSET));
932 decoder->reg[REG_ADDR(0xeb)] =
933 HIBYTE(HIWORD(SAA_7114_VERTICAL_CHROMA_OFFSET));
935 decoder->reg[REG_ADDR(0xec)] =
936 LOBYTE(LOWORD(SAA_7114_VERTICAL_LUMA_OFFSET));
937 decoder->reg[REG_ADDR(0xed)] =
938 HIBYTE(LOWORD(SAA_7114_VERTICAL_LUMA_OFFSET));
939 decoder->reg[REG_ADDR(0xee)] =
940 LOBYTE(HIWORD(SAA_7114_VERTICAL_LUMA_OFFSET));
941 decoder->reg[REG_ADDR(0xef)] =
942 HIBYTE(HIWORD(SAA_7114_VERTICAL_LUMA_OFFSET));
945 decoder->reg[REG_ADDR(0x13)] = 0x80; // RTC0 on
946 decoder->reg[REG_ADDR(0x87)] = 0x01; // I-Port
947 decoder->reg[REG_ADDR(0x12)] = 0xc9; // RTS0
949 decoder->reg[REG_ADDR(0x02)] = 0xc0; // set composite1 input, aveasy
950 decoder->reg[REG_ADDR(0x09)] = 0x00; // chrominance trap
951 decoder->reg[REG_ADDR(0x0e)] |= 1; // combfilter on
954 dprintk(1, KERN_DEBUG "%s_attach: starting decoder init\n",
958 saa7114_write_block(client, decoder->reg + (0x20 << 1),
961 saa7114_write_block(client, decoder->reg + (0x30 << 1),
964 saa7114_write_block(client, decoder->reg + (0x63 << 1),
965 (0x7f + 1 - 0x63) << 1);
967 saa7114_write_block(client, decoder->reg + (0x89 << 1),
970 saa7114_write_block(client, decoder->reg + (0xb8 << 1),
973 saa7114_write_block(client, decoder->reg + (0xe8 << 1),
977 for (i = 0; i <= 5; i++) {
981 "%s_attach: init error %d at stage %d, leaving attach.\n",
982 I2C_NAME(client), i, err[i]);
989 for (i = 6; i < 8; i++) {
992 "%s_attach: reg[0x%02x] = 0x%02x (0x%02x)\n",
993 I2C_NAME(client), i, saa7114_read(client, i),
994 decoder->reg[REG_ADDR(i)]);
999 "%s_attach: performing decoder reset sequence\n",
1002 err[6] = saa7114_write(client, 0x80, 0x06); // i-port and scaler backend clock selection, task A&B off
1003 err[7] = saa7114_write(client, 0x88, 0xd8); // sw reset scaler
1004 err[8] = saa7114_write(client, 0x88, 0xf8); // sw reset scaler release
1006 for (i = 6; i <= 8; i++) {
1010 "%s_attach: init error %d at stage %d, leaving attach.\n",
1011 I2C_NAME(client), i, err[i]);
1018 dprintk(1, KERN_INFO "%s_attach: performing the rest of init\n",
1022 err[9] = saa7114_write(client, 0x01, decoder->reg[REG_ADDR(0x01)]);
1023 err[10] = saa7114_write_block(client, decoder->reg + (0x03 << 1), (0x1e + 1 - 0x03) << 1); // big seq
1024 err[11] = saa7114_write_block(client, decoder->reg + (0x40 << 1), (0x5f + 1 - 0x40) << 1); // slicer
1025 err[12] = saa7114_write_block(client, decoder->reg + (0x81 << 1), 2 << 1); // ?
1026 err[13] = saa7114_write_block(client, decoder->reg + (0x83 << 1), 5 << 1); // ?
1027 err[14] = saa7114_write_block(client, decoder->reg + (0x90 << 1), 4 << 1); // Task A
1029 saa7114_write_block(client, decoder->reg + (0x94 << 1),
1032 saa7114_write_block(client, decoder->reg + (0xa0 << 1),
1035 saa7114_write_block(client, decoder->reg + (0xa8 << 1),
1038 saa7114_write_block(client, decoder->reg + (0xb0 << 1),
1040 err[19] = saa7114_write_block(client, decoder->reg + (0xc0 << 1), 4 << 1); // Task B
1042 saa7114_write_block(client, decoder->reg + (0xc4 << 1),
1045 saa7114_write_block(client, decoder->reg + (0xd0 << 1),
1048 saa7114_write_block(client, decoder->reg + (0xd8 << 1),
1051 saa7114_write_block(client, decoder->reg + (0xe0 << 1),
1054 for (i = 9; i <= 18; i++) {
1058 "%s_attach: init error %d at stage %d, leaving attach.\n",
1059 I2C_NAME(client), i, err[i]);
1067 for (i = 6; i < 8; i++) {
1070 "%s_attach: reg[0x%02x] = 0x%02x (0x%02x)\n",
1071 I2C_NAME(client), i, saa7114_read(client, i),
1072 decoder->reg[REG_ADDR(i)]);
1076 for (i = 0x11; i <= 0x13; i++) {
1079 "%s_attach: reg[0x%02x] = 0x%02x (0x%02x)\n",
1080 I2C_NAME(client), i, saa7114_read(client, i),
1081 decoder->reg[REG_ADDR(i)]);
1085 dprintk(1, KERN_DEBUG "%s_attach: setting video input\n",
1089 saa7114_write(client, 0x02, decoder->reg[REG_ADDR(0x02)]);
1091 saa7114_write(client, 0x09, decoder->reg[REG_ADDR(0x09)]);
1093 saa7114_write(client, 0x0e, decoder->reg[REG_ADDR(0x0e)]);
1095 for (i = 19; i <= 21; i++) {
1099 "%s_attach: init error %d at stage %d, leaving attach.\n",
1100 I2C_NAME(client), i, err[i]);
1109 "%s_attach: performing decoder reset sequence\n",
1112 err[22] = saa7114_write(client, 0x88, 0xd8); // sw reset scaler
1113 err[23] = saa7114_write(client, 0x88, 0xf8); // sw reset scaler release
1114 err[24] = saa7114_write(client, 0x80, 0x36); // i-port and scaler backend clock selection, task A&B off
1117 for (i = 22; i <= 24; i++) {
1121 "%s_attach: init error %d at stage %d, leaving attach.\n",
1122 I2C_NAME(client), i, err[i]);
1129 err[25] = saa7114_write(client, 0x06, init[REG_ADDR(0x06)]);
1130 err[26] = saa7114_write(client, 0x07, init[REG_ADDR(0x07)]);
1131 err[27] = saa7114_write(client, 0x10, init[REG_ADDR(0x10)]);
1135 "%s_attach: chip version %x, decoder status 0x%02x\n",
1136 I2C_NAME(client), saa7114_read(client, 0x00) >> 4,
1137 saa7114_read(client, 0x1f));
1140 "%s_attach: power save control: 0x%02x, scaler status: 0x%02x\n",
1141 I2C_NAME(client), saa7114_read(client, 0x88),
1142 saa7114_read(client, 0x8f));
1145 for (i = 0x94; i < 0x96; i++) {
1148 "%s_attach: reg[0x%02x] = 0x%02x (0x%02x)\n",
1149 I2C_NAME(client), i, saa7114_read(client, i),
1150 decoder->reg[REG_ADDR(i)]);
1153 i = i2c_attach_client(client);
1160 //i = saa7114_write_block(client, init, sizeof(init));
1163 dprintk(1, KERN_ERR "%s_attach error: init status %d\n",
1164 I2C_NAME(client), i);
1168 "%s_attach: chip version %x at address 0x%x\n",
1169 I2C_NAME(client), saa7114_read(client, 0x00) >> 4,
1177 saa7114_attach_adapter (struct i2c_adapter *adapter)
1181 "saa7114.c: starting probe for adapter %s (0x%x)\n",
1182 I2C_NAME(adapter), adapter->id);
1183 return i2c_probe(adapter, &addr_data, &saa7114_detect_client);
1187 saa7114_detach_client (struct i2c_client *client)
1189 struct saa7114 *decoder = i2c_get_clientdata(client);
1192 err = i2c_detach_client(client);
1203 /* ----------------------------------------------------------------------- */
1205 static struct i2c_driver i2c_driver_saa7114 = {
1210 .id = I2C_DRIVERID_SAA7114,
1212 .attach_adapter = saa7114_attach_adapter,
1213 .detach_client = saa7114_detach_client,
1214 .command = saa7114_command,
1220 return i2c_add_driver(&i2c_driver_saa7114);
1226 i2c_del_driver(&i2c_driver_saa7114);
1229 module_init(saa7114_init);
1230 module_exit(saa7114_exit);