2 tda18271-common.c - driver for the Philips / NXP TDA18271 silicon tuner
4 Copyright (C) 2007, 2008 Michael Krufky <mkrufky@linuxtv.org>
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 #include "tda18271-priv.h"
23 static int tda18271_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
25 struct tda18271_priv *priv = fe->tuner_priv;
26 enum tda18271_i2c_gate gate;
30 case TDA18271_GATE_DIGITAL:
31 case TDA18271_GATE_ANALOG:
34 case TDA18271_GATE_AUTO:
37 case TDA18271_DIGITAL:
38 gate = TDA18271_GATE_DIGITAL;
42 gate = TDA18271_GATE_ANALOG;
48 case TDA18271_GATE_ANALOG:
49 if (fe->ops.analog_ops.i2c_gate_ctrl)
50 ret = fe->ops.analog_ops.i2c_gate_ctrl(fe, enable);
52 case TDA18271_GATE_DIGITAL:
53 if (fe->ops.i2c_gate_ctrl)
54 ret = fe->ops.i2c_gate_ctrl(fe, enable);
64 /*---------------------------------------------------------------------*/
66 static void tda18271_dump_regs(struct dvb_frontend *fe, int extended)
68 struct tda18271_priv *priv = fe->tuner_priv;
69 unsigned char *regs = priv->tda18271_regs;
71 tda_reg("=== TDA18271 REG DUMP ===\n");
72 tda_reg("ID_BYTE = 0x%02x\n", 0xff & regs[R_ID]);
73 tda_reg("THERMO_BYTE = 0x%02x\n", 0xff & regs[R_TM]);
74 tda_reg("POWER_LEVEL_BYTE = 0x%02x\n", 0xff & regs[R_PL]);
75 tda_reg("EASY_PROG_BYTE_1 = 0x%02x\n", 0xff & regs[R_EP1]);
76 tda_reg("EASY_PROG_BYTE_2 = 0x%02x\n", 0xff & regs[R_EP2]);
77 tda_reg("EASY_PROG_BYTE_3 = 0x%02x\n", 0xff & regs[R_EP3]);
78 tda_reg("EASY_PROG_BYTE_4 = 0x%02x\n", 0xff & regs[R_EP4]);
79 tda_reg("EASY_PROG_BYTE_5 = 0x%02x\n", 0xff & regs[R_EP5]);
80 tda_reg("CAL_POST_DIV_BYTE = 0x%02x\n", 0xff & regs[R_CPD]);
81 tda_reg("CAL_DIV_BYTE_1 = 0x%02x\n", 0xff & regs[R_CD1]);
82 tda_reg("CAL_DIV_BYTE_2 = 0x%02x\n", 0xff & regs[R_CD2]);
83 tda_reg("CAL_DIV_BYTE_3 = 0x%02x\n", 0xff & regs[R_CD3]);
84 tda_reg("MAIN_POST_DIV_BYTE = 0x%02x\n", 0xff & regs[R_MPD]);
85 tda_reg("MAIN_DIV_BYTE_1 = 0x%02x\n", 0xff & regs[R_MD1]);
86 tda_reg("MAIN_DIV_BYTE_2 = 0x%02x\n", 0xff & regs[R_MD2]);
87 tda_reg("MAIN_DIV_BYTE_3 = 0x%02x\n", 0xff & regs[R_MD3]);
89 /* only dump extended regs if DBG_ADV is set */
90 if (!(tda18271_debug & DBG_ADV))
93 /* W indicates write-only registers.
94 * Register dump for write-only registers shows last value written. */
96 tda_reg("EXTENDED_BYTE_1 = 0x%02x\n", 0xff & regs[R_EB1]);
97 tda_reg("EXTENDED_BYTE_2 = 0x%02x\n", 0xff & regs[R_EB2]);
98 tda_reg("EXTENDED_BYTE_3 = 0x%02x\n", 0xff & regs[R_EB3]);
99 tda_reg("EXTENDED_BYTE_4 = 0x%02x\n", 0xff & regs[R_EB4]);
100 tda_reg("EXTENDED_BYTE_5 = 0x%02x\n", 0xff & regs[R_EB5]);
101 tda_reg("EXTENDED_BYTE_6 = 0x%02x\n", 0xff & regs[R_EB6]);
102 tda_reg("EXTENDED_BYTE_7 = 0x%02x\n", 0xff & regs[R_EB7]);
103 tda_reg("EXTENDED_BYTE_8 = 0x%02x\n", 0xff & regs[R_EB8]);
104 tda_reg("EXTENDED_BYTE_9 W = 0x%02x\n", 0xff & regs[R_EB9]);
105 tda_reg("EXTENDED_BYTE_10 = 0x%02x\n", 0xff & regs[R_EB10]);
106 tda_reg("EXTENDED_BYTE_11 = 0x%02x\n", 0xff & regs[R_EB11]);
107 tda_reg("EXTENDED_BYTE_12 = 0x%02x\n", 0xff & regs[R_EB12]);
108 tda_reg("EXTENDED_BYTE_13 = 0x%02x\n", 0xff & regs[R_EB13]);
109 tda_reg("EXTENDED_BYTE_14 = 0x%02x\n", 0xff & regs[R_EB14]);
110 tda_reg("EXTENDED_BYTE_15 = 0x%02x\n", 0xff & regs[R_EB15]);
111 tda_reg("EXTENDED_BYTE_16 W = 0x%02x\n", 0xff & regs[R_EB16]);
112 tda_reg("EXTENDED_BYTE_17 W = 0x%02x\n", 0xff & regs[R_EB17]);
113 tda_reg("EXTENDED_BYTE_18 = 0x%02x\n", 0xff & regs[R_EB18]);
114 tda_reg("EXTENDED_BYTE_19 W = 0x%02x\n", 0xff & regs[R_EB19]);
115 tda_reg("EXTENDED_BYTE_20 W = 0x%02x\n", 0xff & regs[R_EB20]);
116 tda_reg("EXTENDED_BYTE_21 = 0x%02x\n", 0xff & regs[R_EB21]);
117 tda_reg("EXTENDED_BYTE_22 = 0x%02x\n", 0xff & regs[R_EB22]);
118 tda_reg("EXTENDED_BYTE_23 = 0x%02x\n", 0xff & regs[R_EB23]);
121 int tda18271_read_regs(struct dvb_frontend *fe)
123 struct tda18271_priv *priv = fe->tuner_priv;
124 unsigned char *regs = priv->tda18271_regs;
125 unsigned char buf = 0x00;
127 struct i2c_msg msg[] = {
128 { .addr = priv->i2c_props.addr, .flags = 0,
129 .buf = &buf, .len = 1 },
130 { .addr = priv->i2c_props.addr, .flags = I2C_M_RD,
131 .buf = regs, .len = 16 }
134 tda18271_i2c_gate_ctrl(fe, 1);
136 /* read all registers */
137 ret = i2c_transfer(priv->i2c_props.adap, msg, 2);
139 tda18271_i2c_gate_ctrl(fe, 0);
142 tda_err("ERROR: i2c_transfer returned: %d\n", ret);
144 if (tda18271_debug & DBG_REG)
145 tda18271_dump_regs(fe, 0);
147 return (ret == 2 ? 0 : ret);
150 int tda18271_read_extended(struct dvb_frontend *fe)
152 struct tda18271_priv *priv = fe->tuner_priv;
153 unsigned char *regs = priv->tda18271_regs;
154 unsigned char regdump[TDA18271_NUM_REGS];
155 unsigned char buf = 0x00;
157 struct i2c_msg msg[] = {
158 { .addr = priv->i2c_props.addr, .flags = 0,
159 .buf = &buf, .len = 1 },
160 { .addr = priv->i2c_props.addr, .flags = I2C_M_RD,
161 .buf = regdump, .len = TDA18271_NUM_REGS }
164 tda18271_i2c_gate_ctrl(fe, 1);
166 /* read all registers */
167 ret = i2c_transfer(priv->i2c_props.adap, msg, 2);
169 tda18271_i2c_gate_ctrl(fe, 0);
172 tda_err("ERROR: i2c_transfer returned: %d\n", ret);
174 for (i = 0; i < TDA18271_NUM_REGS; i++) {
175 /* don't update write-only registers */
181 regs[i] = regdump[i];
184 if (tda18271_debug & DBG_REG)
185 tda18271_dump_regs(fe, 1);
187 return (ret == 2 ? 0 : ret);
190 static int __tda18271_write_regs(struct dvb_frontend *fe, int idx, int len,
193 struct tda18271_priv *priv = fe->tuner_priv;
194 unsigned char *regs = priv->tda18271_regs;
195 unsigned char buf[TDA18271_NUM_REGS + 1];
196 struct i2c_msg msg = { .addr = priv->i2c_props.addr, .flags = 0,
200 BUG_ON((len == 0) || (idx + len > sizeof(buf)));
202 switch (priv->small_i2c) {
203 case TDA18271_03_BYTE_CHUNK_INIT:
206 case TDA18271_08_BYTE_CHUNK_INIT:
209 case TDA18271_16_BYTE_CHUNK_INIT:
212 case TDA18271_39_BYTE_CHUNK_INIT:
219 * If lock_i2c is true, it will take the I2C bus for tda18271 private
220 * usage during the entire write ops, as otherwise, bad things could
222 * During device init, several write operations will happen. So,
223 * tda18271_init_regs controls the I2C lock directly,
224 * disabling lock_i2c here.
227 tda18271_i2c_gate_ctrl(fe, 1);
228 i2c_lock_bus(priv->i2c_props.adap, I2C_LOCK_SEGMENT);
235 for (i = 1; i <= max; i++)
236 buf[i] = regs[idx - 1 + i];
240 /* write registers */
241 ret = __i2c_transfer(priv->i2c_props.adap, &msg, 1);
249 i2c_unlock_bus(priv->i2c_props.adap, I2C_LOCK_SEGMENT);
250 tda18271_i2c_gate_ctrl(fe, 0);
254 tda_err("ERROR: idx = 0x%x, len = %d, i2c_transfer returned: %d\n",
257 return (ret == 1 ? 0 : ret);
260 int tda18271_write_regs(struct dvb_frontend *fe, int idx, int len)
262 return __tda18271_write_regs(fe, idx, len, true);
265 /*---------------------------------------------------------------------*/
267 static int __tda18271_charge_pump_source(struct dvb_frontend *fe,
268 enum tda18271_pll pll, int force,
271 struct tda18271_priv *priv = fe->tuner_priv;
272 unsigned char *regs = priv->tda18271_regs;
274 int r_cp = (pll == TDA18271_CAL_PLL) ? R_EB7 : R_EB4;
277 regs[r_cp] |= ((force & 1) << 5);
279 return __tda18271_write_regs(fe, r_cp, 1, lock_i2c);
282 int tda18271_charge_pump_source(struct dvb_frontend *fe,
283 enum tda18271_pll pll, int force)
285 return __tda18271_charge_pump_source(fe, pll, force, true);
289 int tda18271_init_regs(struct dvb_frontend *fe)
291 struct tda18271_priv *priv = fe->tuner_priv;
292 unsigned char *regs = priv->tda18271_regs;
294 tda_dbg("initializing registers for device @ %d-%04x\n",
295 i2c_adapter_id(priv->i2c_props.adap),
296 priv->i2c_props.addr);
299 * Don't let any other I2C transfer to happen at adapter during init,
300 * as those could cause bad things
302 tda18271_i2c_gate_ctrl(fe, 1);
303 i2c_lock_bus(priv->i2c_props.adap, I2C_LOCK_SEGMENT);
305 /* initialize registers */
390 __tda18271_write_regs(fe, 0x00, TDA18271_NUM_REGS, false);
392 /* setup agc1 gain */
394 __tda18271_write_regs(fe, R_EB17, 1, false);
396 __tda18271_write_regs(fe, R_EB17, 1, false);
398 __tda18271_write_regs(fe, R_EB17, 1, false);
400 __tda18271_write_regs(fe, R_EB17, 1, false);
402 /* setup agc2 gain */
403 if ((priv->id) == TDA18271HDC1) {
405 __tda18271_write_regs(fe, R_EB20, 1, false);
407 __tda18271_write_regs(fe, R_EB20, 1, false);
409 __tda18271_write_regs(fe, R_EB20, 1, false);
411 __tda18271_write_regs(fe, R_EB20, 1, false);
414 /* image rejection calibration */
429 __tda18271_write_regs(fe, R_EP3, 11, false);
431 if ((priv->id) == TDA18271HDC2) {
432 /* main pll cp source on */
433 __tda18271_charge_pump_source(fe, TDA18271_MAIN_PLL, 1, false);
436 /* main pll cp source off */
437 __tda18271_charge_pump_source(fe, TDA18271_MAIN_PLL, 0, false);
440 msleep(5); /* pll locking */
442 /* launch detector */
443 __tda18271_write_regs(fe, R_EP1, 1, false);
444 msleep(5); /* wanted low measurement */
451 __tda18271_write_regs(fe, R_EP3, 7, false);
452 msleep(5); /* pll locking */
454 /* launch optimization algorithm */
455 __tda18271_write_regs(fe, R_EP2, 1, false);
456 msleep(30); /* image low optimization completion */
466 __tda18271_write_regs(fe, R_EP3, 11, false);
467 msleep(5); /* pll locking */
469 /* launch detector */
470 __tda18271_write_regs(fe, R_EP1, 1, false);
471 msleep(5); /* wanted mid measurement */
478 __tda18271_write_regs(fe, R_EP3, 7, false);
479 msleep(5); /* pll locking */
481 /* launch optimization algorithm */
482 __tda18271_write_regs(fe, R_EP2, 1, false);
483 msleep(30); /* image mid optimization completion */
494 __tda18271_write_regs(fe, R_EP3, 11, false);
495 msleep(5); /* pll locking */
497 /* launch detector */
498 __tda18271_write_regs(fe, R_EP1, 1, false);
499 msleep(5); /* wanted high measurement */
505 __tda18271_write_regs(fe, R_EP3, 7, false);
506 msleep(5); /* pll locking */
508 /* launch optimization algorithm */
509 __tda18271_write_regs(fe, R_EP2, 1, false);
510 msleep(30); /* image high optimization completion */
512 /* return to normal mode */
514 __tda18271_write_regs(fe, R_EP4, 1, false);
517 __tda18271_write_regs(fe, R_EP1, 1, false);
519 i2c_unlock_bus(priv->i2c_props.adap, I2C_LOCK_SEGMENT);
520 tda18271_i2c_gate_ctrl(fe, 0);
525 /*---------------------------------------------------------------------*/
528 * Standby modes, EP3 [7:5]
530 * | SM || SM_LT || SM_XT || mode description
531 * |=====\\=======\\=======\\====================================
532 * | 0 || 0 || 0 || normal mode
533 * |-----||-------||-------||------------------------------------
534 * | || || || standby mode w/ slave tuner output
535 * | 1 || 0 || 0 || & loop through & xtal oscillator on
536 * |-----||-------||-------||------------------------------------
537 * | 1 || 1 || 0 || standby mode w/ xtal oscillator on
538 * |-----||-------||-------||------------------------------------
539 * | 1 || 1 || 1 || power off
543 int tda18271_set_standby_mode(struct dvb_frontend *fe,
544 int sm, int sm_lt, int sm_xt)
546 struct tda18271_priv *priv = fe->tuner_priv;
547 unsigned char *regs = priv->tda18271_regs;
549 if (tda18271_debug & DBG_ADV)
550 tda_dbg("sm = %d, sm_lt = %d, sm_xt = %d\n", sm, sm_lt, sm_xt);
552 regs[R_EP3] &= ~0xe0; /* clear sm, sm_lt, sm_xt */
553 regs[R_EP3] |= (sm ? (1 << 7) : 0) |
554 (sm_lt ? (1 << 6) : 0) |
555 (sm_xt ? (1 << 5) : 0);
557 return tda18271_write_regs(fe, R_EP3, 1);
560 /*---------------------------------------------------------------------*/
562 int tda18271_calc_main_pll(struct dvb_frontend *fe, u32 freq)
564 /* sets main post divider & divider bytes, but does not write them */
565 struct tda18271_priv *priv = fe->tuner_priv;
566 unsigned char *regs = priv->tda18271_regs;
570 int ret = tda18271_lookup_pll_map(fe, MAIN_PLL, &freq, &pd, &d);
574 regs[R_MPD] = (0x7f & pd);
576 div = ((d * (freq / 1000)) << 7) / 125;
578 regs[R_MD1] = 0x7f & (div >> 16);
579 regs[R_MD2] = 0xff & (div >> 8);
580 regs[R_MD3] = 0xff & div;
585 int tda18271_calc_cal_pll(struct dvb_frontend *fe, u32 freq)
587 /* sets cal post divider & divider bytes, but does not write them */
588 struct tda18271_priv *priv = fe->tuner_priv;
589 unsigned char *regs = priv->tda18271_regs;
593 int ret = tda18271_lookup_pll_map(fe, CAL_PLL, &freq, &pd, &d);
599 div = ((d * (freq / 1000)) << 7) / 125;
601 regs[R_CD1] = 0x7f & (div >> 16);
602 regs[R_CD2] = 0xff & (div >> 8);
603 regs[R_CD3] = 0xff & div;
608 /*---------------------------------------------------------------------*/
610 int tda18271_calc_bp_filter(struct dvb_frontend *fe, u32 *freq)
612 /* sets bp filter bits, but does not write them */
613 struct tda18271_priv *priv = fe->tuner_priv;
614 unsigned char *regs = priv->tda18271_regs;
617 int ret = tda18271_lookup_map(fe, BP_FILTER, freq, &val);
621 regs[R_EP1] &= ~0x07; /* clear bp filter bits */
622 regs[R_EP1] |= (0x07 & val);
627 int tda18271_calc_km(struct dvb_frontend *fe, u32 *freq)
629 /* sets K & M bits, but does not write them */
630 struct tda18271_priv *priv = fe->tuner_priv;
631 unsigned char *regs = priv->tda18271_regs;
634 int ret = tda18271_lookup_map(fe, RF_CAL_KMCO, freq, &val);
638 regs[R_EB13] &= ~0x7c; /* clear k & m bits */
639 regs[R_EB13] |= (0x7c & val);
644 int tda18271_calc_rf_band(struct dvb_frontend *fe, u32 *freq)
646 /* sets rf band bits, but does not write them */
647 struct tda18271_priv *priv = fe->tuner_priv;
648 unsigned char *regs = priv->tda18271_regs;
651 int ret = tda18271_lookup_map(fe, RF_BAND, freq, &val);
655 regs[R_EP2] &= ~0xe0; /* clear rf band bits */
656 regs[R_EP2] |= (0xe0 & (val << 5));
661 int tda18271_calc_gain_taper(struct dvb_frontend *fe, u32 *freq)
663 /* sets gain taper bits, but does not write them */
664 struct tda18271_priv *priv = fe->tuner_priv;
665 unsigned char *regs = priv->tda18271_regs;
668 int ret = tda18271_lookup_map(fe, GAIN_TAPER, freq, &val);
672 regs[R_EP2] &= ~0x1f; /* clear gain taper bits */
673 regs[R_EP2] |= (0x1f & val);
678 int tda18271_calc_ir_measure(struct dvb_frontend *fe, u32 *freq)
680 /* sets IR Meas bits, but does not write them */
681 struct tda18271_priv *priv = fe->tuner_priv;
682 unsigned char *regs = priv->tda18271_regs;
685 int ret = tda18271_lookup_map(fe, IR_MEASURE, freq, &val);
689 regs[R_EP5] &= ~0x07;
690 regs[R_EP5] |= (0x07 & val);
695 int tda18271_calc_rf_cal(struct dvb_frontend *fe, u32 *freq)
697 /* sets rf cal byte (RFC_Cprog), but does not write it */
698 struct tda18271_priv *priv = fe->tuner_priv;
699 unsigned char *regs = priv->tda18271_regs;
702 int ret = tda18271_lookup_map(fe, RF_CAL, freq, &val);
703 /* The TDA18271HD/C1 rf_cal map lookup is expected to go out of range
704 * for frequencies above 61.1 MHz. In these cases, the internal RF
705 * tracking filters calibration mechanism is used.
707 * There is no need to warn the user about this.
717 void _tda_printk(struct tda18271_priv *state, const char *level,
718 const char *func, const char *fmt, ...)
720 struct va_format vaf;
729 printk("%s%s: [%d-%04x|%c] %pV",
730 level, func, i2c_adapter_id(state->i2c_props.adap),
731 state->i2c_props.addr,
732 (state->role == TDA18271_MASTER) ? 'M' : 'S',
735 printk("%s%s: %pV", level, func, &vaf);