2 * Copyright (C) 2017 Linaro Ltd.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 and
6 * only version 2 as published by the Free Software Foundation.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
15 #include <linux/device.h>
16 #include <linux/firmware.h>
17 #include <linux/kernel.h>
18 #include <linux/iommu.h>
21 #include <linux/of_address.h>
22 #include <linux/platform_device.h>
23 #include <linux/of_device.h>
24 #include <linux/qcom_scm.h>
25 #include <linux/sizes.h>
26 #include <linux/soc/qcom/mdt_loader.h>
30 #include "hfi_venus_io.h"
32 #define VENUS_PAS_ID 9
33 #define VENUS_FW_MEM_SIZE (6 * SZ_1M)
34 #define VENUS_FW_START_ADDR 0x0
36 static void venus_reset_cpu(struct venus_core *core)
38 void __iomem *base = core->base;
40 writel(0, base + WRAPPER_FW_START_ADDR);
41 writel(VENUS_FW_MEM_SIZE, base + WRAPPER_FW_END_ADDR);
42 writel(0, base + WRAPPER_CPA_START_ADDR);
43 writel(VENUS_FW_MEM_SIZE, base + WRAPPER_CPA_END_ADDR);
44 writel(VENUS_FW_MEM_SIZE, base + WRAPPER_NONPIX_START_ADDR);
45 writel(VENUS_FW_MEM_SIZE, base + WRAPPER_NONPIX_END_ADDR);
46 writel(0x0, base + WRAPPER_CPU_CGC_DIS);
47 writel(0x0, base + WRAPPER_CPU_CLOCK_CONFIG);
49 /* Bring ARM9 out of reset */
50 writel(0, base + WRAPPER_A9SS_SW_RESET);
53 int venus_set_hw_state(struct venus_core *core, bool resume)
56 return qcom_scm_set_remote_state(resume, 0);
59 venus_reset_cpu(core);
61 writel(1, core->base + WRAPPER_A9SS_SW_RESET);
66 static int venus_load_fw(struct venus_core *core, const char *fwname,
67 phys_addr_t *mem_phys, size_t *mem_size)
69 const struct firmware *mdt;
70 struct device_node *node;
78 node = of_parse_phandle(dev->of_node, "memory-region", 0);
80 dev_err(dev, "no memory-region specified\n");
84 ret = of_address_to_resource(node, 0, &r);
89 *mem_size = resource_size(&r);
91 if (*mem_size < VENUS_FW_MEM_SIZE)
94 mem_va = memremap(r.start, *mem_size, MEMREMAP_WC);
96 dev_err(dev, "unable to map memory region: %pa+%zx\n",
101 ret = request_firmware(&mdt, fwname, dev);
105 fw_size = qcom_mdt_get_size(mdt);
108 release_firmware(mdt);
113 ret = qcom_mdt_load(dev, mdt, fwname, VENUS_PAS_ID,
114 mem_va, *mem_phys, *mem_size, NULL);
116 ret = qcom_mdt_load_no_init(dev, mdt, fwname, VENUS_PAS_ID,
117 mem_va, *mem_phys, *mem_size, NULL);
119 release_firmware(mdt);
126 static int venus_boot_no_tz(struct venus_core *core, phys_addr_t mem_phys,
129 struct iommu_domain *iommu;
135 return -EPROBE_DEFER;
137 iommu = core->fw.iommu_domain;
139 ret = iommu_map(iommu, VENUS_FW_START_ADDR, mem_phys, mem_size,
140 IOMMU_READ | IOMMU_WRITE | IOMMU_PRIV);
142 dev_err(dev, "could not map video firmware region\n");
146 venus_reset_cpu(core);
151 static int venus_shutdown_no_tz(struct venus_core *core)
153 struct iommu_domain *iommu;
156 struct device *dev = core->fw.dev;
157 void __iomem *base = core->base;
159 /* Assert the reset to ARM9 */
160 reg = readl_relaxed(base + WRAPPER_A9SS_SW_RESET);
161 reg |= WRAPPER_A9SS_SW_RESET_BIT;
162 writel_relaxed(reg, base + WRAPPER_A9SS_SW_RESET);
164 /* Make sure reset is asserted before the mapping is removed */
167 iommu = core->fw.iommu_domain;
169 unmapped = iommu_unmap(iommu, VENUS_FW_START_ADDR, VENUS_FW_MEM_SIZE);
170 if (unmapped != VENUS_FW_MEM_SIZE)
171 dev_err(dev, "failed to unmap firmware\n");
176 int venus_boot(struct venus_core *core)
178 struct device *dev = core->dev;
179 phys_addr_t mem_phys;
183 if (!IS_ENABLED(CONFIG_QCOM_MDT_LOADER) ||
184 (core->use_tz && !qcom_scm_is_available()))
185 return -EPROBE_DEFER;
187 ret = venus_load_fw(core, core->res->fwname, &mem_phys, &mem_size);
189 dev_err(dev, "fail to load video firmware\n");
194 ret = qcom_scm_pas_auth_and_reset(VENUS_PAS_ID);
196 ret = venus_boot_no_tz(core, mem_phys, mem_size);
201 int venus_shutdown(struct venus_core *core)
206 ret = qcom_scm_pas_shutdown(VENUS_PAS_ID);
208 ret = venus_shutdown_no_tz(core);
213 int venus_firmware_init(struct venus_core *core)
215 struct platform_device_info info;
216 struct iommu_domain *iommu_dom;
217 struct platform_device *pdev;
218 struct device_node *np;
221 np = of_get_child_by_name(core->dev->of_node, "video-firmware");
227 memset(&info, 0, sizeof(info));
228 info.fwnode = &np->fwnode;
229 info.parent = core->dev;
230 info.name = np->name;
231 info.dma_mask = DMA_BIT_MASK(32);
233 pdev = platform_device_register_full(&info);
236 return PTR_ERR(pdev);
239 pdev->dev.of_node = np;
241 ret = of_dma_configure(&pdev->dev, np, true);
243 dev_err(core->dev, "dma configure fail\n");
247 core->fw.dev = &pdev->dev;
249 iommu_dom = iommu_domain_alloc(&platform_bus_type);
251 dev_err(core->fw.dev, "Failed to allocate iommu domain\n");
256 ret = iommu_attach_device(iommu_dom, core->fw.dev);
258 dev_err(core->fw.dev, "could not attach device\n");
262 core->fw.iommu_domain = iommu_dom;
269 iommu_domain_free(iommu_dom);
271 platform_device_unregister(pdev);
276 void venus_firmware_deinit(struct venus_core *core)
278 struct iommu_domain *iommu;
283 iommu = core->fw.iommu_domain;
285 iommu_detach_device(iommu, core->fw.dev);
286 iommu_domain_free(iommu);
288 platform_device_unregister(to_platform_device(core->fw.dev));