1 // SPDX-License-Identifier: GPL-2.0-only
3 * A driver for the CMOS camera controller in the Marvell 88ALP01 "cafe"
4 * multifunction chip. Currently works with the Omnivision OV7670
7 * The data sheet for this device can be found at:
8 * http://wiki.laptop.org/images/5/5c/88ALP01_Datasheet_July_2007.pdf
10 * Copyright 2006-11 One Laptop Per Child Association, Inc.
11 * Copyright 2006-11 Jonathan Corbet <corbet@lwn.net>
12 * Copyright 2018 Lubomir Rintel <lkundrak@v3.sk>
14 * Written by Jonathan Corbet, corbet@lwn.net.
16 * v4l2_device/v4l2_subdev conversion by:
17 * Copyright (C) 2009 Hans Verkuil <hverkuil@xs4all.nl>
19 #include <linux/kernel.h>
20 #include <linux/module.h>
21 #include <linux/init.h>
22 #include <linux/pci.h>
23 #include <linux/i2c.h>
24 #include <linux/interrupt.h>
25 #include <linux/spinlock.h>
26 #include <linux/slab.h>
27 #include <linux/videodev2.h>
28 #include <media/v4l2-device.h>
29 #include <media/i2c/ov7670.h>
30 #include <linux/device.h>
31 #include <linux/wait.h>
32 #include <linux/delay.h>
34 #include <linux/clkdev.h>
36 #include "mcam-core.h"
38 #define CAFE_VERSION 0x000002
44 MODULE_AUTHOR("Jonathan Corbet <corbet@lwn.net>");
45 MODULE_DESCRIPTION("Marvell 88ALP01 CMOS Camera Controller driver");
46 MODULE_LICENSE("GPL");
49 int registered; /* Fully initialized? */
50 struct mcam_camera mcam;
52 struct i2c_adapter *i2c_adapter;
53 wait_queue_head_t smbus_wait; /* Waiting on i2c events */
57 * Most of the camera controller registers are defined in mcam-core.h,
58 * but the Cafe platform has some additional registers of its own;
59 * they are described here.
63 * "General purpose register" has a couple of GPIOs used for sensor
64 * power and reset on OLPC XO 1.0 systems.
67 #define GPR_C1EN 0x00000020 /* Pad 1 (power down) enable */
68 #define GPR_C0EN 0x00000010 /* Pad 0 (reset) enable */
69 #define GPR_C1 0x00000002 /* Control 1 value */
71 * Control 0 is wired to reset on OLPC machines. For ov7x sensors,
74 #define GPR_C0 0x00000001 /* Control 0 value */
77 * These registers control the SMBUS module for communicating
80 #define REG_TWSIC0 0xb8 /* TWSI (smbus) control 0 */
81 #define TWSIC0_EN 0x00000001 /* TWSI enable */
82 #define TWSIC0_MODE 0x00000002 /* 1 = 16-bit, 0 = 8-bit */
83 #define TWSIC0_SID 0x000003fc /* Slave ID */
85 * Subtle trickery: the slave ID field starts with bit 2. But the
86 * Linux i2c stack wants to treat the bottommost bit as a separate
87 * read/write bit, which is why slave ID's are usually presented
88 * >>1. For consistency with that behavior, we shift over three
89 * bits instead of two.
91 #define TWSIC0_SID_SHIFT 3
92 #define TWSIC0_CLKDIV 0x0007fc00 /* Clock divider */
93 #define TWSIC0_MASKACK 0x00400000 /* Mask ack from sensor */
94 #define TWSIC0_OVMAGIC 0x00800000 /* Make it work on OV sensors */
96 #define REG_TWSIC1 0xbc /* TWSI control 1 */
97 #define TWSIC1_DATA 0x0000ffff /* Data to/from camchip */
98 #define TWSIC1_ADDR 0x00ff0000 /* Address (register) */
99 #define TWSIC1_ADDR_SHIFT 16
100 #define TWSIC1_READ 0x01000000 /* Set for read op */
101 #define TWSIC1_WSTAT 0x02000000 /* Write status */
102 #define TWSIC1_RVALID 0x04000000 /* Read data valid */
103 #define TWSIC1_ERROR 0x08000000 /* Something screwed up */
106 * Here's the weird global control registers
108 #define REG_GL_CSR 0x3004 /* Control/status register */
109 #define GCSR_SRS 0x00000001 /* SW Reset set */
110 #define GCSR_SRC 0x00000002 /* SW Reset clear */
111 #define GCSR_MRS 0x00000004 /* Master reset set */
112 #define GCSR_MRC 0x00000008 /* HW Reset clear */
113 #define GCSR_CCIC_EN 0x00004000 /* CCIC Clock enable */
114 #define REG_GL_IMASK 0x300c /* Interrupt mask register */
115 #define GIMSK_CCIC_EN 0x00000004 /* CCIC Interrupt enable */
117 #define REG_GL_FCR 0x3038 /* GPIO functional control register */
118 #define GFCR_GPIO_ON 0x08 /* Camera GPIO enabled */
119 #define REG_GL_GPIOR 0x315c /* GPIO register */
120 #define GGPIO_OUT 0x80000 /* GPIO output */
121 #define GGPIO_VAL 0x00008 /* Output pin value */
123 #define REG_LEN (REG_GL_IMASK + 4)
127 * Debugging and related.
129 #define cam_err(cam, fmt, arg...) \
130 dev_err(&(cam)->pdev->dev, fmt, ##arg);
131 #define cam_warn(cam, fmt, arg...) \
132 dev_warn(&(cam)->pdev->dev, fmt, ##arg);
134 /* -------------------------------------------------------------------- */
136 * The I2C/SMBUS interface to the camera itself starts here. The
137 * controller handles SMBUS itself, presenting a relatively simple register
138 * interface; all we have to do is to tell it where to route the data.
140 #define CAFE_SMBUS_TIMEOUT (HZ) /* generous */
142 static inline struct cafe_camera *to_cam(struct v4l2_device *dev)
144 struct mcam_camera *m = container_of(dev, struct mcam_camera, v4l2_dev);
145 return container_of(m, struct cafe_camera, mcam);
149 static int cafe_smbus_write_done(struct mcam_camera *mcam)
155 * We must delay after the interrupt, or the controller gets confused
156 * and never does give us good status. Fortunately, we don't do this
160 spin_lock_irqsave(&mcam->dev_lock, flags);
161 c1 = mcam_reg_read(mcam, REG_TWSIC1);
162 spin_unlock_irqrestore(&mcam->dev_lock, flags);
163 return (c1 & (TWSIC1_WSTAT|TWSIC1_ERROR)) != TWSIC1_WSTAT;
166 static int cafe_smbus_write_data(struct cafe_camera *cam,
167 u16 addr, u8 command, u8 value)
171 struct mcam_camera *mcam = &cam->mcam;
173 spin_lock_irqsave(&mcam->dev_lock, flags);
174 rval = TWSIC0_EN | ((addr << TWSIC0_SID_SHIFT) & TWSIC0_SID);
175 rval |= TWSIC0_OVMAGIC; /* Make OV sensors work */
177 * Marvell sez set clkdiv to all 1's for now.
179 rval |= TWSIC0_CLKDIV;
180 mcam_reg_write(mcam, REG_TWSIC0, rval);
181 (void) mcam_reg_read(mcam, REG_TWSIC1); /* force write */
182 rval = value | ((command << TWSIC1_ADDR_SHIFT) & TWSIC1_ADDR);
183 mcam_reg_write(mcam, REG_TWSIC1, rval);
184 spin_unlock_irqrestore(&mcam->dev_lock, flags);
186 /* Unfortunately, reading TWSIC1 too soon after sending a command
187 * causes the device to die.
188 * Use a busy-wait because we often send a large quantity of small
189 * commands at-once; using msleep() would cause a lot of context
190 * switches which take longer than 2ms, resulting in a noticeable
191 * boot-time and capture-start delays.
196 * Another sad fact is that sometimes, commands silently complete but
197 * cafe_smbus_write_done() never becomes aware of this.
198 * This happens at random and appears to possible occur with any
200 * We don't understand why this is. We work around this issue
201 * with the timeout in the wait below, assuming that all commands
202 * complete within the timeout.
204 wait_event_timeout(cam->smbus_wait, cafe_smbus_write_done(mcam),
207 spin_lock_irqsave(&mcam->dev_lock, flags);
208 rval = mcam_reg_read(mcam, REG_TWSIC1);
209 spin_unlock_irqrestore(&mcam->dev_lock, flags);
211 if (rval & TWSIC1_WSTAT) {
212 cam_err(cam, "SMBUS write (%02x/%02x/%02x) timed out\n", addr,
216 if (rval & TWSIC1_ERROR) {
217 cam_err(cam, "SMBUS write (%02x/%02x/%02x) error\n", addr,
226 static int cafe_smbus_read_done(struct mcam_camera *mcam)
232 * We must delay after the interrupt, or the controller gets confused
233 * and never does give us good status. Fortunately, we don't do this
237 spin_lock_irqsave(&mcam->dev_lock, flags);
238 c1 = mcam_reg_read(mcam, REG_TWSIC1);
239 spin_unlock_irqrestore(&mcam->dev_lock, flags);
240 return c1 & (TWSIC1_RVALID|TWSIC1_ERROR);
245 static int cafe_smbus_read_data(struct cafe_camera *cam,
246 u16 addr, u8 command, u8 *value)
250 struct mcam_camera *mcam = &cam->mcam;
252 spin_lock_irqsave(&mcam->dev_lock, flags);
253 rval = TWSIC0_EN | ((addr << TWSIC0_SID_SHIFT) & TWSIC0_SID);
254 rval |= TWSIC0_OVMAGIC; /* Make OV sensors work */
256 * Marvel sez set clkdiv to all 1's for now.
258 rval |= TWSIC0_CLKDIV;
259 mcam_reg_write(mcam, REG_TWSIC0, rval);
260 (void) mcam_reg_read(mcam, REG_TWSIC1); /* force write */
261 rval = TWSIC1_READ | ((command << TWSIC1_ADDR_SHIFT) & TWSIC1_ADDR);
262 mcam_reg_write(mcam, REG_TWSIC1, rval);
263 spin_unlock_irqrestore(&mcam->dev_lock, flags);
265 wait_event_timeout(cam->smbus_wait,
266 cafe_smbus_read_done(mcam), CAFE_SMBUS_TIMEOUT);
267 spin_lock_irqsave(&mcam->dev_lock, flags);
268 rval = mcam_reg_read(mcam, REG_TWSIC1);
269 spin_unlock_irqrestore(&mcam->dev_lock, flags);
271 if (rval & TWSIC1_ERROR) {
272 cam_err(cam, "SMBUS read (%02x/%02x) error\n", addr, command);
275 if (!(rval & TWSIC1_RVALID)) {
276 cam_err(cam, "SMBUS read (%02x/%02x) timed out\n", addr,
280 *value = rval & 0xff;
285 * Perform a transfer over SMBUS. This thing is called under
286 * the i2c bus lock, so we shouldn't race with ourselves...
288 static int cafe_smbus_xfer(struct i2c_adapter *adapter, u16 addr,
289 unsigned short flags, char rw, u8 command,
290 int size, union i2c_smbus_data *data)
292 struct cafe_camera *cam = i2c_get_adapdata(adapter);
296 * This interface would appear to only do byte data ops. OK
297 * it can do word too, but the cam chip has no use for that.
299 if (size != I2C_SMBUS_BYTE_DATA) {
300 cam_err(cam, "funky xfer size %d\n", size);
304 if (rw == I2C_SMBUS_WRITE)
305 ret = cafe_smbus_write_data(cam, addr, command, data->byte);
306 else if (rw == I2C_SMBUS_READ)
307 ret = cafe_smbus_read_data(cam, addr, command, &data->byte);
312 static void cafe_smbus_enable_irq(struct cafe_camera *cam)
316 spin_lock_irqsave(&cam->mcam.dev_lock, flags);
317 mcam_reg_set_bit(&cam->mcam, REG_IRQMASK, TWSIIRQS);
318 spin_unlock_irqrestore(&cam->mcam.dev_lock, flags);
321 static u32 cafe_smbus_func(struct i2c_adapter *adapter)
323 return I2C_FUNC_SMBUS_READ_BYTE_DATA |
324 I2C_FUNC_SMBUS_WRITE_BYTE_DATA;
327 static const struct i2c_algorithm cafe_smbus_algo = {
328 .smbus_xfer = cafe_smbus_xfer,
329 .functionality = cafe_smbus_func
332 static int cafe_smbus_setup(struct cafe_camera *cam)
334 struct i2c_adapter *adap;
337 adap = kzalloc(sizeof(*adap), GFP_KERNEL);
340 adap->owner = THIS_MODULE;
341 adap->algo = &cafe_smbus_algo;
342 strscpy(adap->name, "cafe_ccic", sizeof(adap->name));
343 adap->dev.parent = &cam->pdev->dev;
344 i2c_set_adapdata(adap, cam);
345 ret = i2c_add_adapter(adap);
347 printk(KERN_ERR "Unable to register cafe i2c adapter\n");
352 cam->i2c_adapter = adap;
353 cafe_smbus_enable_irq(cam);
357 static void cafe_smbus_shutdown(struct cafe_camera *cam)
359 i2c_del_adapter(cam->i2c_adapter);
360 kfree(cam->i2c_adapter);
365 * Controller-level stuff
368 static void cafe_ctlr_init(struct mcam_camera *mcam)
372 spin_lock_irqsave(&mcam->dev_lock, flags);
374 * Added magic to bring up the hardware on the B-Test board
376 mcam_reg_write(mcam, 0x3038, 0x8);
377 mcam_reg_write(mcam, 0x315c, 0x80008);
379 * Go through the dance needed to wake the device up.
380 * Note that these registers are global and shared
381 * with the NAND and SD devices. Interaction between the
382 * three still needs to be examined.
384 mcam_reg_write(mcam, REG_GL_CSR, GCSR_SRS|GCSR_MRS); /* Needed? */
385 mcam_reg_write(mcam, REG_GL_CSR, GCSR_SRC|GCSR_MRC);
386 mcam_reg_write(mcam, REG_GL_CSR, GCSR_SRC|GCSR_MRS);
388 * Here we must wait a bit for the controller to come around.
390 spin_unlock_irqrestore(&mcam->dev_lock, flags);
392 spin_lock_irqsave(&mcam->dev_lock, flags);
394 mcam_reg_write(mcam, REG_GL_CSR, GCSR_CCIC_EN|GCSR_SRC|GCSR_MRC);
395 mcam_reg_set_bit(mcam, REG_GL_IMASK, GIMSK_CCIC_EN);
397 * Mask all interrupts.
399 mcam_reg_write(mcam, REG_IRQMASK, 0);
400 spin_unlock_irqrestore(&mcam->dev_lock, flags);
404 static int cafe_ctlr_power_up(struct mcam_camera *mcam)
407 * Part one of the sensor dance: turn the global
410 mcam_reg_write(mcam, REG_GL_FCR, GFCR_GPIO_ON);
411 mcam_reg_write(mcam, REG_GL_GPIOR, GGPIO_OUT|GGPIO_VAL);
413 * Put the sensor into operational mode (assumes OLPC-style
414 * wiring). Control 0 is reset - set to 1 to operate.
415 * Control 1 is power down, set to 0 to operate.
417 mcam_reg_write(mcam, REG_GPR, GPR_C1EN|GPR_C0EN); /* pwr up, reset */
418 mcam_reg_write(mcam, REG_GPR, GPR_C1EN|GPR_C0EN|GPR_C0);
423 static void cafe_ctlr_power_down(struct mcam_camera *mcam)
425 mcam_reg_write(mcam, REG_GPR, GPR_C1EN|GPR_C0EN|GPR_C1);
426 mcam_reg_write(mcam, REG_GL_FCR, GFCR_GPIO_ON);
427 mcam_reg_write(mcam, REG_GL_GPIOR, GGPIO_OUT);
433 * The platform interrupt handler.
435 static irqreturn_t cafe_irq(int irq, void *data)
437 struct cafe_camera *cam = data;
438 struct mcam_camera *mcam = &cam->mcam;
439 unsigned int irqs, handled;
441 spin_lock(&mcam->dev_lock);
442 irqs = mcam_reg_read(mcam, REG_IRQSTAT);
443 handled = cam->registered && mccic_irq(mcam, irqs);
444 if (irqs & TWSIIRQS) {
445 mcam_reg_write(mcam, REG_IRQSTAT, TWSIIRQS);
446 wake_up(&cam->smbus_wait);
449 spin_unlock(&mcam->dev_lock);
450 return IRQ_RETVAL(handled);
453 /* -------------------------------------------------------------------------- */
455 static struct ov7670_config sensor_cfg = {
457 * Exclude QCIF mode, because it only captures a tiny portion
464 * Set the clock speed for the XO 1; I don't believe this
465 * driver has ever run anywhere else.
471 static struct i2c_board_info ov7670_info = {
474 .platform_data = &sensor_cfg,
477 /* -------------------------------------------------------------------------- */
479 * PCI interface stuff.
482 static int cafe_pci_probe(struct pci_dev *pdev,
483 const struct pci_device_id *id)
486 struct cafe_camera *cam;
487 struct mcam_camera *mcam;
488 struct v4l2_async_subdev *asd;
491 * Start putting together one of our big camera structures.
494 cam = kzalloc(sizeof(struct cafe_camera), GFP_KERNEL);
497 pci_set_drvdata(pdev, cam);
500 mcam->chip_id = MCAM_CAFE;
501 spin_lock_init(&mcam->dev_lock);
502 init_waitqueue_head(&cam->smbus_wait);
503 mcam->plat_power_up = cafe_ctlr_power_up;
504 mcam->plat_power_down = cafe_ctlr_power_down;
505 mcam->dev = &pdev->dev;
506 snprintf(mcam->bus_info, sizeof(mcam->bus_info), "PCI:%s", pci_name(pdev));
508 * Vmalloc mode for buffers is traditional with this driver.
509 * We *might* be able to run DMA_contig, especially on a system
512 mcam->buffer_mode = B_vmalloc;
514 * Get set up on the PCI bus.
516 ret = pci_enable_device(pdev);
519 pci_set_master(pdev);
522 mcam->regs = pci_iomap(pdev, 0, 0);
524 printk(KERN_ERR "Unable to ioremap cafe-ccic regs\n");
527 mcam->regs_size = pci_resource_len(pdev, 0);
528 ret = request_irq(pdev->irq, cafe_irq, IRQF_SHARED, "cafe-ccic", cam);
533 * Initialize the controller.
535 cafe_ctlr_init(mcam);
538 * Set up I2C/SMBUS communications. We have to drop the mutex here
539 * because the sensor could attach in this call chain, leading to
540 * unsightly deadlocks.
542 ret = cafe_smbus_setup(cam);
546 v4l2_async_notifier_init(&mcam->notifier);
548 asd = v4l2_async_notifier_add_i2c_subdev(&mcam->notifier,
549 i2c_adapter_id(cam->i2c_adapter),
551 struct v4l2_async_subdev);
554 goto out_smbus_shutdown;
557 ret = mccic_register(mcam);
559 goto out_smbus_shutdown;
561 clkdev_create(mcam->mclk, "xclk", "%d-%04x",
562 i2c_adapter_id(cam->i2c_adapter), ov7670_info.addr);
564 if (!IS_ERR(i2c_new_client_device(cam->i2c_adapter, &ov7670_info))) {
569 mccic_shutdown(mcam);
571 cafe_smbus_shutdown(cam);
573 cafe_ctlr_power_down(mcam);
574 free_irq(pdev->irq, cam);
576 pci_iounmap(pdev, mcam->regs);
578 pci_disable_device(pdev);
587 * Shut down an initialized device
589 static void cafe_shutdown(struct cafe_camera *cam)
591 mccic_shutdown(&cam->mcam);
592 cafe_smbus_shutdown(cam);
593 free_irq(cam->pdev->irq, cam);
594 pci_iounmap(cam->pdev, cam->mcam.regs);
598 static void cafe_pci_remove(struct pci_dev *pdev)
600 struct cafe_camera *cam = pci_get_drvdata(pdev);
603 printk(KERN_WARNING "pci_remove on unknown pdev %p\n", pdev);
612 * Basic power management.
614 static int __maybe_unused cafe_pci_suspend(struct device *dev)
616 struct cafe_camera *cam = dev_get_drvdata(dev);
618 mccic_suspend(&cam->mcam);
623 static int __maybe_unused cafe_pci_resume(struct device *dev)
625 struct cafe_camera *cam = dev_get_drvdata(dev);
627 cafe_ctlr_init(&cam->mcam);
628 return mccic_resume(&cam->mcam);
631 static const struct pci_device_id cafe_ids[] = {
632 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL,
633 PCI_DEVICE_ID_MARVELL_88ALP01_CCIC) },
637 MODULE_DEVICE_TABLE(pci, cafe_ids);
639 static SIMPLE_DEV_PM_OPS(cafe_pci_pm_ops, cafe_pci_suspend, cafe_pci_resume);
641 static struct pci_driver cafe_pci_driver = {
642 .name = "cafe1000-ccic",
643 .id_table = cafe_ids,
644 .probe = cafe_pci_probe,
645 .remove = cafe_pci_remove,
646 .driver.pm = &cafe_pci_pm_ops,
652 static int __init cafe_init(void)
656 printk(KERN_NOTICE "Marvell M88ALP01 'CAFE' Camera Controller version %d\n",
658 ret = pci_register_driver(&cafe_pci_driver);
660 printk(KERN_ERR "Unable to register cafe_ccic driver\n");
670 static void __exit cafe_exit(void)
672 pci_unregister_driver(&cafe_pci_driver);
675 module_init(cafe_init);
676 module_exit(cafe_exit);