2 * Driver for Samsung S5K4ECGX 1/4" 5Mp CMOS Image Sensor SoC
3 * with an Embedded Image Signal Processor.
5 * Copyright (C) 2012, Linaro, Sangwook Lee <sangwook.lee@linaro.org>
6 * Copyright (C) 2012, Insignal Co,. Ltd, Homin Lee <suapapa@insignal.co.kr>
8 * Based on s5k6aa and noon010pc30 driver
9 * Copyright (C) 2011, Samsung Electronics Co., Ltd.
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
17 #include <linux/clk.h>
18 #include <linux/crc32.h>
19 #include <linux/ctype.h>
20 #include <linux/delay.h>
21 #include <linux/firmware.h>
22 #include <linux/gpio.h>
23 #include <linux/i2c.h>
24 #include <linux/module.h>
25 #include <linux/regulator/consumer.h>
26 #include <linux/slab.h>
27 #include <asm/unaligned.h>
29 #include <media/media-entity.h>
30 #include <media/i2c/s5k4ecgx.h>
31 #include <media/v4l2-ctrls.h>
32 #include <media/v4l2-device.h>
33 #include <media/v4l2-mediabus.h>
34 #include <media/v4l2-subdev.h>
37 module_param(debug, int, 0644);
39 #define S5K4ECGX_DRIVER_NAME "s5k4ecgx"
40 #define S5K4ECGX_FIRMWARE "s5k4ecgx.bin"
42 /* Firmware revision information */
43 #define REG_FW_REVISION 0x700001a6
44 #define REG_FW_VERSION 0x700001a4
45 #define S5K4ECGX_REVISION_1_1 0x11
46 #define S5K4ECGX_FW_VERSION 0x4ec0
48 /* General purpose parameters */
49 #define REG_USER_BRIGHTNESS 0x7000022c
50 #define REG_USER_CONTRAST 0x7000022e
51 #define REG_USER_SATURATION 0x70000230
53 #define REG_G_ENABLE_PREV 0x7000023e
54 #define REG_G_ENABLE_PREV_CHG 0x70000240
55 #define REG_G_NEW_CFG_SYNC 0x7000024a
56 #define REG_G_PREV_IN_WIDTH 0x70000250
57 #define REG_G_PREV_IN_HEIGHT 0x70000252
58 #define REG_G_PREV_IN_XOFFS 0x70000254
59 #define REG_G_PREV_IN_YOFFS 0x70000256
60 #define REG_G_CAP_IN_WIDTH 0x70000258
61 #define REG_G_CAP_IN_HEIGHT 0x7000025a
62 #define REG_G_CAP_IN_XOFFS 0x7000025c
63 #define REG_G_CAP_IN_YOFFS 0x7000025e
64 #define REG_G_INPUTS_CHANGE_REQ 0x70000262
65 #define REG_G_ACTIVE_PREV_CFG 0x70000266
66 #define REG_G_PREV_CFG_CHG 0x70000268
67 #define REG_G_PREV_OPEN_AFTER_CH 0x7000026a
69 /* Preview context register sets. n = 0...4. */
70 #define PREG(n, x) ((n) * 0x30 + (x))
71 #define REG_P_OUT_WIDTH(n) PREG(n, 0x700002a6)
72 #define REG_P_OUT_HEIGHT(n) PREG(n, 0x700002a8)
73 #define REG_P_FMT(n) PREG(n, 0x700002aa)
74 #define REG_P_PVI_MASK(n) PREG(n, 0x700002b4)
75 #define REG_P_FR_TIME_TYPE(n) PREG(n, 0x700002be)
76 #define FR_TIME_DYNAMIC 0
77 #define FR_TIME_FIXED 1
78 #define FR_TIME_FIXED_ACCURATE 2
79 #define REG_P_FR_TIME_Q_TYPE(n) PREG(n, 0x700002c0)
80 #define FR_TIME_Q_DYNAMIC 0
81 #define FR_TIME_Q_BEST_FRRATE 1
82 #define FR_TIME_Q_BEST_QUALITY 2
84 /* Frame period in 0.1 ms units */
85 #define REG_P_MAX_FR_TIME(n) PREG(n, 0x700002c2)
86 #define REG_P_MIN_FR_TIME(n) PREG(n, 0x700002c4)
87 #define US_TO_FR_TIME(__t) ((__t) / 100)
88 #define REG_P_PREV_MIRROR(n) PREG(n, 0x700002d0)
89 #define REG_P_CAP_MIRROR(n) PREG(n, 0x700002d2)
91 #define REG_G_PREVZOOM_IN_WIDTH 0x70000494
92 #define REG_G_PREVZOOM_IN_HEIGHT 0x70000496
93 #define REG_G_PREVZOOM_IN_XOFFS 0x70000498
94 #define REG_G_PREVZOOM_IN_YOFFS 0x7000049a
95 #define REG_G_CAPZOOM_IN_WIDTH 0x7000049c
96 #define REG_G_CAPZOOM_IN_HEIGHT 0x7000049e
97 #define REG_G_CAPZOOM_IN_XOFFS 0x700004a0
98 #define REG_G_CAPZOOM_IN_YOFFS 0x700004a2
101 #define REG_USER_SHARPNESS(n) (0x70000a28 + (n) * 0xb6)
103 /* Reduce sharpness range for user space API */
104 #define SHARPNESS_DIV 8208
105 #define TOK_TERM 0xffffffff
108 * FIXME: This is copied from s5k6aa, because of no information
109 * in the S5K4ECGX datasheet.
110 * H/W register Interface (0xd0000000 - 0xd0000fff)
112 #define AHB_MSB_ADDR_PTR 0xfcfc
113 #define GEN_REG_OFFSH 0xd000
114 #define REG_CMDWR_ADDRH 0x0028
115 #define REG_CMDWR_ADDRL 0x002a
116 #define REG_CMDRD_ADDRH 0x002c
117 #define REG_CMDRD_ADDRL 0x002e
118 #define REG_CMDBUF0_ADDR 0x0f12
120 struct s5k4ecgx_frmsize {
121 struct v4l2_frmsize_discrete size;
122 /* Fixed sensor matrix crop rectangle */
123 struct v4l2_rect input_window;
132 * TODO: currently only preview is supported and snapshot (capture)
133 * is not implemented yet
135 static const struct s5k4ecgx_frmsize s5k4ecgx_prev_sizes[] = {
137 .size = { 176, 144 },
138 .input_window = { 0x00, 0x00, 0x928, 0x780 },
140 .size = { 352, 288 },
141 .input_window = { 0x00, 0x00, 0x928, 0x780 },
143 .size = { 640, 480 },
144 .input_window = { 0x00, 0x00, 0xa00, 0x780 },
146 .size = { 720, 480 },
147 .input_window = { 0x00, 0x00, 0xa00, 0x6a8 },
151 #define S5K4ECGX_NUM_PREV ARRAY_SIZE(s5k4ecgx_prev_sizes)
153 struct s5k4ecgx_pixfmt {
156 /* REG_TC_PCFG_Format register value */
160 /* By default value, output from sensor will be YUV422 0-255 */
161 static const struct s5k4ecgx_pixfmt s5k4ecgx_formats[] = {
162 { MEDIA_BUS_FMT_YUYV8_2X8, V4L2_COLORSPACE_JPEG, 5 },
165 static const char * const s5k4ecgx_supply_names[] = {
167 * Usually 2.8V is used for analog power (vdda)
168 * and digital IO (vddio, vdddcore)
173 "vddreg", /* The internal s5k4ecgx regulator's supply (1.8V) */
176 #define S5K4ECGX_NUM_SUPPLIES ARRAY_SIZE(s5k4ecgx_supply_names)
178 enum s5k4ecgx_gpio_id {
185 struct v4l2_subdev sd;
186 struct media_pad pad;
187 struct v4l2_ctrl_handler handler;
189 struct s5k4ecgx_platform_data *pdata;
190 const struct s5k4ecgx_pixfmt *curr_pixfmt;
191 const struct s5k4ecgx_frmsize *curr_frmsize;
196 struct regulator_bulk_data supplies[S5K4ECGX_NUM_SUPPLIES];
197 struct s5k4ecgx_gpio gpio[GPIO_NUM];
200 static inline struct s5k4ecgx *to_s5k4ecgx(struct v4l2_subdev *sd)
202 return container_of(sd, struct s5k4ecgx, sd);
205 static int s5k4ecgx_i2c_read(struct i2c_client *client, u16 addr, u16 *val)
207 u8 wbuf[2] = { addr >> 8, addr & 0xff };
208 struct i2c_msg msg[2];
212 msg[0].addr = client->addr;
217 msg[1].addr = client->addr;
218 msg[1].flags = I2C_M_RD;
222 ret = i2c_transfer(client->adapter, msg, 2);
223 *val = be16_to_cpu(*((__be16 *)rbuf));
225 v4l2_dbg(4, debug, client, "i2c_read: 0x%04X : 0x%04x\n", addr, *val);
227 return ret == 2 ? 0 : ret;
230 static int s5k4ecgx_i2c_write(struct i2c_client *client, u16 addr, u16 val)
232 u8 buf[4] = { addr >> 8, addr & 0xff, val >> 8, val & 0xff };
234 int ret = i2c_master_send(client, buf, 4);
235 v4l2_dbg(4, debug, client, "i2c_write: 0x%04x : 0x%04x\n", addr, val);
237 return ret == 4 ? 0 : ret;
240 static int s5k4ecgx_write(struct i2c_client *client, u32 addr, u16 val)
242 u16 high = addr >> 16, low = addr & 0xffff;
245 v4l2_dbg(3, debug, client, "write: 0x%08x : 0x%04x\n", addr, val);
247 ret = s5k4ecgx_i2c_write(client, REG_CMDWR_ADDRH, high);
249 ret = s5k4ecgx_i2c_write(client, REG_CMDWR_ADDRL, low);
251 ret = s5k4ecgx_i2c_write(client, REG_CMDBUF0_ADDR, val);
256 static int s5k4ecgx_read(struct i2c_client *client, u32 addr, u16 *val)
258 u16 high = addr >> 16, low = addr & 0xffff;
261 ret = s5k4ecgx_i2c_write(client, REG_CMDRD_ADDRH, high);
263 ret = s5k4ecgx_i2c_write(client, REG_CMDRD_ADDRL, low);
265 ret = s5k4ecgx_i2c_read(client, REG_CMDBUF0_ADDR, val);
270 static int s5k4ecgx_read_fw_ver(struct v4l2_subdev *sd)
272 struct i2c_client *client = v4l2_get_subdevdata(sd);
273 u16 hw_rev, fw_ver = 0;
276 ret = s5k4ecgx_read(client, REG_FW_VERSION, &fw_ver);
277 if (ret < 0 || fw_ver != S5K4ECGX_FW_VERSION) {
278 v4l2_err(sd, "FW version check failed!\n");
282 ret = s5k4ecgx_read(client, REG_FW_REVISION, &hw_rev);
286 v4l2_info(sd, "chip found FW ver: 0x%x, HW rev: 0x%x\n",
291 static int s5k4ecgx_set_ahb_address(struct v4l2_subdev *sd)
293 struct i2c_client *client = v4l2_get_subdevdata(sd);
296 /* Set APB peripherals start address */
297 ret = s5k4ecgx_i2c_write(client, AHB_MSB_ADDR_PTR, GEN_REG_OFFSH);
301 * FIXME: This is copied from s5k6aa, because of no information
302 * in s5k4ecgx's datasheet.
303 * sw_reset is activated to put device into idle status
305 ret = s5k4ecgx_i2c_write(client, 0x0010, 0x0001);
309 ret = s5k4ecgx_i2c_write(client, 0x1030, 0x0000);
313 return s5k4ecgx_i2c_write(client, 0x0014, 0x0001);
316 #define FW_CRC_SIZE 4
317 /* Register address, value are 4, 2 bytes */
318 #define FW_RECORD_SIZE 6
320 * The firmware has following format:
321 * < total number of records (4 bytes + 2 bytes padding) N >,
322 * < record 0 >, ..., < record N - 1 >, < CRC32-CCITT (4-bytes) >,
323 * where "record" is a 4-byte register address followed by 2-byte
324 * register value (little endian).
325 * The firmware generator can be found in following git repository:
326 * git://git.linaro.org/people/sangwook/fimc-v4l2-app.git
328 static int s5k4ecgx_load_firmware(struct v4l2_subdev *sd)
330 struct i2c_client *client = v4l2_get_subdevdata(sd);
331 const struct firmware *fw;
333 int err, i, regs_num;
334 u32 addr, crc, crc_file, addr_inc = 0;
337 err = request_firmware(&fw, S5K4ECGX_FIRMWARE, sd->v4l2_dev->dev);
339 v4l2_err(sd, "Failed to read firmware %s\n", S5K4ECGX_FIRMWARE);
342 regs_num = get_unaligned_le32(fw->data);
344 v4l2_dbg(3, debug, sd, "FW: %s size %zu register sets %d\n",
345 S5K4ECGX_FIRMWARE, fw->size, regs_num);
347 regs_num++; /* Add header */
348 if (fw->size != regs_num * FW_RECORD_SIZE + FW_CRC_SIZE) {
352 crc_file = get_unaligned_le32(fw->data + regs_num * FW_RECORD_SIZE);
353 crc = crc32_le(~0, fw->data, regs_num * FW_RECORD_SIZE);
354 if (crc != crc_file) {
355 v4l2_err(sd, "FW: invalid crc (%#x:%#x)\n", crc, crc_file);
359 ptr = fw->data + FW_RECORD_SIZE;
360 for (i = 1; i < regs_num; i++) {
361 addr = get_unaligned_le32(ptr);
363 val = get_unaligned_le16(ptr);
365 if (addr - addr_inc != 2)
366 err = s5k4ecgx_write(client, addr, val);
368 err = s5k4ecgx_i2c_write(client, REG_CMDBUF0_ADDR, val);
374 release_firmware(fw);
378 /* Set preview and capture input window */
379 static int s5k4ecgx_set_input_window(struct i2c_client *c,
380 const struct v4l2_rect *r)
384 ret = s5k4ecgx_write(c, REG_G_PREV_IN_WIDTH, r->width);
386 ret = s5k4ecgx_write(c, REG_G_PREV_IN_HEIGHT, r->height);
388 ret = s5k4ecgx_write(c, REG_G_PREV_IN_XOFFS, r->left);
390 ret = s5k4ecgx_write(c, REG_G_PREV_IN_YOFFS, r->top);
392 ret = s5k4ecgx_write(c, REG_G_CAP_IN_WIDTH, r->width);
394 ret = s5k4ecgx_write(c, REG_G_CAP_IN_HEIGHT, r->height);
396 ret = s5k4ecgx_write(c, REG_G_CAP_IN_XOFFS, r->left);
398 ret = s5k4ecgx_write(c, REG_G_CAP_IN_YOFFS, r->top);
403 /* Set preview and capture zoom input window */
404 static int s5k4ecgx_set_zoom_window(struct i2c_client *c,
405 const struct v4l2_rect *r)
409 ret = s5k4ecgx_write(c, REG_G_PREVZOOM_IN_WIDTH, r->width);
411 ret = s5k4ecgx_write(c, REG_G_PREVZOOM_IN_HEIGHT, r->height);
413 ret = s5k4ecgx_write(c, REG_G_PREVZOOM_IN_XOFFS, r->left);
415 ret = s5k4ecgx_write(c, REG_G_PREVZOOM_IN_YOFFS, r->top);
417 ret = s5k4ecgx_write(c, REG_G_CAPZOOM_IN_WIDTH, r->width);
419 ret = s5k4ecgx_write(c, REG_G_CAPZOOM_IN_HEIGHT, r->height);
421 ret = s5k4ecgx_write(c, REG_G_CAPZOOM_IN_XOFFS, r->left);
423 ret = s5k4ecgx_write(c, REG_G_CAPZOOM_IN_YOFFS, r->top);
428 static int s5k4ecgx_set_output_framefmt(struct s5k4ecgx *priv)
430 struct i2c_client *client = v4l2_get_subdevdata(&priv->sd);
433 ret = s5k4ecgx_write(client, REG_P_OUT_WIDTH(0),
434 priv->curr_frmsize->size.width);
436 ret = s5k4ecgx_write(client, REG_P_OUT_HEIGHT(0),
437 priv->curr_frmsize->size.height);
439 ret = s5k4ecgx_write(client, REG_P_FMT(0),
440 priv->curr_pixfmt->reg_p_format);
444 static int s5k4ecgx_init_sensor(struct v4l2_subdev *sd)
448 ret = s5k4ecgx_set_ahb_address(sd);
450 /* The delay is from manufacturer's settings */
454 ret = s5k4ecgx_load_firmware(sd);
456 v4l2_err(sd, "Failed to write initial settings\n");
461 static int s5k4ecgx_gpio_set_value(struct s5k4ecgx *priv, int id, u32 val)
463 if (!gpio_is_valid(priv->gpio[id].gpio))
465 gpio_set_value(priv->gpio[id].gpio, val);
470 static int __s5k4ecgx_power_on(struct s5k4ecgx *priv)
474 ret = regulator_bulk_enable(S5K4ECGX_NUM_SUPPLIES, priv->supplies);
477 usleep_range(30, 50);
479 /* The polarity of STBY is controlled by TSP */
480 if (s5k4ecgx_gpio_set_value(priv, STBY, priv->gpio[STBY].level))
481 usleep_range(30, 50);
483 if (s5k4ecgx_gpio_set_value(priv, RST, priv->gpio[RST].level))
484 usleep_range(30, 50);
489 static int __s5k4ecgx_power_off(struct s5k4ecgx *priv)
491 if (s5k4ecgx_gpio_set_value(priv, RST, !priv->gpio[RST].level))
492 usleep_range(30, 50);
494 if (s5k4ecgx_gpio_set_value(priv, STBY, !priv->gpio[STBY].level))
495 usleep_range(30, 50);
499 return regulator_bulk_disable(S5K4ECGX_NUM_SUPPLIES, priv->supplies);
502 /* Find nearest matching image pixel size. */
503 static int s5k4ecgx_try_frame_size(struct v4l2_mbus_framefmt *mf,
504 const struct s5k4ecgx_frmsize **size)
506 unsigned int min_err = ~0;
507 int i = ARRAY_SIZE(s5k4ecgx_prev_sizes);
508 const struct s5k4ecgx_frmsize *fsize = &s5k4ecgx_prev_sizes[0],
512 int err = abs(fsize->size.width - mf->width)
513 + abs(fsize->size.height - mf->height);
521 mf->width = match->size.width;
522 mf->height = match->size.height;
531 static int s5k4ecgx_enum_mbus_code(struct v4l2_subdev *sd,
532 struct v4l2_subdev_pad_config *cfg,
533 struct v4l2_subdev_mbus_code_enum *code)
535 if (code->index >= ARRAY_SIZE(s5k4ecgx_formats))
537 code->code = s5k4ecgx_formats[code->index].code;
542 static int s5k4ecgx_get_fmt(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg,
543 struct v4l2_subdev_format *fmt)
545 struct s5k4ecgx *priv = to_s5k4ecgx(sd);
546 struct v4l2_mbus_framefmt *mf;
548 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
550 mf = v4l2_subdev_get_try_format(sd, cfg, 0);
558 mutex_lock(&priv->lock);
559 mf->width = priv->curr_frmsize->size.width;
560 mf->height = priv->curr_frmsize->size.height;
561 mf->code = priv->curr_pixfmt->code;
562 mf->colorspace = priv->curr_pixfmt->colorspace;
563 mf->field = V4L2_FIELD_NONE;
564 mutex_unlock(&priv->lock);
569 static const struct s5k4ecgx_pixfmt *s5k4ecgx_try_fmt(struct v4l2_subdev *sd,
570 struct v4l2_mbus_framefmt *mf)
572 int i = ARRAY_SIZE(s5k4ecgx_formats);
575 if (mf->code == s5k4ecgx_formats[i].code)
577 mf->code = s5k4ecgx_formats[i].code;
579 return &s5k4ecgx_formats[i];
582 static int s5k4ecgx_set_fmt(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg,
583 struct v4l2_subdev_format *fmt)
585 struct s5k4ecgx *priv = to_s5k4ecgx(sd);
586 const struct s5k4ecgx_frmsize *fsize = NULL;
587 const struct s5k4ecgx_pixfmt *pf;
588 struct v4l2_mbus_framefmt *mf;
591 pf = s5k4ecgx_try_fmt(sd, &fmt->format);
592 s5k4ecgx_try_frame_size(&fmt->format, &fsize);
593 fmt->format.colorspace = V4L2_COLORSPACE_JPEG;
594 fmt->format.field = V4L2_FIELD_NONE;
596 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
598 mf = v4l2_subdev_get_try_format(sd, cfg, 0);
604 mutex_lock(&priv->lock);
605 if (!priv->streaming) {
606 priv->curr_frmsize = fsize;
607 priv->curr_pixfmt = pf;
608 priv->set_params = 1;
612 mutex_unlock(&priv->lock);
617 static const struct v4l2_subdev_pad_ops s5k4ecgx_pad_ops = {
618 .enum_mbus_code = s5k4ecgx_enum_mbus_code,
619 .get_fmt = s5k4ecgx_get_fmt,
620 .set_fmt = s5k4ecgx_set_fmt,
624 * V4L2 subdev controls
626 static int s5k4ecgx_s_ctrl(struct v4l2_ctrl *ctrl)
628 struct v4l2_subdev *sd = &container_of(ctrl->handler, struct s5k4ecgx,
630 struct i2c_client *client = v4l2_get_subdevdata(sd);
631 struct s5k4ecgx *priv = to_s5k4ecgx(sd);
635 v4l2_dbg(1, debug, sd, "ctrl: 0x%x, value: %d\n", ctrl->id, ctrl->val);
637 mutex_lock(&priv->lock);
639 case V4L2_CID_CONTRAST:
640 err = s5k4ecgx_write(client, REG_USER_CONTRAST, ctrl->val);
643 case V4L2_CID_SATURATION:
644 err = s5k4ecgx_write(client, REG_USER_SATURATION, ctrl->val);
647 case V4L2_CID_SHARPNESS:
648 /* TODO: Revisit, is this setting for all presets ? */
649 for (i = 0; i < 4 && !err; i++)
650 err = s5k4ecgx_write(client, REG_USER_SHARPNESS(i),
651 ctrl->val * SHARPNESS_DIV);
654 case V4L2_CID_BRIGHTNESS:
655 err = s5k4ecgx_write(client, REG_USER_BRIGHTNESS, ctrl->val);
658 mutex_unlock(&priv->lock);
660 v4l2_err(sd, "Failed to write s_ctrl err %d\n", err);
665 static const struct v4l2_ctrl_ops s5k4ecgx_ctrl_ops = {
666 .s_ctrl = s5k4ecgx_s_ctrl,
670 * Reading s5k4ecgx version information
672 static int s5k4ecgx_registered(struct v4l2_subdev *sd)
675 struct s5k4ecgx *priv = to_s5k4ecgx(sd);
677 mutex_lock(&priv->lock);
678 ret = __s5k4ecgx_power_on(priv);
680 ret = s5k4ecgx_read_fw_ver(sd);
681 __s5k4ecgx_power_off(priv);
683 mutex_unlock(&priv->lock);
689 * V4L2 subdev internal operations
691 static int s5k4ecgx_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
693 struct v4l2_mbus_framefmt *mf = v4l2_subdev_get_try_format(sd, fh->pad, 0);
695 mf->width = s5k4ecgx_prev_sizes[0].size.width;
696 mf->height = s5k4ecgx_prev_sizes[0].size.height;
697 mf->code = s5k4ecgx_formats[0].code;
698 mf->colorspace = V4L2_COLORSPACE_JPEG;
699 mf->field = V4L2_FIELD_NONE;
704 static const struct v4l2_subdev_internal_ops s5k4ecgx_subdev_internal_ops = {
705 .registered = s5k4ecgx_registered,
706 .open = s5k4ecgx_open,
709 static int s5k4ecgx_s_power(struct v4l2_subdev *sd, int on)
711 struct s5k4ecgx *priv = to_s5k4ecgx(sd);
714 v4l2_dbg(1, debug, sd, "Switching %s\n", on ? "on" : "off");
717 ret = __s5k4ecgx_power_on(priv);
720 /* Time to stabilize sensor */
722 ret = s5k4ecgx_init_sensor(sd);
724 __s5k4ecgx_power_off(priv);
726 priv->set_params = 1;
728 ret = __s5k4ecgx_power_off(priv);
734 static int s5k4ecgx_log_status(struct v4l2_subdev *sd)
736 v4l2_ctrl_handler_log_status(sd->ctrl_handler, sd->name);
741 static const struct v4l2_subdev_core_ops s5k4ecgx_core_ops = {
742 .s_power = s5k4ecgx_s_power,
743 .log_status = s5k4ecgx_log_status,
746 static int __s5k4ecgx_s_params(struct s5k4ecgx *priv)
748 struct i2c_client *client = v4l2_get_subdevdata(&priv->sd);
749 const struct v4l2_rect *crop_rect = &priv->curr_frmsize->input_window;
752 ret = s5k4ecgx_set_input_window(client, crop_rect);
754 ret = s5k4ecgx_set_zoom_window(client, crop_rect);
756 ret = s5k4ecgx_write(client, REG_G_INPUTS_CHANGE_REQ, 1);
758 ret = s5k4ecgx_write(client, 0x70000a1e, 0x28);
760 ret = s5k4ecgx_write(client, 0x70000ad4, 0x3c);
762 ret = s5k4ecgx_set_output_framefmt(priv);
764 ret = s5k4ecgx_write(client, REG_P_PVI_MASK(0), 0x52);
766 ret = s5k4ecgx_write(client, REG_P_FR_TIME_TYPE(0),
769 ret = s5k4ecgx_write(client, REG_P_FR_TIME_Q_TYPE(0),
770 FR_TIME_Q_BEST_FRRATE);
772 ret = s5k4ecgx_write(client, REG_P_MIN_FR_TIME(0),
773 US_TO_FR_TIME(33300));
775 ret = s5k4ecgx_write(client, REG_P_MAX_FR_TIME(0),
776 US_TO_FR_TIME(66600));
778 ret = s5k4ecgx_write(client, REG_P_PREV_MIRROR(0), 0);
780 ret = s5k4ecgx_write(client, REG_P_CAP_MIRROR(0), 0);
782 ret = s5k4ecgx_write(client, REG_G_ACTIVE_PREV_CFG, 0);
784 ret = s5k4ecgx_write(client, REG_G_PREV_OPEN_AFTER_CH, 1);
786 ret = s5k4ecgx_write(client, REG_G_NEW_CFG_SYNC, 1);
788 ret = s5k4ecgx_write(client, REG_G_PREV_CFG_CHG, 1);
793 static int __s5k4ecgx_s_stream(struct s5k4ecgx *priv, int on)
795 struct i2c_client *client = v4l2_get_subdevdata(&priv->sd);
798 if (on && priv->set_params) {
799 ret = __s5k4ecgx_s_params(priv);
802 priv->set_params = 0;
805 * This enables/disables preview stream only. Capture requests
806 * are not supported yet.
808 ret = s5k4ecgx_write(client, REG_G_ENABLE_PREV, on);
811 return s5k4ecgx_write(client, REG_G_ENABLE_PREV_CHG, 1);
814 static int s5k4ecgx_s_stream(struct v4l2_subdev *sd, int on)
816 struct s5k4ecgx *priv = to_s5k4ecgx(sd);
819 v4l2_dbg(1, debug, sd, "Turn streaming %s\n", on ? "on" : "off");
821 mutex_lock(&priv->lock);
823 if (priv->streaming == !on) {
824 ret = __s5k4ecgx_s_stream(priv, on);
826 priv->streaming = on & 1;
829 mutex_unlock(&priv->lock);
833 static const struct v4l2_subdev_video_ops s5k4ecgx_video_ops = {
834 .s_stream = s5k4ecgx_s_stream,
837 static const struct v4l2_subdev_ops s5k4ecgx_ops = {
838 .core = &s5k4ecgx_core_ops,
839 .pad = &s5k4ecgx_pad_ops,
840 .video = &s5k4ecgx_video_ops,
846 static int s5k4ecgx_config_gpio(int nr, int val, const char *name)
848 unsigned long flags = val ? GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW;
851 if (!gpio_is_valid(nr))
853 ret = gpio_request_one(nr, flags, name);
860 static void s5k4ecgx_free_gpios(struct s5k4ecgx *priv)
864 for (i = 0; i < ARRAY_SIZE(priv->gpio); i++) {
865 if (!gpio_is_valid(priv->gpio[i].gpio))
867 gpio_free(priv->gpio[i].gpio);
868 priv->gpio[i].gpio = -EINVAL;
872 static int s5k4ecgx_config_gpios(struct s5k4ecgx *priv,
873 const struct s5k4ecgx_platform_data *pdata)
875 const struct s5k4ecgx_gpio *gpio = &pdata->gpio_stby;
878 priv->gpio[STBY].gpio = -EINVAL;
879 priv->gpio[RST].gpio = -EINVAL;
881 ret = s5k4ecgx_config_gpio(gpio->gpio, gpio->level, "S5K4ECGX_STBY");
884 s5k4ecgx_free_gpios(priv);
887 priv->gpio[STBY] = *gpio;
888 if (gpio_is_valid(gpio->gpio))
889 gpio_set_value(gpio->gpio, 0);
891 gpio = &pdata->gpio_reset;
893 ret = s5k4ecgx_config_gpio(gpio->gpio, gpio->level, "S5K4ECGX_RST");
895 s5k4ecgx_free_gpios(priv);
898 priv->gpio[RST] = *gpio;
899 if (gpio_is_valid(gpio->gpio))
900 gpio_set_value(gpio->gpio, 0);
905 static int s5k4ecgx_init_v4l2_ctrls(struct s5k4ecgx *priv)
907 const struct v4l2_ctrl_ops *ops = &s5k4ecgx_ctrl_ops;
908 struct v4l2_ctrl_handler *hdl = &priv->handler;
911 ret = v4l2_ctrl_handler_init(hdl, 4);
915 v4l2_ctrl_new_std(hdl, ops, V4L2_CID_BRIGHTNESS, -208, 127, 1, 0);
916 v4l2_ctrl_new_std(hdl, ops, V4L2_CID_CONTRAST, -127, 127, 1, 0);
917 v4l2_ctrl_new_std(hdl, ops, V4L2_CID_SATURATION, -127, 127, 1, 0);
919 /* Sharpness default is 24612, and then (24612/SHARPNESS_DIV) = 2 */
920 v4l2_ctrl_new_std(hdl, ops, V4L2_CID_SHARPNESS, -32704/SHARPNESS_DIV,
921 24612/SHARPNESS_DIV, 1, 2);
924 v4l2_ctrl_handler_free(hdl);
927 priv->sd.ctrl_handler = hdl;
932 static int s5k4ecgx_probe(struct i2c_client *client,
933 const struct i2c_device_id *id)
935 struct s5k4ecgx_platform_data *pdata = client->dev.platform_data;
936 struct v4l2_subdev *sd;
937 struct s5k4ecgx *priv;
941 dev_err(&client->dev, "platform data is missing!\n");
945 priv = devm_kzalloc(&client->dev, sizeof(struct s5k4ecgx), GFP_KERNEL);
949 mutex_init(&priv->lock);
953 /* Registering subdev */
954 v4l2_i2c_subdev_init(sd, client, &s5k4ecgx_ops);
955 /* Static name; NEVER use in new drivers! */
956 strscpy(sd->name, S5K4ECGX_DRIVER_NAME, sizeof(sd->name));
958 sd->internal_ops = &s5k4ecgx_subdev_internal_ops;
959 /* Support v4l2 sub-device user space API */
960 sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
962 priv->pad.flags = MEDIA_PAD_FL_SOURCE;
963 sd->entity.function = MEDIA_ENT_F_CAM_SENSOR;
964 ret = media_entity_pads_init(&sd->entity, 1, &priv->pad);
968 ret = s5k4ecgx_config_gpios(priv, pdata);
970 dev_err(&client->dev, "Failed to set gpios\n");
973 for (i = 0; i < S5K4ECGX_NUM_SUPPLIES; i++)
974 priv->supplies[i].supply = s5k4ecgx_supply_names[i];
976 ret = devm_regulator_bulk_get(&client->dev, S5K4ECGX_NUM_SUPPLIES,
979 dev_err(&client->dev, "Failed to get regulators\n");
982 ret = s5k4ecgx_init_v4l2_ctrls(priv);
986 priv->curr_pixfmt = &s5k4ecgx_formats[0];
987 priv->curr_frmsize = &s5k4ecgx_prev_sizes[0];
992 s5k4ecgx_free_gpios(priv);
994 media_entity_cleanup(&priv->sd.entity);
999 static int s5k4ecgx_remove(struct i2c_client *client)
1001 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1002 struct s5k4ecgx *priv = to_s5k4ecgx(sd);
1004 mutex_destroy(&priv->lock);
1005 s5k4ecgx_free_gpios(priv);
1006 v4l2_device_unregister_subdev(sd);
1007 v4l2_ctrl_handler_free(&priv->handler);
1008 media_entity_cleanup(&sd->entity);
1013 static const struct i2c_device_id s5k4ecgx_id[] = {
1014 { S5K4ECGX_DRIVER_NAME, 0 },
1017 MODULE_DEVICE_TABLE(i2c, s5k4ecgx_id);
1019 static struct i2c_driver v4l2_i2c_driver = {
1021 .name = S5K4ECGX_DRIVER_NAME,
1023 .probe = s5k4ecgx_probe,
1024 .remove = s5k4ecgx_remove,
1025 .id_table = s5k4ecgx_id,
1028 module_i2c_driver(v4l2_i2c_driver);
1030 MODULE_DESCRIPTION("Samsung S5K4ECGX 5MP SOC camera");
1031 MODULE_AUTHOR("Sangwook Lee <sangwook.lee@linaro.org>");
1032 MODULE_AUTHOR("Seok-Young Jang <quartz.jang@samsung.com>");
1033 MODULE_LICENSE("GPL");
1034 MODULE_FIRMWARE(S5K4ECGX_FIRMWARE);